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authorGuo Mang <mang.guo@intel.com>2017-07-28 14:51:13 +0800
committerGuo Mang <mang.guo@intel.com>2017-07-28 14:51:13 +0800
commite094e85fbd2e10e6635f07f4c4624354bef5f1f9 (patch)
tree07f2e6f26e73a01970bb340cb248d07303ad366b /Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
parent9d76578cf4304e42b1f5fee7d38d351a9a9b38e9 (diff)
downloadedk2-platforms-e094e85fbd2e10e6635f07f4c4624354bef5f1f9.tar.xz
Integrate MR3 FSP
Change code to integrate MR3 FSP. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec')
-rw-r--r--Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec1
1 files changed, 1 insertions, 0 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
index da728e8886..f17a3e0e55 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
@@ -161,6 +161,7 @@
gCsePrimaryIndexFileDataHobGuid = { 0x8d97b52d, 0x2805, 0x46a1, { 0x97, 0xd4, 0x07, 0xd4, 0x82, 0x7a, 0xa1, 0x5e}}
gFdoModeEnabledHobGuid = { 0x7e4b2acb, 0x7391, 0x408f, { 0xb1, 0x43, 0x3a, 0x0b, 0x07, 0xc6, 0xe1, 0x65}}
gEfiMemoryConfigVariableGuid = { 0xb0767cbc, 0x4705, 0x4d35, { 0x88, 0x66, 0x17, 0xa9, 0xb8, 0x5e, 0x38, 0x43}}
+ gFspVariableNvDataHobGuid = { 0xa034147d, 0x690c, 0x4154, { 0x8d, 0xe6, 0xc0, 0x44, 0x64, 0x1d, 0xe9, 0x42}}
#
# Reset type GUID for S5 charging
#