summaryrefslogtreecommitdiff
path: root/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
diff options
context:
space:
mode:
authorHeyi Guo <heyi.guo@linaro.org>2018-01-18 17:03:01 +0800
committerLeif Lindholm <leif.lindholm@linaro.org>2018-02-07 15:37:26 +0000
commitc6ee6de56b95efb952bef9eb59e93c22e52fbb79 (patch)
tree1a2331357bc8850c949bc7709db10e1999e132d6 /Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
parent759ab339929aaab6464bcd9440fae0cac5f68d2f (diff)
downloadedk2-platforms-c6ee6de56b95efb952bef9eb59e93c22e52fbb79.tar.xz
Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
Add PXM method for Pcie device, HNS device and SAS device. Add STA method for HNS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: hensonwang <wanghuiqiang@huawei.com> Signed-off-by: Ming Huang <huangming23@huawei.com> Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Diffstat (limited to 'Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl')
-rw-r--r--Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl9
1 files changed, 9 insertions, 0 deletions
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
index 11c28baf8c..7aa04afa29 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
@@ -233,6 +233,15 @@ Scope(_SB)
}
})
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
+ Method (_STA, 0, NotSerialized)
+ {
+ Return(0x0F)
+ }
+
//reset XGE port
//Arg0 : XGE port index in dsaf
//Arg1 : 0 reset, 1 cancle reset