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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-12-11 20:09:28 +0000 |
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committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-12-12 18:36:31 +0000 |
commit | 054921cef0f1e39c93c4a868aa1064a18c8dce34 (patch) | |
tree | dabf6697550097a338ef3df8b6a72bf6a8e5897e /Silicon/Hisilicon | |
parent | 676116c33577bde05d8141983e60af5dca682d1a (diff) | |
download | edk2-platforms-054921cef0f1e39c93c4a868aa1064a18c8dce34.tar.xz |
Silicon/SynQuacer/PlatformDxe: retrain PCIe switch links to Gen2 speed
For some reason, the Asmedia 118x PCIe switch needs a little help to
make sure that the downstream links train at Gen2 speed. So add a
PCI I/O protocol notifier that implements this for each PCIe downstream
port that is present on the system.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Hisilicon')
0 files changed, 0 insertions, 0 deletions