diff options
| author | Jiewen Yao <jiewen.yao@intel.com> | 2017-06-19 10:55:06 +0800 |
|---|---|---|
| committer | Jiewen Yao <jiewen.yao@intel.com> | 2017-06-20 15:12:29 +0800 |
| commit | 646b243c0e3ef49b98071ca2c3fec15299b4d72f (patch) | |
| tree | 00d62812fcedd3d1bf49692b863bb48a826f3ab0 /Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32 | |
| parent | f98787b719524d7ba9f2cefac0e8c8b8698cb02c (diff) | |
| download | edk2-platforms-646b243c0e3ef49b98071ca2c3fec15299b4d72f.tar.xz | |
Add KabylakeSiliconPkg
reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
reviewed-by: Michael A Kubacki <michael.a.kubacki@intel.com>
reviewed-by: Amy Chan <amy.chan@intel.com>
reviewed-by: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Diffstat (limited to 'Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32')
3 files changed, 222 insertions, 0 deletions
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.S b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.S new file mode 100644 index 0000000000..d8fe66154a --- /dev/null +++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.S @@ -0,0 +1,58 @@ +## @file
+#
+# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ASM_GLOBAL ASM_PFX(SaMmioRead64)
+ASM_PFX(SaMmioRead64):
+ subl $16, %esp
+ movq %mm0, (%esp) #Save mm0 on stack
+ movl 20(%esp), %edx #edx = Address
+ movq (%edx), %mm0 #mm0 = [Address]
+ movq %mm0, 8(%esp) #Store mm0 on Stack
+ movq (%esp), %mm0 #Restore mm0
+ emms
+ movl 8(%esp), %eax #eax = [Address][31:0]
+ movl 12(%esp), %edx #edx = [Address][64:32]
+ addl $16, %esp
+ ret
+
+#-----------------------------------------------------------------------------
+#
+# Section: SaMmioWrite64
+#
+# Description: Write 64 bits to the Memory Mapped I/O space.
+# Use MMX instruction for atomic access, because some MC registers have side effect.
+#
+# @param[in] Address - Memory mapped I/O address.
+# @param[in] Value - The value to write.
+#
+#-----------------------------------------------------------------------------
+
+#UINT64
+#SaMmioWrite64 (
+# IN UINTN Address,
+# IN UINT64 Value
+# )
+
+ASM_GLOBAL ASM_PFX(SaMmioWrite64)
+ASM_PFX(SaMmioWrite64):
+ subl $8, %esp
+ movq %mm0, (%esp) #Save mm0 on Stack
+ movl 12(%esp), %edx #edx = Address
+ movq 16(%esp), %mm0 #mm0 = Value
+ movq %mm0, (%edx) #[Address] = Value
+ movq (%esp), %mm0 #Restore mm0
+ emms
+ movl 16(%esp), %eax #eax = Value[31:0]
+ movl 20(%esp), %edx #edx = Value[64:32]
+ addl $8, %esp
+ ret
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.asm b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.asm new file mode 100644 index 0000000000..bef8aafe1a --- /dev/null +++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.asm @@ -0,0 +1,85 @@ +;; @file
+; This file provides assembly 64-bit atomic reads/writes required for memory initialization.
+;
+; Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials are licensed and made available under
+; the terms and conditions of the BSD License that accompanies this distribution.
+; The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;;
+
+.686p
+.xmm
+.model small, c
+
+.CODE
+
+;-----------------------------------------------------------------------------
+;
+; Section: SaMmioRead64
+;
+; Description: Read 64 bits from the Memory Mapped I/O space.
+; Use MMX instruction for atomic access, because some MC registers have side effect.
+;
+; @param[in] Address - Memory mapped I/O address.
+;
+;-----------------------------------------------------------------------------
+
+;UINT64
+;SaMmioRead64 (
+; IN UINTN Address
+; )
+
+SaMmioRead64 PROC NEAR PUBLIC
+ sub esp, 16
+ movq [esp], mm0 ;Save mm0 on stack
+ mov edx, [esp + 20] ;edx = Address
+ movq mm0, [edx] ;mm0 = [Address]
+ movq [esp + 8], mm0 ;Store mm0 on Stack
+ movq mm0, [esp] ;Restore mm0
+ emms
+ mov eax, [esp + 8] ;eax = [Address][31:0]
+ mov edx, [esp + 12] ;edx = [Address][64:32]
+ add esp, 16
+ ret
+SaMmioRead64 ENDP
+
+;-----------------------------------------------------------------------------
+;
+; Section: SaMmioWrite64
+;
+; Description: Write 64 bits to the Memory Mapped I/O space.
+; Use MMX instruction for atomic access, because some MC registers have side effect.
+;
+; @param[in] Address - Memory mapped I/O address.
+; @param[in] Value - The value to write.
+;
+;-----------------------------------------------------------------------------
+
+;UINT64
+;SaMmioWrite64 (
+; IN UINTN Address,
+; IN UINT64 Value
+; )
+
+SaMmioWrite64 PROC NEAR PUBLIC
+ sub esp, 8
+ movq [esp], mm0 ;Save mm0 on Stack
+ mov edx, [esp + 12] ;edx = Address
+ movq mm0, [esp + 16] ;mm0 = Value
+ movq [edx], mm0 ;[Address] = Value
+ movq mm0, [esp] ;Restore mm0
+ emms
+ mov eax, [esp + 16] ;eax = Value[31:0]
+ mov edx, [esp + 20] ;edx = Value[64:32]
+ add esp, 8
+ ret
+SaMmioWrite64 ENDP
+
+end
+
+
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm new file mode 100644 index 0000000000..5bc17065bd --- /dev/null +++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm @@ -0,0 +1,79 @@ +;; @file
+; This file provides assembly 64-bit atomic reads/writes required for memory initialization.
+;
+; Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials are licensed and made available under
+; the terms and conditions of the BSD License that accompanies this distribution.
+; The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;;
+
+
+SECTION .TEXT
+
+;-----------------------------------------------------------------------------
+;
+; Section: SaMmioRead64
+;
+; Description: Read 64 bits from the Memory Mapped I/O space.
+; Use MMX instruction for atomic access, because some MC registers have side effect.
+;
+; @param[in] Address - Memory mapped I/O address.
+;
+;-----------------------------------------------------------------------------
+
+;UINT64
+;SaMmioRead64 (
+; IN UINTN Address
+; )
+
+global ASM_PFX(SaMmioRead64)
+ASM_PFX(SaMmioRead64):
+ sub esp, 16
+ movq [esp], mm0 ;Save mm0 on stack
+ mov edx, [esp + 20] ;edx = Address
+ movq mm0, [edx] ;mm0 = [Address]
+ movq [esp + 8], mm0 ;Store mm0 on Stack
+ movq mm0, [esp] ;Restore mm0
+ emms
+ mov eax, [esp + 8] ;eax = [Address][31:0]
+ mov edx, [esp + 12] ;edx = [Address][64:32]
+ add esp, 16
+ ret
+
+;-----------------------------------------------------------------------------
+;
+; Section: SaMmioWrite64
+;
+; Description: Write 64 bits to the Memory Mapped I/O space.
+; Use MMX instruction for atomic access, because some MC registers have side effect.
+;
+; @param[in] Address - Memory mapped I/O address.
+; @param[in] Value - The value to write.
+;
+;-----------------------------------------------------------------------------
+
+;UINT64
+;SaMmioWrite64 (
+; IN UINTN Address,
+; IN UINT64 Value
+; )
+
+global ASM_PFX(SaMmioWrite64)
+ASM_PFX(SaMmioWrite64):
+ sub esp, 8
+ movq [esp], mm0 ;Save mm0 on Stack
+ mov edx, [esp + 12] ;edx = Address
+ movq mm0, [esp + 16] ;mm0 = Value
+ movq [edx], mm0 ;[Address] = Value
+ movq mm0, [esp] ;Restore mm0
+ emms
+ mov eax, [esp + 16] ;eax = Value[31:0]
+ mov edx, [esp + 20] ;edx = Value[64:32]
+ add esp, 8
+ ret
+
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