diff options
author | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-17 07:40:51 +0800 |
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committer | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-17 07:40:51 +0800 |
commit | 5c164e151c4047efc32f2bd0d6cad730e635c23c (patch) | |
tree | f6c3948c9087dec9dd634a3594d62856b9228f33 /Silicon/Intel/PurleySktPkg/Include/Guid/SocketCommonRcVariable.h | |
parent | ba037b96944c1d1a310867f1c6fb515d96444556 (diff) | |
download | edk2-platforms-5c164e151c4047efc32f2bd0d6cad730e635c23c.tar.xz |
PurleySktPkg: Initial version.
Cc: Isaac W Oram <isaac.w.oram@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Isaac W Oram <isaac.w.oram@intel.com>
Diffstat (limited to 'Silicon/Intel/PurleySktPkg/Include/Guid/SocketCommonRcVariable.h')
-rw-r--r-- | Silicon/Intel/PurleySktPkg/Include/Guid/SocketCommonRcVariable.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/Silicon/Intel/PurleySktPkg/Include/Guid/SocketCommonRcVariable.h b/Silicon/Intel/PurleySktPkg/Include/Guid/SocketCommonRcVariable.h new file mode 100644 index 0000000000..b2472e14bd --- /dev/null +++ b/Silicon/Intel/PurleySktPkg/Include/Guid/SocketCommonRcVariable.h @@ -0,0 +1,45 @@ +/** @file + +Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __SOCKET_COMMONRC_CONFIG_DATA_H__ +#define __SOCKET_COMMONRC_CONFIG_DATA_H__ + + +#include <UncoreCommonIncludes.h> +#include "SocketConfiguration.h" + +extern EFI_GUID gEfiSocketCommonRcVariableGuid; +#define SOCKET_COMMONRC_CONFIGURATION_NAME L"SocketCommonRcConfig" + +#pragma pack(1) +typedef struct { + // + // Common Section of RC + // + UINT32 MmiohBase; + UINT16 MmiohSize; + UINT8 MmcfgBase; + UINT8 MmcfgSize; + UINT8 IsocEn; + UINT8 NumaEn; + UINT8 MirrorMode; + UINT8 LockStep; + UINT8 CpuStepping; + UINT8 SystemRasType; + UINT32 FpgaPresentBitMap; +} SOCKET_COMMONRC_CONFIGURATION; +#pragma pack() + +#endif + + |