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author | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-17 07:40:51 +0800 |
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committer | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-17 07:40:51 +0800 |
commit | 5c164e151c4047efc32f2bd0d6cad730e635c23c (patch) | |
tree | f6c3948c9087dec9dd634a3594d62856b9228f33 /Silicon/Intel/PurleySktPkg/Library/ProcMemInit/Chip/Include/CpuPciAccessCommon.h | |
parent | ba037b96944c1d1a310867f1c6fb515d96444556 (diff) | |
download | edk2-platforms-5c164e151c4047efc32f2bd0d6cad730e635c23c.tar.xz |
PurleySktPkg: Initial version.
Cc: Isaac W Oram <isaac.w.oram@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Isaac W Oram <isaac.w.oram@intel.com>
Diffstat (limited to 'Silicon/Intel/PurleySktPkg/Library/ProcMemInit/Chip/Include/CpuPciAccessCommon.h')
-rw-r--r-- | Silicon/Intel/PurleySktPkg/Library/ProcMemInit/Chip/Include/CpuPciAccessCommon.h | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/Silicon/Intel/PurleySktPkg/Library/ProcMemInit/Chip/Include/CpuPciAccessCommon.h b/Silicon/Intel/PurleySktPkg/Library/ProcMemInit/Chip/Include/CpuPciAccessCommon.h new file mode 100644 index 0000000000..2b8c367f5e --- /dev/null +++ b/Silicon/Intel/PurleySktPkg/Library/ProcMemInit/Chip/Include/CpuPciAccessCommon.h @@ -0,0 +1,89 @@ +/** @file + +Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> +This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _CPU_PCI_ACCESS_COMMON_H_ +#define _CPU_PCI_ACCESS_COMMON_H_ + +#include <SysHost.h>
+ +/** + + Indetifies the bus number for given SocId & BoxType + + @param host - Pointer to sysHost, the system host (root) structure + @param SocId - CPU Socket Node number (Socket ID) + @param BoxType - Box Type; values come from CpuPciAccess.h + @param BoxInst - IIO PCIE Box Instance + @param FuncBlk - Function Block within IIO + @param CpuCsrAccessVar - Pointer to CSR access data + + @retval (UINT32) PCI bus number + +**/ +UINT32 +GetBusNumber ( + PSYSHOST host, + UINT8 SocId, + UINT8 BoxType, + UINT8 BoxInst, + UINT8 FuncBlk, + CPU_CSR_ACCESS_VAR *CpuCsrAccessVar + ); + +/** + + Indetifies the device number for given SocId & BoxType + + @param host - Pointer to sysHost, the system host (root) structure + @param BoxType - Box Type; values come from CpuPciAccess.h + @param BoxInst - IIO PCIE Box Instance + @param FuncBlk - Function Block within IIO + @param CpuCsrAccessVar - Pointer to CSR access data + + @retval (UINT32) PCI device number + +**/ +UINT32 +GetDeviceNumber ( + PSYSHOST host, + UINT8 BoxType, + UINT8 BoxInst, + UINT8 FuncBlk, + CPU_CSR_ACCESS_VAR *CpuCsrAccessVar + ); + +/** + + Indetifies the function number for given SocId & BoxType + + @param host - Pointer to sysHost, the system host (root) structure + @param BoxType - Box Type; values come from CpuPciAccess.h + @param BoxInst - IIO PCIE Box Instance + @param FuncBlk - Function Block within IIO + @param CpuCsrAccessVar - Pointer to CSR access data + + @retval (UINT32) PCI function number + +**/ +UINT32 +GetFunctionNumber ( + PSYSHOST host, + UINT8 BoxType, + UINT8 BoxInst, + UINT8 FuncBlk, + CPU_CSR_ACCESS_VAR *CpuCsrAccessVar + ); + +#endif // _CPU_PCI_ACCESS_COMMON_H_ + + |