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author | Marcin Wojtas <mw@semihalf.com> | 2017-05-18 08:26:48 +0200 |
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committer | Marcin Wojtas <mw@semihalf.com> | 2017-10-05 16:58:06 +0200 |
commit | 5d3bc1fdd28bcc300adb1290aae9f5e0f71546e9 (patch) | |
tree | 083ae7d8b4188588c4e7bf975c4a9c92f731523b /Silicon/Marvell/Documentation/PortingGuide.txt | |
parent | a46a211fe350c74b095f3d83781d778912ac1491 (diff) | |
download | edk2-platforms-5d3bc1fdd28bcc300adb1290aae9f5e0f71546e9.tar.xz |
Marvell/Drivers: MvSpiFlash: Fix usage of erase size parameter
Although, hitherto support allowed for using configurable EraseSize,
the erase command was fixed to CMD_ERASE_64K. Also it was
assumed that EraseSize equals SectorSize, which is not true
for some flash devices. Fix both issues by adding new PCD
(gMarvellTokenSpaceGuid.PcdSpiFlashPageSize) and using
this parameter properly in MvSpiFlashUpdate routine instead
of the EraseSize. Also erase command is adjusted to the settings.
Update PortingGuide accordingly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/Marvell/Documentation/PortingGuide.txt')
-rw-r--r-- | Silicon/Marvell/Documentation/PortingGuide.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt index 2be658e394..83ebe9df5b 100644 --- a/Silicon/Marvell/Documentation/PortingGuide.txt +++ b/Silicon/Marvell/Documentation/PortingGuide.txt @@ -298,6 +298,9 @@ Folowing PCDs for spi flash driver configuration must be set properly: - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize (Size of SPI flash page) + - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize + (Size of SPI flash sector, 65536 bytes by default) + - gMarvellTokenSpaceGuid.PcdSpiFlashId (Id of SPI flash) |