summaryrefslogtreecommitdiff
path: root/Silicon
diff options
context:
space:
mode:
authorzwei4 <david.wei@intel.com>2017-09-21 11:24:14 +0800
committerzwei4 <david.wei@intel.com>2017-09-21 11:28:27 +0800
commit390cf8dd3c89eb3784ac4aa27437f9125cce0db3 (patch)
treef411490d108c8b1f6088060ded239c51f9b7022d /Silicon
parent8086a8f8f63a24618309429ce545cb6a39972b15 (diff)
downloadedk2-platforms-390cf8dd3c89eb3784ac4aa27437f9125cce0db3.tar.xz
Calibrate PMIC IMON.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Silicon')
-rw-r--r--Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/SaRegs.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/SaRegs.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/SaRegs.h
index 5dd8440926..e985e75c48 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/SaRegs.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/SaRegs.h
@@ -15,7 +15,7 @@
Registers / bits of new devices introduced in a SA generation will be just named
as "_SA_" without [generation_name] inserted.
- Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -60,6 +60,12 @@
#define R_SA_MCHBAR_REG 0x48
//
+// IA-Punit Mailbox on MCH BAR
+//
+#define R_BIOS_MAILBOX_DATA 0x7080
+#define R_BIOS_MAILBOX_INTERFACE 0x7084
+
+//
// Silicon Steppings
//
#define V_SA_MC_RID_0 0x00