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| author | zwei4 <david.wei@intel.com> | 2017-09-05 10:08:20 +0800 |
|---|---|---|
| committer | zwei4 <david.wei@intel.com> | 2017-09-05 10:14:58 +0800 |
| commit | c88dcf67e0f70ff082ede5c7d96f3fa421656cee (patch) | |
| tree | f7a6a1a4dd647de976d4a477b3f407279a2e1e26 /Silicon | |
| parent | 499dcaae918605e51a200a7f5aabd375f89cd30a (diff) | |
| download | edk2-platforms-c88dcf67e0f70ff082ede5c7d96f3fa421656cee.tar.xz | |
Change reset type.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Silicon')
| -rw-r--r-- | Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c index 36ac0e3d03..2bac0a5e34 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c @@ -296,7 +296,7 @@ IntelScResetSystem ( case EfiResetCold:
InitialData = V_RST_CNT_HARDSTARTSTATE;
- OutputData = V_RST_CNT_FULLRESET;
+ OutputData = V_RST_CNT_HARDRESET;
break;
case EfiResetShutdown:
|