summaryrefslogtreecommitdiff
path: root/Silicon
diff options
context:
space:
mode:
authorLu, ShifeiX A <shifeix.a.lu@intel.com>2017-09-12 13:50:30 +0800
committerzwei4 <david.wei@intel.com>2017-09-12 14:00:55 +0800
commitd0985c22d5c2c7e24fcf82f8bd77dad44eb342b8 (patch)
tree1681750055705044ae6b9001b99eb63d85c359a2 /Silicon
parent57806691194ee7b5509e6992530c4696508ab85c (diff)
downloadedk2-platforms-d0985c22d5c2c7e24fcf82f8bd77dad44eb342b8.tar.xz
Change Reset Type
Change Reset Type according to different Board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com>
Diffstat (limited to 'Silicon')
-rw-r--r--Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c
index 2bac0a5e34..96dd4f7e45 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c
@@ -1,7 +1,7 @@
/** @file
Reset Architectural Protocol implementation.
- Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -289,14 +289,14 @@ IntelScResetSystem (
switch (ResetType) {
case EfiResetWarm:
InitialData = V_RST_CNT_HARDSTARTSTATE;
- OutputData = mResetInstance->ResetSelect;
+ OutputData = V_RST_CNT_HARDRESET;
if (mResetInstance->ResetSelect == V_RST_CNT_FULLRESET) {
}
break;
case EfiResetCold:
InitialData = V_RST_CNT_HARDSTARTSTATE;
- OutputData = V_RST_CNT_HARDRESET;
+ OutputData = mResetInstance->ResetSelect;
break;
case EfiResetShutdown: