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| author | Guo Mang <mang.guo@intel.com> | 2017-07-28 14:51:13 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-07-28 14:51:13 +0800 |
| commit | e094e85fbd2e10e6635f07f4c4624354bef5f1f9 (patch) | |
| tree | 07f2e6f26e73a01970bb340cb248d07303ad366b /Silicon | |
| parent | 9d76578cf4304e42b1f5fee7d38d351a9a9b38e9 (diff) | |
| download | edk2-platforms-e094e85fbd2e10e6635f07f4c4624354bef5f1f9.tar.xz | |
Integrate MR3 FSP
Change code to integrate MR3 FSP.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Silicon')
4 files changed, 11 insertions, 20 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec index da728e8886..f17a3e0e55 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec @@ -161,6 +161,7 @@ gCsePrimaryIndexFileDataHobGuid = { 0x8d97b52d, 0x2805, 0x46a1, { 0x97, 0xd4, 0x07, 0xd4, 0x82, 0x7a, 0xa1, 0x5e}}
gFdoModeEnabledHobGuid = { 0x7e4b2acb, 0x7391, 0x408f, { 0xb1, 0x43, 0x3a, 0x0b, 0x07, 0xc6, 0xe1, 0x65}}
gEfiMemoryConfigVariableGuid = { 0xb0767cbc, 0x4705, 0x4d35, { 0x88, 0x66, 0x17, 0xa9, 0xb8, 0x5e, 0x38, 0x43}}
+ gFspVariableNvDataHobGuid = { 0xa034147d, 0x690c, 0x4154, { 0x8d, 0xe6, 0xc0, 0x44, 0x64, 0x1d, 0xe9, 0x42}}
#
# Reset type GUID for S5 charging
#
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm index 12d274676c..905e615a2c 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/ResetVector/Vtf0/Ia32/InitNEM.asm @@ -183,7 +183,7 @@ istruc HobStruc dd 0x00100000 ; .CarSize
dd 0xFFF00000 ; .IBBSource = Not used
dd 0xFEF45000 ; .IBBBase = .CarBase
- dd 0x0008D000 ; .IBBSize = size of (FVIBBM.fv+FSP_M.fv) = BLD_IBBM_SIZE + FSP_IBBM_SIZE = 0x8D000
+ dd 0x0008E000 ; .IBBSize = size of (FVIBBM.fv+FSP_M.fv) = BLD_IBBM_SIZE + FSP_IBBM_SIZE = 0x8D000
dd 0xFFFFF000 ; .IBBLSource = 0x100000000 - .IBBLSize = PcdFlashFvIBBLBase
dd 0xFEF40000 ; .IBBLBase = .IBBBase + .IBBSize
dd 0x00001000 ; .IBBLSize = PcdFlashFvIBBLSize = FLASH_REGION_FV_IBBL_SIZE in .fdf
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectData/BXTP/Include/MmrcProjectDefinitionsGenerated.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectData/BXTP/Include/MmrcProjectDefinitionsGenerated.h index b0b6a01376..b89c0d075a 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectData/BXTP/Include/MmrcProjectDefinitionsGenerated.h +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectData/BXTP/Include/MmrcProjectDefinitionsGenerated.h @@ -15,7 +15,7 @@ here. This file needs to be included by most MMRC components,
including Mmrc.h.
- Copyright (c) 2005 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2005 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -97,7 +97,7 @@ //
// Minor Version
//
-#define VERSION_MINOR 0
+#define VERSION_MINOR 20
//
// Print MRC functions as they execute
//
@@ -777,10 +777,6 @@ //
//
//
-#define LDO_TRAINING 0
-//
-//
-//
#define CTLE_MIN 0
//
//
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectIndependent/Include/MmrcData.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectIndependent/Include/MmrcData.h index eb0f973a29..5e906fbd81 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectIndependent/Include/MmrcData.h +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/MemoryInit/Mmrc/ProjectIndependent/Include/MmrcData.h @@ -22,16 +22,9 @@ #include <stdio.h>
#endif
-#if USE_64_BIT_VARIABLES
-#define UINTX UINT64
-#else
-#define UINTX UINT32
-#endif
-typedef UINT32 MMRC_STATUS;
-
-//
-// MRC version description.
-//
+///
+/// MRC version description.
+///
typedef union {
struct{
UINT8 Major; ///< Major version number
@@ -179,8 +172,8 @@ typedef struct { //
typedef struct {
UINT16 ScramblerSeed[MAX_CHANNELS];
- UINT32 SaMemCfgCrc;
- UINT32 MrcParamsSaveRestoreCrc;
+ UINT16 LP4_MR4VALUE[MAX_CHANNELS];
+ UINT32 BootVariableNvDataCrc;
} BOOT_VARIABLE_NV_DATA;
typedef struct {
@@ -233,7 +226,6 @@ typedef struct { UINT8 ASR_Supported;
UINT8 OdtHigh;
UINT16 LP4_MR0VALUE;
- UINT16 LP4_MR4VALUE;
CHANNEL_OPTION ChOption;
} CHANNEL;
@@ -254,6 +246,8 @@ typedef struct { UINT32 MuxcodeNv[MaxFrequencyIndex];
BOOLEAN SetupMaxPiDone[MaxFrequencyIndex];
UINT32 DataSize;
+ UINT32 SaMemCfgCrc;
+ UINT32 MrcParamsSaveRestoreCrc;
} MRC_PARAMS_SAVE_RESTORE;
//
|