summaryrefslogtreecommitdiff
path: root/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm
diff options
context:
space:
mode:
authorJeff Fan <jeff.fan@intel.com>2013-11-22 06:24:41 +0000
committervanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524>2013-11-22 06:24:41 +0000
commite41aad152135f27ae1da142454af85a6597719ee (patch)
tree07138e5c40f53ca941863f27f8ad409019556077 /UefiCpuPkg/CpuDxe/X64/CpuAsm.asm
parent57f360f2615818366b39ff21fcd0201154be4ab2 (diff)
downloadedk2-platforms-e41aad152135f27ae1da142454af85a6597719ee.tar.xz
1. Separated DxeSmmCpuExceptionHandlerLib.inf into 2 instance DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf.
2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions. 3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1. Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg/CpuDxe/X64/CpuAsm.asm')
-rw-r--r--UefiCpuPkg/CpuDxe/X64/CpuAsm.asm279
1 files changed, 1 insertions, 278 deletions
diff --git a/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm b/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm
index 68fcd3f404..c71b06a81e 100644
--- a/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm
+++ b/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm
@@ -1,7 +1,7 @@
TITLE CpuAsm.asm:
;------------------------------------------------------------------------------
;*
-;* Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
+;* Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
;* This program and the accompanying materials
;* are licensed and made available under the terms and conditions of the BSD License
;* which accompanies this distribution. The full text of the license may be found at
@@ -18,18 +18,6 @@
.code
-EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
-
-;
-; point to the external interrupt vector table
-;
-ExternalVectorTablePtr QWORD 0
-
-InitializeExternalVectorTablePtr PROC PUBLIC
- mov ExternalVectorTablePtr, rcx
- ret
-InitializeExternalVectorTablePtr ENDP
-
;------------------------------------------------------------------------------
; VOID
; SetCodeSelector (
@@ -62,270 +50,5 @@ SetDataSelectors PROC PUBLIC
ret
SetDataSelectors ENDP
-;---------------------------------------;
-; CommonInterruptEntry ;
-;---------------------------------------;
-; The follow algorithm is used for the common interrupt routine.
-
-CommonInterruptEntry PROC PUBLIC
- cli
- ;
- ; All interrupt handlers are invoked through interrupt gates, so
- ; IF flag automatically cleared at the entry point
- ;
- ;
- ; Calculate vector number
- ;
- xchg rcx, [rsp] ; get the return address of call, actually, it is the address of vector number.
- movzx ecx, word ptr [rcx]
- cmp ecx, 32 ; Intel reserved vector for exceptions?
- jae NoErrorCode
- bt mErrorCodeFlag, ecx
- jc @F
-
-NoErrorCode:
-
- ;
- ; Push a dummy error code on the stack
- ; to maintain coherent stack map
- ;
- push [rsp]
- mov qword ptr [rsp + 8], 0
-@@:
- push rbp
- mov rbp, rsp
-
- ;
- ; Stack:
- ; +---------------------+ <-- 16-byte aligned ensured by processor
- ; + Old SS +
- ; +---------------------+
- ; + Old RSP +
- ; +---------------------+
- ; + RFlags +
- ; +---------------------+
- ; + CS +
- ; +---------------------+
- ; + RIP +
- ; +---------------------+
- ; + Error Code +
- ; +---------------------+
- ; + RCX / Vector Number +
- ; +---------------------+
- ; + RBP +
- ; +---------------------+ <-- RBP, 16-byte aligned
- ;
-
-
- ;
- ; Since here the stack pointer is 16-byte aligned, so
- ; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
- ; is 16-byte aligned
- ;
-
-;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- push r15
- push r14
- push r13
- push r12
- push r11
- push r10
- push r9
- push r8
- push rax
- push qword ptr [rbp + 8] ; RCX
- push rdx
- push rbx
- push qword ptr [rbp + 48] ; RSP
- push qword ptr [rbp] ; RBP
- push rsi
- push rdi
-
-;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
- movzx rax, word ptr [rbp + 56]
- push rax ; for ss
- movzx rax, word ptr [rbp + 32]
- push rax ; for cs
- mov rax, ds
- push rax
- mov rax, es
- push rax
- mov rax, fs
- push rax
- mov rax, gs
- push rax
-
- mov [rbp + 8], rcx ; save vector number
-
-;; UINT64 Rip;
- push qword ptr [rbp + 24]
-
-;; UINT64 Gdtr[2], Idtr[2];
- xor rax, rax
- push rax
- push rax
- sidt [rsp]
- xchg rax, [rsp + 2]
- xchg rax, [rsp]
- xchg rax, [rsp + 8]
-
- xor rax, rax
- push rax
- push rax
- sgdt [rsp]
- xchg rax, [rsp + 2]
- xchg rax, [rsp]
- xchg rax, [rsp + 8]
-
-;; UINT64 Ldtr, Tr;
- xor rax, rax
- str ax
- push rax
- sldt ax
- push rax
-
-;; UINT64 RFlags;
- push qword ptr [rbp + 40]
-
-;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- mov rax, cr8
- push rax
- mov rax, cr4
- or rax, 208h
- mov cr4, rax
- push rax
- mov rax, cr3
- push rax
- mov rax, cr2
- push rax
- xor rax, rax
- push rax
- mov rax, cr0
- push rax
-
-;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- mov rax, dr7
- push rax
- mov rax, dr6
- push rax
- mov rax, dr3
- push rax
- mov rax, dr2
- push rax
- mov rax, dr1
- push rax
- mov rax, dr0
- push rax
-
-;; FX_SAVE_STATE_X64 FxSaveState;
- sub rsp, 512
- mov rdi, rsp
- db 0fh, 0aeh, 07h ;fxsave [rdi]
-
-;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
- cld
-
-;; UINT32 ExceptionData;
- push qword ptr [rbp + 16]
-
-;; call into exception handler
- mov rcx, [rbp + 8]
- mov rax, ExternalVectorTablePtr ; get the interrupt vectors base
- mov rax, [rax + rcx * 8]
- or rax, rax ; NULL?
-
- je nonNullValue;
-
-;; Prepare parameter and call
-; mov rcx, [rbp + 8]
- mov rdx, rsp
- ;
- ; Per X64 calling convention, allocate maximum parameter stack space
- ; and make sure RSP is 16-byte aligned
- ;
- sub rsp, 4 * 8 + 8
- call rax
- add rsp, 4 * 8 + 8
-
-nonNullValue:
- cli
-;; UINT64 ExceptionData;
- add rsp, 8
-
-;; FX_SAVE_STATE_X64 FxSaveState;
-
- mov rsi, rsp
- db 0fh, 0aeh, 0Eh ; fxrstor [rsi]
- add rsp, 512
-
-;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-;; Skip restoration of DRx registers to support in-circuit emualators
-;; or debuggers set breakpoint in interrupt/exception context
- add rsp, 8 * 6
-
-;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- pop rax
- mov cr0, rax
- add rsp, 8 ; not for Cr1
- pop rax
- mov cr2, rax
- pop rax
- mov cr3, rax
- pop rax
- mov cr4, rax
- pop rax
- mov cr8, rax
-
-;; UINT64 RFlags;
- pop qword ptr [rbp + 40]
-
-;; UINT64 Ldtr, Tr;
-;; UINT64 Gdtr[2], Idtr[2];
-;; Best not let anyone mess with these particular registers...
- add rsp, 48
-
-;; UINT64 Rip;
- pop qword ptr [rbp + 24]
-
-;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
- pop rax
- ; mov gs, rax ; not for gs
- pop rax
- ; mov fs, rax ; not for fs
- ; (X64 will not use fs and gs, so we do not restore it)
- pop rax
- mov es, rax
- pop rax
- mov ds, rax
- pop qword ptr [rbp + 32] ; for cs
- pop qword ptr [rbp + 56] ; for ss
-
-;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- pop rdi
- pop rsi
- add rsp, 8 ; not for rbp
- pop qword ptr [rbp + 48] ; for rsp
- pop rbx
- pop rdx
- pop rcx
- pop rax
- pop r8
- pop r9
- pop r10
- pop r11
- pop r12
- pop r13
- pop r14
- pop r15
-
- mov rsp, rbp
- pop rbp
- add rsp, 16
- iretq
-
-CommonInterruptEntry ENDP
-
END