Add Local APIC Library class defining APIs for common Local APIC operations. Add two Local APIC library instances, one is for xAPIC mode only, the other is for x2APIC capable processors which have xAPIC and x2APIC modes.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10814 6f19259b-4bc3-4df7-8a09-765794883524
author: rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> 2010-08-23 06:34:39 +0000
committer: rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> 2010-08-23 06:34:39 +0000
commit: bf73cc4bbcdaa76bad31875bce6ff9dd0d91eb09 (patch)
tree: 09e2da4840bc71ec04c82eb002f1b7142d010f76 /UefiCpuPkg/Include/Library
parent: 7ae58ec2eaaad7a4a22092266c407d76c12ed69a (diff)
download: edk2-platforms-bf73cc4bbcdaa76bad31875bce6ff9dd0d91eb09.tar.xz
1 files changed, 270 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Library/LocalApicLib.h b/UefiCpuPkg/Include/Library/LocalApicLib.h
new file mode 100644
index 0000000000..58e3474e88
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/LocalApicLib.h
@@ -0,0 +1,270 @@
+/** @file
+  Public include file for Local APIC library.
+
+  Local APIC library assumes local APIC is enabled. It does not
+  handles cases where local APIC is disabled.
+
+  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __LOCAL_APIC_LIB_H__
+#define __LOCAL_APIC_LIB_H__
+
+#define LOCAL_APIC_MODE_XAPIC   0x1  ///< xAPIC mode.
+#define LOCAL_APIC_MODE_X2APIC  0x2  ///< x2APIC mode.
+
+/**
+  Get the current local APIC mode.
+
+  If local APIC is disabled, then ASSERT.
+
+  @retval LOCAL_APIC_MODE_XAPIC  current APIC mode is xAPIC.
+  @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.
+**/
+UINTN
+EFIAPI
+GetApicMode (
+  VOID
+  );
+
+/**
+  Set the current local APIC mode.
+
+  If the specified local APIC mode is not valid, then ASSERT.
+  If the specified local APIC mode can't be set as current, then ASSERT.
+
+  @param ApicMode APIC mode to be set.
+**/
+VOID
+EFIAPI
+SetApicMode (
+  IN UINTN  ApicMode
+  );
+
+/**
+  Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
+
+  In xAPIC mode, the initial local APIC ID is 8-bit, and may be different from current APIC ID.
+  In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case, 
+  the 32-bit local APIC ID is returned as initial APIC ID.
+
+  @return  32-bit initial local APIC ID of the executing processor.
+**/
+UINT32
+EFIAPI
+GetInitialApicId (
+  VOID
+  );
+
+/**
+  Get the local APIC ID of the executing processor.
+
+  @return  32-bit local APIC ID of the executing processor.
+**/
+UINT32
+EFIAPI
+GetApicId (
+  VOID
+  );
+
+/**
+  Send a SMI IPI to a specified target processor.
+
+  This function returns after the IPI has been accepted by the target processor. 
+
+  @param  ApicId   Specify the local APIC ID of the target processor.
+**/
+VOID
+EFIAPI
+SendSmiIpi (
+  IN UINT32          ApicId
+  );
+
+/**
+  Send a SMI IPI to all processors excluding self.
+
+  This function returns after the IPI has been accepted by the target processors. 
+**/
+VOID
+EFIAPI
+SendSmiIpiAllExcludingSelf (
+  VOID
+  );
+
+/**
+  Send an INIT IPI to a specified target processor.
+
+  This function returns after the IPI has been accepted by the target processor. 
+
+  @param  ApicId   Specify the local APIC ID of the target processor.
+**/
+VOID
+EFIAPI
+SendInitIpi (
+  IN UINT32          ApicId
+  );
+
+/**
+  Send an INIT IPI to all processors excluding self.
+
+  This function returns after the IPI has been accepted by the target processors. 
+**/
+VOID
+EFIAPI
+SendInitIpiAllExcludingSelf (
+  VOID
+  );
+
+/**
+  Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
+
+  This function returns after the IPI has been accepted by the target processor. 
+
+  if StartupRoutine >= 1M, then ASSERT.
+  if StartupRoutine is not multiple of 4K, then ASSERT.
+
+  @param  ApicId          Specify the local APIC ID of the target processor.
+  @param  StartupRoutine  Points to a start-up routine which is below 1M physical
+                          address and 4K aligned.
+**/
+VOID
+EFIAPI
+SendInitSipiSipi (
+  IN UINT32          ApicId,
+  IN UINT32          StartupRoutine
+  );
+
+/**
+  Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
+
+  This function returns after the IPI has been accepted by the target processors. 
+
+  if StartupRoutine >= 1M, then ASSERT.
+  if StartupRoutine is not multiple of 4K, then ASSERT.
+
+  @param  StartupRoutine    Points to a start-up routine which is below 1M physical
+                            address and 4K aligned.
+**/
+VOID
+EFIAPI
+SendInitSipiSipiAllExcludingSelf (
+  IN UINT32          StartupRoutine
+  );
+
+/**
+  Programming Virtual Wire Mode.
+
+  This function programs the local APIC for virtual wire mode following
+  the example described in chapter A.3 of the MP 1.4 spec.
+
+  IOxAPIC is not involved in this type of virtual wire mode.
+**/
+VOID
+EFIAPI
+ProgramVirtualWireMode (
+  VOID
+  );
+
+/**
+  Get the divide value from the DCR (Divide Configuration Register) by which
+  the processor's bus clock is divided to form the time base for the APIC timer.
+
+  @return The divide value is one of 1,2,4,8,16,32,64,128.
+**/
+UINTN
+EFIAPI
+GetApicTimerDivisor (
+  VOID
+  );
+
+/**
+  Read the initial count value from the init-count register.
+
+  @return The initial count value read from the init-count register.
+**/
+UINT32
+EFIAPI
+GetApicTimerInitCount (
+  VOID
+  );
+
+/**
+  Read the current count value from the current-count register.
+
+  @return The current count value read from the current-count register.
+**/
+UINT32
+EFIAPI
+GetApicTimerCurrentCount (
+  VOID
+  );
+
+/**
+  Initialize the local APIC timer.
+
+  The local APIC timer is initialized and enabled.
+
+  @param DivideValue   The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
+                       If it is 0, then use the current divide value in the DCR.
+  @param InitCount     The initial count value.
+  @param PeriodicMode  If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
+  @param Vector        The timer interrupt vector number.
+**/
+VOID
+EFIAPI
+InitializeApicTimer (
+  IN UINTN   DivideValue,
+  IN UINT32  InitCount,
+  IN BOOLEAN PeriodicMode,
+  IN UINT8   Vector
+  );
+
+/**
+  Enable the local APIC timer interrupt.
+**/
+VOID
+EFIAPI
+EnableApicTimerInterrupt (
+  VOID
+  );
+
+/**
+  Disable the local APIC timer interrupt.
+**/
+VOID
+EFIAPI
+DisableApicTimerInterrupt (
+  VOID
+  );
+
+/**
+  Get the local APIC timer interrupt state.
+
+  @retval TRUE  The local APIC timer interrupt is enabled.
+  @retval FALSE The local APIC timer interrupt is disabled.
+**/
+BOOLEAN
+EFIAPI
+GetApicTimerInterruptState (
+  VOID
+  );
+
+/**
+  Send EOI to the local APIC.
+**/
+VOID
+EFIAPI
+SendApicEoi (
+  VOID
+  );
+
+#endif
+
author	rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524>	2010-08-23 06:34:39 +0000
committer	rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524>	2010-08-23 06:34:39 +0000
commit	bf73cc4bbcdaa76bad31875bce6ff9dd0d91eb09 (patch)
tree	09e2da4840bc71ec04c82eb002f1b7142d010f76 /UefiCpuPkg/Include/Library
parent	7ae58ec2eaaad7a4a22092266c407d76c12ed69a (diff)
download	edk2-platforms-bf73cc4bbcdaa76bad31875bce6ff9dd0d91eb09.tar.xz