diff options
| author | qhuang8 <qhuang8@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-11-25 04:25:02 +0000 |
|---|---|---|
| committer | qhuang8 <qhuang8@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-11-25 04:25:02 +0000 |
| commit | 989322c384b180520803654acb69f53de83e45d6 (patch) | |
| tree | 168ef559295a032111223e124fba82c017edc16e /UefiCpuPkg/Library/BaseUefiCpuLib/X64 | |
| parent | 77882e266e58eea54ae7318365ef7cb9d117d6c4 (diff) | |
| download | edk2-platforms-989322c384b180520803654acb69f53de83e45d6.tar.xz | |
Introduce UefiCpuLib library class in UefiCpuPkg and add one instance of BaseUefiCpuLib. The major purpose of this library class / instance is to provide some routines that are generic for IA32 family CPU
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9480 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg/Library/BaseUefiCpuLib/X64')
| -rw-r--r-- | UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S | 54 | ||||
| -rw-r--r-- | UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm | 59 |
2 files changed, 113 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S new file mode 100644 index 0000000000..3d1556daa2 --- /dev/null +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S @@ -0,0 +1,54 @@ +#------------------------------------------------------------------------------ +#* +#* Copyright 2009, Intel Corporation +#* All rights reserved. This program and the accompanying materials +#* are licensed and made available under the terms and conditions of the BSD License +#* which accompanies this distribution. The full text of the license may be found at +#* http://opensource.org/licenses/bsd-license.php +#* +#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +#* +#* +#------------------------------------------------------------------------------ + + +#
+# Float control word initial value:
+# all exceptions masked, double-precision, round-to-nearest
+#
+ASM_PFX(mFpuControlWord): .word 0x027F
+#
+# Multimedia-extensions control word:
+# all exceptions masked, round-to-nearest, flush to zero for masked underflow
+#
+ASM_PFX(mMmxControlWord): .long 0x01F80
+ +# +# Initializes floating point units for requirement of UEFI specification.
+#
+# This function initializes floating-point control word to 0x027F (all exceptions
+# masked,double-precision, round-to-nearest) and multimedia-extensions control word
+# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+# for masked underflow). +# +ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits) +ASM_PFX(InitializeFloatingPointUnits): + + #
+ # Initialize floating point units
+ #
+ finit
+ fldcw ASM_PFX(mFpuControlWord)
+ + # + # Set OSFXSR bit 9 in CR4 + # + movq %cr4, %rax + or $200, %rax + movq %rax, %cr4 + + ldmxcsr ASM_PFX(mMmxControlWord) + + ret + diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm new file mode 100644 index 0000000000..34c6de6f53 --- /dev/null +++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm @@ -0,0 +1,59 @@ +;------------------------------------------------------------------------------
+;*
+;* Copyright 2009, Intel Corporation
+;* All rights reserved. This program and the accompanying materials
+;* are licensed and made available under the terms and conditions of the BSD License
+;* which accompanies this distribution. The full text of the license may be found at
+;* http://opensource.org/licenses/bsd-license.php
+;*
+;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;*
+;*
+;------------------------------------------------------------------------------
+
+
+.const
+;
+; Float control word initial value:
+; all exceptions masked, double-precision, round-to-nearest
+;
+mFpuControlWord DW 027Fh
+;
+; Multimedia-extensions control word:
+; all exceptions masked, round-to-nearest, flush to zero for masked underflow
+;
+mMmxControlWord DD 01F80h
+
+.code
+
+
+; +; Initializes floating point units for requirement of UEFI specification.
+;
+; This function initializes floating-point control word to 0x027F (all exceptions
+; masked,double-precision, round-to-nearest) and multimedia-extensions control word
+; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+; for masked underflow). +;
+InitializeFloatingPointUnits PROC PUBLIC
+
+ ;
+ ; Initialize floating point units
+ ;
+ finit
+ fldcw mFpuControlWord
+
+ ;
+ ; Set OSFXSR bit 9 in CR4
+ ;
+ mov rax, cr4
+ or rax, BIT9
+ mov cr4, rax
+
+ ldmxcsr mMmxControlWord
+
+ ret
+InitializeFloatingPointUnits ENDP
+
+END
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