diff options
| author | Jeff Fan <jeff.fan@intel.com> | 2017-03-23 13:19:49 +0800 |
|---|---|---|
| committer | Jeff Fan <jeff.fan@intel.com> | 2017-03-27 16:18:04 +0800 |
| commit | 30b7a50bacee2a33cf9c708169f7c872a6ef00b2 (patch) | |
| tree | 54e0c8abfb7cad8f648114b8b345cd5a88f75ff6 /UefiCpuPkg/Library | |
| parent | 98387f54ae7fcdc2badb90e39be0e9d8b37855c9 (diff) | |
| download | edk2-platforms-30b7a50bacee2a33cf9c708169f7c872a6ef00b2.tar.xz | |
UefiCpuPkg/AcpiCpuData.h: Support >4GB MMIO address
The current CPU_REGISTER_TABLE_ENTRY structure only defined UINT32 Index to
indicate MSR/MMIO address. It's ok for MSR because MSR address is UINT32 type
actually. But for MMIO address, UINT32 limits MMIO address exceeds 4GB.
This update on CPU_REGISTER_TABLE_ENTRY is to add additional UINT32 field
HighIndex to indicate the high 32bit MMIO address and original Index still
indicate the low 32bit MMIO address.
This update makes use of original padding space between ValidBitLength and
Value to add HighIndex.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Diffstat (limited to 'UefiCpuPkg/Library')
| -rw-r--r-- | UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c | 6 | ||||
| -rw-r--r-- | UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c | 1 |
2 files changed, 4 insertions, 3 deletions
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c index d879591ce0..34e6c6bd58 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c @@ -370,9 +370,9 @@ DumpRegisterTableOnProcessor ( case MemoryMapped: DEBUG (( DebugPrintErrorLevel, - "Processor: %d: MMIO: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", + "Processor: %d: MMIO: %lx, Bit Start: %d, Bit Length: %d, Value: %lx\r\n", ProcessorNumber, - RegisterTableEntry->Index, + RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32), RegisterTableEntry->ValidBitStart, RegisterTableEntry->ValidBitLength, RegisterTableEntry->Value @@ -628,7 +628,7 @@ ProgramProcessorRegister ( case MemoryMapped: AcquireSpinLock (&CpuFeaturesData->MemoryMappedLock); MmioBitFieldWrite32 ( - RegisterTableEntry->Index, + (UINTN)(RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32)), RegisterTableEntry->ValidBitStart, RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1, (UINT32)RegisterTableEntry->Value diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c index 32189cbc79..3fec2e6ca3 100644 --- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c @@ -551,6 +551,7 @@ CpuRegisterTableWriteWorker ( RegisterTableEntry = (CPU_REGISTER_TABLE_ENTRY *) (UINTN) RegisterTable->RegisterTableEntry; RegisterTableEntry[RegisterTable->TableLength].RegisterType = RegisterType; RegisterTableEntry[RegisterTable->TableLength].Index = (UINT32) Index; + RegisterTableEntry[RegisterTable->TableLength].HighIndex = (UINT32) RShiftU64 (Index, 32); RegisterTableEntry[RegisterTable->TableLength].ValidBitStart = ValidBitStart; RegisterTableEntry[RegisterTable->TableLength].ValidBitLength = ValidBitLength; RegisterTableEntry[RegisterTable->TableLength].Value = Value; |