UefiCpuPkg: Move to new location

Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang <mang.guo@intel.com>
author: Guo Mang <mang.guo@intel.com> 2017-04-27 11:22:26 +0800
committer: Guo Mang <mang.guo@intel.com> 2017-04-27 11:22:26 +0800
commit: 38c2cbb9354d7f58e48f9f649f23eb9bd0d3cfca (patch)
tree: 1d4540cd9c19c47d10a161184c8f1a12f8ffc455 /UefiCpuPkg/Library
parent: c6ff7c547bfc71da9d5e71a73984b9d3a4ea0809 (diff)
download: edk2-platforms-38c2cbb9354d7f58e48f9f649f23eb9bd0d3cfca.tar.xz
110 files changed, 0 insertions, 27151 deletions
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
deleted file mode 100644
index b397ce0dc6..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
+++ /dev/null
@@ -1,48 +0,0 @@
-## @file
-#  This library defines some routines that are generic for IA32 family CPU.
-#
-#  The library routines are UEFI specification compliant.
-#
-#  Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = BaseUefiCpuLib
-  MODULE_UNI_FILE                = BaseUefiCpuLib.uni
-  FILE_GUID                      = 34C24FD7-7A90-45c2-89FD-946473D9CE98
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = UefiCpuLib 
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.IA32]
-  Ia32/InitializeFpu.asm
-  Ia32/InitializeFpu.nasm
-  Ia32/InitializeFpu.S
-
-[Sources.X64]
-  X64/InitializeFpu.asm
-  X64/InitializeFpu.nasm
-  X64/InitializeFpu.S
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  UefiCpuLib
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni
deleted file mode 100644
index 1a1c0d2411..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// This library defines some routines that are generic for IA32 family CPU.
-//
-// The library routines are UEFI specification compliant.
-//
-// Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-// 
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "Defines generic routines for IA32 family CPUs."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "The library routines comply with the UEFI Specification."
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S
deleted file mode 100644
index 4972bc2e7f..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S
+++ /dev/null
@@ -1,73 +0,0 @@
-#------------------------------------------------------------------------------
-#*
-#*   Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
-#*   This program and the accompanying materials
-#*   are licensed and made available under the terms and conditions of the BSD License
-#*   which accompanies this distribution.  The full text of the license may be found at
-#*   http://opensource.org/licenses/bsd-license.php
-#*
-#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#*
-#------------------------------------------------------------------------------
-
-#
-# Float control word initial value: 
-# all exceptions masked, double-precision, round-to-nearest
-#
-ASM_PFX(mFpuControlWord): .word     0x027F
-#
-# Multimedia-extensions control word:
-# all exceptions masked, round-to-nearest, flush to zero for masked underflow
-#
-ASM_PFX(mMmxControlWord): .long     0x01F80
-
-#
-# Initializes floating point units for requirement of UEFI specification.
-#
-# This function initializes floating-point control word to 0x027F (all exceptions
-# masked,double-precision, round-to-nearest) and multimedia-extensions control word
-# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-# for masked underflow).
-#
-ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
-ASM_PFX(InitializeFloatingPointUnits):
-
-    pushl   %ebx
-
-    #
-    # Initialize floating point units
-    #
-    finit
-    fldcw   ASM_PFX(mFpuControlWord)
-    
-    #
-    # Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
-    # whether the processor supports SSE instruction.
-    #
-    movl    $1,  %eax
-    cpuid
-    btl     $25, %edx
-    jnc     Done
-    
-    #
-    # Set OSFXSR bit 9 in CR4
-    #
-    movl    %cr4, %eax 
-    or      $0x200, %eax
-    movl    %eax, %cr4
-    
-    #
-    # The processor should support SSE instruction and we can use
-    # ldmxcsr instruction
-    #
-    ldmxcsr ASM_PFX(mMmxControlWord)
-
-Done:
-    popl    %ebx
-
-    ret
-
-#END
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm
deleted file mode 100644
index 3c31da98f6..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm
+++ /dev/null
@@ -1,79 +0,0 @@
-;------------------------------------------------------------------------------
-;*
-;*   Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
-;*   This program and the accompanying materials
-;*   are licensed and made available under the terms and conditions of the BSD License
-;*   which accompanies this distribution.  The full text of the license may be found at
-;*   http://opensource.org/licenses/bsd-license.php
-;*
-;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*    
-;------------------------------------------------------------------------------
-
-
-    .686
-    .model  flat,C
-    .const
-;
-; Float control word initial value: 
-; all exceptions masked, double-precision, round-to-nearest
-;
-mFpuControlWord       DW      027Fh
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord       DD      01F80h 
-
-    .xmm
-    .code
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-InitializeFloatingPointUnits PROC PUBLIC
-
-    push    ebx
-
-    ;
-    ; Initialize floating point units
-    ;
-    finit
-    fldcw   mFpuControlWord
-    
-    ;
-    ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
-    ; whether the processor supports SSE instruction.
-    ;
-    mov     eax, 1
-    cpuid
-    bt      edx, 25
-    jnc     Done
-    
-    ;
-    ; Set OSFXSR bit 9 in CR4
-    ;
-    mov     eax, cr4
-    or      eax, BIT9
-    mov     cr4, eax
-    
-    ;
-    ; The processor should support SSE instruction and we can use
-    ; ldmxcsr instruction
-    ;
-    ldmxcsr mMmxControlWord
-Done:
-    pop     ebx
-
-    ret
-
-InitializeFloatingPointUnits ENDP
-
-END
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
deleted file mode 100644
index 55085e019f..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.nasm
+++ /dev/null
@@ -1,74 +0,0 @@
-;------------------------------------------------------------------------------
-;*
-;*   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-;*   This program and the accompanying materials
-;*   are licensed and made available under the terms and conditions of the BSD License
-;*   which accompanies this distribution.  The full text of the license may be found at
-;*   http://opensource.org/licenses/bsd-license.php
-;*
-;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*
-;------------------------------------------------------------------------------
-
-    SECTION .rdata
-
-;
-; Float control word initial value:
-; all exceptions masked, double-precision, round-to-nearest
-;
-mFpuControlWord: DW 0x27F
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord: DD 0x1F80
-
-    SECTION .text
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-global ASM_PFX(InitializeFloatingPointUnits)
-ASM_PFX(InitializeFloatingPointUnits):
-
-    push    ebx
-
-    ;
-    ; Initialize floating point units
-    ;
-    finit
-    fldcw   [mFpuControlWord]
-
-    ;
-    ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
-    ; whether the processor supports SSE instruction.
-    ;
-    mov     eax, 1
-    cpuid
-    bt      edx, 25
-    jnc     Done
-
-    ;
-    ; Set OSFXSR bit 9 in CR4
-    ;
-    mov     eax, cr4
-    or      eax, BIT9
-    mov     cr4, eax
-
-    ;
-    ; The processor should support SSE instruction and we can use
-    ; ldmxcsr instruction
-    ;
-    ldmxcsr [mMmxControlWord]
-Done:
-    pop     ebx
-
-    ret
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S
deleted file mode 100644
index 97d9f72338..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S
+++ /dev/null
@@ -1,57 +0,0 @@
-#------------------------------------------------------------------------------
-#*
-#*   Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-#*   This program and the accompanying materials
-#*   are licensed and made available under the terms and conditions of the BSD License
-#*   which accompanies this distribution.  The full text of the license may be found at
-#*   http://opensource.org/licenses/bsd-license.php
-#*
-#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#*
-#------------------------------------------------------------------------------
-
-#
-# Initializes floating point units for requirement of UEFI specification.
-#
-# This function initializes floating-point control word to 0x037F (all exceptions
-# masked,double-extended-precision, round-to-nearest) and multimedia-extensions control word
-# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-# for masked underflow).
-#
-ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
-ASM_PFX(InitializeFloatingPointUnits):
-
-    #
-    # Initialize floating point units
-    #
-    finit
-    
-    #
-    # Float control word initial value: 
-    # all exceptions masked, double-precision, round-to-nearest
-    #
-    pushq   $0x037F
-    lea     (%rsp), %rax 
-    fldcw   (%rax)
-    popq    %rax
-    
-    #
-    # Set OSFXSR bit 9 in CR4
-    #
-    movq    %cr4, %rax 
-    or      $0x200, %rax
-    movq    %rax, %cr4
-
-    #
-    # Multimedia-extensions control word:
-    # all exceptions masked, round-to-nearest, flush to zero for masked underflow
-    #    
-    pushq   $0x01F80
-    lea     (%rsp), %rax
-    ldmxcsr (%rax)
-    popq    %rax
-    
-    ret
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm
deleted file mode 100644
index 331af15cc6..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm
+++ /dev/null
@@ -1,62 +0,0 @@
-;------------------------------------------------------------------------------
-;*
-;*   Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-;*   This program and the accompanying materials
-;*   are licensed and made available under the terms and conditions of the BSD License
-;*   which accompanies this distribution.  The full text of the license may be found at
-;*   http://opensource.org/licenses/bsd-license.php
-;*
-;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*
-;------------------------------------------------------------------------------
-
-
-.const
-;
-; Float control word initial value: 
-; all exceptions masked, double-extended-precision, round-to-nearest
-;
-mFpuControlWord       DW      037Fh
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord       DD      01F80h 
-
-.code
-
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-InitializeFloatingPointUnits PROC PUBLIC
-
-    ;
-    ; Initialize floating point units
-    ;
-    ; The following opcodes stand for instruction 'finit' 
-    ; to be supported by some 64-bit assemblers
-    ;
-    DB      9Bh, 0DBh, 0E3h
-    fldcw   mFpuControlWord
-    
-    ;
-    ; Set OSFXSR bit 9 in CR4
-    ;
-    mov     rax, cr4
-    or      rax, BIT9
-    mov     cr4, rax
-
-    ldmxcsr mMmxControlWord
-    
-    ret
-InitializeFloatingPointUnits ENDP
-
-END
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
deleted file mode 100644
index 904b64e510..0000000000
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.nasm
+++ /dev/null
@@ -1,60 +0,0 @@
-;------------------------------------------------------------------------------
-;*
-;*   Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-;*   This program and the accompanying materials
-;*   are licensed and made available under the terms and conditions of the BSD License
-;*   which accompanies this distribution.  The full text of the license may be found at
-;*   http://opensource.org/licenses/bsd-license.php
-;*
-;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*
-;------------------------------------------------------------------------------
-
-    SECTION .rdata
-;
-; Float control word initial value:
-; all exceptions masked, double-extended-precision, round-to-nearest
-;
-mFpuControlWord: DW 0x37F
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord: DD 0x1F80
-
-DEFAULT REL
-SECTION .text
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-global ASM_PFX(InitializeFloatingPointUnits)
-ASM_PFX(InitializeFloatingPointUnits):
-
-    ;
-    ; Initialize floating point units
-    ;
-    ; The following opcodes stand for instruction 'finit'
-    ; to be supported by some 64-bit assemblers
-    ;
-    DB      0x9B, 0xDB, 0xE3
-    fldcw   [mFpuControlWord]
-
-    ;
-    ; Set OSFXSR bit 9 in CR4
-    ;
-    mov     rax, cr4
-    or      rax, BIT9
-    mov     cr4, rax
-
-    ldmxcsr [mMmxControlWord]
-
-    ret
-
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
deleted file mode 100644
index f81bbb2252..0000000000
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
+++ /dev/null
@@ -1,1093 +0,0 @@
-/** @file
-  Local APIC Library.
-
-  This local APIC library instance supports xAPIC mode only.
-
-  Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Register/Cpuid.h>
-#include <Register/Msr.h>
-#include <Register/LocalApic.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/IoLib.h>
-#include <Library/TimerLib.h>
-#include <Library/PcdLib.h>
-
-//
-// Library internal functions
-//
-
-/**
-  Determine if the CPU supports the Local APIC Base Address MSR.
-
-  @retval TRUE  The CPU supports the Local APIC Base Address MSR.
-  @retval FALSE The CPU does not support the Local APIC Base Address MSR.
-
-**/
-BOOLEAN
-LocalApicBaseAddressMsrSupported (
-  VOID
-  )
-{
-  UINT32  RegEax;
-  UINTN   FamilyId;
-  
-  AsmCpuid (1, &RegEax, NULL, NULL, NULL);
-  FamilyId = BitFieldRead32 (RegEax, 8, 11);
-  if (FamilyId == 0x04 || FamilyId == 0x05) {
-    //
-    // CPUs with a FamilyId of 0x04 or 0x05 do not support the 
-    // Local APIC Base Address MSR
-    //
-    return FALSE;
-  }
-  return TRUE;
-}
-
-/**
-  Retrieve the base address of local APIC.
-
-  @return The base address of local APIC.
-
-**/
-UINTN
-EFIAPI
-GetLocalApicBaseAddress (
-  VOID
-  )
-{
-  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-
-  if (!LocalApicBaseAddressMsrSupported ()) {
-    //
-    // If CPU does not support Local APIC Base Address MSR, then retrieve
-    // Local APIC Base Address from PCD
-    //
-    return PcdGet32 (PcdCpuLocalApicBaseAddress);
-  }
-
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-  
-  return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHi, 32)) +
-           (((UINTN)ApicBaseMsr.Bits.ApicBase) << 12);
-}
-
-/**
-  Set the base address of local APIC.
-
-  If BaseAddress is not aligned on a 4KB boundary, then ASSERT().
-
-  @param[in] BaseAddress   Local APIC base address to be set.
-
-**/
-VOID
-EFIAPI
-SetLocalApicBaseAddress (
-  IN UINTN                BaseAddress
-  )
-{
-  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-
-  ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);
-
-  if (!LocalApicBaseAddressMsrSupported ()) {
-    //
-    // Ignore set request if the CPU does not support APIC Base Address MSR
-    //
-    return;
-  }
-
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-
-  ApicBaseMsr.Bits.ApicBase   = (UINT32) (BaseAddress >> 12);
-  ApicBaseMsr.Bits.ApicBaseHi = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));
-
-  AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
-}
-
-/**
-  Read from a local APIC register.
-
-  This function reads from a local APIC register either in xAPIC or x2APIC mode.
-  It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
-  accessed using multiple 32-bit loads or stores, so this function only performs
-  32-bit read.
-
-  @param  MmioOffset  The MMIO offset of the local APIC register in xAPIC mode.
-                      It must be 16-byte aligned.
-
-  @return 32-bit      Value read from the register.
-**/
-UINT32
-EFIAPI
-ReadLocalApicReg (
-  IN UINTN  MmioOffset
-  )
-{
-  ASSERT ((MmioOffset & 0xf) == 0);
-  ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-
-  return MmioRead32 (GetLocalApicBaseAddress() + MmioOffset);
-}
-
-/**
-  Write to a local APIC register.
-
-  This function writes to a local APIC register either in xAPIC or x2APIC mode.
-  It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
-  accessed using multiple 32-bit loads or stores, so this function only performs
-  32-bit write.
-
-  if the register index is invalid or unsupported in current APIC mode, then ASSERT.
-
-  @param  MmioOffset  The MMIO offset of the local APIC register in xAPIC mode.
-                      It must be 16-byte aligned.
-  @param  Value       Value to be written to the register.
-**/
-VOID
-EFIAPI
-WriteLocalApicReg (
-  IN UINTN  MmioOffset,
-  IN UINT32 Value
-  )
-{
-  ASSERT ((MmioOffset & 0xf) == 0);
-  ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-
-  MmioWrite32 (GetLocalApicBaseAddress() + MmioOffset, Value);
-}
-
-/**
-  Send an IPI by writing to ICR.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  IcrLow 32-bit value to be written to the low half of ICR.
-  @param  ApicId APIC ID of the target processor if this IPI is targeted for a specific processor.
-**/
-VOID
-SendIpi (
-  IN UINT32          IcrLow,
-  IN UINT32          ApicId
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLowReg;
-  UINT32             IcrHigh;
-  BOOLEAN            InterruptState;
-
-  ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-  ASSERT (ApicId <= 0xff);
-
-  InterruptState = SaveAndDisableInterrupts ();
-
-  //
-  // Save existing contents of ICR high 32 bits
-  //
-  IcrHigh = ReadLocalApicReg (XAPIC_ICR_HIGH_OFFSET);
-
-  //
-  // Wait for DeliveryStatus clear in case a previous IPI
-  //  is still being sent
-  //
-  do {
-    IcrLowReg.Uint32 = ReadLocalApicReg (XAPIC_ICR_LOW_OFFSET);
-  } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
-  //
-  // For xAPIC, the act of writing to the low doubleword of the ICR causes the IPI to be sent.
-  //
-  WriteLocalApicReg (XAPIC_ICR_HIGH_OFFSET, ApicId << 24);
-  WriteLocalApicReg (XAPIC_ICR_LOW_OFFSET, IcrLow);
-
-  //
-  // Wait for DeliveryStatus clear again
-  //
-  do {
-    IcrLowReg.Uint32 = ReadLocalApicReg (XAPIC_ICR_LOW_OFFSET);
-  } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
-  //
-  // And restore old contents of ICR high
-  //
-  WriteLocalApicReg (XAPIC_ICR_HIGH_OFFSET, IcrHigh);
-
-  SetInterruptState (InterruptState);
-
-}
-
-//
-// Library API implementation functions
-//
-
-/**
-  Get the current local APIC mode.
-
-  If local APIC is disabled, then ASSERT.
-
-  @retval LOCAL_APIC_MODE_XAPIC  current APIC mode is xAPIC.
-  @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.
-**/
-UINTN
-EFIAPI
-GetApicMode (
-  VOID
-  )
-{
-  DEBUG_CODE (
-    {
-      MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-
-      //
-      // Check to see if the CPU supports the APIC Base Address MSR 
-      //
-      if (LocalApicBaseAddressMsrSupported ()) {
-        ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-        //
-        // Local APIC should have been enabled
-        //
-        ASSERT (ApicBaseMsr.Bits.EN != 0);
-        ASSERT (ApicBaseMsr.Bits.EXTD == 0);
-      }
-    }
-  );
-  return LOCAL_APIC_MODE_XAPIC;
-}
-
-/**
-  Set the current local APIC mode.
-
-  If the specified local APIC mode is not valid, then ASSERT.
-  If the specified local APIC mode can't be set as current, then ASSERT.
-
-  @param ApicMode APIC mode to be set.
-
-  @note  This API must not be called from an interrupt handler or SMI handler.
-         It may result in unpredictable behavior.
-**/
-VOID
-EFIAPI
-SetApicMode (
-  IN UINTN  ApicMode
-  )
-{
-  ASSERT (ApicMode == LOCAL_APIC_MODE_XAPIC);
-  ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-}
-
-/**
-  Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
-
-  In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
-  In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case, 
-  the 32-bit local APIC ID is returned as initial APIC ID.
-
-  @return  32-bit initial local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetInitialApicId (
-  VOID
-  )
-{
-  UINT32 ApicId;
-  UINT32 MaxCpuIdIndex;
-  UINT32 RegEbx;
-
-  ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-
-  //
-  // Get the max index of basic CPUID
-  //
-  AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
-
-  //
-  // If CPUID Leaf B is supported, 
-  // And CPUID.0BH:EBX[15:0] reports a non-zero value,
-  // Then the initial 32-bit APIC ID = CPUID.0BH:EDX
-  // Else the initial 8-bit APIC ID = CPUID.1:EBX[31:24]
-  //
-  if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
-    AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, NULL, &RegEbx, NULL, &ApicId);
-    if ((RegEbx & (BIT16 - 1)) != 0) {
-      return ApicId;
-    }
-  }
-
-  AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);
-  return RegEbx >> 24;
-}
-
-/**
-  Get the local APIC ID of the executing processor.
-
-  @return  32-bit local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetApicId (
-  VOID
-  )
-{
-  UINT32 ApicId;
-
-  ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-  
-  if ((ApicId = GetInitialApicId ()) < 0x100) {
-    //
-    // If the initial local APIC ID is less 0x100, read APIC ID from
-    // XAPIC_ID_OFFSET, otherwise return the initial local APIC ID.
-    //
-    ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
-    ApicId >>= 24;
-  }
-  return ApicId;
-}
-
-/**
-  Get the value of the local APIC version register.
-
-  @return  the value of the local APIC version register.
-**/
-UINT32
-EFIAPI
-GetApicVersion (
-  VOID
-  )
-{
-  return ReadLocalApicReg (XAPIC_VERSION_OFFSET);
-}
-
-/**
-  Send a Fixed IPI to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  ApicId   The local APIC ID of the target processor.
-  @param  Vector   The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpi (
-  IN UINT32          ApicId,
-  IN UINT8           Vector
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.Vector = Vector;
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send a Fixed IPI to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-
-  @param  Vector   The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpiAllExcludingSelf (
-  IN UINT8           Vector
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  IcrLow.Bits.Vector = Vector;
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Send a SMI IPI to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  ApicId   Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendSmiIpi (
-  IN UINT32          ApicId
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
-  IcrLow.Bits.Level = 1;
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send a SMI IPI to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-**/
-VOID
-EFIAPI
-SendSmiIpiAllExcludingSelf (
-  VOID
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Send an INIT IPI to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  ApicId   Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendInitIpi (
-  IN UINT32          ApicId
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
-  IcrLow.Bits.Level = 1;
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send an INIT IPI to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-**/
-VOID
-EFIAPI
-SendInitIpiAllExcludingSelf (
-  VOID
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  if StartupRoutine >= 1M, then ASSERT.
-  if StartupRoutine is not multiple of 4K, then ASSERT.
-
-  @param  ApicId          Specify the local APIC ID of the target processor.
-  @param  StartupRoutine  Points to a start-up routine which is below 1M physical
-                          address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipi (
-  IN UINT32          ApicId,
-  IN UINT32          StartupRoutine
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  ASSERT (StartupRoutine < 0x100000);
-  ASSERT ((StartupRoutine & 0xfff) == 0);
-
-  SendInitIpi (ApicId);
-  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.Vector = (StartupRoutine >> 12);
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
-  IcrLow.Bits.Level = 1;
-  SendIpi (IcrLow.Uint32, ApicId);
-  MicroSecondDelay (200);
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-
-  if StartupRoutine >= 1M, then ASSERT.
-  if StartupRoutine is not multiple of 4K, then ASSERT.
-
-  @param  StartupRoutine    Points to a start-up routine which is below 1M physical
-                            address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipiAllExcludingSelf (
-  IN UINT32          StartupRoutine
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  ASSERT (StartupRoutine < 0x100000);
-  ASSERT ((StartupRoutine & 0xfff) == 0);
-
-  SendInitIpiAllExcludingSelf ();
-  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.Vector = (StartupRoutine >> 12);
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  SendIpi (IcrLow.Uint32, 0);
-  MicroSecondDelay (200);
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Initialize the state of the SoftwareEnable bit in the Local APIC
-  Spurious Interrupt Vector register.
-
-  @param  Enable  If TRUE, then set SoftwareEnable to 1
-                  If FALSE, then set SoftwareEnable to 0.
-
-**/
-VOID
-EFIAPI
-InitializeLocalApicSoftwareEnable (
-  IN BOOLEAN  Enable
-  )
-{
-  LOCAL_APIC_SVR  Svr;
-
-  //
-  // Set local APIC software-enabled bit.
-  //
-  Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
-  if (Enable) {
-    if (Svr.Bits.SoftwareEnable == 0) {
-      Svr.Bits.SoftwareEnable = 1;
-      WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-    }
-  } else {
-    if (Svr.Bits.SoftwareEnable == 1) {
-      Svr.Bits.SoftwareEnable = 0;
-      WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-    }
-  }
-}
-
-/**
-  Programming Virtual Wire Mode.
-
-  This function programs the local APIC for virtual wire mode following
-  the example described in chapter A.3 of the MP 1.4 spec.
-
-  IOxAPIC is not involved in this type of virtual wire mode.
-**/
-VOID
-EFIAPI
-ProgramVirtualWireMode (
-  VOID
-  )
-{
-  LOCAL_APIC_SVR      Svr;
-  LOCAL_APIC_LVT_LINT Lint;
-
-  //
-  // Enable the APIC via SVR and set the spurious interrupt to use Int 00F.
-  //
-  Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
-  Svr.Bits.SpuriousVector = 0xf;
-  Svr.Bits.SoftwareEnable = 1;
-  WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-
-  //
-  // Program the LINT0 vector entry as ExtInt. Not masked, edge, active high.
-  //
-  Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
-  Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_EXTINT;
-  Lint.Bits.InputPinPolarity = 0;
-  Lint.Bits.TriggerMode = 0;
-  Lint.Bits.Mask = 0;
-  WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, Lint.Uint32);
-
-  //
-  // Program the LINT0 vector entry as NMI. Not masked, edge, active high.
-  //
-  Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
-  Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_NMI;
-  Lint.Bits.InputPinPolarity = 0;
-  Lint.Bits.TriggerMode = 0;
-  Lint.Bits.Mask = 0;
-  WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, Lint.Uint32);
-}
-
-/**
-  Disable LINT0 & LINT1 interrupts.
-
-  This function sets the mask flag in the LVT LINT0 & LINT1 registers.
-**/
-VOID
-EFIAPI
-DisableLvtInterrupts (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_LINT LvtLint;
-
-  LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
-  LvtLint.Bits.Mask = 1;
-  WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, LvtLint.Uint32);
-
-  LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
-  LvtLint.Bits.Mask = 1;
-  WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, LvtLint.Uint32);
-}
-
-/**
-  Read the initial count value from the init-count register.
-
-  @return The initial count value read from the init-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerInitCount (
-  VOID
-  )
-{
-  return ReadLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET);
-}
-
-/**
-  Read the current count value from the current-count register.
-
-  @return The current count value read from the current-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerCurrentCount (
-  VOID
-  )
-{
-  return ReadLocalApicReg (XAPIC_TIMER_CURRENT_COUNT_OFFSET);
-}
-
-/**
-  Initialize the local APIC timer.
-
-  The local APIC timer is initialized and enabled.
-
-  @param DivideValue   The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
-                       If it is 0, then use the current divide value in the DCR.
-  @param InitCount     The initial count value.
-  @param PeriodicMode  If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
-  @param Vector        The timer interrupt vector number.
-**/
-VOID
-EFIAPI
-InitializeApicTimer (
-  IN UINTN   DivideValue,
-  IN UINT32  InitCount,
-  IN BOOLEAN PeriodicMode,
-  IN UINT8   Vector
-  )
-{
-  LOCAL_APIC_DCR       Dcr;
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-  UINT32               Divisor;
-
-  //
-  // Ensure local APIC is in software-enabled state.
-  //
-  InitializeLocalApicSoftwareEnable (TRUE);
-
-  //
-  // Program init-count register.
-  //
-  WriteLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET, InitCount);
-
-  if (DivideValue != 0) {
-    ASSERT (DivideValue <= 128);
-    ASSERT (DivideValue == GetPowerOfTwo32((UINT32)DivideValue));
-    Divisor = (UINT32)((HighBitSet32 ((UINT32)DivideValue) - 1) & 0x7);
-
-    Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
-    Dcr.Bits.DivideValue1 = (Divisor & 0x3);
-    Dcr.Bits.DivideValue2 = (Divisor >> 2);
-    WriteLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET, Dcr.Uint32); 
-  }
-
-  //
-  // Enable APIC timer interrupt with specified timer mode.
-  //
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  if (PeriodicMode) {
-    LvtTimer.Bits.TimerMode = 1;
-  } else {
-    LvtTimer.Bits.TimerMode = 0;
-  }
-  LvtTimer.Bits.Mask = 0;
-  LvtTimer.Bits.Vector = Vector;
-  WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
-  Get the state of the local APIC timer.
-
-  This function will ASSERT if the local APIC is not software enabled.
-
-  @param DivideValue   Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
-  @param PeriodicMode  Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
-  @param Vector        Return the timer interrupt vector number.
-**/
-VOID
-EFIAPI
-GetApicTimerState (
-  OUT UINTN    *DivideValue  OPTIONAL,
-  OUT BOOLEAN  *PeriodicMode  OPTIONAL,
-  OUT UINT8    *Vector  OPTIONAL
-  )
-{
-  UINT32 Divisor;
-  LOCAL_APIC_DCR Dcr;
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  //
-  // Check the APIC Software Enable/Disable bit (bit 8) in Spurious-Interrupt
-  // Vector Register.
-  // This bit will be 1, if local APIC is software enabled.
-  //
-  ASSERT ((ReadLocalApicReg(XAPIC_SPURIOUS_VECTOR_OFFSET) & BIT8) != 0);
-
-  if (DivideValue != NULL) {
-    Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
-    Divisor = Dcr.Bits.DivideValue1 | (Dcr.Bits.DivideValue2 << 2);
-    Divisor = (Divisor + 1) & 0x7;
-    *DivideValue = ((UINTN)1) << Divisor;
-  }
-
-  if (PeriodicMode != NULL || Vector != NULL) {
-    LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-    if (PeriodicMode != NULL) {
-      if (LvtTimer.Bits.TimerMode == 1) {
-        *PeriodicMode = TRUE;
-      } else {
-        *PeriodicMode = FALSE;
-      }
-    }
-    if (Vector != NULL) {
-      *Vector = (UINT8) LvtTimer.Bits.Vector;
-    }
-  }
-}
-
-/**
-  Enable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-EnableApicTimerInterrupt (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  LvtTimer.Bits.Mask = 0;
-  WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
-  Disable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-DisableApicTimerInterrupt (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  LvtTimer.Bits.Mask = 1;
-  WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
-  Get the local APIC timer interrupt state.
-
-  @retval TRUE  The local APIC timer interrupt is enabled.
-  @retval FALSE The local APIC timer interrupt is disabled.
-**/
-BOOLEAN
-EFIAPI
-GetApicTimerInterruptState (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  return (BOOLEAN)(LvtTimer.Bits.Mask == 0);
-}
-
-/**
-  Send EOI to the local APIC.
-**/
-VOID
-EFIAPI
-SendApicEoi (
-  VOID
-  )
-{
-  WriteLocalApicReg (XAPIC_EOI_OFFSET, 0);
-}
-
-/**
-  Get the 32-bit address that a device should use to send a Message Signaled 
-  Interrupt (MSI) to the Local APIC of the currently executing processor.
-
-  @return 32-bit address used to send an MSI to the Local APIC.
-**/
-UINT32
-EFIAPI    
-GetApicMsiAddress (
-  VOID
-  )
-{
-  LOCAL_APIC_MSI_ADDRESS  MsiAddress;
-
-  //
-  // Return address for an MSI interrupt to be delivered only to the APIC ID 
-  // of the currently executing processor.
-  //
-  MsiAddress.Uint32             = 0;
-  MsiAddress.Bits.BaseAddress   = 0xFEE;
-  MsiAddress.Bits.DestinationId = GetApicId ();
-  return MsiAddress.Uint32;
-}
-    
-/**
-  Get the 64-bit data value that a device should use to send a Message Signaled 
-  Interrupt (MSI) to the Local APIC of the currently executing processor.
-
-  If Vector is not in range 0x10..0xFE, then ASSERT().
-  If DeliveryMode is not supported, then ASSERT().
-  
-  @param  Vector          The 8-bit interrupt vector associated with the MSI.  
-                          Must be in the range 0x10..0xFE
-  @param  DeliveryMode    A 3-bit value that specifies how the recept of the MSI 
-                          is handled.  The only supported values are:
-                            0: LOCAL_APIC_DELIVERY_MODE_FIXED
-                            1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY
-                            2: LOCAL_APIC_DELIVERY_MODE_SMI
-                            4: LOCAL_APIC_DELIVERY_MODE_NMI
-                            5: LOCAL_APIC_DELIVERY_MODE_INIT
-                            7: LOCAL_APIC_DELIVERY_MODE_EXTINT
-                          
-  @param  LevelTriggered  TRUE specifies a level triggered interrupt.  
-                          FALSE specifies an edge triggered interrupt.
-  @param  AssertionLevel  Ignored if LevelTriggered is FALSE.
-                          TRUE specifies a level triggered interrupt that active 
-                          when the interrupt line is asserted.
-                          FALSE specifies a level triggered interrupt that active 
-                          when the interrupt line is deasserted.
-
-  @return 64-bit data value used to send an MSI to the Local APIC.
-**/
-UINT64
-EFIAPI    
-GetApicMsiValue (
-  IN UINT8    Vector,
-  IN UINTN    DeliveryMode,
-  IN BOOLEAN  LevelTriggered,
-  IN BOOLEAN  AssertionLevel
-  )
-{
-  LOCAL_APIC_MSI_DATA  MsiData;
-
-  ASSERT (Vector >= 0x10 && Vector <= 0xFE);
-  ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);
-  
-  MsiData.Uint64            = 0;
-  MsiData.Bits.Vector       = Vector;
-  MsiData.Bits.DeliveryMode = (UINT32)DeliveryMode;
-  if (LevelTriggered) {
-    MsiData.Bits.TriggerMode = 1;
-    if (AssertionLevel) {
-      MsiData.Bits.Level = 1;
-    }
-  }
-  return MsiData.Uint64;
-}
-
-/**
-  Get Package ID/Core ID/Thread ID of a processor.
-
-  The algorithm assumes the target system has symmetry across physical
-  package  boundaries with respect to the number of logical processors
-  per package,  number of cores per package.
-
-  @param[in]  InitialApicId  Initial APIC ID of the target logical processor.
-  @param[out]  Package       Returns the processor package ID.
-  @param[out]  Core          Returns the processor core ID.
-  @param[out]  Thread        Returns the processor thread ID.
-**/
-VOID
-EFIAPI
-GetProcessorLocationByApicId (
-  IN  UINT32  InitialApicId,
-  OUT UINT32  *Package  OPTIONAL,
-  OUT UINT32  *Core    OPTIONAL,
-  OUT UINT32  *Thread  OPTIONAL
-  )
-{
-  BOOLEAN                       TopologyLeafSupported;
-  UINTN                         ThreadBits;
-  UINTN                         CoreBits;
-  CPUID_VERSION_INFO_EBX        VersionInfoEbx;
-  CPUID_VERSION_INFO_EDX        VersionInfoEdx;
-  CPUID_CACHE_PARAMS_EAX        CacheParamsEax;
-  CPUID_EXTENDED_TOPOLOGY_EAX   ExtendedTopologyEax;
-  CPUID_EXTENDED_TOPOLOGY_EBX   ExtendedTopologyEbx;
-  CPUID_EXTENDED_TOPOLOGY_ECX   ExtendedTopologyEcx;
-  UINT32                        MaxCpuIdIndex;
-  UINT32                        SubIndex;
-  UINTN                         LevelType;
-  UINT32                        MaxLogicProcessorsPerPackage;
-  UINT32                        MaxCoresPerPackage;
-
-  //
-  // Check if the processor is capable of supporting more than one logical processor.
-  //
-  AsmCpuid(CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);
-  if (VersionInfoEdx.Bits.HTT == 0) {
-    if (Thread != NULL) {
-      *Thread  = 0;
-    }
-    if (Core != NULL) {
-      *Core    = 0;
-    }
-    if (Package != NULL) {
-      *Package = 0;
-    }
-    return;
-  }
-
-  ThreadBits = 0;
-  CoreBits = 0;
-
-  //
-  // Assume three-level mapping of APIC ID: Package:Core:SMT.
-  //
-  TopologyLeafSupported = FALSE;
-
-  //
-  // Get the max index of basic CPUID
-  //
-  AsmCpuid(CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
-
-  //
-  // If the extended topology enumeration leaf is available, it
-  // is the preferred mechanism for enumerating topology.
-  //
-  if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
-    AsmCpuidEx(
-      CPUID_EXTENDED_TOPOLOGY,
-      0,
-      &ExtendedTopologyEax.Uint32,
-      &ExtendedTopologyEbx.Uint32,
-      &ExtendedTopologyEcx.Uint32,
-      NULL
-      );
-    //
-    // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for
-    // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not
-    // supported on that processor.
-    //
-    if (ExtendedTopologyEbx.Uint32 != 0) {
-      TopologyLeafSupported = TRUE;
-
-      //
-      // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
-      // the SMT sub-field of x2APIC ID.
-      //
-      LevelType = ExtendedTopologyEcx.Bits.LevelType;
-      ASSERT(LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);
-      ThreadBits = ExtendedTopologyEax.Bits.ApicIdShift;
-
-      //
-      // Software must not assume any "level type" encoding
-      // value to be related to any sub-leaf index, except sub-leaf 0.
-      //
-      SubIndex = 1;
-      do {
-        AsmCpuidEx(
-          CPUID_EXTENDED_TOPOLOGY,
-          SubIndex,
-          &ExtendedTopologyEax.Uint32,
-          NULL,
-          &ExtendedTopologyEcx.Uint32,
-          NULL
-          );
-        LevelType = ExtendedTopologyEcx.Bits.LevelType;
-        if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {
-          CoreBits = ExtendedTopologyEax.Bits.ApicIdShift - ThreadBits;
-          break;
-        }
-        SubIndex++;
-      } while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);
-    }
-  }
-
-  if (!TopologyLeafSupported) {
-    AsmCpuid(CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL);
-    MaxLogicProcessorsPerPackage = VersionInfoEbx.Bits.MaximumAddressableIdsForLogicalProcessors;
-    if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {
-      AsmCpuidEx(CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL, NULL);
-      MaxCoresPerPackage = CacheParamsEax.Bits.MaximumAddressableIdsForLogicalProcessors + 1;
-    }
-    else {
-      //
-      // Must be a single-core processor.
-      //
-      MaxCoresPerPackage = 1;
-    }
-
-    ThreadBits = (UINTN)(HighBitSet32(MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);
-    CoreBits = (UINTN)(HighBitSet32(MaxCoresPerPackage - 1) + 1);  }
-
-  if (Thread != NULL) {
-    *Thread  = InitialApicId & ((1 << ThreadBits) - 1);
-  }
-  if (Core != NULL) {
-    *Core    = (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1);
-  }
-  if (Package != NULL) {
-    *Package = (InitialApicId >> (ThreadBits + CoreBits));
-  }
-}
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
deleted file mode 100644
index 7dd2714af3..0000000000
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
+++ /dev/null
@@ -1,49 +0,0 @@
-## @file
-#  The Local Apic library supports xAPIC mode only.
-#
-#  Note: Local APIC library assumes local APIC is enabled. It does not handle cases
-#  where local APIC is disabled.
-#
-#  Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = BaseXApicLib
-  MODULE_UNI_FILE                = BaseXApicLib.uni
-  FILE_GUID                      = D87CA0A8-1AC2-439b-90F8-EF4A2AC88DAF
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = LocalApicLib 
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources]
-  BaseXApicLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  TimerLib
-  IoLib
-  PcdLib
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds  ## SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress        ## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.uni b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.uni
deleted file mode 100644
index 49b05e6cec..0000000000
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.uni
+++ /dev/null
@@ -1,23 +0,0 @@
-// /** @file
-// The Local Apic library supports xAPIC mode only.
-//
-// Note: Local APIC library assumes local APIC is enabled. It does not handle cases
-// where local APIC is disabled.
-//
-// Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-// 
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "Supports xAPIC mode only"
-
-#string STR_MODULE_DESCRIPTION          #language en-US "Note: Local APIC library assumes local APIC is enabled. It does not handle cases where local APIC is disabled."
-
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
deleted file mode 100644
index e690d2aa14..0000000000
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ /dev/null
@@ -1,1188 +0,0 @@
-/** @file
-  Local APIC Library.
-
-  This local APIC library instance supports x2APIC capable processors
-  which have xAPIC and x2APIC modes.
-
-  Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Register/Cpuid.h>
-#include <Register/Msr.h>
-#include <Register/LocalApic.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/IoLib.h>
-#include <Library/TimerLib.h>
-#include <Library/PcdLib.h>
-
-//
-// Library internal functions
-//
-
-/**
-  Determine if the CPU supports the Local APIC Base Address MSR.
-
-  @retval TRUE  The CPU supports the Local APIC Base Address MSR.
-  @retval FALSE The CPU does not support the Local APIC Base Address MSR.
-
-**/
-BOOLEAN
-LocalApicBaseAddressMsrSupported (
-  VOID
-  )
-{
-  UINT32  RegEax;
-  UINTN   FamilyId;
-  
-  AsmCpuid (1, &RegEax, NULL, NULL, NULL);
-  FamilyId = BitFieldRead32 (RegEax, 8, 11);
-  if (FamilyId == 0x04 || FamilyId == 0x05) {
-    //
-    // CPUs with a FamilyId of 0x04 or 0x05 do not support the 
-    // Local APIC Base Address MSR
-    //
-    return FALSE;
-  }
-  return TRUE;
-}
-
-/**
-  Retrieve the base address of local APIC.
-
-  @return The base address of local APIC.
-
-**/
-UINTN
-EFIAPI
-GetLocalApicBaseAddress (
-  VOID
-  )
-{
-  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-
-  if (!LocalApicBaseAddressMsrSupported ()) {
-    //
-    // If CPU does not support Local APIC Base Address MSR, then retrieve
-    // Local APIC Base Address from PCD
-    //
-    return PcdGet32 (PcdCpuLocalApicBaseAddress);
-  }
-
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-  
-  return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHi, 32)) +
-           (((UINTN)ApicBaseMsr.Bits.ApicBase) << 12);
-}
-
-/**
-  Set the base address of local APIC.
-
-  If BaseAddress is not aligned on a 4KB boundary, then ASSERT().
-
-  @param[in] BaseAddress   Local APIC base address to be set.
-
-**/
-VOID
-EFIAPI
-SetLocalApicBaseAddress (
-  IN UINTN                BaseAddress
-  )
-{
-  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-
-  ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);
-
-  if (!LocalApicBaseAddressMsrSupported ()) {
-    //
-    // Ignore set request of the CPU does not support APIC Base Address MSR
-    //
-    return;
-  }
-
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-
-  ApicBaseMsr.Bits.ApicBase   = (UINT32) (BaseAddress >> 12);
-  ApicBaseMsr.Bits.ApicBaseHi = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));
-
-  AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
-}
-
-/**
-  Read from a local APIC register.
-
-  This function reads from a local APIC register either in xAPIC or x2APIC mode.
-  It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
-  accessed using multiple 32-bit loads or stores, so this function only performs
-  32-bit read.
-
-  @param  MmioOffset  The MMIO offset of the local APIC register in xAPIC mode.
-                      It must be 16-byte aligned.
-
-  @return 32-bit      Value read from the register.
-**/
-UINT32
-EFIAPI
-ReadLocalApicReg (
-  IN UINTN  MmioOffset
-  )
-{
-  UINT32 MsrIndex;
-
-  ASSERT ((MmioOffset & 0xf) == 0);
-
-  if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
-    return MmioRead32 (GetLocalApicBaseAddress() + MmioOffset);
-  } else {
-    //
-    // DFR is not supported in x2APIC mode.
-    //
-    ASSERT (MmioOffset != XAPIC_ICR_DFR_OFFSET);
-    //
-    // Note that in x2APIC mode, ICR is a 64-bit MSR that needs special treatment. It
-    // is not supported in this function for simplicity.
-    //
-    ASSERT (MmioOffset != XAPIC_ICR_HIGH_OFFSET);
-
-    MsrIndex = (UINT32)(MmioOffset >> 4) + X2APIC_MSR_BASE_ADDRESS;
-    return AsmReadMsr32 (MsrIndex);
-  }
-}
-
-/**
-  Write to a local APIC register.
-
-  This function writes to a local APIC register either in xAPIC or x2APIC mode.
-  It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
-  accessed using multiple 32-bit loads or stores, so this function only performs
-  32-bit write.
-
-  if the register index is invalid or unsupported in current APIC mode, then ASSERT.
-
-  @param  MmioOffset  The MMIO offset of the local APIC register in xAPIC mode.
-                      It must be 16-byte aligned.
-  @param  Value       Value to be written to the register.
-**/
-VOID
-EFIAPI
-WriteLocalApicReg (
-  IN UINTN  MmioOffset,
-  IN UINT32 Value
-  )
-{
-  UINT32 MsrIndex;
-
-  ASSERT ((MmioOffset & 0xf) == 0);
-
-  if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
-    MmioWrite32 (GetLocalApicBaseAddress() + MmioOffset, Value);
-  } else {
-    //
-    // DFR is not supported in x2APIC mode.
-    //
-    ASSERT (MmioOffset != XAPIC_ICR_DFR_OFFSET);
-    //
-    // Note that in x2APIC mode, ICR is a 64-bit MSR that needs special treatment. It
-    // is not supported in this function for simplicity.
-    //
-    ASSERT (MmioOffset != XAPIC_ICR_HIGH_OFFSET);
-    ASSERT (MmioOffset != XAPIC_ICR_LOW_OFFSET);
-
-    MsrIndex =  (UINT32)(MmioOffset >> 4) + X2APIC_MSR_BASE_ADDRESS;
-    //
-    // The serializing semantics of WRMSR are relaxed when writing to the APIC registers.
-    // Use memory fence here to force the serializing semantics to be consisent with xAPIC mode.
-    //
-    MemoryFence ();
-    AsmWriteMsr32 (MsrIndex, Value);
-  }
-}
-
-/**
-  Send an IPI by writing to ICR.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  IcrLow 32-bit value to be written to the low half of ICR.
-  @param  ApicId APIC ID of the target processor if this IPI is targeted for a specific processor.
-**/
-VOID
-SendIpi (
-  IN UINT32          IcrLow,
-  IN UINT32          ApicId
-  )
-{
-  UINT64             MsrValue;
-  LOCAL_APIC_ICR_LOW IcrLowReg;
-  UINTN              LocalApciBaseAddress;
-  UINT32             IcrHigh;
-  BOOLEAN            InterruptState;
-
-  //
-  // Legacy APIC or X2APIC?
-  //
-  if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
-    ASSERT (ApicId <= 0xff);
-
-    InterruptState = SaveAndDisableInterrupts ();
-
-    //
-    // Get base address of this LAPIC
-    //
-    LocalApciBaseAddress = GetLocalApicBaseAddress();
-
-    //
-    // Save existing contents of ICR high 32 bits
-    //
-    IcrHigh = MmioRead32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET);
-
-    //
-    // Wait for DeliveryStatus clear in case a previous IPI
-    //  is still being sent
-    //
-    do {
-      IcrLowReg.Uint32 = MmioRead32 (LocalApciBaseAddress + XAPIC_ICR_LOW_OFFSET);
-    } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
-    //
-    // For xAPIC, the act of writing to the low doubleword of the ICR causes the IPI to be sent.
-    //
-    MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET, ApicId << 24);
-    MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_LOW_OFFSET, IcrLow);
-
-    //
-    // Wait for DeliveryStatus clear again
-    //
-    do {
-      IcrLowReg.Uint32 = MmioRead32 (LocalApciBaseAddress + XAPIC_ICR_LOW_OFFSET);
-    } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
-    //
-    // And restore old contents of ICR high
-    //
-    MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET, IcrHigh);
-
-    SetInterruptState (InterruptState);
-
-  } else {
-    //
-    // For x2APIC, A single MSR write to the Interrupt Command Register is required for dispatching an 
-    // interrupt in x2APIC mode.
-    //
-    MsrValue = LShiftU64 ((UINT64) ApicId, 32) | IcrLow;
-    AsmWriteMsr64 (X2APIC_MSR_ICR_ADDRESS, MsrValue);
-  }
-}
-
-//
-// Library API implementation functions
-//
-
-/**
-  Get the current local APIC mode.
-
-  If local APIC is disabled, then ASSERT.
-
-  @retval LOCAL_APIC_MODE_XAPIC  current APIC mode is xAPIC.
-  @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.
-**/
-UINTN
-EFIAPI
-GetApicMode (
-  VOID
-  )
-{
-  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-
-  if (!LocalApicBaseAddressMsrSupported ()) {
-    //
-    // If CPU does not support APIC Base Address MSR, then return XAPIC mode
-    //
-    return LOCAL_APIC_MODE_XAPIC;
-  }
-
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-  //
-  // Local APIC should have been enabled
-  //
-  ASSERT (ApicBaseMsr.Bits.EN != 0);
-  if (ApicBaseMsr.Bits.EXTD != 0) {
-    return LOCAL_APIC_MODE_X2APIC;
-  } else {
-    return LOCAL_APIC_MODE_XAPIC;
-  }
-}
-
-/**
-  Set the current local APIC mode.
-
-  If the specified local APIC mode is not valid, then ASSERT.
-  If the specified local APIC mode can't be set as current, then ASSERT.
-
-  @param ApicMode APIC mode to be set.
-
-  @note  This API must not be called from an interrupt handler or SMI handler.
-         It may result in unpredictable behavior.
-**/
-VOID
-EFIAPI
-SetApicMode (
-  IN UINTN  ApicMode
-  )
-{
-  UINTN                        CurrentMode;
-  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-
-  if (!LocalApicBaseAddressMsrSupported ()) {
-    //
-    // Ignore set request if the CPU does not support APIC Base Address MSR
-    //
-    return;
-  }
-
-  CurrentMode = GetApicMode ();
-  if (CurrentMode == LOCAL_APIC_MODE_XAPIC) {
-    switch (ApicMode) {
-      case LOCAL_APIC_MODE_XAPIC:
-        break;
-      case LOCAL_APIC_MODE_X2APIC:
-        ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-        ApicBaseMsr.Bits.EXTD = 1;
-        AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
-        break;
-      default:
-        ASSERT (FALSE);
-    }
-  } else {
-    switch (ApicMode) {
-      case LOCAL_APIC_MODE_XAPIC:
-        //
-        //  Transition from x2APIC mode to xAPIC mode is a two-step process:
-        //    x2APIC -> Local APIC disabled -> xAPIC
-        //
-        ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-        ApicBaseMsr.Bits.EXTD = 0;
-        ApicBaseMsr.Bits.EN = 0;
-        AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
-        ApicBaseMsr.Bits.EN = 1;
-        AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
-        break;
-      case LOCAL_APIC_MODE_X2APIC:
-        break;
-      default:
-        ASSERT (FALSE);
-    }
-  }
-}
-
-/**
-  Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
-
-  In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
-  In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case, 
-  the 32-bit local APIC ID is returned as initial APIC ID.
-
-  @return  32-bit initial local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetInitialApicId (
-  VOID
-  )
-{
-  UINT32 ApicId;
-  UINT32 MaxCpuIdIndex;
-  UINT32 RegEbx;
-
-  if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
-    //
-    // Get the max index of basic CPUID
-    //
-    AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
-    //
-    // If CPUID Leaf B is supported, 
-    // And CPUID.0BH:EBX[15:0] reports a non-zero value,
-    // Then the initial 32-bit APIC ID = CPUID.0BH:EDX
-    // Else the initial 8-bit APIC ID = CPUID.1:EBX[31:24]
-    //
-    if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
-      AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, NULL, &RegEbx, NULL, &ApicId);
-      if ((RegEbx & (BIT16 - 1)) != 0) {
-        return ApicId;
-      }
-    }
-    AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);
-    return RegEbx >> 24;
-  } else {
-    return GetApicId ();
-  }
-}
-
-/**
-  Get the local APIC ID of the executing processor.
-
-  @return  32-bit local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetApicId (
-  VOID
-  )
-{
-  UINT32 ApicId;
-  UINT32 InitApicId;
-
-  ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
-  if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
-    ApicId = ((InitApicId = GetInitialApicId ()) < 0x100) ? (ApicId >> 24) : InitApicId;
-  }
-
-  return ApicId;
-}
-
-/**
-  Get the value of the local APIC version register.
-
-  @return  the value of the local APIC version register.
-**/
-UINT32
-EFIAPI
-GetApicVersion (
-  VOID
-  )
-{
-  return ReadLocalApicReg (XAPIC_VERSION_OFFSET);
-}
-
-/**
-  Send a Fixed IPI to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  ApicId   The local APIC ID of the target processor.
-  @param  Vector   The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpi (
-  IN UINT32          ApicId,
-  IN UINT8           Vector
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.Vector = Vector;
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send a Fixed IPI to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-
-  @param  Vector   The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpiAllExcludingSelf (
-  IN UINT8           Vector
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  IcrLow.Bits.Vector = Vector;
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Send a SMI IPI to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  ApicId   Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendSmiIpi (
-  IN UINT32          ApicId
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
-  IcrLow.Bits.Level = 1;
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send a SMI IPI to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-**/
-VOID
-EFIAPI
-SendSmiIpiAllExcludingSelf (
-  VOID
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Send an INIT IPI to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  @param  ApicId   Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendInitIpi (
-  IN UINT32          ApicId
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
-  IcrLow.Bits.Level = 1;
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send an INIT IPI to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-**/
-VOID
-EFIAPI
-SendInitIpiAllExcludingSelf (
-  VOID
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
-
-  This function returns after the IPI has been accepted by the target processor. 
-
-  if StartupRoutine >= 1M, then ASSERT.
-  if StartupRoutine is not multiple of 4K, then ASSERT.
-
-  @param  ApicId          Specify the local APIC ID of the target processor.
-  @param  StartupRoutine  Points to a start-up routine which is below 1M physical
-                          address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipi (
-  IN UINT32          ApicId,
-  IN UINT32          StartupRoutine
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  ASSERT (StartupRoutine < 0x100000);
-  ASSERT ((StartupRoutine & 0xfff) == 0);
-
-  SendInitIpi (ApicId);
-  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.Vector = (StartupRoutine >> 12);
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
-  IcrLow.Bits.Level = 1;
-  SendIpi (IcrLow.Uint32, ApicId);
-  MicroSecondDelay (200);
-  SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
-  Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
-
-  This function returns after the IPI has been accepted by the target processors. 
-
-  if StartupRoutine >= 1M, then ASSERT.
-  if StartupRoutine is not multiple of 4K, then ASSERT.
-
-  @param  StartupRoutine    Points to a start-up routine which is below 1M physical
-                            address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipiAllExcludingSelf (
-  IN UINT32          StartupRoutine
-  )
-{
-  LOCAL_APIC_ICR_LOW IcrLow;
-
-  ASSERT (StartupRoutine < 0x100000);
-  ASSERT ((StartupRoutine & 0xfff) == 0);
-
-  SendInitIpiAllExcludingSelf ();
-  MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
-  IcrLow.Uint32 = 0;
-  IcrLow.Bits.Vector = (StartupRoutine >> 12);
-  IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
-  IcrLow.Bits.Level = 1;
-  IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
-  SendIpi (IcrLow.Uint32, 0);
-  MicroSecondDelay (200);
-  SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
-  Initialize the state of the SoftwareEnable bit in the Local APIC
-  Spurious Interrupt Vector register.
-
-  @param  Enable  If TRUE, then set SoftwareEnable to 1
-                  If FALSE, then set SoftwareEnable to 0.
-
-**/
-VOID
-EFIAPI
-InitializeLocalApicSoftwareEnable (
-  IN BOOLEAN  Enable
-  )
-{
-  LOCAL_APIC_SVR  Svr;
-
-  //
-  // Set local APIC software-enabled bit.
-  //
-  Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
-  if (Enable) {
-    if (Svr.Bits.SoftwareEnable == 0) {
-      Svr.Bits.SoftwareEnable = 1;
-      WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-    }
-  } else {
-    if (Svr.Bits.SoftwareEnable == 1) {
-      Svr.Bits.SoftwareEnable = 0;
-      WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-    }
-  }
-}
-
-/**
-  Programming Virtual Wire Mode.
-
-  This function programs the local APIC for virtual wire mode following
-  the example described in chapter A.3 of the MP 1.4 spec.
-
-  IOxAPIC is not involved in this type of virtual wire mode.
-**/
-VOID
-EFIAPI
-ProgramVirtualWireMode (
-  VOID
-  )
-{
-  LOCAL_APIC_SVR      Svr;
-  LOCAL_APIC_LVT_LINT Lint;
-
-  //
-  // Enable the APIC via SVR and set the spurious interrupt to use Int 00F.
-  //
-  Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
-  Svr.Bits.SpuriousVector = 0xf;
-  Svr.Bits.SoftwareEnable = 1;
-  WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-
-  //
-  // Program the LINT0 vector entry as ExtInt. Not masked, edge, active high.
-  //
-  Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
-  Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_EXTINT;
-  Lint.Bits.InputPinPolarity = 0;
-  Lint.Bits.TriggerMode = 0;
-  Lint.Bits.Mask = 0;
-  WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, Lint.Uint32);
-
-  //
-  // Program the LINT0 vector entry as NMI. Not masked, edge, active high.
-  //
-  Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
-  Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_NMI;
-  Lint.Bits.InputPinPolarity = 0;
-  Lint.Bits.TriggerMode = 0;
-  Lint.Bits.Mask = 0;
-  WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, Lint.Uint32);
-}
-
-/**
-  Disable LINT0 & LINT1 interrupts.
-
-  This function sets the mask flag in the LVT LINT0 & LINT1 registers.
-**/
-VOID
-EFIAPI
-DisableLvtInterrupts (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_LINT LvtLint;
-
-  LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
-  LvtLint.Bits.Mask = 1;
-  WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, LvtLint.Uint32);
-
-  LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
-  LvtLint.Bits.Mask = 1;
-  WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, LvtLint.Uint32);
-}
-
-/**
-  Read the initial count value from the init-count register.
-
-  @return The initial count value read from the init-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerInitCount (
-  VOID
-  )
-{
-  return ReadLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET);
-}
-
-/**
-  Read the current count value from the current-count register.
-
-  @return The current count value read from the current-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerCurrentCount (
-  VOID
-  )
-{
-  return ReadLocalApicReg (XAPIC_TIMER_CURRENT_COUNT_OFFSET);
-}
-
-/**
-  Initialize the local APIC timer.
-
-  The local APIC timer is initialized and enabled.
-
-  @param DivideValue   The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
-                       If it is 0, then use the current divide value in the DCR.
-  @param InitCount     The initial count value.
-  @param PeriodicMode  If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
-  @param Vector        The timer interrupt vector number.
-**/
-VOID
-EFIAPI
-InitializeApicTimer (
-  IN UINTN   DivideValue,
-  IN UINT32  InitCount,
-  IN BOOLEAN PeriodicMode,
-  IN UINT8   Vector
-  )
-{
-  LOCAL_APIC_DCR       Dcr;
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-  UINT32               Divisor;
-
-  //
-  // Ensure local APIC is in software-enabled state.
-  //
-  InitializeLocalApicSoftwareEnable (TRUE);
-
-  //
-  // Program init-count register.
-  //
-  WriteLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET, InitCount);
-
-  if (DivideValue != 0) {
-    ASSERT (DivideValue <= 128);
-    ASSERT (DivideValue == GetPowerOfTwo32((UINT32)DivideValue));
-    Divisor = (UINT32)((HighBitSet32 ((UINT32)DivideValue) - 1) & 0x7);
-
-    Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
-    Dcr.Bits.DivideValue1 = (Divisor & 0x3);
-    Dcr.Bits.DivideValue2 = (Divisor >> 2);
-    WriteLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET, Dcr.Uint32); 
-  }
-
-  //
-  // Enable APIC timer interrupt with specified timer mode.
-  //
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  if (PeriodicMode) {
-    LvtTimer.Bits.TimerMode = 1;
-  } else {
-    LvtTimer.Bits.TimerMode = 0;
-  }
-  LvtTimer.Bits.Mask = 0;
-  LvtTimer.Bits.Vector = Vector;
-  WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
-  Get the state of the local APIC timer.
-
-  This function will ASSERT if the local APIC is not software enabled.
-
-  @param DivideValue   Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
-  @param PeriodicMode  Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
-  @param Vector        Return the timer interrupt vector number.
-**/
-VOID
-EFIAPI
-GetApicTimerState (
-  OUT UINTN    *DivideValue  OPTIONAL,
-  OUT BOOLEAN  *PeriodicMode  OPTIONAL,
-  OUT UINT8    *Vector  OPTIONAL
-  )
-{
-  UINT32 Divisor;
-  LOCAL_APIC_DCR Dcr;
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  //
-  // Check the APIC Software Enable/Disable bit (bit 8) in Spurious-Interrupt
-  // Vector Register.
-  // This bit will be 1, if local APIC is software enabled.
-  //
-  ASSERT ((ReadLocalApicReg(XAPIC_SPURIOUS_VECTOR_OFFSET) & BIT8) != 0);
-
-  if (DivideValue != NULL) {
-    Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
-    Divisor = Dcr.Bits.DivideValue1 | (Dcr.Bits.DivideValue2 << 2);
-    Divisor = (Divisor + 1) & 0x7;
-    *DivideValue = ((UINTN)1) << Divisor;
-  }
-
-  if (PeriodicMode != NULL || Vector != NULL) {
-    LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-    if (PeriodicMode != NULL) {
-      if (LvtTimer.Bits.TimerMode == 1) {
-        *PeriodicMode = TRUE;
-      } else {
-        *PeriodicMode = FALSE;
-      }
-    }
-    if (Vector != NULL) {
-      *Vector = (UINT8) LvtTimer.Bits.Vector;
-    }
-  }
-}
-
-/**
-  Enable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-EnableApicTimerInterrupt (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  LvtTimer.Bits.Mask = 0;
-  WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
-  Disable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-DisableApicTimerInterrupt (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  LvtTimer.Bits.Mask = 1;
-  WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
-  Get the local APIC timer interrupt state.
-
-  @retval TRUE  The local APIC timer interrupt is enabled.
-  @retval FALSE The local APIC timer interrupt is disabled.
-**/
-BOOLEAN
-EFIAPI
-GetApicTimerInterruptState (
-  VOID
-  )
-{
-  LOCAL_APIC_LVT_TIMER LvtTimer;
-
-  LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
-  return (BOOLEAN)(LvtTimer.Bits.Mask == 0);
-}
-
-/**
-  Send EOI to the local APIC.
-**/
-VOID
-EFIAPI
-SendApicEoi (
-  VOID
-  )
-{
-  WriteLocalApicReg (XAPIC_EOI_OFFSET, 0);
-}
-
-/**
-  Get the 32-bit address that a device should use to send a Message Signaled 
-  Interrupt (MSI) to the Local APIC of the currently executing processor.
-
-  @return 32-bit address used to send an MSI to the Local APIC.
-**/
-UINT32
-EFIAPI    
-GetApicMsiAddress (
-  VOID
-  )
-{
-  LOCAL_APIC_MSI_ADDRESS  MsiAddress;
-
-  //
-  // Return address for an MSI interrupt to be delivered only to the APIC ID 
-  // of the currently executing processor.
-  //
-  MsiAddress.Uint32             = 0;
-  MsiAddress.Bits.BaseAddress   = 0xFEE;
-  MsiAddress.Bits.DestinationId = GetApicId ();
-  return MsiAddress.Uint32;
-}
-    
-/**
-  Get the 64-bit data value that a device should use to send a Message Signaled 
-  Interrupt (MSI) to the Local APIC of the currently executing processor.
-
-  If Vector is not in range 0x10..0xFE, then ASSERT().
-  If DeliveryMode is not supported, then ASSERT().
-  
-  @param  Vector          The 8-bit interrupt vector associated with the MSI.  
-                          Must be in the range 0x10..0xFE
-  @param  DeliveryMode    A 3-bit value that specifies how the recept of the MSI 
-                          is handled.  The only supported values are:
-                            0: LOCAL_APIC_DELIVERY_MODE_FIXED
-                            1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY
-                            2: LOCAL_APIC_DELIVERY_MODE_SMI
-                            4: LOCAL_APIC_DELIVERY_MODE_NMI
-                            5: LOCAL_APIC_DELIVERY_MODE_INIT
-                            7: LOCAL_APIC_DELIVERY_MODE_EXTINT
-                          
-  @param  LevelTriggered  TRUE specifies a level triggered interrupt.  
-                          FALSE specifies an edge triggered interrupt.
-  @param  AssertionLevel  Ignored if LevelTriggered is FALSE.
-                          TRUE specifies a level triggered interrupt that active 
-                          when the interrupt line is asserted.
-                          FALSE specifies a level triggered interrupt that active 
-                          when the interrupt line is deasserted.
-
-  @return 64-bit data value used to send an MSI to the Local APIC.
-**/
-UINT64
-EFIAPI    
-GetApicMsiValue (
-  IN UINT8    Vector,
-  IN UINTN    DeliveryMode,
-  IN BOOLEAN  LevelTriggered,
-  IN BOOLEAN  AssertionLevel
-  )
-{
-  LOCAL_APIC_MSI_DATA  MsiData;
-
-  ASSERT (Vector >= 0x10 && Vector <= 0xFE);
-  ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);
-  
-  MsiData.Uint64            = 0;
-  MsiData.Bits.Vector       = Vector;
-  MsiData.Bits.DeliveryMode = (UINT32)DeliveryMode;
-  if (LevelTriggered) {
-    MsiData.Bits.TriggerMode = 1;
-    if (AssertionLevel) {
-      MsiData.Bits.Level = 1;
-    }
-  }
-  return MsiData.Uint64;
-}
-
-/**
-  Get Package ID/Core ID/Thread ID of a processor.
-
-  The algorithm assumes the target system has symmetry across physical
-  package  boundaries with respect to the number of logical processors
-  per package,  number of cores per package.
-
-  @param[in]  InitialApicId  Initial APIC ID of the target logical processor.
-  @param[out]  Package       Returns the processor package ID.
-  @param[out]  Core          Returns the processor core ID.
-  @param[out]  Thread        Returns the processor thread ID.
-**/
-VOID
-EFIAPI
-GetProcessorLocationByApicId (
-  IN  UINT32  InitialApicId,
-  OUT UINT32  *Package  OPTIONAL,
-  OUT UINT32  *Core    OPTIONAL,
-  OUT UINT32  *Thread  OPTIONAL
-  )
-{
-  BOOLEAN                       TopologyLeafSupported;
-  UINTN                         ThreadBits;
-  UINTN                         CoreBits;
-  CPUID_VERSION_INFO_EBX        VersionInfoEbx;
-  CPUID_VERSION_INFO_EDX        VersionInfoEdx;
-  CPUID_CACHE_PARAMS_EAX        CacheParamsEax;
-  CPUID_EXTENDED_TOPOLOGY_EAX   ExtendedTopologyEax;
-  CPUID_EXTENDED_TOPOLOGY_EBX   ExtendedTopologyEbx;
-  CPUID_EXTENDED_TOPOLOGY_ECX   ExtendedTopologyEcx;
-  UINT32                        MaxCpuIdIndex;
-  UINT32                        SubIndex;
-  UINTN                         LevelType;
-  UINT32                        MaxLogicProcessorsPerPackage;
-  UINT32                        MaxCoresPerPackage;
-
-  //
-  // Check if the processor is capable of supporting more than one logical processor.
-  //
-  AsmCpuid(CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);
-  if (VersionInfoEdx.Bits.HTT == 0) {
-    if (Thread != NULL) {
-      *Thread  = 0;
-    }
-    if (Core != NULL) {
-      *Core    = 0;
-    }
-    if (Package != NULL) {
-      *Package = 0;
-    }
-    return;
-  }
-
-  ThreadBits = 0;
-  CoreBits = 0;
-
-  //
-  // Assume three-level mapping of APIC ID: Package:Core:SMT.
-  //
-  TopologyLeafSupported = FALSE;
-
-  //
-  // Get the max index of basic CPUID
-  //
-  AsmCpuid(CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
-
-  //
-  // If the extended topology enumeration leaf is available, it
-  // is the preferred mechanism for enumerating topology.
-  //
-  if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
-    AsmCpuidEx(
-      CPUID_EXTENDED_TOPOLOGY,
-      0,
-      &ExtendedTopologyEax.Uint32,
-      &ExtendedTopologyEbx.Uint32,
-      &ExtendedTopologyEcx.Uint32,
-      NULL
-      );
-    //
-    // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for
-    // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not
-    // supported on that processor.
-    //
-    if (ExtendedTopologyEbx.Uint32 != 0) {
-      TopologyLeafSupported = TRUE;
-
-      //
-      // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
-      // the SMT sub-field of x2APIC ID.
-      //
-      LevelType = ExtendedTopologyEcx.Bits.LevelType;
-      ASSERT(LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);
-      ThreadBits = ExtendedTopologyEax.Bits.ApicIdShift;
-
-      //
-      // Software must not assume any "level type" encoding
-      // value to be related to any sub-leaf index, except sub-leaf 0.
-      //
-      SubIndex = 1;
-      do {
-        AsmCpuidEx(
-          CPUID_EXTENDED_TOPOLOGY,
-          SubIndex,
-          &ExtendedTopologyEax.Uint32,
-          NULL,
-          &ExtendedTopologyEcx.Uint32,
-          NULL
-          );
-        LevelType = ExtendedTopologyEcx.Bits.LevelType;
-        if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {
-          CoreBits = ExtendedTopologyEax.Bits.ApicIdShift - ThreadBits;
-          break;
-        }
-        SubIndex++;
-      } while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);
-    }
-  }
-
-  if (!TopologyLeafSupported) {
-    AsmCpuid(CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL);
-    MaxLogicProcessorsPerPackage = VersionInfoEbx.Bits.MaximumAddressableIdsForLogicalProcessors;
-    if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {
-      AsmCpuidEx(CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL, NULL);
-      MaxCoresPerPackage = CacheParamsEax.Bits.MaximumAddressableIdsForLogicalProcessors + 1;
-    }
-    else {
-      //
-      // Must be a single-core processor.
-      //
-      MaxCoresPerPackage = 1;
-    }
-
-    ThreadBits = (UINTN)(HighBitSet32(MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);
-    CoreBits = (UINTN)(HighBitSet32(MaxCoresPerPackage - 1) + 1);  }
-
-  if (Thread != NULL) {
-    *Thread  = InitialApicId & ((1 << ThreadBits) - 1);
-  }
-  if (Core != NULL) {
-    *Core    = (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1);
-  }
-  if (Package != NULL) {
-    *Package = (InitialApicId >> (ThreadBits + CoreBits));
-  }
-}
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
deleted file mode 100644
index 53e186858f..0000000000
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
+++ /dev/null
@@ -1,49 +0,0 @@
-## @file
-#  The Local Apic library supports x2APIC capable processors which have xAPIC and x2APIC modes.
-#
-#  Note: Local APIC library assumes local APIC is enabled. It does not handle cases
-#  where local APIC is disabled.
-#
-#  Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = BaseXApicX2ApicLib
-  MODULE_UNI_FILE                = BaseXApicX2ApicLib.uni
-  FILE_GUID                      = 967B6E05-F10D-4c10-8BF7-365291CA143F
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = LocalApicLib 
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources]
-  BaseXApicX2ApicLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  TimerLib
-  IoLib
-  PcdLib
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds  ## SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress        ## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.uni b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.uni
deleted file mode 100644
index 97f62273ba..0000000000
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.uni
+++ /dev/null
@@ -1,23 +0,0 @@
-// /** @file
-// The Local Apic library supports x2APIC capable processors which have xAPIC and x2APIC modes.
-//
-// Note: Local APIC library assumes local APIC is enabled. It does not handle cases
-// where local APIC is disabled.
-//
-// Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-// 
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "Supports x2APIC capable processors that have xAPIC and x2APIC modes"
-
-#string STR_MODULE_DESCRIPTION          #language en-US "Note: Local APIC library assumes local APIC is enabled. It does not handle cases where local APIC is disabled."
-
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c
deleted file mode 100644
index 178bfb50ab..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/** @file
-  AESNI feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Prepares for the data used by CPU feature detection and initialization.
-
-  @param[in]  NumberOfProcessors  The number of CPUs in the platform.
-
-  @return  Pointer to a buffer of CPU related configuration data.
-
-  @note This service could be called by BSP only.
-**/
-VOID *
-EFIAPI
-AesniGetConfigData (
-  IN UINTN  NumberOfProcessors
-  )
-{
-  UINT64                            *ConfigData;
-
-  ConfigData = AllocateZeroPool (sizeof (UINT64) * NumberOfProcessors);
-  ASSERT (ConfigData != NULL);
-  return ConfigData;
-}
-
-/**
-  Detects if AESNI feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     AESNI feature is supported.
-  @retval FALSE    AESNI feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-AesniSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER   *MsrFeatureConfig;
-
-  if (IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_XEON_5600_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_XEON_E7_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
-    MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
-    MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
-    return (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1);
-  }
-  return FALSE;
-}
-
-/**
-  Initializes AESNI feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the AESNI feature must be enabled.
-                               If FALSE, then the AESNI feature must be disabled.
-
-  @retval RETURN_SUCCESS       AESNI feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-AesniInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER   *MsrFeatureConfig;
-
-  //
-  // SANDY_BRIDGE, SILVERMONT, XEON_5600, XEON_7, and XEON_PHI have the same MSR index,
-  // Simply use MSR_SANDY_BRIDGE_FEATURE_CONFIG here
-  //
-  // The scope of the MSR_SANDY_BRIDGE_FEATURE_CONFIG is Core, only program MSR_FEATURE_CONFIG for thread 0
-  // of each core. Otherwise, once a thread in the core disabled AES, the other thread will cause GP when
-  // programming it.
-  //
-  if (CpuInfo->ProcessorInfo.Location.Thread == 0) {
-    MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
-    if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {
-      CPU_REGISTER_TABLE_WRITE_FIELD (
-        ProcessorNumber,
-        Msr,
-        MSR_SANDY_BRIDGE_FEATURE_CONFIG,
-        MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER,
-        Bits.AESConfiguration,
-        BIT1 | ((State) ? 0 : BIT0)
-        );
-    }
-  }
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
deleted file mode 100644
index 47116355a8..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/** @file
-  C1E feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if C1E feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     C1E feature is supported.
-  @retval FALSE    C1E feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-C1eSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  return IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel);
-}
-
-/**
-  Initializes C1E feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the C1E feature must be enabled.
-                               If FALSE, then the C1E feature must be disabled.
-
-  @retval RETURN_SUCCESS       C1E feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-C1eInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_NEHALEM_POWER_CTL,
-    MSR_NEHALEM_POWER_CTL_REGISTER,
-    Bits.C1EEnable,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c
deleted file mode 100644
index 56e53561e9..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ClockModulation.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/** @file
-  Clock Modulation feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if Clock Modulation feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Clock Modulation feature is supported.
-  @retval FALSE    Clock Modulation feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-ClockModulationSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  return (CpuInfo->CpuIdVersionInfoEdx.Bits.ACPI == 1);
-}
-
-/**
-  Initializes Clock Modulation feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Clock Modulation feature must be enabled.
-                               If FALSE, then the Clock Modulation feature must be disabled.
-
-  @retval RETURN_SUCCESS       Clock Modulation feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-ClockModulationInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  if (IS_SANDY_BRIDGE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION,
-      MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER,
-      Bits.OnDemandClockModulationDutyCycle,
-      PcdGet8 (PcdCpuClockModulationDutyCycle)
-      );
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION,
-      MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER,
-      Bits.OnDemandClockModulationEnable,
-      (State) ? 1 : 0
-      );
-  } else {
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_CLOCK_MODULATION,
-      MSR_IA32_CLOCK_MODULATION_REGISTER,
-      Bits.OnDemandClockModulationDutyCycle,
-      PcdGet8 (PcdCpuClockModulationDutyCycle)
-      );
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_CLOCK_MODULATION,
-      MSR_IA32_CLOCK_MODULATION_REGISTER,
-      Bits.OnDemandClockModulationEnable,
-      (State) ? 1 : 0
-      );
-  }
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
deleted file mode 100644
index aa6d1122b1..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h
+++ /dev/null
@@ -1,867 +0,0 @@
-/** @file
-  CPU Common features library header file.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_COMMON_FEATURES_H_
-#define _CPU_COMMON_FEATURES_H_
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/RegisterCpuFeaturesLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/LocalApicLib.h>
-
-#include <Register/Cpuid.h>
-#include <Register/Msr.h>
-
-/**
-  Prepares for the data used by CPU feature detection and initialization.
-
-  @param[in]  NumberOfProcessors  The number of CPUs in the platform.
-
-  @return  Pointer to a buffer of CPU related configuration data.
-
-  @note This service could be called by BSP only.
-**/
-VOID *
-EFIAPI
-AesniGetConfigData (
-  IN UINTN  NumberOfProcessors
-  );
-
-/**
-  Detects if AESNI feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     AESNI feature is supported.
-  @retval FALSE    AESNI feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-AesniSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes AESNI feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the AESNI feature must be enabled.
-                               If FALSE, then the AESNI feature must be disabled.
-
-  @retval RETURN_SUCCESS       AESNI feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-AesniInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if Clock Modulation feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Clock Modulation feature is supported.
-  @retval FALSE    Clock Modulation feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-ClockModulationSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes Clock Modulation feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Clock Modulation feature must be enabled.
-                               If FALSE, then the Clock Modulation feature must be disabled.
-
-  @retval RETURN_SUCCESS       Clock Modulation feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-ClockModulationInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if Enhanced Intel SpeedStep feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Enhanced Intel SpeedStep feature is supported.
-  @retval FALSE    Enhanced Intel SpeedStep feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-EistSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes Enhanced Intel SpeedStep feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Enhanced Intel SpeedStep feature
-                               must be enabled.
-                               If FALSE, then the Enhanced Intel SpeedStep feature
-                               must be disabled.
-
-  @retval RETURN_SUCCESS       Enhanced Intel SpeedStep feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-EistInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if Execute Disable feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Execute Disable feature is supported.
-  @retval FALSE    Execute Disable feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-ExecuteDisableSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes Execute Disable feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Execute Disable feature must be enabled.
-                               If FALSE, then the Execute Disable feature must be disabled.
-
-  @retval RETURN_SUCCESS       Execute Disable feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-ExecuteDisableInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Initializes Fast-Strings feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Fast-Strings feature must be enabled.
-                               If FALSE, then the Fast-Strings feature must be disabled.
-
-  @retval RETURN_SUCCESS       Fast-Strings feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-FastStringsInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if MONITOR/MWAIT feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     MONITOR/MWAIT feature is supported.
-  @retval FALSE    MONITOR/MWAIT feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-MonitorMwaitSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes MONITOR/MWAIT feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the MONITOR/MWAIT feature must be enabled.
-                               If FALSE, then the MONITOR/MWAIT feature must be disabled.
-
-  @retval RETURN_SUCCESS       MONITOR/MWAIT feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-MonitorMwaitInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if VMX feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     VMX feature is supported.
-  @retval FALSE    VMX feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-VmxSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes VMX inside SMX feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the VMX inside SMX feature must be enabled.
-                               If FALSE, then the VMX inside SMX feature must be disabled.
-
-  @retval RETURN_SUCCESS       VMX inside SMX feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-VmxInsideSmxInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Initializes SENTER feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the SENTER feature must be enabled.
-                               If FALSE, then the SENTER feature must be disabled.
-
-  @retval RETURN_SUCCESS       SENTER feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-SenterInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if Lock Feature Control Register feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Lock Feature Control Register feature is supported.
-  @retval FALSE    Lock Feature Control Register feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-LockFeatureControlRegisterSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes Lock Feature Control Register feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Lock Feature Control Register feature must be enabled.
-                               If FALSE, then the Lock Feature Control Register feature must be disabled.
-
-  @retval RETURN_SUCCESS       Lock Feature Control Register feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-LockFeatureControlRegisterInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if SMX feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     SMX feature is supported.
-  @retval FALSE    SMX feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-SmxSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes VMX outside SMX feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the VMX outside SMX feature must be enabled.
-                               If FALSE, then the VMX outside SMX feature must be disabled.
-
-  @retval RETURN_SUCCESS       VMX outside SMX feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-VmxOutsideSmxInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if LimitCpuidMaxval feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     LimitCpuidMaxval feature is supported.
-  @retval FALSE    LimitCpuidMaxval feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-LimitCpuidMaxvalSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes LimitCpuidMaxval feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the LimitCpuidMaxval feature must be enabled.
-                               If FALSE, then the LimitCpuidMaxval feature must be disabled.
-
-  @retval RETURN_SUCCESS       LimitCpuidMaxval feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-LimitCpuidMaxvalInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if Machine Check Exception feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Machine Check Exception feature is supported.
-  @retval FALSE    Machine Check Exception feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-MceSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes Machine Check Exception feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Machine Check Exception feature must be enabled.
-                               If FALSE, then the Machine Check Exception feature must be disabled.
-
-  @retval RETURN_SUCCESS       Machine Check Exception feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-MceInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if Machine Check Architecture feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Machine Check Architecture feature is supported.
-  @retval FALSE    Machine Check Architecture feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-McaSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes Machine Check Architecture feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Machine Check Architecture feature must be enabled.
-                               If FALSE, then the Machine Check Architecture feature must be disabled.
-
-  @retval RETURN_SUCCESS       Machine Check Architecture feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-McaInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if IA32_MCG_CTL feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     IA32_MCG_CTL feature is supported.
-  @retval FALSE    IA32_MCG_CTL feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-McgCtlSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes IA32_MCG_CTL feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the IA32_MCG_CTL feature must be enabled.
-                               If FALSE, then the IA32_MCG_CTL feature must be disabled.
-
-  @retval RETURN_SUCCESS       IA32_MCG_CTL feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-McgCtlInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if Pending Break feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Pending Break feature is supported.
-  @retval FALSE    Pending Break feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-PendingBreakSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes Pending Break feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Pending Break feature must be enabled.
-                               If FALSE, then the Pending Break feature must be disabled.
-
-  @retval RETURN_SUCCESS       Pending Break feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-PendingBreakInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if C1E feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     C1E feature is supported.
-  @retval FALSE    C1E feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-C1eSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes C1E feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the C1E feature must be enabled.
-                               If FALSE, then the C1E feature must be disabled.
-
-  @retval RETURN_SUCCESS       C1E feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-C1eInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Detects if X2Apci feature supported on current processor.
-
-  Detect if X2Apci has been already enabled.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     X2Apci feature is supported.
-  @retval FALSE    X2Apci feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-X2ApicSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  );
-
-/**
-  Initializes X2Apci feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the X2Apci feature must be enabled.
-                               If FALSE, then the X2Apci feature must be disabled.
-
-  @retval RETURN_SUCCESS       X2Apci feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-X2ApicInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  );
-
-/**
-  Prepares for the data used by CPU feature detection and initialization.
-
-  @param[in]  NumberOfProcessors  The number of CPUs in the platform.
-
-  @return  Pointer to a buffer of CPU related configuration data.
-
-  @note This service could be called by BSP only.
-**/
-VOID *
-EFIAPI
-FeatureControlGetConfigData (
-  IN UINTN               NumberOfProcessors
-  );
-
-#endif
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
deleted file mode 100644
index 3390aa8f2a..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
+++ /dev/null
@@ -1,227 +0,0 @@
-/** @file
-  This library registers CPU features defined in Intel(R) 64 and IA-32
-  Architectures Software Developer's Manual.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Register CPU features.
-
-  @retval  RETURN_SUCCESS            Register successfully
-**/
-RETURN_STATUS
-EFIAPI
-CpuCommonFeaturesLibConstructor (
-  VOID
-  )
-{
-  RETURN_STATUS         Status;
-
-  if (IsCpuFeatureSupported (CPU_FEATURE_AESNI)) {
-    Status = RegisterCpuFeature (
-               "AESNI",
-               AesniGetConfigData,
-               AesniSupport,
-               AesniInitialize,
-               CPU_FEATURE_AESNI,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_MWAIT)) {
-    Status = RegisterCpuFeature (
-               "MWAIT",
-               NULL,
-               MonitorMwaitSupport,
-               MonitorMwaitInitialize,
-               CPU_FEATURE_MWAIT,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_ACPI)) {
-    Status = RegisterCpuFeature (
-               "ACPI",
-               NULL,
-               ClockModulationSupport,
-               ClockModulationInitialize,
-               CPU_FEATURE_ACPI,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_EIST)) {
-    Status = RegisterCpuFeature (
-               "EIST",
-               NULL,
-               EistSupport,
-               EistInitialize,
-               CPU_FEATURE_EIST,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_XD)) {
-    Status = RegisterCpuFeature (
-               "Execute Disable",
-               NULL,
-               ExecuteDisableSupport,
-               ExecuteDisableInitialize,
-               CPU_FEATURE_XD,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_FASTSTRINGS)) {
-    Status = RegisterCpuFeature (
-               "FastStrings",
-               NULL,
-               NULL,
-               FastStringsInitialize,
-               CPU_FEATURE_FASTSTRINGS,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER)) {
-    Status = RegisterCpuFeature (
-               "Lock Feature Control Register",
-               FeatureControlGetConfigData,
-               LockFeatureControlRegisterSupport,
-               LockFeatureControlRegisterInitialize,
-               CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_SENTER)) {
-    Status = RegisterCpuFeature (
-               "SENTER",
-               FeatureControlGetConfigData,
-               VmxSupport,
-               SenterInitialize,
-               CPU_FEATURE_SENTER,
-               CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
-               CPU_FEATURE_SMX | CPU_FEATURE_AFTER,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_SMX)) {
-    Status = RegisterCpuFeature (
-               "SMX",
-               FeatureControlGetConfigData,
-               SmxSupport,
-               VmxInsideSmxInitialize,
-               CPU_FEATURE_SMX,
-               CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_VMX)) {
-    Status = RegisterCpuFeature (
-               "VMX",
-               FeatureControlGetConfigData,
-               SmxSupport,
-               VmxOutsideSmxInitialize,
-               CPU_FEATURE_VMX,
-               CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_LIMIT_CPUID_MAX_VAL)) {
-    Status = RegisterCpuFeature (
-               "Limit CpuId Maximum Value",
-               NULL,
-               LimitCpuidMaxvalSupport,
-               LimitCpuidMaxvalInitialize,
-               CPU_FEATURE_LIMIT_CPUID_MAX_VAL,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_MCE)) {
-    Status = RegisterCpuFeature (
-               "Machine Check Enable",
-               NULL,
-               MceSupport,
-               MceInitialize,
-               CPU_FEATURE_MCE,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_MCA)) {
-    Status = RegisterCpuFeature (
-               "Machine Check Architect",
-               NULL,
-               McaSupport,
-               McaInitialize,
-               CPU_FEATURE_MCA,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_MCG_CTL)) {
-    Status = RegisterCpuFeature (
-               "MCG_CTL",
-               NULL,
-               McgCtlSupport,
-               McgCtlInitialize,
-               CPU_FEATURE_MCG_CTL,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_PENDING_BREAK)) {
-    Status = RegisterCpuFeature (
-               "Pending Break",
-               NULL,
-               PendingBreakSupport,
-               PendingBreakInitialize,
-               CPU_FEATURE_PENDING_BREAK,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_C1E)) {
-    Status = RegisterCpuFeature (
-               "C1E",
-               NULL,
-               C1eSupport,
-               C1eInitialize,
-               CPU_FEATURE_C1E,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-  if (IsCpuFeatureSupported (CPU_FEATURE_X2APIC)) {
-    Status = RegisterCpuFeature (
-               "X2Apic",
-               NULL,
-               X2ApicSupport,
-               X2ApicInitialize,
-               CPU_FEATURE_X2APIC,
-               CPU_FEATURE_END
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-
-  return RETURN_SUCCESS;
-}
-
-
-
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
deleted file mode 100644
index e68936be25..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ /dev/null
@@ -1,68 +0,0 @@
-## @file
-#  NULL instance to register CPU features.
-#
-#  This library registers CPU features defined in Intel(R) 64 and IA-32
-#  Architectures Software Developer's Manual.
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution. The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = CpuCommonFeaturesLib
-  MODULE_UNI_FILE                = CpuCommonFeaturesLib.uni
-  FILE_GUID                      = 6D69F79F-9535-4893-9DD7-93929898252C
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = NULL
-
-  CONSTRUCTOR                    = CpuCommonFeaturesLibConstructor
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources]
-  CpuCommonFeaturesLib.c
-  CpuCommonFeatures.h
-  Aesni.c
-  C1e.c
-  ClockModulation.c
-  Eist.c
-  ExecuteDisable.c
-  FastStrings.c
-  FeatureControl.c
-  LimitCpuIdMaxval.c
-  MachineCheck.c
-  MonitorMwait.c
-  PendingBreak.c
-  X2Apic.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  PcdLib
-  DebugLib
-  RegisterCpuFeaturesLib
-  BaseMemoryLib
-  MemoryAllocationLib
-  LocalApicLib
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport            ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle   ## SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset                ## SOMETIMES_CONSUMES
-
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.uni b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.uni
deleted file mode 100644
index d1a90c32d4..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.uni
+++ /dev/null
@@ -1,25 +0,0 @@
-// /** @file
-// Dxe Crc32 Guided Section Extract library.
-//
-// This library doesn't produce any library class. The constructor function uses
-// ExtractGuidedSectionLib service to register CRC32 guided section handler
-// that parses CRC32 encapsulation section and extracts raw data.
-//
-// It uses UEFI boot service CalculateCrc32 to authenticate 32 bit CRC value.
-//
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "Dxe Crc32 Guided Section Extract library."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "This library doesn't produce any library class. The constructor function uses ExtractGuidedSectionLib service to register CRC32 guided section handler that parses CRC32 encapsulation section and extracts raw data. It uses UEFI boot service CalculateCrc32 to authenticate 32 bit CRC value."
-
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c
deleted file mode 100644
index 2038171a14..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Eist.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/** @file
-  Enhanced Intel SpeedStep feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if Enhanced Intel SpeedStep feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Enhanced Intel SpeedStep feature is supported.
-  @retval FALSE    Enhanced Intel SpeedStep feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-EistSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  return (CpuInfo->CpuIdVersionInfoEcx.Bits.EIST == 1);
-}
-
-/**
-  Initializes Enhanced Intel SpeedStep feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Enhanced Intel SpeedStep feature
-                               must be enabled.
-                               If FALSE, then the Enhanced Intel SpeedStep feature
-                               must be disabled.
-
-  @retval RETURN_SUCCESS       Enhanced Intel SpeedStep feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-EistInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_IA32_MISC_ENABLE,
-    MSR_IA32_MISC_ENABLE_REGISTER,
-    Bits.EIST,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c
deleted file mode 100644
index 921656a1e8..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/** @file
-  Execute Disable feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if Execute Disable feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Execute Disable feature is supported.
-  @retval FALSE    Execute Disable feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-ExecuteDisableSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  UINT32                         Eax;
-  CPUID_EXTENDED_CPU_SIG_EDX     Edx;
-
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);
-  if (Eax <= CPUID_EXTENDED_FUNCTION) {
-    //
-    // Extended CPUID functions are not supported on this processor.
-    //
-    return FALSE;
-  }
-
-  AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);
-  return (Edx.Bits.NX != 0);
-}
-
-/**
-  Initializes Execute Disable feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Execute Disable feature must be enabled.
-                               If FALSE, then the Execute Disable feature must be disabled.
-
-  @retval RETURN_SUCCESS       Execute Disable feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-ExecuteDisableInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_IA32_EFER,
-    MSR_IA32_EFER_REGISTER,
-    Bits.NXE,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FastStrings.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FastStrings.c
deleted file mode 100644
index 029bcf87b3..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FastStrings.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/** @file
-  Fast-Strings feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Initializes Fast-Strings feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Fast-Strings feature must be enabled.
-                               If FALSE, then the Fast-Strings feature must be disabled.
-
-  @retval RETURN_SUCCESS       Fast-Strings feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-FastStringsInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_IA32_MISC_ENABLE,
-    MSR_IA32_MISC_ENABLE_REGISTER,
-    Bits.FastStrings,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
deleted file mode 100644
index 0b5c161f87..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
+++ /dev/null
@@ -1,314 +0,0 @@
-/** @file
-  Features in MSR_IA32_FEATURE_CONTROL register.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Prepares for the data used by CPU feature detection and initialization.
-
-  @param[in]  NumberOfProcessors  The number of CPUs in the platform.
-
-  @return  Pointer to a buffer of CPU related configuration data.
-
-  @note This service could be called by BSP only.
-**/
-VOID *
-EFIAPI
-FeatureControlGetConfigData (
-  IN UINTN               NumberOfProcessors
-  )
-{
-  VOID          *ConfigData;
-
-  ConfigData = AllocateZeroPool (sizeof (MSR_IA32_FEATURE_CONTROL_REGISTER) * NumberOfProcessors);
-  ASSERT (ConfigData != NULL);
-  return ConfigData;
-}
-
-/**
-  Detects if VMX feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     VMX feature is supported.
-  @retval FALSE    VMX feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-VmxSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
-
-  ASSERT (ConfigData != NULL);
-  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
-  MsrRegister[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);
-  return (CpuInfo->CpuIdVersionInfoEcx.Bits.VMX == 1);
-}
-
-/**
-  Initializes VMX inside SMX feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the VMX inside SMX feature must be enabled.
-                               If FALSE, then the VMX inside SMX feature must be disabled.
-
-  @retval RETURN_SUCCESS       VMX inside SMX feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-VmxInsideSmxInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
-
-  ASSERT (ConfigData != NULL);
-  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
-  if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_FEATURE_CONTROL,
-      MSR_IA32_FEATURE_CONTROL_REGISTER,
-      Bits.EnableVmxInsideSmx,
-      (State) ? 1 : 0
-      );
-  }
-  return RETURN_SUCCESS;
-}
-
-/**
-  Initializes SENTER feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the SENTER feature must be enabled.
-                               If FALSE, then the SENTER feature must be disabled.
-
-  @retval RETURN_SUCCESS       SENTER feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-SenterInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
-
-  ASSERT (ConfigData != NULL);
-  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
-  if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_FEATURE_CONTROL,
-      MSR_IA32_FEATURE_CONTROL_REGISTER,
-      Bits.SenterLocalFunctionEnables,
-      (State) ? 0x7F : 0
-      );
-
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_FEATURE_CONTROL,
-      MSR_IA32_FEATURE_CONTROL_REGISTER,
-      Bits.SenterGlobalEnable,
-      (State) ? 1 : 0
-      );
-  }
-  return RETURN_SUCCESS;
-}
-
-/**
-  Detects if Lock Feature Control Register feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Lock Feature Control Register feature is supported.
-  @retval FALSE    Lock Feature Control Register feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-LockFeatureControlRegisterSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
-
-  ASSERT (ConfigData != NULL);
-  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
-  MsrRegister[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);
-  return TRUE;
-}
-
-/**
-  Initializes Lock Feature Control Register feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Lock Feature Control Register feature must be enabled.
-                               If FALSE, then the Lock Feature Control Register feature must be disabled.
-
-  @retval RETURN_SUCCESS       Lock Feature Control Register feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-LockFeatureControlRegisterInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
-
-  ASSERT (ConfigData != NULL);
-  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
-  if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_FEATURE_CONTROL,
-      MSR_IA32_FEATURE_CONTROL_REGISTER,
-      Bits.Lock,
-      1
-      );
-  }
-  return RETURN_SUCCESS;
-}
-
-/**
-  Detects if SMX feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     SMX feature is supported.
-  @retval FALSE    SMX feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-SmxSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
-
-  ASSERT (ConfigData != NULL);
-  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
-  MsrRegister[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);
-  return (CpuInfo->CpuIdVersionInfoEcx.Bits.SMX == 1);
-}
-
-/**
-  Initializes VMX outside SMX feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the VMX outside SMX feature must be enabled.
-                               If FALSE, then the VMX outside SMX feature must be disabled.
-
-  @retval RETURN_SUCCESS       VMX outside SMX feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-VmxOutsideSmxInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;
-
-  ASSERT (ConfigData != NULL);
-  MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;
-  if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {
-    CPU_REGISTER_TABLE_WRITE_FIELD (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_FEATURE_CONTROL,
-      MSR_IA32_FEATURE_CONTROL_REGISTER,
-      Bits.EnableVmxOutsideSmx,
-      (State) ? 1 : 0
-      );
-  }
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c
deleted file mode 100644
index 40cc9d5fe0..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/** @file
-  LimitCpuidMaxval Feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if LimitCpuidMaxval feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     LimitCpuidMaxval feature is supported.
-  @retval FALSE    LimitCpuidMaxval feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-LimitCpuidMaxvalSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  UINT32  Eax;
-
-  AsmCpuid (CPUID_SIGNATURE, &Eax, NULL, NULL, NULL);
-  return (Eax > 3);
-}
-
-/**
-  Initializes LimitCpuidMaxval feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the LimitCpuidMaxval feature must be enabled.
-                               If FALSE, then the LimitCpuidMaxval feature must be disabled.
-
-  @retval RETURN_SUCCESS       LimitCpuidMaxval feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-LimitCpuidMaxvalInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_IA32_MISC_ENABLE,
-    MSR_IA32_MISC_ENABLE_REGISTER,
-    Bits.LimitCpuidMaxval,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
deleted file mode 100644
index 72f665d32e..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/** @file
-  Machine Check features.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if Machine Check Exception feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Machine Check Exception feature is supported.
-  @retval FALSE    Machine Check Exception feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-MceSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCE == 1);
-}
-
-/**
-  Initializes Machine Check Exception feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Machine Check Exception feature must be enabled.
-                               If FALSE, then the Machine Check Exception feature must be disabled.
-
-  @retval RETURN_SUCCESS       Machine Check Exception feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-MceInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  //
-  // Set MCE bit in CR4
-  //
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    ControlRegister,
-    4,
-    IA32_CR4,
-    Bits.MCE,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
-
-/**
-  Detects if Machine Check Architecture feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Machine Check Architecture feature is supported.
-  @retval FALSE    Machine Check Architecture feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-McaSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  return (CpuInfo->CpuIdVersionInfoEdx.Bits.MCA == 1);
-}
-
-/**
-  Initializes Machine Check Architecture feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Machine Check Architecture feature must be enabled.
-                               If FALSE, then the Machine Check Architecture feature must be disabled.
-
-  @retval RETURN_SUCCESS       Machine Check Architecture feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-McaInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  MSR_IA32_MCG_CAP_REGISTER  McgCap;
-  UINT32                     BankIndex;
-
-  McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
-  for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {
-    CPU_REGISTER_TABLE_WRITE64 (
-      ProcessorNumber,
-      Msr,
-      MSR_IA32_MC0_CTL + BankIndex * 4,
-      MAX_UINT64
-      );
-  }
-
-  if (PcdGetBool (PcdIsPowerOnReset)) {
-    for (BankIndex = 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex++) {
-      CPU_REGISTER_TABLE_WRITE64 (
-        ProcessorNumber,
-        Msr,
-        MSR_IA32_MC0_STATUS + BankIndex * 4,
-        0
-        );
-    }
-  }
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Detects if IA32_MCG_CTL feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     IA32_MCG_CTL feature is supported.
-  @retval FALSE    IA32_MCG_CTL feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-McgCtlSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  MSR_IA32_MCG_CAP_REGISTER  McgCap;
-
-  if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) {
-    return FALSE;
-  }
-  McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
-  return (McgCap.Bits.MCG_CTL_P == 1);
-}
-
-/**
-  Initializes IA32_MCG_CTL feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the IA32_MCG_CTL feature must be enabled.
-                               If FALSE, then the IA32_MCG_CTL feature must be disabled.
-
-  @retval RETURN_SUCCESS       IA32_MCG_CTL feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-McgCtlInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  CPU_REGISTER_TABLE_WRITE64 (
-    ProcessorNumber,
-    Msr,
-    MSR_IA32_MCG_CTL,
-    (State)? MAX_UINT64 : 0
-    );
-  return RETURN_SUCCESS;
-}
-
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c
deleted file mode 100644
index 1d43bd128a..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MonitorMwait.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/** @file
-  MonitorMwait feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if MONITOR/MWAIT feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     MONITOR/MWAIT feature is supported.
-  @retval FALSE    MONITOR/MWAIT feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-MonitorMwaitSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  return (CpuInfo->CpuIdVersionInfoEcx.Bits.MONITOR == 1);
-}
-
-/**
-  Initializes MONITOR/MWAIT feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the MONITOR/MWAIT feature must be enabled.
-                               If FALSE, then the MONITOR/MWAIT feature must be disabled.
-
-  @retval RETURN_SUCCESS       MONITOR/MWAIT feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-MonitorMwaitInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_IA32_MISC_ENABLE,
-    MSR_IA32_MISC_ENABLE_REGISTER,
-    Bits.MONITOR,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c
deleted file mode 100644
index 8cafba4f4a..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/** @file
-  Pending Break feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if Pending Break feature supported on current processor.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     Pending Break feature is supported.
-  @retval FALSE    Pending Break feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-PendingBreakSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
-      IS_PENTIUM_M_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
-    return (CpuInfo->CpuIdVersionInfoEdx.Bits.PBE == 1);
-  }
-  return FALSE;
-}
-
-/**
-  Initializes Pending Break feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the Pending Break feature must be enabled.
-                               If FALSE, then the Pending Break feature must be disabled.
-
-  @retval RETURN_SUCCESS       Pending Break feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-PendingBreakInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  //
-  // ATOM, CORE2, CORE, PENTIUM_4 and IS_PENTIUM_M_PROCESSOR have the same MSR index,
-  // Simply use MSR_ATOM_IA32_MISC_ENABLE here
-  //
-  CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_ATOM_IA32_MISC_ENABLE,
-    MSR_ATOM_IA32_MISC_ENABLE_REGISTER,
-    Bits.FERR,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c
deleted file mode 100644
index 9c2ad9ad31..0000000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/X2Apic.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/** @file
-  X2Apic feature.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuCommonFeatures.h"
-
-/**
-  Detects if X2Apci feature supported on current processor.
-
-  Detect if X2Apci has been already enabled.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-
-  @retval TRUE     X2Apci feature is supported.
-  @retval FALSE    X2Apci feature is not supported.
-
-  @note This service could be called by BSP/APs.
-**/
-BOOLEAN
-EFIAPI
-X2ApicSupport (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData  OPTIONAL
-  )
-{
-  return (GetApicMode () == LOCAL_APIC_MODE_X2APIC);
-}
-
-/**
-  Initializes X2Apci feature to specific state.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
-                               structure for the CPU executing this function.
-  @param[in]  ConfigData       A pointer to the configuration buffer returned
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
-                               RegisterCpuFeature().
-  @param[in]  State            If TRUE, then the X2Apci feature must be enabled.
-                               If FALSE, then the X2Apci feature must be disabled.
-
-  @retval RETURN_SUCCESS       X2Apci feature is initialized.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-X2ApicInitialize (
-  IN UINTN                             ProcessorNumber,
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
-  IN VOID                              *ConfigData,  OPTIONAL
-  IN BOOLEAN                           State
-  )
-{
-  PRE_SMM_CPU_REGISTER_TABLE_WRITE_FIELD (
-    ProcessorNumber,
-    Msr,
-    MSR_IA32_APIC_BASE,
-    MSR_IA32_APIC_BASE_REGISTER,
-    Bits.EXTD,
-    (State) ? 1 : 0
-    );
-  return RETURN_SUCCESS;
-}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
deleted file mode 100644
index 78ee182e8d..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/** @file
-  CPU Exception Handler Library common functions.
-
-  Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-
-//
-// Error code flag indicating whether or not an error code will be
-// pushed on the stack if an exception occurs.
-//
-// 1 means an error code will be pushed, otherwise 0
-//
-CONST UINT32 mErrorCodeFlag = 0x00027d00;
-
-//
-// Define the maximum message length
-//
-#define MAX_DEBUG_MESSAGE_LENGTH  0x100
-
-CONST CHAR8 mExceptionReservedStr[] = "Reserved";
-CONST CHAR8 *mExceptionNameStr[] = {
-  "#DE - Divide Error",
-  "#DB - Debug",
-  "NMI Interrupt",
-  "#BP - Breakpoint",
-  "#OF - Overflow",
-  "#BR - BOUND Range Exceeded",
-  "#UD - Invalid Opcode",
-  "#NM - Device Not Available",
-  "#DF - Double Fault",
-  "Coprocessor Segment Overrun",
-  "#TS - Invalid TSS",
-  "#NP - Segment Not Present",
-  "#SS - Stack Fault Fault",
-  "#GP - General Protection",
-  "#PF - Page-Fault",
-  "Reserved",
-  "#MF - x87 FPU Floating-Point Error",
-  "#AC - Alignment Check",
-  "#MC - Machine-Check",
-  "#XM - SIMD floating-point",
-  "#VE - Virtualization"
-};
-
-#define EXCEPTION_KNOWN_NAME_NUM  (sizeof (mExceptionNameStr) / sizeof (CHAR8 *))
-
-/**
-  Get ASCII format string exception name by exception type.
-
-  @param ExceptionType  Exception type.
-
-  @return  ASCII format string exception name.
-**/
-CONST CHAR8 *
-GetExceptionNameStr (
-  IN EFI_EXCEPTION_TYPE          ExceptionType
-  )
-{
-  if ((UINTN) ExceptionType < EXCEPTION_KNOWN_NAME_NUM) {
-    return mExceptionNameStr[ExceptionType];
-  } else {
-    return mExceptionReservedStr;
-  }
-}
-
-/**
-  Prints a message to the serial port.
-
-  @param  Format      Format string for the message to print.
-  @param  ...         Variable argument list whose contents are accessed
-                      based on the format string specified by Format.
-
-**/
-VOID
-EFIAPI
-InternalPrintMessage (
-  IN  CONST CHAR8  *Format,
-  ...
-  )
-{
-  CHAR8    Buffer[MAX_DEBUG_MESSAGE_LENGTH];
-  VA_LIST  Marker;
-
-  //
-  // Convert the message to an ASCII String
-  //
-  VA_START (Marker, Format);
-  AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
-  VA_END (Marker);
-
-  //
-  // Send the print string to a Serial Port
-  //
-  SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer));
-}
-
-/**
-  Find and display image base address and return image base and its entry point.
-
-  @param CurrentEip      Current instruction pointer.
-
-**/
-VOID
-DumpModuleImageInfo (
-  IN  UINTN              CurrentEip
-  )
-{
-  EFI_STATUS                           Status;
-  UINTN                                Pe32Data;
-  VOID                                 *PdbPointer;
-  VOID                                 *EntryPoint;
-
-  Pe32Data = PeCoffSerachImageBase (CurrentEip);
-  if (Pe32Data == 0) {
-    InternalPrintMessage ("!!!! Can't find image information. !!!!\n");
-  } else {
-    //
-    // Find Image Base entry point
-    //
-    Status = PeCoffLoaderGetEntryPoint ((VOID *) Pe32Data, &EntryPoint);
-    if (EFI_ERROR (Status)) {
-      EntryPoint = NULL;
-    }
-    InternalPrintMessage ("!!!! Find image ");
-    PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data);
-    if (PdbPointer != NULL) {
-      InternalPrintMessage ("%a", PdbPointer);
-    } else {
-      InternalPrintMessage ("(No PDB) " );
-    }
-    InternalPrintMessage (
-      " (ImageBase=%016lp, EntryPoint=%016p) !!!!\n",
-      (VOID *) Pe32Data,
-      EntryPoint
-      );
-  }
-}
-
-/**
-  Read and save reserved vector information
-
-  @param[in]  VectorInfo        Pointer to reserved vector list.
-  @param[out] ReservedVector    Pointer to reserved vector data buffer.
-  @param[in]  VectorCount       Vector number to be updated.
-
-  @return EFI_SUCCESS           Read and save vector info successfully.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-
-**/
-EFI_STATUS
-ReadAndVerifyVectorInfo (
-  IN  EFI_VECTOR_HANDOFF_INFO       *VectorInfo,
-  OUT RESERVED_VECTORS_DATA         *ReservedVector,
-  IN  UINTN                         VectorCount
-  )
-{
-  while (VectorInfo->Attribute != EFI_VECTOR_HANDOFF_LAST_ENTRY) {
-    if (VectorInfo->Attribute > EFI_VECTOR_HANDOFF_HOOK_AFTER) {
-      //
-      // If vector attrubute is invalid
-      //
-      return EFI_INVALID_PARAMETER;
-    }
-    if (VectorInfo->VectorNumber < VectorCount) {
-      ReservedVector[VectorInfo->VectorNumber].Attribute = VectorInfo->Attribute;
-    }
-    VectorInfo ++;
-  }
-  return EFI_SUCCESS;
-}
-\ No newline at end of file
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
deleted file mode 100644
index 740a58828b..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
+++ /dev/null
@@ -1,292 +0,0 @@
-/** @file
-  Common header file for CPU Exception Handler Library.
-
-  Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_EXCEPTION_COMMON_H_
-#define _CPU_EXCEPTION_COMMON_H_
-
-#include <Ppi/VectorHandoffInfo.h>
-#include <Protocol/Cpu.h>
-#include <Library/BaseLib.h>
-#include <Library/SerialPortLib.h>
-#include <Library/PrintLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/SynchronizationLib.h>
-#include <Library/CpuExceptionHandlerLib.h>
-
-#define  CPU_EXCEPTION_NUM          32
-#define  CPU_INTERRUPT_NUM         256
-#define  HOOKAFTER_STUB_SIZE        16
-
-//
-// Exception Error Code of Page-Fault Exception
-//
-#define IA32_PF_EC_P                BIT0
-#define IA32_PF_EC_WR               BIT1
-#define IA32_PF_EC_US               BIT2
-#define IA32_PF_EC_RSVD             BIT3
-#define IA32_PF_EC_ID               BIT4
-#define IA32_PF_EC_PK               BIT5
-#define IA32_PF_EC_SGX              BIT15
-
-#include "ArchInterruptDefs.h"
-
-#define CPU_EXCEPTION_HANDLER_LIB_HOB_GUID \
-  { \
-    0xb21d9148, 0x9211, 0x4d8f, { 0xad, 0xd3, 0x66, 0xb1, 0x89, 0xc9, 0x2c, 0x83 } \
-  }
-
-//
-// Record exception handler information
-//
-typedef struct {
-  UINTN ExceptionStart;
-  UINTN ExceptionStubHeaderSize;
-  UINTN HookAfterStubHeaderStart;
-} EXCEPTION_HANDLER_TEMPLATE_MAP;
-
-typedef struct {
-  UINTN                       IdtEntryCount;
-  SPIN_LOCK                   DisplayMessageSpinLock;
-  RESERVED_VECTORS_DATA       *ReservedVectors;
-  EFI_CPU_INTERRUPT_HANDLER   *ExternalInterruptHandler;
-} EXCEPTION_HANDLER_DATA;
-
-extern CONST UINT32                mErrorCodeFlag;
-extern CONST UINTN                 mDoFarReturnFlag;
-
-/**
-  Return address map of exception handler template so that C code can generate
-  exception tables.
-
-  @param AddressMap  Pointer to a buffer where the address map is returned.
-**/
-VOID
-EFIAPI
-AsmGetTemplateAddressMap (
-  OUT EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
-  );
-
-/**
-  Return address map of exception handler template so that C code can generate
-  exception tables.
-
-  @param IdtEntry          Pointer to IDT entry to be updated.
-  @param InterruptHandler  IDT handler value.
-
-**/
-VOID
-ArchUpdateIdtEntry (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry,
-  IN UINTN                           InterruptHandler
-  );
-
-/**
-  Read IDT handler value from IDT entry.
-
-  @param IdtEntry          Pointer to IDT entry to be read.
-
-**/
-UINTN
-ArchGetIdtHandler (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry
-  );
-
-/**
-  Prints a message to the serial port.
-
-  @param  Format      Format string for the message to print.
-  @param  ...         Variable argument list whose contents are accessed
-                      based on the format string specified by Format.
-
-**/
-VOID
-EFIAPI
-InternalPrintMessage (
-  IN  CONST CHAR8  *Format,
-  ...
-  );
-
-/**
-  Find and display image base address and return image base and its entry point.
-
-  @param CurrentEip      Current instruction pointer.
-
-**/
-VOID
-DumpModuleImageInfo (
-  IN  UINTN              CurrentEip
-  );
-
-/**
-  Display CPU information.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-DumpImageAndCpuContent (
-  IN EFI_EXCEPTION_TYPE   ExceptionType,
-  IN EFI_SYSTEM_CONTEXT   SystemContext
-  );
-
-/**
-  Internal worker function to initialize exception handler.
-
-  @param[in]      VectorInfo            Pointer to reserved vector list.
-  @param[in, out] ExceptionHandlerData  Pointer to exception handler data.
-
-  @retval EFI_SUCCESS           CPU Exception Entries have been successfully initialized
-                                with default exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-InitializeCpuExceptionHandlersWorker (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL,
-  IN OUT EXCEPTION_HANDLER_DATA    *ExceptionHandlerData
-  );
-
-/**
-  Registers a function to be called from the processor interrupt handler.
-
-  @param[in]  InterruptType        Defines which interrupt or exception to hook.
-  @param[in]  InterruptHandler     A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-                                   when a processor interrupt occurs. If this parameter is NULL, then the handler
-                                   will be uninstalled
-  @param[in] ExceptionHandlerData  Pointer to exception handler data.
-
-  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.
-  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was
-                                previously installed.
-  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
-                                previously installed.
-  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported,
-                                or this function is not supported.
-**/
-EFI_STATUS
-RegisterCpuInterruptHandlerWorker (
-  IN EFI_EXCEPTION_TYPE            InterruptType,
-  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler,
-  IN EXCEPTION_HANDLER_DATA        *ExceptionHandlerData
-  );
-
-/**
-  Internal worker function to update IDT entries accordling to vector attributes.
-
-  @param[in] IdtTable              Pointer to IDT table.
-  @param[in] TemplateMap           Pointer to a buffer where the address map is
-                                   returned.
-  @param[in] ExceptionHandlerData  Pointer to exception handler data.
-
-**/
-VOID
-UpdateIdtTable (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtTable,
-  IN EXCEPTION_HANDLER_TEMPLATE_MAP  *TemplateMap,
-  IN EXCEPTION_HANDLER_DATA          *ExceptionHandlerData
-  );
-
-/**
-  Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
-  @param[in] ExceptionType        Exception type.
-  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.
-  @param[in] ExceptionHandlerData Pointer to exception handler data.
-**/
-VOID
-ArchSaveExceptionContext (
-  IN UINTN                        ExceptionType,
-  IN EFI_SYSTEM_CONTEXT           SystemContext,
-  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData
-  );
-
-/**
-  Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
-  @param[in] ExceptionType        Exception type.
-  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.
-  @param[in] ExceptionHandlerData Pointer to exception handler data.
-**/
-VOID
-ArchRestoreExceptionContext (
-  IN UINTN                        ExceptionType,
-  IN EFI_SYSTEM_CONTEXT           SystemContext,
-  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData
-  );
-
-/**
-  Fix up the vector number and function address in the vector code.
-
-  @param[in] NewVectorAddr   New vector handler address.
-  @param[in] VectorNum       Index of vector.
-  @param[in] OldVectorAddr   Old vector handler address.
-
-**/
-VOID
-EFIAPI
-AsmVectorNumFixup (
-  IN VOID    *NewVectorAddr,
-  IN UINT8   VectorNum,
-  IN VOID    *OldVectorAddr
-  );
-
-/**
-  Read and save reserved vector information
-
-  @param[in]  VectorInfo        Pointer to reserved vector list.
-  @param[out] ReservedVector    Pointer to reserved vector data buffer.
-  @param[in]  VectorCount       Vector number to be updated.
-
-  @return EFI_SUCCESS           Read and save vector info successfully.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-
-**/
-EFI_STATUS
-ReadAndVerifyVectorInfo (
-  IN  EFI_VECTOR_HANDOFF_INFO       *VectorInfo,
-  OUT RESERVED_VECTORS_DATA         *ReservedVector,
-  IN  UINTN                         VectorCount
-  );
-
-/**
-  Get ASCII format string exception name by exception type.
-
-  @param ExceptionType  Exception type.
-
-  @return  ASCII format string exception name.
-**/
-CONST CHAR8 *
-GetExceptionNameStr (
-  IN EFI_EXCEPTION_TYPE          ExceptionType
-  );
-
-/**
-  Internal worker function for common exception handler.
-
-  @param ExceptionType         Exception type.
-  @param SystemContext         Pointer to EFI_SYSTEM_CONTEXT.
-  @param ExceptionHandlerData  Pointer to exception handler data.
-**/
-VOID
-CommonExceptionHandlerWorker (
-  IN EFI_EXCEPTION_TYPE          ExceptionType,
-  IN EFI_SYSTEM_CONTEXT          SystemContext,
-  IN EXCEPTION_HANDLER_DATA      *ExceptionHandlerData
-  );
-
-#endif
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
deleted file mode 100644
index f4a8d01c80..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+++ /dev/null
@@ -1,63 +0,0 @@
-## @file
-#  CPU Exception Handler library instance for DXE modules.
-#
-#  Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = DxeCpuExceptionHandlerLib
-  MODULE_UNI_FILE                = DxeCpuExceptionHandlerLib.uni
-  FILE_GUID                      = B6E9835A-EDCF-4748-98A8-27D3C722E02D
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = CpuExceptionHandlerLib|DXE_CORE DXE_DRIVER UEFI_APPLICATION
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.asm
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionHandlerAsm.S
-  Ia32/ArchExceptionHandler.c
-  Ia32/ArchInterruptDefs.h
-
-[Sources.X64]
-  X64/ExceptionHandlerAsm.asm
-  X64/ExceptionHandlerAsm.nasm
-  X64/ExceptionHandlerAsm.S
-  X64/ArchExceptionHandler.c
-  X64/ArchInterruptDefs.h
-
-[Sources.common]
-  CpuExceptionCommon.h
-  CpuExceptionCommon.c
-  PeiDxeSmmCpuException.c
-  DxeException.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  SerialPortLib
-  PrintLib
-  SynchronizationLib
-  LocalApicLib
-  PeCoffGetEntryPointLib
-  MemoryAllocationLib
-  DebugLib
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.uni b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.uni
deleted file mode 100644
index ace4b6f287..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// CPU Exception Handler library instance for DXE modules.
-//
-// CPU Exception Handler library instance for DXE modules.
-//
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "CPU Exception Handler library instance for DXE modules."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "CPU Exception Handler library instance for DXE modules."
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
deleted file mode 100644
index 31febec976..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/** @file
-  CPU exception handler library implemenation for DXE modules.
-
-  Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-#include "CpuExceptionCommon.h"
-#include <Library/DebugLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-CONST UINTN    mDoFarReturnFlag  = 0;
-
-RESERVED_VECTORS_DATA       mReservedVectorsData[CPU_EXCEPTION_NUM];
-EFI_CPU_INTERRUPT_HANDLER   mExternalInterruptHandlerTable[CPU_EXCEPTION_NUM];
-UINTN                       mEnabledInterruptNum = 0;
-
-EXCEPTION_HANDLER_DATA      mExceptionHandlerData;
-
-/**
-  Common exception handler.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-EFIAPI
-CommonExceptionHandler (
-  IN EFI_EXCEPTION_TYPE          ExceptionType,
-  IN EFI_SYSTEM_CONTEXT          SystemContext
-  )
-{
-  CommonExceptionHandlerWorker (ExceptionType, SystemContext, &mExceptionHandlerData);
-}
-
-/**
-  Initializes all CPU exceptions entries and provides the default exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           CPU Exception Entries have been successfully initialized
-                                with default exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  mExceptionHandlerData.ReservedVectors          = mReservedVectorsData;
-  mExceptionHandlerData.ExternalInterruptHandler = mExternalInterruptHandlerTable;
-  InitializeSpinLock (&mExceptionHandlerData.DisplayMessageSpinLock);
-  return InitializeCpuExceptionHandlersWorker (VectorInfo, &mExceptionHandlerData);
-}
-
-/**
-  Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           All CPU interrupt/exception entries have been successfully initialized
-                                with default interrupt/exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  EFI_STATUS                         Status;
-  IA32_IDT_GATE_DESCRIPTOR           *IdtTable;
-  IA32_DESCRIPTOR                    IdtDescriptor;
-  UINTN                              IdtEntryCount;
-  EXCEPTION_HANDLER_TEMPLATE_MAP     TemplateMap;
-  UINTN                              Index;
-  UINTN                              InterruptEntry;
-  UINT8                              *InterruptEntryCode;
-  RESERVED_VECTORS_DATA              *ReservedVectors;
-  EFI_CPU_INTERRUPT_HANDLER          *ExternalInterruptHandler;
-
-  ReservedVectors = AllocatePool (sizeof (RESERVED_VECTORS_DATA) * CPU_INTERRUPT_NUM);
-  ASSERT (ReservedVectors != NULL);
-  SetMem ((VOID *) ReservedVectors, sizeof (RESERVED_VECTORS_DATA) * CPU_INTERRUPT_NUM, 0xff);
-  if (VectorInfo != NULL) {
-    Status = ReadAndVerifyVectorInfo (VectorInfo, ReservedVectors, CPU_INTERRUPT_NUM);
-    if (EFI_ERROR (Status)) {
-      FreePool (ReservedVectors);
-      return EFI_INVALID_PARAMETER;
-    }
-  }
-
-  ExternalInterruptHandler = AllocateZeroPool (sizeof (EFI_CPU_INTERRUPT_HANDLER) * CPU_INTERRUPT_NUM);
-  ASSERT (ExternalInterruptHandler != NULL);
-
-  //
-  // Read IDT descriptor and calculate IDT size
-  //
-  AsmReadIdtr (&IdtDescriptor);
-  IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
-  if (IdtEntryCount > CPU_INTERRUPT_NUM) {
-    IdtEntryCount = CPU_INTERRUPT_NUM;
-  }
-  //
-  // Create Interrupt Descriptor Table and Copy the old IDT table in
-  //
-  IdtTable = AllocateZeroPool (sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU_INTERRUPT_NUM);
-  ASSERT (IdtTable != NULL);
-  CopyMem (IdtTable, (VOID *)IdtDescriptor.Base, sizeof (IA32_IDT_GATE_DESCRIPTOR) * IdtEntryCount);
-
-  AsmGetTemplateAddressMap (&TemplateMap);
-  ASSERT (TemplateMap.ExceptionStubHeaderSize <= HOOKAFTER_STUB_SIZE);
-  InterruptEntryCode = AllocatePool (TemplateMap.ExceptionStubHeaderSize * CPU_INTERRUPT_NUM);
-  ASSERT (InterruptEntryCode != NULL);
-
-  InterruptEntry = (UINTN) InterruptEntryCode;
-  for (Index = 0; Index < CPU_INTERRUPT_NUM; Index ++) {
-    CopyMem (
-      (VOID *) InterruptEntry,
-      (VOID *) TemplateMap.ExceptionStart,
-      TemplateMap.ExceptionStubHeaderSize
-      );
-    AsmVectorNumFixup ((VOID *) InterruptEntry,  (UINT8) Index, (VOID *) TemplateMap.ExceptionStart);
-    InterruptEntry += TemplateMap.ExceptionStubHeaderSize;
-  }
-
-  TemplateMap.ExceptionStart = (UINTN) InterruptEntryCode;
-  mExceptionHandlerData.IdtEntryCount            = CPU_INTERRUPT_NUM;
-  mExceptionHandlerData.ReservedVectors          = ReservedVectors;
-  mExceptionHandlerData.ExternalInterruptHandler = ExternalInterruptHandler;
-  InitializeSpinLock (&mExceptionHandlerData.DisplayMessageSpinLock);
-
-  UpdateIdtTable (IdtTable, &TemplateMap, &mExceptionHandlerData);
-
-  //
-  // Load Interrupt Descriptor Table
-  //
-  IdtDescriptor.Base  = (UINTN) IdtTable;
-  IdtDescriptor.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU_INTERRUPT_NUM - 1);
-  AsmWriteIdtr ((IA32_DESCRIPTOR *) &IdtDescriptor);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Registers a function to be called from the processor interrupt handler.
-
-  This function registers and enables the handler specified by InterruptHandler for a processor
-  interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
-  handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
-  The installed handler is called once for each processor interrupt or exception.
-  NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
-  InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
-  @param[in]  InterruptType     Defines which interrupt or exception to hook.
-  @param[in]  InterruptHandler  A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-                                when a processor interrupt occurs. If this parameter is NULL, then the handler
-                                will be uninstalled.
-
-  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.
-  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was
-                                previously installed.
-  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
-                                previously installed.
-  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported,
-                                or this function is not supported.
-**/
-EFI_STATUS
-EFIAPI
-RegisterCpuInterruptHandler (
-  IN EFI_EXCEPTION_TYPE            InterruptType,
-  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler
-  )
-{
-  return RegisterCpuInterruptHandlerWorker (InterruptType, InterruptHandler, &mExceptionHandlerData);
-}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
deleted file mode 100644
index f2c39eb193..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ /dev/null
@@ -1,230 +0,0 @@
-/** @file
-  IA32 CPU Exception Handler functons.
-
-  Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-
-/**
-  Return address map of exception handler template so that C code can generate
-  exception tables.
-
-  @param IdtEntry          Pointer to IDT entry to be updated.
-  @param InterruptHandler  IDT handler value.
-
-**/
-VOID
-ArchUpdateIdtEntry (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry,
-  IN UINTN                           InterruptHandler
-  )
-{
-  IdtEntry->Bits.OffsetLow   = (UINT16)(UINTN)InterruptHandler;
-  IdtEntry->Bits.OffsetHigh  = (UINT16)((UINTN)InterruptHandler >> 16);
-  IdtEntry->Bits.GateType    = IA32_IDT_GATE_TYPE_INTERRUPT_32;
-}
-
-/**
-  Read IDT handler value from IDT entry.
-
-  @param IdtEntry          Pointer to IDT entry to be read.
-
-**/
-UINTN
-ArchGetIdtHandler (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry
-  )
-{
-  return (UINTN)IdtEntry->Bits.OffsetLow + (((UINTN)IdtEntry->Bits.OffsetHigh) << 16);
-}
-
-/**
-  Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
-  @param[in] ExceptionType        Exception type.
-  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.
-  @param[in] ExceptionHandlerData Pointer to exception handler data.
-**/
-VOID
-ArchSaveExceptionContext (
-  IN UINTN                        ExceptionType,
-  IN EFI_SYSTEM_CONTEXT           SystemContext,
-  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData
-  )
-{
-  IA32_EFLAGS32           Eflags;
-  RESERVED_VECTORS_DATA   *ReservedVectors;
-
-  ReservedVectors = ExceptionHandlerData->ReservedVectors;
-  //
-  // Save Exception context in global variable
-  //
-  ReservedVectors[ExceptionType].OldFlags      = SystemContext.SystemContextIa32->Eflags;
-  ReservedVectors[ExceptionType].OldCs         = SystemContext.SystemContextIa32->Cs;
-  ReservedVectors[ExceptionType].OldIp         = SystemContext.SystemContextIa32->Eip;
-  ReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextIa32->ExceptionData;
-  //
-  // Clear IF flag to avoid old IDT handler enable interrupt by IRET
-  //
-  Eflags.UintN = SystemContext.SystemContextIa32->Eflags;
-  Eflags.Bits.IF = 0;
-  SystemContext.SystemContextIa32->Eflags = Eflags.UintN;
-  //
-  // Modify the EIP in stack, then old IDT handler will return to the stub code
-  //
-  SystemContext.SystemContextIa32->Eip    = (UINTN) ReservedVectors[ExceptionType].HookAfterStubHeaderCode;
-}
-
-/**
-  Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
-  @param[in] ExceptionType        Exception type.
-  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.
-  @param[in] ExceptionHandlerData Pointer to exception handler data.
-**/
-VOID
-ArchRestoreExceptionContext (
-  IN UINTN                        ExceptionType,
-  IN EFI_SYSTEM_CONTEXT           SystemContext,
-  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData
-  )
-{
-  RESERVED_VECTORS_DATA   *ReservedVectors;
-
-  ReservedVectors = ExceptionHandlerData->ReservedVectors;
-  SystemContext.SystemContextIa32->Eflags        = ReservedVectors[ExceptionType].OldFlags;
-  SystemContext.SystemContextIa32->Cs            = ReservedVectors[ExceptionType].OldCs;
-  SystemContext.SystemContextIa32->Eip           = ReservedVectors[ExceptionType].OldIp;
-  SystemContext.SystemContextIa32->ExceptionData = ReservedVectors[ExceptionType].ExceptionData;
-}
-
-/**
-  Display processor context.
-
-  @param[in] ExceptionType  Exception type.
-  @param[in] SystemContext  Processor context to be display.
-**/
-VOID
-EFIAPI
-DumpCpuContext (
-  IN EFI_EXCEPTION_TYPE   ExceptionType,
-  IN EFI_SYSTEM_CONTEXT   SystemContext
-  )
-{
-  InternalPrintMessage (
-    "!!!! IA32 Exception Type - %02x(%a)  CPU Apic ID - %08x !!!!\n",
-    ExceptionType,
-    GetExceptionNameStr (ExceptionType),
-    GetApicId ()
-    );
-  if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {
-    InternalPrintMessage (
-      "ExceptionData - %08x",
-      SystemContext.SystemContextIa32->ExceptionData
-      );
-    if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
-      InternalPrintMessage (
-        "  I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID)   != 0,
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US)   != 0,
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR)   != 0,
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P)    != 0,
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK)   != 0,
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SGX)  != 0
-        );
-    }
-    InternalPrintMessage ("\n");
-  }
-  InternalPrintMessage (
-    "EIP  - %08x, CS  - %08x, EFLAGS - %08x\n",
-    SystemContext.SystemContextIa32->Eip,
-    SystemContext.SystemContextIa32->Cs,
-    SystemContext.SystemContextIa32->Eflags
-    );
-  InternalPrintMessage (
-    "EAX  - %08x, ECX - %08x, EDX - %08x, EBX - %08x\n",
-    SystemContext.SystemContextIa32->Eax,
-    SystemContext.SystemContextIa32->Ecx,
-    SystemContext.SystemContextIa32->Edx,
-    SystemContext.SystemContextIa32->Ebx
-    );
-  InternalPrintMessage (
-    "ESP  - %08x, EBP - %08x, ESI - %08x, EDI - %08x\n",
-    SystemContext.SystemContextIa32->Esp,
-    SystemContext.SystemContextIa32->Ebp,
-    SystemContext.SystemContextIa32->Esi,
-    SystemContext.SystemContextIa32->Edi
-    );
-  InternalPrintMessage (
-    "DS   - %08x, ES  - %08x, FS  - %08x, GS  - %08x, SS - %08x\n",
-    SystemContext.SystemContextIa32->Ds,
-    SystemContext.SystemContextIa32->Es,
-    SystemContext.SystemContextIa32->Fs,
-    SystemContext.SystemContextIa32->Gs,
-    SystemContext.SystemContextIa32->Ss
-    );
-  InternalPrintMessage (
-    "CR0  - %08x, CR2 - %08x, CR3 - %08x, CR4 - %08x\n",
-    SystemContext.SystemContextIa32->Cr0,
-    SystemContext.SystemContextIa32->Cr2,
-    SystemContext.SystemContextIa32->Cr3,
-    SystemContext.SystemContextIa32->Cr4
-    );
-  InternalPrintMessage (
-    "DR0  - %08x, DR1 - %08x, DR2 - %08x, DR3 - %08x\n",
-    SystemContext.SystemContextIa32->Dr0,
-    SystemContext.SystemContextIa32->Dr1,
-    SystemContext.SystemContextIa32->Dr2,
-    SystemContext.SystemContextIa32->Dr3
-    );
-  InternalPrintMessage (
-    "DR6  - %08x, DR7 - %08x\n",
-    SystemContext.SystemContextIa32->Dr6,
-    SystemContext.SystemContextIa32->Dr7
-    );
-  InternalPrintMessage (
-    "GDTR - %08x %08x, IDTR - %08x %08x\n",
-    SystemContext.SystemContextIa32->Gdtr[0],
-    SystemContext.SystemContextIa32->Gdtr[1],
-    SystemContext.SystemContextIa32->Idtr[0],
-    SystemContext.SystemContextIa32->Idtr[1]
-    );
-  InternalPrintMessage (
-    "LDTR - %08x, TR - %08x\n",
-    SystemContext.SystemContextIa32->Ldtr,
-    SystemContext.SystemContextIa32->Tr
-    );
-  InternalPrintMessage (
-    "FXSAVE_STATE - %08x\n",
-    &SystemContext.SystemContextIa32->FxSaveState
-    );
-}
-
-/**
-  Display CPU information.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-DumpImageAndCpuContent (
-  IN EFI_EXCEPTION_TYPE   ExceptionType,
-  IN EFI_SYSTEM_CONTEXT   SystemContext
-  )
-{
-  DumpCpuContext (ExceptionType, SystemContext);
-  //
-  // Dump module image base and module entry point by EIP
-  //
-  DumpModuleImageInfo (SystemContext.SystemContextIa32->Eip);
-}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h
deleted file mode 100644
index a8d3556a80..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/** @file
-  Ia32 arch definition for CPU Exception Handler Library.
-
-  Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
-#define _ARCH_CPU_INTERRUPT_DEFS_H_
-
-typedef struct {
-  EFI_SYSTEM_CONTEXT_IA32 SystemContext;
-  BOOLEAN                 ExceptionDataFlag;
-  UINTN                   OldIdtHandler;
-} EXCEPTION_HANDLER_CONTEXT;
-
-//
-// Register Structure Definitions
-//
-typedef struct {
-  EFI_STATUS_CODE_DATA      Header;
-  EFI_SYSTEM_CONTEXT_IA32   SystemContext;
-} CPU_STATUS_CODE_TEMPLATE;
-
-typedef struct {
-  SPIN_LOCK   SpinLock;
-  UINT32      ApicId;
-  UINT32      Attribute;
-  UINTN       ExceptonHandler;
-  UINTN       OldFlags;
-  UINTN       OldCs;
-  UINTN       OldIp;
-  UINTN       ExceptionData;
-  UINT8       HookAfterStubHeaderCode[HOOKAFTER_STUB_SIZE];
-} RESERVED_VECTORS_DATA;
-
-#endif
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S
deleted file mode 100644
index c134257d9d..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S
+++ /dev/null
@@ -1,667 +0,0 @@
-#------------------------------------------------------------------------------
-#*
-#*   Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
-#*   This program and the accompanying materials
-#*   are licensed and made available under the terms and conditions of the BSD License
-#*   which accompanies this distribution.  The full text of the license may be found at
-#*   http://opensource.org/licenses/bsd-license.php
-#*
-#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#*    ExceptionHandlerAsm.S
-#*
-#*   Abstract:
-#*
-#*     IA32 CPU Exception Handler
-#
-#------------------------------------------------------------------------------
-
-
-#.MMX
-#.XMM
-
-ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
-
-#EXTRN ASM_PFX(mErrorCodeFlag):DWORD           # Error code flags for exceptions
-#EXTRN ASM_PFX(mDoFarReturnFlag):DWORD         # Do far return flag
-
-.text
-
-#
-# exception handler stub table
-#
-Exception0Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   0
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception1Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   1
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception2Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   2
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception3Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   3
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception4Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   4
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception5Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   5
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception6Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   6
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception7Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   7
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception8Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   8
-    pushl   %eax
-     .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception9Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   9
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception10Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   10
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception11Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   11
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception12Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   12
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception13Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   13
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception14Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   14
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception15Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   15
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception16Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   16
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception17Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   17
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception18Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   18
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception19Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   19
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception20Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   20
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception21Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   21
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception22Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   22
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception23Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   23
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception24Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   24
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception25Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   25
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception26Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   26
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception27Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   27
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception28Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   28
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception29Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   29
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception30Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   30
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-Exception31Handle:
-    .byte   0x6a    #  push #VectorNum
-    .byte   31
-    pushl   %eax
-    .byte   0xB8
-    .long   ASM_PFX(CommonInterruptEntry)
-    jmp     *%eax
-
-HookAfterStubBegin:
-    .byte   0x6a       # push
-VectorNum:
-    .byte   0          # 0 will be fixed
-    pushl   %eax
-    .byte   0xB8       # movl    ASM_PFX(HookAfterStubHeaderEnd), %eax
-    .long   ASM_PFX(HookAfterStubHeaderEnd)
-    jmp     *%eax
-ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
-ASM_PFX(HookAfterStubHeaderEnd):
-    popl    %eax
-    subl    $8, %esp        # reserve room for filling exception data later
-    pushl   8(%esp)
-    xchgl   (%esp), %ecx    # get vector number
-    bt      %ecx, ASM_PFX(mErrorCodeFlag)
-    jnc     NoErrorData
-    pushl    (%esp)         # addition push if exception data needed
-NoErrorData:
-    xchg    (%esp), %ecx    # restore ecx
-    pushl   %eax
-
-#---------------------------------------;
-# CommonInterruptEntry                  ;
-#---------------------------------------;
-# The follow algorithm is used for the common interrupt routine.
-
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
-    cli
-    popl    %eax
-    #
-    # All interrupt handlers are invoked through interrupt gates, so
-    # IF flag automatically cleared at the entry point
-    #
-
-    #
-    # Get vector number from top of stack
-    #
-    xchgl   (%esp), %ecx
-    andl    $0x0FF, %ecx      # Vector number should be less than 256
-    cmpl    $32, %ecx         # Intel reserved vector for exceptions?
-    jae     NoErrorCode
-    bt      %ecx, ASM_PFX(mErrorCodeFlag)
-    jc      HasErrorCode
-
-NoErrorCode:
-
-    #
-    # Stack:
-    # +---------------------+
-    # +    EFlags           +
-    # +---------------------+
-    # +    CS               +
-    # +---------------------+
-    # +    EIP              +
-    # +---------------------+
-    # +    ECX              +
-    # +---------------------+ <-- ESP
-    #
-    # Registers:
-    #   ECX - Vector Number
-    #
-
-    #
-    # Put Vector Number on stack
-    #
-    pushl   %ecx
-
-    #
-    # Put 0 (dummy) error code on stack, and restore ECX
-    #
-    xorl    %ecx, %ecx  # ECX = 0
-    xchgl   4(%esp), %ecx
-
-    jmp     ErrorCodeAndVectorOnStack
-
-HasErrorCode:
-
-    #
-    # Stack:
-    # +---------------------+
-    # +    EFlags           +
-    # +---------------------+
-    # +    CS               +
-    # +---------------------+
-    # +    EIP              +
-    # +---------------------+
-    # +    Error Code       +
-    # +---------------------+
-    # +    ECX              +
-    # +---------------------+ <-- ESP
-    #
-    # Registers:
-    #   ECX - Vector Number
-    #
-
-    #
-    # Put Vector Number on stack and restore ECX
-    #
-    xchgl   (%esp), %ecx
-
-ErrorCodeAndVectorOnStack:
-    pushl   %ebp
-    movl    %esp, %ebp
-
-    #
-    # Stack:
-    # +---------------------+
-    # +    EFlags           +
-    # +---------------------+
-    # +    CS               +
-    # +---------------------+
-    # +    EIP              +
-    # +---------------------+
-    # +    Error Code       +
-    # +---------------------+
-    # +    Vector Number    +
-    # +---------------------+
-    # +    EBP              +
-    # +---------------------+ <-- EBP
-    #
-
-    #
-    # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
-    # is 16-byte aligned
-    #
-    andl    $0x0fffffff0, %esp
-    subl    $12, %esp
-
-    subl    $8, %esp
-    pushl   $0         # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    pushl   $0         # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-#; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
-    pushl   %eax
-    pushl   %ecx
-    pushl   %edx
-    pushl   %ebx
-    leal    24(%ebp), %ecx
-    pushl   %ecx                          # ESP
-    pushl   (%ebp)              # EBP
-    pushl   %esi
-    pushl   %edi
-
-#; UINT32  Gs, Fs, Es, Ds, Cs, Ss;
-    movl    %ss, %eax
-    pushl   %eax
-    movzwl  16(%ebp), %eax
-    pushl   %eax
-    movl    %ds, %eax
-    pushl   %eax
-    movl    %es, %eax
-    pushl   %eax
-    movl    %fs, %eax
-    pushl   %eax
-    movl    %gs, %eax
-    pushl   %eax
-
-#; UINT32  Eip;
-    movl    12(%ebp), %eax
-    pushl   %eax
-
-#; UINT32  Gdtr[2], Idtr[2];
-    subl    $8, %esp
-    sidt    (%esp)
-    movl    2(%esp), %eax
-    xchgl   (%esp), %eax
-    andl    $0x0FFFF, %eax
-    movl    %eax, 4(%esp)
-
-    subl    $8, %esp
-    sgdt    (%esp)
-    movl    2(%esp), %eax
-    xchgl   (%esp), %eax
-    andl    $0x0FFFF, %eax
-    movl    %eax, 4(%esp)
-
-#; UINT32  Ldtr, Tr;
-    xorl    %eax, %eax
-    str     %ax
-    pushl   %eax
-    sldt    %ax
-    pushl   %eax
-
-#; UINT32  EFlags;
-    movl    20(%ebp), %eax
-    pushl   %eax
-
-#; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;
-## insure FXSAVE/FXRSTOR is enabled in CR4...
-## ... while we're at it, make sure DE is also enabled...
-    mov     $1, %eax
-    pushl   %ebx                         # temporarily save value of ebx on stack
-    cpuid                                # use CPUID to determine if FXSAVE/FXRESTOR
-                                         # and DE are supported
-    popl    %ebx                         # retore value of ebx that was overwritten
-                                         # by CPUID
-    movl    %cr4, %eax
-    pushl   %eax                         # push cr4 firstly
-    testl   $BIT24, %edx                 # Test for FXSAVE/FXRESTOR support
-    jz      L1
-    orl     $BIT9, %eax                  # Set CR4.OSFXSR
-L1:
-    testl   $BIT2, %edx                  # Test for Debugging Extensions support
-    jz      L2
-    orl     $BIT3, %eax                  # Set CR4.DE
-L2:
-    movl    %eax, %cr4
-    movl    %cr3, %eax
-    pushl   %eax
-    movl    %cr2, %eax
-    pushl   %eax
-    xorl    %eax, %eax
-    pushl   %eax
-    movl    %cr0, %eax
-    pushl   %eax
-
-#; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-    movl    %dr7, %eax
-    pushl   %eax
-    movl    %dr6, %eax
-    pushl   %eax
-    movl    %dr3, %eax
-    pushl   %eax
-    movl    %dr2, %eax
-    pushl   %eax
-    movl    %dr1, %eax
-    pushl   %eax
-    movl    %dr0, %eax
-    pushl   %eax
-
-#; FX_SAVE_STATE_IA32 FxSaveState;
-    subl    $512, %esp
-    movl    %esp, %edi
-    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support.
-                             # edx still contains result from CPUID above
-    jz      L3
-    .byte      0x0f, 0x0ae, 0x07 #fxsave [edi]
-L3:
-
-#; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
-    cld
-
-#; UINT32  ExceptionData;
-    pushl   8(%ebp)
-
-#; Prepare parameter and call
-    movl    %esp, %edx
-    pushl   %edx
-    movl    4(%ebp), %edx
-    pushl   %edx
-
-    #
-    # Call External Exception Handler
-    #
-    call    ASM_PFX(CommonExceptionHandler)
-    addl    $8, %esp
-
-    cli
-#; UINT32  ExceptionData;
-    addl    $4, %esp
-
-#; FX_SAVE_STATE_IA32 FxSaveState;
-    movl    %esp, %esi
-    movl    $1, %eax
-    cpuid                    # use CPUID to determine if FXSAVE/FXRESTOR
-                             # are supported
-    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support
-    jz      L4
-    .byte      0x0f, 0x0ae, 0x0e # fxrstor [esi]
-L4:
-    addl    $512, %esp
-
-#; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-#; Skip restoration of DRx registers to support in-circuit emualators
-#; or debuggers set breakpoint in interrupt/exception context
-    addl    $24, %esp
-
-#; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;
-    popl    %eax
-    movl    %eax, %cr0
-    addl    $4, %esp    # not for Cr1
-    popl    %eax
-    movl    %eax, %cr2
-    popl    %eax
-    movl    %eax, %cr3
-    popl    %eax
-    movl    %eax, %cr4
-
-#; UINT32  EFlags;
-    popl    20(%ebp)
-
-#; UINT32  Ldtr, Tr;
-#; UINT32  Gdtr[2], Idtr[2];
-#; Best not let anyone mess with these particular registers...
-    addl    $24, %esp
-
-#; UINT32  Eip;
-    popl    12(%ebp)
-
-#; UINT32  Gs, Fs, Es, Ds, Cs, Ss;
-#; NOTE - modified segment registers could hang the debugger...  We
-#;        could attempt to insulate ourselves against this possibility,
-#;        but that poses risks as well.
-#;
-    popl    %gs
-    popl    %fs
-    popl    %es
-    popl    %ds
-    popl    16(%ebp)
-    popl    %ss
-
-#; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
-    popl    %edi
-    popl    %esi
-    addl    $4, %esp   # not for ebp
-    addl    $4, %esp   # not for esp
-    popl    %ebx
-    popl    %edx
-    popl    %ecx
-    popl    %eax
-
-    popl    -8(%ebp)
-    popl    -4(%ebp)
-    movl    %ebp, %esp
-    popl    %ebp
-    addl    $8, %esp
-    cmpl    $0, -16(%esp)  # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    jz      DoReturn
-    cmpl    $1, -20(%esp)  # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-    jz      ErrorCode
-    jmp     *-16(%esp)
-ErrorCode:
-    subl    $4, %esp
-    jmp     *-12(%esp)
-
-DoReturn:
-    cmpl    $0, ASM_PFX(mDoFarReturnFlag)
-    jz      DoIret
-    pushl   8(%esp)       # save EFLAGS
-    addl    $16, %esp
-    pushl   -8(%esp)      # save CS in new location
-    pushl   -8(%esp)      # save EIP in new location
-    pushl   -8(%esp)      # save EFLAGS in new location
-    popfl                 # restore EFLAGS
-    lret                  # far return
-
-DoIret:
-    iretl
-
-
-#---------------------------------------;
-# _AsmGetTemplateAddressMap             ;
-#---------------------------------------;
-#
-# Protocol prototype
-#   AsmGetTemplateAddressMap (
-#     EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
-#   );
-#
-# Routine Description:
-#
-#  Return address map of interrupt handler template so that C code can generate
-#  interrupt table.
-#
-# Arguments:
-#
-#
-# Returns:
-#
-#   Nothing
-#
-#
-# Input:  [ebp][0]  = Original ebp
-#         [ebp][4]  = Return address
-#
-# Output: Nothing
-#
-# Destroys: Nothing
-#-----------------------------------------------------------------------------;
-#-------------------------------------------------------------------------------------
-#  AsmGetAddressMap (&AddressMap);
-#-------------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)
-ASM_PFX(AsmGetTemplateAddressMap):
-
-        pushl       %ebp
-        movl        %esp,%ebp
-        pushal
-
-        movl        0x8(%ebp), %ebx
-        movl        $Exception0Handle, (%ebx)
-        movl        $(Exception1Handle - Exception0Handle), 0x4(%ebx)
-        movl        $(HookAfterStubBegin), 0x8(%ebx)
-
-        popal
-        popl        %ebp
-        ret
-#-------------------------------------------------------------------------------------
-#  AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-#-------------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)
-ASM_PFX(AsmVectorNumFixup):
-        movl  8(%esp), %eax
-        movl  4(%esp), %ecx
-        movb  %al, (VectorNum - HookAfterStubBegin)(%ecx)
-        ret
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
deleted file mode 100644
index 126680ea47..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm
+++ /dev/null
@@ -1,467 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   ExceptionHandlerAsm.Asm
-;
-; Abstract:
-;
-;   IA32 CPU Exception Handler
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
-    .686
-    .model  flat,C
-
-;
-; CommonExceptionHandler()
-;
-CommonExceptionHandler             PROTO   C
-
-.data
-
-EXTRN mErrorCodeFlag:DWORD            ; Error code flags for exceptions
-EXTRN mDoFarReturnFlag:DWORD          ; Do far return flag
-
-.code
-
-ALIGN   8
-
-;
-; exception handler stub table
-;
-AsmIdtVectorBegin:
-REPEAT  32
-    db      6ah        ; push  #VectorNum
-    db      ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
-    push    eax
-    mov     eax, CommonInterruptEntry
-    jmp     eax
-ENDM
-AsmIdtVectorEnd:
-
-HookAfterStubBegin:
-    db      6ah        ; push
-VectorNum:
-    db      0          ; 0 will be fixed
-    push    eax
-    mov     eax, HookAfterStubHeaderEnd
-    jmp     eax
-HookAfterStubHeaderEnd:
-    pop     eax
-    sub     esp, 8     ; reserve room for filling exception data later
-    push    [esp + 8]
-    xchg    ecx, [esp] ; get vector number
-    bt      mErrorCodeFlag, ecx
-    jnc     @F
-    push    [esp]      ; addition push if exception data needed
-@@:
-    xchg    ecx, [esp] ; restore ecx
-    push    eax
-
-;----------------------------------------------------------------------------;
-; CommonInterruptEntry                                                               ;
-;----------------------------------------------------------------------------;
-; The follow algorithm is used for the common interrupt routine.
-; Entry from each interrupt with a push eax and eax=interrupt number
-; Stack:
-; +---------------------+
-; +    EFlags           +
-; +---------------------+
-; +    CS               +
-; +---------------------+
-; +    EIP              +
-; +---------------------+
-; +    Error Code       +
-; +---------------------+
-; +    Vector Number    +
-; +---------------------+
-; +    EBP              +
-; +---------------------+ <-- EBP
-CommonInterruptEntry PROC PUBLIC
-    cli
-    pop    eax
-    ;
-    ; All interrupt handlers are invoked through interrupt gates, so
-    ; IF flag automatically cleared at the entry point
-    ;
-
-    ;
-    ; Get vector number from top of stack
-    ;
-    xchg    ecx, [esp]
-    and     ecx, 0FFh       ; Vector number should be less than 256
-    cmp     ecx, 32         ; Intel reserved vector for exceptions?
-    jae     NoErrorCode
-    bt      mErrorCodeFlag, ecx
-    jc      HasErrorCode
-
-NoErrorCode:
-
-    ;
-    ; Stack:
-    ; +---------------------+
-    ; +    EFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    EIP              +
-    ; +---------------------+
-    ; +    ECX              +
-    ; +---------------------+ <-- ESP
-    ;
-    ; Registers:
-    ;   ECX - Vector Number
-    ;
-
-    ;
-    ; Put Vector Number on stack
-    ;
-    push    ecx
-
-    ;
-    ; Put 0 (dummy) error code on stack, and restore ECX
-    ;
-    xor     ecx, ecx  ; ECX = 0
-    xchg    ecx, [esp+4]
-
-    jmp     ErrorCodeAndVectorOnStack
-
-HasErrorCode:
-
-    ;
-    ; Stack:
-    ; +---------------------+
-    ; +    EFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    EIP              +
-    ; +---------------------+
-    ; +    Error Code       +
-    ; +---------------------+
-    ; +    ECX              +
-    ; +---------------------+ <-- ESP
-    ;
-    ; Registers:
-    ;   ECX - Vector Number
-    ;
-
-    ;
-    ; Put Vector Number on stack and restore ECX
-    ;
-    xchg    ecx, [esp]
-
-ErrorCodeAndVectorOnStack:
-    push    ebp
-    mov     ebp, esp
-
-    ;
-    ; Stack:
-    ; +---------------------+
-    ; +    EFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    EIP              +
-    ; +---------------------+
-    ; +    Error Code       +
-    ; +---------------------+
-    ; +    Vector Number    +
-    ; +---------------------+
-    ; +    EBP              +
-    ; +---------------------+ <-- EBP
-    ;
-
-    ;
-    ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
-    ; is 16-byte aligned
-    ;
-    and     esp, 0fffffff0h
-    sub     esp, 12
-
-    sub     esp, 8
-    push    0            ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    push    0            ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-;; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
-    push    eax
-    push    ecx
-    push    edx
-    push    ebx
-    lea     ecx, [ebp + 6 * 4]
-    push    ecx                          ; ESP
-    push    dword ptr [ebp]              ; EBP
-    push    esi
-    push    edi
-
-;; UINT32  Gs, Fs, Es, Ds, Cs, Ss;
-    mov     eax, ss
-    push    eax
-    movzx   eax, word ptr [ebp + 4 * 4]
-    push    eax
-    mov     eax, ds
-    push    eax
-    mov     eax, es
-    push    eax
-    mov     eax, fs
-    push    eax
-    mov     eax, gs
-    push    eax
-
-;; UINT32  Eip;
-    mov     eax, [ebp + 3 * 4]
-    push    eax
-
-;; UINT32  Gdtr[2], Idtr[2];
-    sub     esp, 8
-    sidt    [esp]
-    mov     eax, [esp + 2]
-    xchg    eax, [esp]
-    and     eax, 0FFFFh
-    mov     [esp+4], eax
-
-    sub     esp, 8
-    sgdt    [esp]
-    mov     eax, [esp + 2]
-    xchg    eax, [esp]
-    and     eax, 0FFFFh
-    mov     [esp+4], eax
-
-;; UINT32  Ldtr, Tr;
-    xor     eax, eax
-    str     ax
-    push    eax
-    sldt    ax
-    push    eax
-
-;; UINT32  EFlags;
-    mov     eax, [ebp + 5 * 4]
-    push    eax
-
-;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;
-    mov     eax, 1
-    push    ebx         ; temporarily save value of ebx on stack
-    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR and DE
-                        ; are supported
-    pop     ebx         ; retore value of ebx that was overwritten by CPUID
-    mov     eax, cr4
-    push    eax         ; push cr4 firstly
-    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support
-    jz      @F
-    or      eax, BIT9   ; Set CR4.OSFXSR
-@@:
-    test    edx, BIT2   ; Test for Debugging Extensions support
-    jz      @F
-    or      eax, BIT3   ; Set CR4.DE
-@@:
-    mov     cr4, eax
-    mov     eax, cr3
-    push    eax
-    mov     eax, cr2
-    push    eax
-    xor     eax, eax
-    push    eax
-    mov     eax, cr0
-    push    eax
-
-;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-    mov     eax, dr7
-    push    eax
-    mov     eax, dr6
-    push    eax
-    mov     eax, dr3
-    push    eax
-    mov     eax, dr2
-    push    eax
-    mov     eax, dr1
-    push    eax
-    mov     eax, dr0
-    push    eax
-
-;; FX_SAVE_STATE_IA32 FxSaveState;
-    sub     esp, 512
-    mov     edi, esp
-    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support.
-                        ; edx still contains result from CPUID above
-    jz      @F
-    db      0fh, 0aeh, 07h ;fxsave [edi]
-@@:
-
-;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
-    cld
-
-;; UINT32  ExceptionData;
-    push    dword ptr [ebp + 2 * 4]
-
-;; Prepare parameter and call
-    mov     edx, esp
-    push    edx
-    mov     edx, dword ptr [ebp + 1 * 4]
-    push    edx
-
-    ;
-    ; Call External Exception Handler
-    ;
-    mov     eax, CommonExceptionHandler
-    call    eax
-    add     esp, 8
-
-    cli
-;; UINT32  ExceptionData;
-    add     esp, 4
-
-;; FX_SAVE_STATE_IA32 FxSaveState;
-    mov     esi, esp
-    mov     eax, 1
-    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR
-                        ; are supported
-    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support
-    jz      @F
-    db      0fh, 0aeh, 0eh ; fxrstor [esi]
-@@:
-    add     esp, 512
-
-;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-;; Skip restoration of DRx registers to support in-circuit emualators
-;; or debuggers set breakpoint in interrupt/exception context
-    add     esp, 4 * 6
-
-;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;
-    pop     eax
-    mov     cr0, eax
-    add     esp, 4    ; not for Cr1
-    pop     eax
-    mov     cr2, eax
-    pop     eax
-    mov     cr3, eax
-    pop     eax
-    mov     cr4, eax
-
-;; UINT32  EFlags;
-    pop     dword ptr [ebp + 5 * 4]
-
-;; UINT32  Ldtr, Tr;
-;; UINT32  Gdtr[2], Idtr[2];
-;; Best not let anyone mess with these particular registers...
-    add     esp, 24
-
-;; UINT32  Eip;
-    pop     dword ptr [ebp + 3 * 4]
-
-;; UINT32  Gs, Fs, Es, Ds, Cs, Ss;
-;; NOTE - modified segment registers could hang the debugger...  We
-;;        could attempt to insulate ourselves against this possibility,
-;;        but that poses risks as well.
-;;
-    pop     gs
-    pop     fs
-    pop     es
-    pop     ds
-    pop     dword ptr [ebp + 4 * 4]
-    pop     ss
-
-;; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
-    pop     edi
-    pop     esi
-    add     esp, 4   ; not for ebp
-    add     esp, 4   ; not for esp
-    pop     ebx
-    pop     edx
-    pop     ecx
-    pop     eax
-
-    pop     dword ptr [ebp - 8]
-    pop     dword ptr [ebp - 4]
-    mov     esp, ebp
-    pop     ebp
-    add     esp, 8
-    cmp     dword ptr [esp - 16], 0   ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    jz      DoReturn
-    cmp     dword ptr [esp - 20], 1   ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-    jz      ErrorCode
-    jmp     dword ptr [esp - 16]
-ErrorCode:
-    sub     esp, 4
-    jmp     dword ptr [esp - 12]
-
-DoReturn:
-    cmp     mDoFarReturnFlag, 0   ; Check if need to do far return instead of IRET
-    jz      DoIret
-    push    [esp + 8]    ; save EFLAGS
-    add     esp, 16
-    push    [esp - 8]    ; save CS in new location
-    push    [esp - 8]    ; save EIP in new location
-    push    [esp - 8]    ; save EFLAGS in new location
-    popfd                ; restore EFLAGS
-    retf                 ; far return
-
-DoIret:
-    iretd
-
-CommonInterruptEntry ENDP
-
-;---------------------------------------;
-; _AsmGetTemplateAddressMap                  ;
-;----------------------------------------------------------------------------;
-;
-; Protocol prototype
-;   AsmGetTemplateAddressMap (
-;     EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
-;   );
-;
-; Routine Description:
-;
-;  Return address map of interrupt handler template so that C code can generate
-;  interrupt table.
-;
-; Arguments:
-;
-;
-; Returns:
-;
-;   Nothing
-;
-;
-; Input:  [ebp][0]  = Original ebp
-;         [ebp][4]  = Return address
-;
-; Output: Nothing
-;
-; Destroys: Nothing
-;-----------------------------------------------------------------------------;
-AsmGetTemplateAddressMap  proc near public
-    push    ebp                 ; C prolog
-    mov     ebp, esp
-    pushad
-
-    mov ebx, dword ptr [ebp + 08h]
-    mov dword ptr [ebx],      AsmIdtVectorBegin
-    mov dword ptr [ebx + 4h], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
-    mov dword ptr [ebx + 8h], HookAfterStubBegin
-
-    popad
-    pop     ebp
-    ret
-AsmGetTemplateAddressMap  ENDP
-
-;-------------------------------------------------------------------------------------
-;  AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-;-------------------------------------------------------------------------------------
-AsmVectorNumFixup   proc near public
-    mov     eax, dword ptr [esp + 8]
-    mov     ecx, [esp + 4]
-    mov     [ecx + (VectorNum - HookAfterStubBegin)], al
-    ret
-AsmVectorNumFixup   ENDP
-END
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.nasm
deleted file mode 100644
index 45d6474091..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.nasm
+++ /dev/null
@@ -1,462 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   ExceptionHandlerAsm.Asm
-;
-; Abstract:
-;
-;   IA32 CPU Exception Handler
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
-;
-; CommonExceptionHandler()
-;
-extern ASM_PFX(CommonExceptionHandler)
-
-SECTION .data
-
-extern ASM_PFX(mErrorCodeFlag)            ; Error code flags for exceptions
-extern ASM_PFX(mDoFarReturnFlag)          ; Do far return flag
-
-SECTION .text
-
-ALIGN   8
-
-;
-; exception handler stub table
-;
-AsmIdtVectorBegin:
-%rep  32
-    db      0x6a        ; push  #VectorNum
-    db      ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
-    push    eax
-    mov     eax, ASM_PFX(CommonInterruptEntry)
-    jmp     eax
-%endrep
-AsmIdtVectorEnd:
-
-HookAfterStubBegin:
-    db      0x6a        ; push
-VectorNum:
-    db      0          ; 0 will be fixed
-    push    eax
-    mov     eax, HookAfterStubHeaderEnd
-    jmp     eax
-HookAfterStubHeaderEnd:
-    pop     eax
-    sub     esp, 8     ; reserve room for filling exception data later
-    push    dword [esp + 8]
-    xchg    ecx, [esp] ; get vector number
-    bt      [ASM_PFX(mErrorCodeFlag)], ecx
-    jnc     .0
-    push    dword [esp]      ; addition push if exception data needed
-.0:
-    xchg    ecx, [esp] ; restore ecx
-    push    eax
-
-;----------------------------------------------------------------------------;
-; CommonInterruptEntry                                                               ;
-;----------------------------------------------------------------------------;
-; The follow algorithm is used for the common interrupt routine.
-; Entry from each interrupt with a push eax and eax=interrupt number
-; Stack:
-; +---------------------+
-; +    EFlags           +
-; +---------------------+
-; +    CS               +
-; +---------------------+
-; +    EIP              +
-; +---------------------+
-; +    Error Code       +
-; +---------------------+
-; +    Vector Number    +
-; +---------------------+
-; +    EBP              +
-; +---------------------+ <-- EBP
-global ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
-    cli
-    pop    eax
-    ;
-    ; All interrupt handlers are invoked through interrupt gates, so
-    ; IF flag automatically cleared at the entry point
-    ;
-
-    ;
-    ; Get vector number from top of stack
-    ;
-    xchg    ecx, [esp]
-    and     ecx, 0xFF       ; Vector number should be less than 256
-    cmp     ecx, 32         ; Intel reserved vector for exceptions?
-    jae     NoErrorCode
-    bt      [ASM_PFX(mErrorCodeFlag)], ecx
-    jc      HasErrorCode
-
-NoErrorCode:
-
-    ;
-    ; Stack:
-    ; +---------------------+
-    ; +    EFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    EIP              +
-    ; +---------------------+
-    ; +    ECX              +
-    ; +---------------------+ <-- ESP
-    ;
-    ; Registers:
-    ;   ECX - Vector Number
-    ;
-
-    ;
-    ; Put Vector Number on stack
-    ;
-    push    ecx
-
-    ;
-    ; Put 0 (dummy) error code on stack, and restore ECX
-    ;
-    xor     ecx, ecx  ; ECX = 0
-    xchg    ecx, [esp+4]
-
-    jmp     ErrorCodeAndVectorOnStack
-
-HasErrorCode:
-
-    ;
-    ; Stack:
-    ; +---------------------+
-    ; +    EFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    EIP              +
-    ; +---------------------+
-    ; +    Error Code       +
-    ; +---------------------+
-    ; +    ECX              +
-    ; +---------------------+ <-- ESP
-    ;
-    ; Registers:
-    ;   ECX - Vector Number
-    ;
-
-    ;
-    ; Put Vector Number on stack and restore ECX
-    ;
-    xchg    ecx, [esp]
-
-ErrorCodeAndVectorOnStack:
-    push    ebp
-    mov     ebp, esp
-
-    ;
-    ; Stack:
-    ; +---------------------+
-    ; +    EFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    EIP              +
-    ; +---------------------+
-    ; +    Error Code       +
-    ; +---------------------+
-    ; +    Vector Number    +
-    ; +---------------------+
-    ; +    EBP              +
-    ; +---------------------+ <-- EBP
-    ;
-
-    ;
-    ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
-    ; is 16-byte aligned
-    ;
-    and     esp, 0xfffffff0
-    sub     esp, 12
-
-    sub     esp, 8
-    push    0            ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    push    0            ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-;; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
-    push    eax
-    push    ecx
-    push    edx
-    push    ebx
-    lea     ecx, [ebp + 6 * 4]
-    push    ecx                          ; ESP
-    push    dword [ebp]              ; EBP
-    push    esi
-    push    edi
-
-;; UINT32  Gs, Fs, Es, Ds, Cs, Ss;
-    mov     eax, ss
-    push    eax
-    movzx   eax, word [ebp + 4 * 4]
-    push    eax
-    mov     eax, ds
-    push    eax
-    mov     eax, es
-    push    eax
-    mov     eax, fs
-    push    eax
-    mov     eax, gs
-    push    eax
-
-;; UINT32  Eip;
-    mov     eax, [ebp + 3 * 4]
-    push    eax
-
-;; UINT32  Gdtr[2], Idtr[2];
-    sub     esp, 8
-    sidt    [esp]
-    mov     eax, [esp + 2]
-    xchg    eax, [esp]
-    and     eax, 0xFFFF
-    mov     [esp+4], eax
-
-    sub     esp, 8
-    sgdt    [esp]
-    mov     eax, [esp + 2]
-    xchg    eax, [esp]
-    and     eax, 0xFFFF
-    mov     [esp+4], eax
-
-;; UINT32  Ldtr, Tr;
-    xor     eax, eax
-    str     ax
-    push    eax
-    sldt    ax
-    push    eax
-
-;; UINT32  EFlags;
-    mov     eax, [ebp + 5 * 4]
-    push    eax
-
-;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;
-    mov     eax, 1
-    push    ebx         ; temporarily save value of ebx on stack
-    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR and DE
-                        ; are supported
-    pop     ebx         ; retore value of ebx that was overwritten by CPUID
-    mov     eax, cr4
-    push    eax         ; push cr4 firstly
-    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support
-    jz      .1
-    or      eax, BIT9   ; Set CR4.OSFXSR
-.1:
-    test    edx, BIT2   ; Test for Debugging Extensions support
-    jz      .2
-    or      eax, BIT3   ; Set CR4.DE
-.2:
-    mov     cr4, eax
-    mov     eax, cr3
-    push    eax
-    mov     eax, cr2
-    push    eax
-    xor     eax, eax
-    push    eax
-    mov     eax, cr0
-    push    eax
-
-;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-    mov     eax, dr7
-    push    eax
-    mov     eax, dr6
-    push    eax
-    mov     eax, dr3
-    push    eax
-    mov     eax, dr2
-    push    eax
-    mov     eax, dr1
-    push    eax
-    mov     eax, dr0
-    push    eax
-
-;; FX_SAVE_STATE_IA32 FxSaveState;
-    sub     esp, 512
-    mov     edi, esp
-    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support.
-                        ; edx still contains result from CPUID above
-    jz      .3
-    db      0xf, 0xae, 0x7 ;fxsave [edi]
-.3:
-
-;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
-    cld
-
-;; UINT32  ExceptionData;
-    push    dword [ebp + 2 * 4]
-
-;; Prepare parameter and call
-    mov     edx, esp
-    push    edx
-    mov     edx, dword [ebp + 1 * 4]
-    push    edx
-
-    ;
-    ; Call External Exception Handler
-    ;
-    mov     eax, ASM_PFX(CommonExceptionHandler)
-    call    eax
-    add     esp, 8
-
-    cli
-;; UINT32  ExceptionData;
-    add     esp, 4
-
-;; FX_SAVE_STATE_IA32 FxSaveState;
-    mov     esi, esp
-    mov     eax, 1
-    cpuid               ; use CPUID to determine if FXSAVE/FXRESTOR
-                        ; are supported
-    test    edx, BIT24  ; Test for FXSAVE/FXRESTOR support
-    jz      .4
-    db      0xf, 0xae, 0xe ; fxrstor [esi]
-.4:
-    add     esp, 512
-
-;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-;; Skip restoration of DRx registers to support in-circuit emualators
-;; or debuggers set breakpoint in interrupt/exception context
-    add     esp, 4 * 6
-
-;; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;
-    pop     eax
-    mov     cr0, eax
-    add     esp, 4    ; not for Cr1
-    pop     eax
-    mov     cr2, eax
-    pop     eax
-    mov     cr3, eax
-    pop     eax
-    mov     cr4, eax
-
-;; UINT32  EFlags;
-    pop     dword [ebp + 5 * 4]
-
-;; UINT32  Ldtr, Tr;
-;; UINT32  Gdtr[2], Idtr[2];
-;; Best not let anyone mess with these particular registers...
-    add     esp, 24
-
-;; UINT32  Eip;
-    pop     dword [ebp + 3 * 4]
-
-;; UINT32  Gs, Fs, Es, Ds, Cs, Ss;
-;; NOTE - modified segment registers could hang the debugger...  We
-;;        could attempt to insulate ourselves against this possibility,
-;;        but that poses risks as well.
-;;
-    pop     gs
-    pop     fs
-    pop     es
-    pop     ds
-    pop     dword [ebp + 4 * 4]
-    pop     ss
-
-;; UINT32  Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
-    pop     edi
-    pop     esi
-    add     esp, 4   ; not for ebp
-    add     esp, 4   ; not for esp
-    pop     ebx
-    pop     edx
-    pop     ecx
-    pop     eax
-
-    pop     dword [ebp - 8]
-    pop     dword [ebp - 4]
-    mov     esp, ebp
-    pop     ebp
-    add     esp, 8
-    cmp     dword [esp - 16], 0   ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    jz      DoReturn
-    cmp     dword [esp - 20], 1   ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-    jz      ErrorCode
-    jmp     dword [esp - 16]
-ErrorCode:
-    sub     esp, 4
-    jmp     dword [esp - 12]
-
-DoReturn:
-    cmp     dword [ASM_PFX(mDoFarReturnFlag)], 0   ; Check if need to do far return instead of IRET
-    jz      DoIret
-    push    dword [esp + 8]    ; save EFLAGS
-    add     esp, 16
-    push    dword [esp - 8]    ; save CS in new location
-    push    dword [esp - 8]    ; save EIP in new location
-    push    dword [esp - 8]    ; save EFLAGS in new location
-    popfd                ; restore EFLAGS
-    retf                 ; far return
-
-DoIret:
-    iretd
-
-;---------------------------------------;
-; _AsmGetTemplateAddressMap                  ;
-;----------------------------------------------------------------------------;
-;
-; Protocol prototype
-;   AsmGetTemplateAddressMap (
-;     EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
-;   );
-;
-; Routine Description:
-;
-;  Return address map of interrupt handler template so that C code can generate
-;  interrupt table.
-;
-; Arguments:
-;
-;
-; Returns:
-;
-;   Nothing
-;
-;
-; Input:  [ebp][0]  = Original ebp
-;         [ebp][4]  = Return address
-;
-; Output: Nothing
-;
-; Destroys: Nothing
-;-----------------------------------------------------------------------------;
-global ASM_PFX(AsmGetTemplateAddressMap)
-ASM_PFX(AsmGetTemplateAddressMap):
-    push    ebp                 ; C prolog
-    mov     ebp, esp
-    pushad
-
-    mov ebx, dword [ebp + 0x8]
-    mov dword [ebx],      AsmIdtVectorBegin
-    mov dword [ebx + 0x4], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
-    mov dword [ebx + 0x8], HookAfterStubBegin
-
-    popad
-    pop     ebp
-    ret
-
-;-------------------------------------------------------------------------------------
-;  AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmVectorNumFixup)
-ASM_PFX(AsmVectorNumFixup):
-    mov     eax, dword [esp + 8]
-    mov     ecx, [esp + 4]
-    mov     [ecx + (VectorNum - HookAfterStubBegin)], al
-    ret
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
deleted file mode 100644
index 8d8d16ecbd..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/** @file
-  CPU exception handler library implementation for PEIM module.
-
-Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include "CpuExceptionCommon.h"
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-CONST UINTN    mDoFarReturnFlag  = 0;
-
-EFI_GUID mCpuExceptrionHandlerLibHobGuid = CPU_EXCEPTION_HANDLER_LIB_HOB_GUID;
-
-/**
-  Get exception handler data pointer from GUIDed HOb.
-
-  @return  pointer to exception handler data.
-**/
-EXCEPTION_HANDLER_DATA *
-GetExceptionHandlerData (
-  VOID
-  )
-{
-  EFI_HOB_GUID_TYPE       *GuidHob;
-  VOID                    *DataInHob;
-  EXCEPTION_HANDLER_DATA  *ExceptionHandlerData;
-
-  ExceptionHandlerData = NULL;
-  GuidHob = GetFirstGuidHob (&mCpuExceptrionHandlerLibHobGuid);
-  if (GuidHob != NULL) {
-    DataInHob = GET_GUID_HOB_DATA (GuidHob);
-    ExceptionHandlerData = (EXCEPTION_HANDLER_DATA *)(*(UINTN *)DataInHob);
-  }
-  ASSERT (ExceptionHandlerData != NULL);
-  return ExceptionHandlerData;
-}
-
-/**
-  Common exception handler.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-EFIAPI
-CommonExceptionHandler (
-  IN EFI_EXCEPTION_TYPE   ExceptionType,
-  IN EFI_SYSTEM_CONTEXT   SystemContext
-  )
-{
-  EXCEPTION_HANDLER_DATA  *ExceptionHandlerData;
-
-  ExceptionHandlerData = GetExceptionHandlerData ();
-  CommonExceptionHandlerWorker (ExceptionType, SystemContext, ExceptionHandlerData);
-}
-
-/**
-  Initializes all CPU exceptions entries and provides the default exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-  Note: Before invoking this API, caller must allocate memory for IDT table and load
-        IDTR by AsmWriteIdtr().
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           CPU Exception Entries have been successfully initialized
-                                with default exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  EFI_STATUS                       Status;
-  EXCEPTION_HANDLER_DATA           *ExceptionHandlerData;
-  RESERVED_VECTORS_DATA            *ReservedVectors;
-
-  ReservedVectors = AllocatePool (sizeof (RESERVED_VECTORS_DATA) * CPU_EXCEPTION_NUM);
-  ASSERT (ReservedVectors != NULL);
-
-  ExceptionHandlerData = AllocatePool (sizeof (EXCEPTION_HANDLER_DATA));
-  ASSERT (ExceptionHandlerData != NULL);
-  ExceptionHandlerData->ReservedVectors          = ReservedVectors;
-  ExceptionHandlerData->ExternalInterruptHandler = NULL;
-  InitializeSpinLock (&ExceptionHandlerData->DisplayMessageSpinLock);
-
-  Status = InitializeCpuExceptionHandlersWorker (VectorInfo, ExceptionHandlerData);
-  if (EFI_ERROR (Status)) {
-    FreePool (ReservedVectors);
-    FreePool (ExceptionHandlerData);
-    return Status;
-  }
-
-  //
-  // Build location of CPU MP DATA buffer in HOB
-  //
-  BuildGuidDataHob (
-    &mCpuExceptrionHandlerLibHobGuid,
-    (VOID *)&ExceptionHandlerData,
-    sizeof(UINT64)
-    );
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           All CPU interrupt/exception entries have been successfully initialized
-                                with default interrupt/exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  Registers a function to be called from the processor interrupt handler.
-
-  This function registers and enables the handler specified by InterruptHandler for a processor
-  interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
-  handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
-  The installed handler is called once for each processor interrupt or exception.
-  NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
-  InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
-  @param[in]  InterruptType     Defines which interrupt or exception to hook.
-  @param[in]  InterruptHandler  A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-                                when a processor interrupt occurs. If this parameter is NULL, then the handler
-                                will be uninstalled.
-
-  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.
-  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was
-                                previously installed.
-  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
-                                previously installed.
-  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported,
-                                or this function is not supported.
-**/
-EFI_STATUS
-EFIAPI
-RegisterCpuInterruptHandler (
-  IN EFI_EXCEPTION_TYPE            InterruptType,
-  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-\ No newline at end of file
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
deleted file mode 100644
index 75443288a9..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
+++ /dev/null
@@ -1,63 +0,0 @@
-## @file
-#  CPU Exception Handler library instance for PEI module.
-#
-#  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PeiCpuExceptionHandlerLib
-  MODULE_UNI_FILE                = PeiCpuExceptionHandlerLib.uni
-  FILE_GUID                      = 980DDA67-44A6-4897-99E6-275290B71F9E
-  MODULE_TYPE                    = PEIM
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = CpuExceptionHandlerLib|PEI_CORE PEIM
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.asm
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionHandlerAsm.S
-  Ia32/ArchExceptionHandler.c
-  Ia32/ArchInterruptDefs.h
-
-[Sources.X64]
-  X64/ExceptionHandlerAsm.asm
-  X64/ExceptionHandlerAsm.nasm
-  X64/ExceptionHandlerAsm.S
-  X64/ArchExceptionHandler.c
-  X64/ArchInterruptDefs.h
-
-[Sources.common]
-  CpuExceptionCommon.h
-  CpuExceptionCommon.c
-  PeiCpuException.c
-  PeiDxeSmmCpuException.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  SerialPortLib
-  PrintLib
-  LocalApicLib
-  PeCoffGetEntryPointLib
-  HobLib
-  MemoryAllocationLib
-  SynchronizationLib
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.uni b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.uni
deleted file mode 100644
index a89537f7ff..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// CPU Exception Handler library instance for PEI module.
-//
-// CPU Exception Handler library instance for PEI module.
-//
-// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "CPU Exception Handler library instance for PEI module."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "CPU Exception Handler library instance for PEI module."
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c
deleted file mode 100644
index 0facfde5dd..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c
+++ /dev/null
@@ -1,294 +0,0 @@
-/** @file
-  CPU Exception Library provides PEI/DXE/SMM CPU common exception handler.
-
-Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-#include <Library/DebugLib.h>
-
-/**
-  Internal worker function for common exception handler.
-
-  @param ExceptionType         Exception type.
-  @param SystemContext         Pointer to EFI_SYSTEM_CONTEXT.
-  @param ExceptionHandlerData  Pointer to exception handler data.
-**/
-VOID
-CommonExceptionHandlerWorker (
-  IN EFI_EXCEPTION_TYPE          ExceptionType,
-  IN EFI_SYSTEM_CONTEXT          SystemContext,
-  IN EXCEPTION_HANDLER_DATA      *ExceptionHandlerData
-  )
-{
-  EXCEPTION_HANDLER_CONTEXT      *ExceptionHandlerContext;
-  RESERVED_VECTORS_DATA          *ReservedVectors;
-  EFI_CPU_INTERRUPT_HANDLER      *ExternalInterruptHandler;
-
-  ExceptionHandlerContext  = (EXCEPTION_HANDLER_CONTEXT *) (UINTN) (SystemContext.SystemContextIa32);
-  ReservedVectors          = ExceptionHandlerData->ReservedVectors;
-  ExternalInterruptHandler = ExceptionHandlerData->ExternalInterruptHandler;
-
-  switch (ReservedVectors[ExceptionType].Attribute) {
-  case EFI_VECTOR_HANDOFF_HOOK_BEFORE:
-    //
-    // Need to jmp to old IDT handler after this exception handler
-    //
-    ExceptionHandlerContext->ExceptionDataFlag = (mErrorCodeFlag & (1 << ExceptionType)) ? TRUE : FALSE;
-    ExceptionHandlerContext->OldIdtHandler     = ReservedVectors[ExceptionType].ExceptonHandler;
-    break;
-  case EFI_VECTOR_HANDOFF_HOOK_AFTER:
-    while (TRUE) {
-      //
-      // If if anyone has gotten SPIN_LOCK for owner running hook after
-      //
-      if (AcquireSpinLockOrFail (&ReservedVectors[ExceptionType].SpinLock)) {
-        //
-        // Need to execute old IDT handler before running this exception handler
-        //
-        ReservedVectors[ExceptionType].ApicId = GetApicId ();
-        ArchSaveExceptionContext (ExceptionType, SystemContext, ExceptionHandlerData);
-        ExceptionHandlerContext->ExceptionDataFlag = (mErrorCodeFlag & (1 << ExceptionType)) ? TRUE : FALSE;
-        ExceptionHandlerContext->OldIdtHandler     = ReservedVectors[ExceptionType].ExceptonHandler;
-        return;
-      }
-      //
-      // If failed to acquire SPIN_LOCK, check if it was locked by processor itself
-      //
-      if (ReservedVectors[ExceptionType].ApicId == GetApicId ()) {
-        //
-        // Old IDT handler has been executed, then restore CPU exception content to
-        // run new exception handler.
-        //
-        ArchRestoreExceptionContext (ExceptionType, SystemContext, ExceptionHandlerData);
-        //
-        // Rlease spin lock for ApicId
-        //
-        ReleaseSpinLock (&ReservedVectors[ExceptionType].SpinLock);
-        break;
-      }
-      CpuPause ();
-    }
-    break;
-  case 0xffffffff:
-    break;
-  default:
-    //
-    // It should never reach here
-    //
-    CpuDeadLoop ();
-    break;
-  }
-
-  if (ExternalInterruptHandler != NULL &&
-      ExternalInterruptHandler[ExceptionType] != NULL) {
-    (ExternalInterruptHandler[ExceptionType]) (ExceptionType, SystemContext);
-  } else if (ExceptionType < CPU_EXCEPTION_NUM) {
-    //
-    // Get Spinlock to display CPU information
-    //
-    while (!AcquireSpinLockOrFail (&ExceptionHandlerData->DisplayMessageSpinLock)) {
-      CpuPause ();
-    }
-    //
-    // Display ExceptionType, CPU information and Image information
-    //
-    DumpImageAndCpuContent (ExceptionType, SystemContext);
-    //
-    // Release Spinlock of output message
-    //
-    ReleaseSpinLock (&ExceptionHandlerData->DisplayMessageSpinLock);
-    //
-    // Enter a dead loop if needn't to execute old IDT handler further
-    //
-    if (ReservedVectors[ExceptionType].Attribute != EFI_VECTOR_HANDOFF_HOOK_BEFORE) {
-      CpuDeadLoop ();
-    }
-  }
-}
-
-/**
-  Internal worker function to update IDT entries accordling to vector attributes.
-
-  @param[in] IdtTable              Pointer to IDT table.
-  @param[in] TemplateMap           Pointer to a buffer where the address map is
-                                   returned.
-  @param[in] ExceptionHandlerData  Pointer to exception handler data.
-
-**/
-VOID
-UpdateIdtTable (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtTable,
-  IN EXCEPTION_HANDLER_TEMPLATE_MAP  *TemplateMap,
-  IN EXCEPTION_HANDLER_DATA          *ExceptionHandlerData
-  )
-{
-  UINT16                             CodeSegment;
-  UINTN                              Index;
-  UINTN                              InterruptHandler;
-  RESERVED_VECTORS_DATA              *ReservedVectors;
-
-  ReservedVectors = ExceptionHandlerData->ReservedVectors;
-  //
-  // Use current CS as the segment selector of interrupt gate in IDT
-  //
-  CodeSegment = AsmReadCs ();
-
-  for (Index = 0; Index < ExceptionHandlerData->IdtEntryCount; Index ++) {
-    IdtTable[Index].Bits.Selector = CodeSegment;
-    //
-    // Check reserved vectors attributes
-    //
-    switch (ReservedVectors[Index].Attribute) {
-    case EFI_VECTOR_HANDOFF_DO_NOT_HOOK:
-      //
-      // Keep original IDT entry
-      //
-      continue;
-    case EFI_VECTOR_HANDOFF_HOOK_AFTER:
-      InitializeSpinLock (&ReservedVectors[Index].SpinLock);
-      CopyMem (
-        (VOID *) ReservedVectors[Index].HookAfterStubHeaderCode,
-        (VOID *) TemplateMap->HookAfterStubHeaderStart,
-        TemplateMap->ExceptionStubHeaderSize
-        );
-      AsmVectorNumFixup (
-        (VOID *) ReservedVectors[Index].HookAfterStubHeaderCode,
-        (UINT8) Index,
-        (VOID *) TemplateMap->HookAfterStubHeaderStart
-        );
-      //
-      // Go on the following code
-      //
-    case EFI_VECTOR_HANDOFF_HOOK_BEFORE:
-      //
-      // Save original IDT handler address
-      //
-      ReservedVectors[Index].ExceptonHandler = ArchGetIdtHandler (&IdtTable[Index]);
-      //
-      // Go on the following code
-      //
-    default:
-      //
-      // Update new IDT entry
-      //
-      InterruptHandler = TemplateMap->ExceptionStart + Index * TemplateMap->ExceptionStubHeaderSize;
-      ArchUpdateIdtEntry (&IdtTable[Index], InterruptHandler);
-      break;
-    }
-  }
-}
-
-/**
-  Internal worker function to initialize exception handler.
-
-  @param[in]      VectorInfo            Pointer to reserved vector list.
-  @param[in, out] ExceptionHandlerData  Pointer to exception handler data.
-
-  @retval EFI_SUCCESS           CPU Exception Entries have been successfully initialized
-                                with default exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-InitializeCpuExceptionHandlersWorker (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL,
-  IN OUT EXCEPTION_HANDLER_DATA    *ExceptionHandlerData
-  )
-{
-  EFI_STATUS                       Status;
-  IA32_DESCRIPTOR                  IdtDescriptor;
-  UINTN                            IdtEntryCount;
-  EXCEPTION_HANDLER_TEMPLATE_MAP   TemplateMap;
-  IA32_IDT_GATE_DESCRIPTOR         *IdtTable;
-  RESERVED_VECTORS_DATA            *ReservedVectors;
-
-  ReservedVectors = ExceptionHandlerData->ReservedVectors;
-  SetMem ((VOID *) ReservedVectors, sizeof (RESERVED_VECTORS_DATA) * CPU_EXCEPTION_NUM, 0xff);
-  if (VectorInfo != NULL) {
-    Status = ReadAndVerifyVectorInfo (VectorInfo, ReservedVectors, CPU_EXCEPTION_NUM);
-    if (EFI_ERROR (Status)) {
-      return EFI_INVALID_PARAMETER;
-    }
-  }
-
-  //
-  // Read IDT descriptor and calculate IDT size
-  //
-  AsmReadIdtr (&IdtDescriptor);
-  IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
-  if (IdtEntryCount > CPU_EXCEPTION_NUM) {
-    //
-    // CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most
-    //
-    IdtEntryCount = CPU_EXCEPTION_NUM;
-  }
-
-  IdtTable = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
-  AsmGetTemplateAddressMap (&TemplateMap);
-  ASSERT (TemplateMap.ExceptionStubHeaderSize <= HOOKAFTER_STUB_SIZE);
-
-  ExceptionHandlerData->IdtEntryCount = IdtEntryCount;
-  UpdateIdtTable (IdtTable, &TemplateMap, ExceptionHandlerData);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Registers a function to be called from the processor interrupt handler.
-
-  @param[in]  InterruptType        Defines which interrupt or exception to hook.
-  @param[in]  InterruptHandler     A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-                                   when a processor interrupt occurs. If this parameter is NULL, then the handler
-                                   will be uninstalled
-  @param[in] ExceptionHandlerData  Pointer to exception handler data.
-
-  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.
-  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was
-                                previously installed.
-  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
-                                previously installed.
-  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported,
-                                or this function is not supported.
-**/
-EFI_STATUS
-RegisterCpuInterruptHandlerWorker (
-  IN EFI_EXCEPTION_TYPE            InterruptType,
-  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler,
-  IN EXCEPTION_HANDLER_DATA        *ExceptionHandlerData
-  )
-{
-  UINTN                          EnabledInterruptNum;
-  RESERVED_VECTORS_DATA          *ReservedVectors;
-  EFI_CPU_INTERRUPT_HANDLER      *ExternalInterruptHandler;
-
-  EnabledInterruptNum      = ExceptionHandlerData->IdtEntryCount;
-  ReservedVectors          = ExceptionHandlerData->ReservedVectors;
-  ExternalInterruptHandler = ExceptionHandlerData->ExternalInterruptHandler;
-
-  if (InterruptType < 0 || InterruptType >= (EFI_EXCEPTION_TYPE)EnabledInterruptNum ||
-      ReservedVectors[InterruptType].Attribute == EFI_VECTOR_HANDOFF_DO_NOT_HOOK) {
-    return EFI_UNSUPPORTED;
-  }
-
-  if (InterruptHandler == NULL && ExternalInterruptHandler[InterruptType] == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if (InterruptHandler != NULL && ExternalInterruptHandler[InterruptType] != NULL) {
-    return EFI_ALREADY_STARTED;
-  }
-
-  ExternalInterruptHandler[InterruptType] = InterruptHandler;
-  return EFI_SUCCESS;
-}
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c
deleted file mode 100644
index af608bffb6..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/** @file
-  CPU exception handler library implemenation for SEC/PEIM modules.
-
-Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include "CpuExceptionCommon.h"
-
-CONST UINTN    mDoFarReturnFlag  = 0;
-
-/**
-  Common exception handler.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-EFIAPI
-CommonExceptionHandler (
-  IN EFI_EXCEPTION_TYPE   ExceptionType,
-  IN EFI_SYSTEM_CONTEXT   SystemContext
-  )
-{
-  //
-  // Display ExceptionType, CPU information and Image information
-  //
-  DumpImageAndCpuContent (ExceptionType, SystemContext);
-
-  //
-  // Enter a dead loop.
-  //
-  CpuDeadLoop ();
-}
-
-/**
-  Initializes all CPU exceptions entries and provides the default exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-  Note: Before invoking this API, caller must allocate memory for IDT table and load
-        IDTR by AsmWriteIdtr().
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           CPU Exception Entries have been successfully initialized
-                                with default exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  EFI_STATUS                       Status;
-  RESERVED_VECTORS_DATA            ReservedVectorData[CPU_EXCEPTION_NUM];
-  IA32_DESCRIPTOR                  IdtDescriptor;
-  UINTN                            IdtEntryCount;
-  UINT16                           CodeSegment;
-  EXCEPTION_HANDLER_TEMPLATE_MAP   TemplateMap;
-  IA32_IDT_GATE_DESCRIPTOR         *IdtTable;
-  UINTN                            Index;
-  UINTN                            InterruptHandler;
-
-  if (VectorInfo != NULL) {
-    SetMem ((VOID *) ReservedVectorData, sizeof (RESERVED_VECTORS_DATA) * CPU_EXCEPTION_NUM, 0xff);
-    Status = ReadAndVerifyVectorInfo (VectorInfo, ReservedVectorData, CPU_EXCEPTION_NUM);
-    if (EFI_ERROR (Status)) {
-      return EFI_INVALID_PARAMETER;
-    }
-  }
-  //
-  // Read IDT descriptor and calculate IDT size
-  //
-  AsmReadIdtr (&IdtDescriptor);
-  IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
-  if (IdtEntryCount > CPU_EXCEPTION_NUM) {
-    //
-    // CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most
-    //
-    IdtEntryCount = CPU_EXCEPTION_NUM;
-  }
-  //
-  // Use current CS as the segment selector of interrupt gate in IDT
-  //
-  CodeSegment = AsmReadCs ();
-
-  AsmGetTemplateAddressMap (&TemplateMap);
-  IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
-  for (Index = 0; Index < IdtEntryCount; Index ++) {
-    IdtTable[Index].Bits.Selector = CodeSegment;
-    //
-    // Check reserved vectors attributes if has, only EFI_VECTOR_HANDOFF_DO_NOT_HOOK
-    // supported in this instance
-    //
-    if (VectorInfo != NULL) {
-      if (ReservedVectorData[Index].Attribute == EFI_VECTOR_HANDOFF_DO_NOT_HOOK) {
-        continue;
-      }
-    }
-    //
-    // Update IDT entry
-    //
-    InterruptHandler = TemplateMap.ExceptionStart + Index * TemplateMap.ExceptionStubHeaderSize;
-    ArchUpdateIdtEntry (&IdtTable[Index], InterruptHandler);
-  }
-  return EFI_SUCCESS;
-}
-
-/**
-  Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           All CPU interrupt/exception entries have been successfully initialized
-                                with default interrupt/exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  Registers a function to be called from the processor interrupt handler.
-
-  This function registers and enables the handler specified by InterruptHandler for a processor
-  interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
-  handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
-  The installed handler is called once for each processor interrupt or exception.
-  NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
-  InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
-  @param[in]  InterruptType     Defines which interrupt or exception to hook.
-  @param[in]  InterruptHandler  A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-                                when a processor interrupt occurs. If this parameter is NULL, then the handler
-                                will be uninstalled.
-
-  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.
-  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was
-                                previously installed.
-  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
-                                previously installed.
-  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported,
-                                or this function is not supported.
-**/
-EFI_STATUS
-EFIAPI
-RegisterCpuInterruptHandler (
-  IN EFI_EXCEPTION_TYPE            InterruptType,
-  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-\ No newline at end of file
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
deleted file mode 100644
index d70a99c100..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
+++ /dev/null
@@ -1,59 +0,0 @@
-## @file
-#  CPU Exception Handler library instance for SEC/PEI modules.
-#
-#  Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SecPeiCpuExceptionHandlerLib
-  MODULE_UNI_FILE                = SecPeiCpuExceptionHandlerLib.uni
-  FILE_GUID                      = CA4BBC99-DFC6-4234-B553-8B6586B7B113
-  MODULE_TYPE                    = PEIM
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = CpuExceptionHandlerLib|SEC PEI_CORE PEIM
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.asm
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionHandlerAsm.S
-  Ia32/ArchExceptionHandler.c
-  Ia32/ArchInterruptDefs.h
-
-[Sources.X64]
-  X64/ExceptionHandlerAsm.asm
-  X64/ExceptionHandlerAsm.nasm
-  X64/ExceptionHandlerAsm.S
-  X64/ArchExceptionHandler.c
-  X64/ArchInterruptDefs.h
-
-[Sources.common]
-  CpuExceptionCommon.h
-  CpuExceptionCommon.c
-  SecPeiCpuException.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  SerialPortLib
-  PrintLib
-  LocalApicLib
-  PeCoffGetEntryPointLib
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.uni b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.uni
deleted file mode 100644
index de8b846a67..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// CPU Exception Handler library instance for SEC/PEI modules.
-//
-// CPU Exception Handler library instance for SEC/PEI modules.
-//
-// Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "CPU Exception Handler library instance for SEC/PEI modules."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "CPU Exception Handler library instance for SEC/PEI modules."
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
deleted file mode 100644
index 634ffcb21d..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
+++ /dev/null
@@ -1,63 +0,0 @@
-## @file
-#  CPU Exception Handler library instance for SMM modules.
-#
-#  Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SmmCpuExceptionHandlerLib
-  MODULE_UNI_FILE                = SmmCpuExceptionHandlerLib.uni
-  FILE_GUID                      = 8D2C439B-3981-42ff-9CE5-1B50ECA502D6
-  MODULE_TYPE                    = DXE_SMM_DRIVER
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = CpuExceptionHandlerLib|DXE_SMM_DRIVER
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.Ia32]
-  Ia32/ExceptionHandlerAsm.asm
-  Ia32/ExceptionHandlerAsm.nasm
-  Ia32/ExceptionHandlerAsm.S
-  Ia32/ArchExceptionHandler.c
-  Ia32/ArchInterruptDefs.h
-
-[Sources.X64]
-  X64/ExceptionHandlerAsm.asm
-  X64/ExceptionHandlerAsm.nasm
-  X64/ExceptionHandlerAsm.S
-  X64/ArchExceptionHandler.c
-  X64/ArchInterruptDefs.h
-
-[Sources.common]
-  CpuExceptionCommon.h
-  CpuExceptionCommon.c
-  PeiDxeSmmCpuException.c
-  SmmException.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  SerialPortLib
-  PrintLib
-  SynchronizationLib
-  LocalApicLib
-  PeCoffGetEntryPointLib
-  DebugLib
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.uni b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.uni
deleted file mode 100644
index 3dfa69547b..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// CPU Exception Handler library instance for SMM modules.
-//
-// CPU Exception Handler library instance for SMM modules.
-//
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "CPU Exception Handler library instance for SMM modules."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "CPU Exception Handler library instance for SMM modules."
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c
deleted file mode 100644
index 7414d3f773..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/** @file
-  CPU exception handler library implemenation for SMM modules.
-
-  Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiSmm.h>
-#include "CpuExceptionCommon.h"
-
-CONST UINTN   mDoFarReturnFlag   = 1;
-
-//
-// Spin lock for CPU information display
-//
-SPIN_LOCK        mDisplayMessageSpinLock;
-
-RESERVED_VECTORS_DATA       mReservedVectorsData[CPU_EXCEPTION_NUM];
-EFI_CPU_INTERRUPT_HANDLER   mExternalInterruptHandlerTable[CPU_EXCEPTION_NUM];
-EXCEPTION_HANDLER_DATA      mExceptionHandlerData;
-/**
-  Common exception handler.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-EFIAPI
-CommonExceptionHandler (
-  IN EFI_EXCEPTION_TYPE          ExceptionType,
-  IN EFI_SYSTEM_CONTEXT          SystemContext
-  )
-{
-  CommonExceptionHandlerWorker (ExceptionType, SystemContext, &mExceptionHandlerData);
-}
-
-/**
-  Initializes all CPU exceptions entries and provides the default exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           CPU Exception Entries have been successfully initialized
-                                with default exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  mExceptionHandlerData.ReservedVectors          = mReservedVectorsData;
-  mExceptionHandlerData.ExternalInterruptHandler = mExternalInterruptHandlerTable;
-  InitializeSpinLock (&mExceptionHandlerData.DisplayMessageSpinLock);
-  return InitializeCpuExceptionHandlersWorker (VectorInfo, &mExceptionHandlerData);
-}
-
-/**
-  Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
-  Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
-  persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
-  If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
-  If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
-  @param[in]  VectorInfo    Pointer to reserved vector list.
-
-  @retval EFI_SUCCESS           All CPU interrupt/exception entries have been successfully initialized
-                                with default interrupt/exception handlers.
-  @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-  @retval EFI_UNSUPPORTED       This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers (
-  IN EFI_VECTOR_HANDOFF_INFO       *VectorInfo OPTIONAL
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  Registers a function to be called from the processor interrupt handler.
-
-  This function registers and enables the handler specified by InterruptHandler for a processor
-  interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
-  handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
-  The installed handler is called once for each processor interrupt or exception.
-  NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
-  InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
-  @param[in]  InterruptType     Defines which interrupt or exception to hook.
-  @param[in]  InterruptHandler  A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
-                                when a processor interrupt occurs. If this parameter is NULL, then the handler
-                                will be uninstalled.
-
-  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.
-  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was
-                                previously installed.
-  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
-                                previously installed.
-  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported,
-                                or this function is not supported.
-**/
-EFI_STATUS
-EFIAPI
-RegisterCpuInterruptHandler (
-  IN EFI_EXCEPTION_TYPE            InterruptType,
-  IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler
-  )
-{
-  return RegisterCpuInterruptHandlerWorker (InterruptType, InterruptHandler, &mExceptionHandlerData);
-}
-\ No newline at end of file
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
deleted file mode 100644
index 65f0cff680..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ /dev/null
@@ -1,262 +0,0 @@
-/** @file
-  x64 CPU Exception Handler.
-
-  Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-
-/**
-  Return address map of exception handler template so that C code can generate
-  exception tables.
-
-  @param IdtEntry          Pointer to IDT entry to be updated.
-  @param InterruptHandler  IDT handler value.
-**/
-VOID
-ArchUpdateIdtEntry (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry,
-  IN UINTN                           InterruptHandler
-  )
-{
-  IdtEntry->Bits.OffsetLow   = (UINT16)(UINTN)InterruptHandler;
-  IdtEntry->Bits.OffsetHigh  = (UINT16)((UINTN)InterruptHandler >> 16);
-  IdtEntry->Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
-  IdtEntry->Bits.GateType    = IA32_IDT_GATE_TYPE_INTERRUPT_32;
-}
-
-/**
-  Read IDT handler value from IDT entry.
-
-  @param IdtEntry          Pointer to IDT entry to be read.
-
-**/
-UINTN
-ArchGetIdtHandler (
-  IN IA32_IDT_GATE_DESCRIPTOR        *IdtEntry
-  )
-{
-  return IdtEntry->Bits.OffsetLow + (((UINTN) IdtEntry->Bits.OffsetHigh)  << 16) +
-                                    (((UINTN) IdtEntry->Bits.OffsetUpper) << 32);
-}
-
-/**
-  Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
-  @param[in] ExceptionType        Exception type.
-  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.
-  @param[in] ExceptionHandlerData Pointer to exception handler data.
-**/
-VOID
-ArchSaveExceptionContext (
-  IN UINTN                        ExceptionType,
-  IN EFI_SYSTEM_CONTEXT           SystemContext,
-  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData
-  )
-{
-  IA32_EFLAGS32           Eflags;
-  RESERVED_VECTORS_DATA   *ReservedVectors;
-
-  ReservedVectors = ExceptionHandlerData->ReservedVectors;
-  //
-  // Save Exception context in global variable
-  //
-  ReservedVectors[ExceptionType].OldSs         = SystemContext.SystemContextX64->Ss;
-  ReservedVectors[ExceptionType].OldSp         = SystemContext.SystemContextX64->Rsp;
-  ReservedVectors[ExceptionType].OldFlags      = SystemContext.SystemContextX64->Rflags;
-  ReservedVectors[ExceptionType].OldCs         = SystemContext.SystemContextX64->Cs;
-  ReservedVectors[ExceptionType].OldIp         = SystemContext.SystemContextX64->Rip;
-  ReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextX64->ExceptionData;
-  //
-  // Clear IF flag to avoid old IDT handler enable interrupt by IRET
-  //
-  Eflags.UintN = SystemContext.SystemContextX64->Rflags;
-  Eflags.Bits.IF = 0;
-  SystemContext.SystemContextX64->Rflags = Eflags.UintN;
-  //
-  // Modify the EIP in stack, then old IDT handler will return to the stub code
-  //
-  SystemContext.SystemContextX64->Rip = (UINTN) ReservedVectors[ExceptionType].HookAfterStubHeaderCode;
-}
-
-/**
-  Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
-  @param[in] ExceptionType        Exception type.
-  @param[in] SystemContext        Pointer to EFI_SYSTEM_CONTEXT.
-  @param[in] ExceptionHandlerData Pointer to exception handler data.
-**/
-VOID
-ArchRestoreExceptionContext (
-  IN UINTN                        ExceptionType,
-  IN EFI_SYSTEM_CONTEXT           SystemContext,
-  IN EXCEPTION_HANDLER_DATA       *ExceptionHandlerData
-  )
-{
-  RESERVED_VECTORS_DATA   *ReservedVectors;
-
-  ReservedVectors = ExceptionHandlerData->ReservedVectors;
-  SystemContext.SystemContextX64->Ss            = ReservedVectors[ExceptionType].OldSs;
-  SystemContext.SystemContextX64->Rsp           = ReservedVectors[ExceptionType].OldSp;
-  SystemContext.SystemContextX64->Rflags        = ReservedVectors[ExceptionType].OldFlags;
-  SystemContext.SystemContextX64->Cs            = ReservedVectors[ExceptionType].OldCs;
-  SystemContext.SystemContextX64->Rip           = ReservedVectors[ExceptionType].OldIp;
-  SystemContext.SystemContextX64->ExceptionData = ReservedVectors[ExceptionType].ExceptionData;
-}
-
-/**
-  Display CPU information.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-EFIAPI
-DumpCpuContext (
-  IN EFI_EXCEPTION_TYPE   ExceptionType,
-  IN EFI_SYSTEM_CONTEXT   SystemContext
-  )
-{
-  InternalPrintMessage (
-    "!!!! X64 Exception Type - %02x(%a)  CPU Apic ID - %08x !!!!\n",
-    ExceptionType,
-    GetExceptionNameStr (ExceptionType),
-    GetApicId ()
-    );
-  if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {
-    InternalPrintMessage (
-      "ExceptionData - %016lx",
-      SystemContext.SystemContextX64->ExceptionData
-      );
-    if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
-      InternalPrintMessage (
-        "  I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID)   != 0,
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US)   != 0,
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR)   != 0,
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P)    != 0,
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK)   != 0,
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX)  != 0
-        );
-    }
-    InternalPrintMessage ("\n");
-  }
-  InternalPrintMessage (
-    "RIP  - %016lx, CS  - %016lx, RFLAGS - %016lx\n",
-    SystemContext.SystemContextX64->Rip,
-    SystemContext.SystemContextX64->Cs,
-    SystemContext.SystemContextX64->Rflags
-    );
-  InternalPrintMessage (
-    "RAX  - %016lx, RCX - %016lx, RDX - %016lx\n",
-    SystemContext.SystemContextX64->Rax,
-    SystemContext.SystemContextX64->Rcx,
-    SystemContext.SystemContextX64->Rdx
-    );
-  InternalPrintMessage (
-    "RBX  - %016lx, RSP - %016lx, RBP - %016lx\n",
-    SystemContext.SystemContextX64->Rbx,
-    SystemContext.SystemContextX64->Rsp,
-    SystemContext.SystemContextX64->Rbp
-    );
-  InternalPrintMessage (
-    "RSI  - %016lx, RDI - %016lx\n",
-    SystemContext.SystemContextX64->Rsi,
-    SystemContext.SystemContextX64->Rdi
-    );
-  InternalPrintMessage (
-    "R8   - %016lx, R9  - %016lx, R10 - %016lx\n",
-    SystemContext.SystemContextX64->R8,
-    SystemContext.SystemContextX64->R9,
-    SystemContext.SystemContextX64->R10
-    );
-  InternalPrintMessage (
-    "R11  - %016lx, R12 - %016lx, R13 - %016lx\n",
-    SystemContext.SystemContextX64->R11,
-    SystemContext.SystemContextX64->R12,
-    SystemContext.SystemContextX64->R13
-    );
-  InternalPrintMessage (
-    "R14  - %016lx, R15 - %016lx\n",
-    SystemContext.SystemContextX64->R14,
-    SystemContext.SystemContextX64->R15
-    );
-  InternalPrintMessage (
-    "DS   - %016lx, ES  - %016lx, FS  - %016lx\n",
-    SystemContext.SystemContextX64->Ds,
-    SystemContext.SystemContextX64->Es,
-    SystemContext.SystemContextX64->Fs
-    );
-  InternalPrintMessage (
-    "GS   - %016lx, SS  - %016lx\n",
-    SystemContext.SystemContextX64->Gs,
-    SystemContext.SystemContextX64->Ss
-    );
-  InternalPrintMessage (
-    "CR0  - %016lx, CR2 - %016lx, CR3 - %016lx\n",
-    SystemContext.SystemContextX64->Cr0,
-    SystemContext.SystemContextX64->Cr2,
-    SystemContext.SystemContextX64->Cr3
-    );
-  InternalPrintMessage (
-    "CR4  - %016lx, CR8 - %016lx\n",
-    SystemContext.SystemContextX64->Cr4,
-    SystemContext.SystemContextX64->Cr8
-    );
-  InternalPrintMessage (
-    "DR0  - %016lx, DR1 - %016lx, DR2 - %016lx\n",
-    SystemContext.SystemContextX64->Dr0,
-    SystemContext.SystemContextX64->Dr1,
-    SystemContext.SystemContextX64->Dr2
-    );
-  InternalPrintMessage (
-    "DR3  - %016lx, DR6 - %016lx, DR7 - %016lx\n",
-    SystemContext.SystemContextX64->Dr3,
-    SystemContext.SystemContextX64->Dr6,
-    SystemContext.SystemContextX64->Dr7
-    );
-  InternalPrintMessage (
-    "GDTR - %016lx %016lx, LDTR - %016lx\n",
-    SystemContext.SystemContextX64->Gdtr[0],
-    SystemContext.SystemContextX64->Gdtr[1],
-    SystemContext.SystemContextX64->Ldtr
-    );
-  InternalPrintMessage (
-    "IDTR - %016lx %016lx,   TR - %016lx\n",
-    SystemContext.SystemContextX64->Idtr[0],
-    SystemContext.SystemContextX64->Idtr[1],
-    SystemContext.SystemContextX64->Tr
-    );
-  InternalPrintMessage (
-    "FXSAVE_STATE - %016lx\n",
-    &SystemContext.SystemContextX64->FxSaveState
-    );
-}
-
-/**
-  Display CPU information.
-
-  @param ExceptionType  Exception type.
-  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-DumpImageAndCpuContent (
-  IN EFI_EXCEPTION_TYPE   ExceptionType,
-  IN EFI_SYSTEM_CONTEXT   SystemContext
-  )
-{
-  DumpCpuContext (ExceptionType, SystemContext);
-  //
-  // Dump module image base and module entry point by RIP
-  //
-  DumpModuleImageInfo (SystemContext.SystemContextX64->Rip);
-}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h
deleted file mode 100644
index 906480134a..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/** @file
-  X64 arch definition for CPU Exception Handler Library.
-
-  Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
-#define _ARCH_CPU_INTERRUPT_DEFS_H_
-
-typedef struct {
-  EFI_SYSTEM_CONTEXT_X64  SystemContext;
-  BOOLEAN                 ExceptionDataFlag;
-  UINTN                   OldIdtHandler;
-} EXCEPTION_HANDLER_CONTEXT;
-
-//
-// Register Structure Definitions
-//
-typedef struct {
-  EFI_STATUS_CODE_DATA      Header;
-  EFI_SYSTEM_CONTEXT_X64    SystemContext;
-} CPU_STATUS_CODE_TEMPLATE;
-
-typedef struct {
-  SPIN_LOCK   SpinLock;
-  UINT32      ApicId;
-  UINT32      Attribute;
-  UINTN       ExceptonHandler;
-  UINTN       OldSs;
-  UINTN       OldSp;
-  UINTN       OldFlags;
-  UINTN       OldCs;
-  UINTN       OldIp;
-  UINTN       ExceptionData;
-  UINT8       HookAfterStubHeaderCode[HOOKAFTER_STUB_SIZE];
-} RESERVED_VECTORS_DATA;
-
-#endif
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S
deleted file mode 100644
index edd363cdaa..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S
+++ /dev/null
@@ -1,434 +0,0 @@
-#------------------------------------------------------------------------------ ;
-# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   ExceptionHandlerAsm.S
-#
-# Abstract:
-#
-#   x64 CPU Exception Handler
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-
-
-ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
-
-#EXTRN ASM_PFX(mErrorCodeFlag):DWORD    # Error code flags for exceptions
-#EXTRN ASM_PFX(mDoFarReturnFlag):QWORD  # Do far return flag
-.text
-
-#ifdef __APPLE__
-# macros are different between GNU and Xcode as.
-.macro IDT_MACRO
-  push     $0
-#else
-.macro IDT_MACRO arg
-  push    \arg
-#endif
-  .byte   0xe9      # jmp     ASM_PFX(CommonInterruptEntry)
-  .long   ASM_PFX(CommonInterruptEntry) - . - 4
-.endm
-
-AsmIdtVectorBegin:
-  IDT_MACRO $0
-  IDT_MACRO $1
-  IDT_MACRO $2
-  IDT_MACRO $3
-  IDT_MACRO $4
-  IDT_MACRO $5
-  IDT_MACRO $6
-  IDT_MACRO $7
-  IDT_MACRO $8
-  IDT_MACRO $9
-  IDT_MACRO $10
-  IDT_MACRO $11
-  IDT_MACRO $12
-  IDT_MACRO $13
-  IDT_MACRO $14
-  IDT_MACRO $15
-  IDT_MACRO $16
-  IDT_MACRO $17
-  IDT_MACRO $18
-  IDT_MACRO $19
-  IDT_MACRO $20
-  IDT_MACRO $21
-  IDT_MACRO $22
-  IDT_MACRO $23
-  IDT_MACRO $24
-  IDT_MACRO $25
-  IDT_MACRO $26
-  IDT_MACRO $27
-  IDT_MACRO $28
-  IDT_MACRO $29
-  IDT_MACRO $30
-  IDT_MACRO $31
-AsmIdtVectorEnd:
-
-HookAfterStubHeaderBegin:
-    .byte   0x6a      # push
-PatchVectorNum:
-    .byte   0         # 0 will be fixed
-    .byte   0xe9      # jmp     ASM_PFX(HookAfterStubHeaderEnd)
-PatchFuncAddress:
-     .set   HOOK_ADDRESS, ASM_PFX(HookAfterStubHeaderEnd) - . - 4
-    .long   HOOK_ADDRESS  # will be fixed
-ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
-ASM_PFX(HookAfterStubHeaderEnd):
-    pushq   %rax
-    movq    %rsp, %rax
-    andl    $0x0fffffff0, %esp  # make sure 16-byte aligned for exception context
-    subq    $0x18, %rsp         # reserve room for filling exception data later
-    pushq   %rcx
-    movq    8(%rax), %rcx
-    bt      %ecx, ASM_PFX(mErrorCodeFlag)(%rip)
-    jnc     NoErrorData
-    pushq   (%rsp)            # push additional rcx to make stack alignment
-NoErrorData:
-    xchgq   (%rsp), %rcx      # restore rcx, save Exception Number in stack
-    movq    (%rax), %rax      # restore rax
-
-#---------------------------------------;
-# CommonInterruptEntry                  ;
-#---------------------------------------;
-# The follow algorithm is used for the common interrupt routine.
-
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
-    cli
-    #
-    # All interrupt handlers are invoked through interrupt gates, so
-    # IF flag automatically cleared at the entry point
-    #
-    #
-    # Calculate vector number
-    #
-    xchgq   (%rsp), %rcx       # get the return address of call, actually, it is the address of vector number.
-    andq     $0x0FF, %rcx
-    cmp     $32, %ecx          # Intel reserved vector for exceptions?
-    jae     NoErrorCode
-    pushq   %rax
-    movl    ASM_PFX(mErrorCodeFlag)(%rip), %eax
-    bt      %ecx, %eax
-    popq    %rax
-    jc      CommonInterruptEntry_al_0000
-
-NoErrorCode:
-
-    #
-    # Push a dummy error code on the stack
-    # to maintain coherent stack map
-    #
-    pushq   (%rsp)
-    movq    $0, 8(%rsp)
-CommonInterruptEntry_al_0000:
-    pushq   %rbp
-    movq    %rsp, %rbp
-    pushq   $0          # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    pushq   $0          # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-    #
-    # Stack:
-    # +---------------------+ <-- 16-byte aligned ensured by processor
-    # +    Old SS           +
-    # +---------------------+
-    # +    Old RSP          +
-    # +---------------------+
-    # +    RFlags           +
-    # +---------------------+
-    # +    CS               +
-    # +---------------------+
-    # +    RIP              +
-    # +---------------------+
-    # +    Error Code       +
-    # +---------------------+
-    # + RCX / Vector Number +
-    # +---------------------+
-    # +    RBP              +
-    # +---------------------+ <-- RBP, 16-byte aligned
-    #
-
-
-    #
-    # Since here the stack pointer is 16-byte aligned, so
-    # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
-    # is 16-byte aligned
-    #
-
-#; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;
-    pushq    %r15
-    pushq    %r14
-    pushq    %r13
-    pushq    %r12
-    pushq    %r11
-    pushq    %r10
-    pushq    %r9
-    pushq    %r8
-    pushq    %rax
-    pushq    8(%rbp)   # RCX
-    pushq    %rdx
-    pushq    %rbx
-    pushq    48(%rbp)  # RSP
-    pushq    (%rbp)    # RBP
-    pushq    %rsi
-    pushq    %rdi
-
-#; UINT64  Gs, Fs, Es, Ds, Cs, Ss;  insure high 16 bits of each is zero
-    movzwq  56(%rbp), %rax
-    pushq   %rax                      # for ss
-    movzwq  32(%rbp), %rax
-    pushq   %rax                      # for cs
-    mov     %ds, %rax
-    pushq   %rax
-    mov     %es, %rax
-    pushq   %rax
-    mov     %fs, %rax
-    pushq   %rax
-    mov     %gs, %rax
-    pushq   %rax
-
-    movq    %rcx, 8(%rbp)                # save vector number
-
-#; UINT64  Rip;
-    pushq   24(%rbp)
-
-#; UINT64  Gdtr[2], Idtr[2];
-    xorq    %rax, %rax
-    pushq   %rax
-    pushq   %rax
-    sidt    (%rsp)
-    xchgq   2(%rsp), %rax
-    xchgq   (%rsp), %rax
-    xchgq   8(%rsp), %rax
-
-    xorq    %rax, %rax
-    pushq   %rax
-    pushq   %rax
-    sgdt    (%rsp)
-    xchgq   2(%rsp), %rax
-    xchgq   (%rsp), %rax
-    xchgq   8(%rsp), %rax
-
-#; UINT64  Ldtr, Tr;
-    xorq    %rax, %rax
-    str     %ax
-    pushq   %rax
-    sldt    %ax
-    pushq   %rax
-
-#; UINT64  RFlags;
-    pushq   40(%rbp)
-
-#; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
-    movq    %cr8, %rax
-    pushq   %rax
-    movq    %cr4, %rax
-    orq     $0x208, %rax
-    movq    %rax, %cr4
-    pushq   %rax
-    mov     %cr3, %rax
-    pushq   %rax
-    mov     %cr2, %rax
-    pushq   %rax
-    xorq    %rax, %rax
-    pushq   %rax
-    mov     %cr0, %rax
-    pushq   %rax
-
-#; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-    movq    %dr7, %rax
-    pushq   %rax
-    movq    %dr6, %rax
-    pushq   %rax
-    movq    %dr3, %rax
-    pushq   %rax
-    movq    %dr2, %rax
-    pushq   %rax
-    movq    %dr1, %rax
-    pushq   %rax
-    movq    %dr0, %rax
-    pushq   %rax
-
-#; FX_SAVE_STATE_X64 FxSaveState;
-    subq    $512, %rsp
-    movq    %rsp, %rdi
-    .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
-
-#; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
-    cld
-
-#; UINT32  ExceptionData;
-    pushq   16(%rbp)
-
-#; Prepare parameter and call
-    mov     8(%rbp), %rcx
-    mov     %rsp, %rdx
-    #
-    # Per X64 calling convention, allocate maximum parameter stack space
-    # and make sure RSP is 16-byte aligned
-    #
-    subq    $40, %rsp
-    call    ASM_PFX(CommonExceptionHandler)
-    addq    $40, %rsp
-
-    cli
-#; UINT64  ExceptionData;
-    addq    $8, %rsp
-
-#; FX_SAVE_STATE_X64 FxSaveState;
-
-    movq    %rsp, %rsi
-    .byte   0x0f, 0x0ae, 0x0E # fxrstor [rsi]
-    addq    $512, %rsp
-
-#; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-#; Skip restoration of DRx registers to support in-circuit emualators
-#; or debuggers set breakpoint in interrupt/exception context
-    addq    $48, %rsp
-
-#; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
-    popq    %rax
-    movq    %rax, %cr0
-    addq    $8, %rsp   # not for Cr1
-    popq    %rax
-    movq    %rax, %cr2
-    popq    %rax
-    movq    %rax, %cr3
-    popq    %rax
-    movq    %rax, %cr4
-    popq    %rax
-    movq    %rax, %cr8
-
-#; UINT64  RFlags;
-    popq    40(%rbp)
-
-#; UINT64  Ldtr, Tr;
-#; UINT64  Gdtr[2], Idtr[2];
-#; Best not let anyone mess with these particular registers...
-    addq    $48, %rsp
-
-#; UINT64  Rip;
-    popq    24(%rbp)
-
-#; UINT64  Gs, Fs, Es, Ds, Cs, Ss;
-    popq    %rax
-    # mov   %rax, %gs ; not for gs
-    popq    %rax
-    # mov   %rax, %fs ; not for fs
-    # (X64 will not use fs and gs, so we do not restore it)
-    popq    %rax
-    mov     %rax, %es
-    popq    %rax
-    mov     %rax, %ds
-    popq    32(%rbp)  # for cs
-    popq    56(%rbp)  # for ss
-
-#; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;
-    popq    %rdi
-    popq    %rsi
-    addq    $8, %rsp              # not for rbp
-    popq    48(%rbp)              # for rsp
-    popq    %rbx
-    popq    %rdx
-    popq    %rcx
-    popq    %rax
-    popq    %r8
-    popq    %r9
-    popq    %r10
-    popq    %r11
-    popq    %r12
-    popq    %r13
-    popq    %r14
-    popq    %r15
-
-    movq    %rbp, %rsp
-    popq    %rbp
-    addq    $16, %rsp
-    cmpq    $0, -32(%rsp)      # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    jz      DoReturn           # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-    cmpb    $1, -40(%rsp)
-    jz      ErrorCode
-    jmp     *-32(%rsp)
-ErrorCode:
-    subq    $8, %rsp
-    jmp     *-24(%rsp)
-
-DoReturn:
-    pushq   %rax
-    movq    ASM_PFX(mDoFarReturnFlag)(%rip), %rax
-    cmpq    $0, %rax          # Check if need to do far return instead of IRET
-    popq    %rax
-    jz      DoIret
-    pushq   %rax
-    movq    %rsp, %rax        # save old RSP to rax
-    movq    0x20(%rsp), %rsp
-    pushq   0x10(%rax)        # save CS in new location
-    pushq   0x8(%rax)         # save EIP in new location
-    pushq   0x18(%rax)        # save EFLAGS in new location
-    movq    (%rax), %rax      # restore rax
-    popfq                     # restore EFLAGS
-    lretq                     # far return
-DoIret:
-    iretq
-
-
-#-------------------------------------------------------------------------------------
-#  AsmGetTemplateAddressMap (&AddressMap);
-#-------------------------------------------------------------------------------------
-# comments here for definition of address map
-ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)
-ASM_PFX(AsmGetTemplateAddressMap):
-    pushq     %rbp
-    movq      %rsp, %rbp
-
-    leaq         AsmIdtVectorBegin(%rip), %rax
-    movq         %rax, (%rcx)
-    .set         ENTRY_SIZE, ASM_PFX(HookAfterStubHeaderEnd) - HookAfterStubHeaderBegin
-    movq         $(ENTRY_SIZE), 0x08(%rcx)
-    leaq         HookAfterStubHeaderBegin(%rip), %rax
-    movq         %rax, 0x10(%rcx)
-
-    popq      %rbp
-    ret
-
-#-------------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# AsmVectorNumFixup (
-#   IN VOID    *NewVectorAddr,  // RCX
-#   IN UINT8   VectorNum        // RDX
-#   IN VOID    *OldVectorAddr,  // R8
-#  );
-#-------------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)
-ASM_PFX(AsmVectorNumFixup):
-    pushq     %rbp
-    movq      %rsp, %rbp
-
-# Patch vector #
-    movb      %dl, (PatchVectorNum - HookAfterStubHeaderBegin)(%rcx)
-
-# Patch Function address
-    subq      %rcx, %r8     # Calculate the offset value
-    movl      (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx), %eax
-    addq      %r8, %rax
-    movl      %eax, (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx)
-
-    popq      %rbp
-    ret
-
-#END
-
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm
deleted file mode 100644
index 726c64a140..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm
+++ /dev/null
@@ -1,389 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   ExceptionHandlerAsm.Asm
-;
-; Abstract:
-;
-;   x64 CPU Exception Handler
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
-;
-; CommonExceptionHandler()
-;
-externdef CommonExceptionHandler:near
-
-EXTRN mErrorCodeFlag:DWORD    ; Error code flags for exceptions
-EXTRN mDoFarReturnFlag:QWORD  ; Do far return flag
-
-data SEGMENT
-
-.code
-
-ALIGN   8
-
-AsmIdtVectorBegin:
-REPEAT  32
-    db      6ah        ; push  #VectorNum
-    db      ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
-    push    rax
-    mov     rax, CommonInterruptEntry
-    jmp     rax
-ENDM
-AsmIdtVectorEnd:
-
-HookAfterStubHeaderBegin:
-    db      6ah        ; push
-@VectorNum:
-    db      0          ; 0 will be fixed
-    push    rax
-    mov     rax, HookAfterStubHeaderEnd
-    jmp     rax
-HookAfterStubHeaderEnd:
-    mov     rax, rsp
-    and     sp,  0fff0h        ; make sure 16-byte aligned for exception context
-    sub     rsp, 18h           ; reserve room for filling exception data later
-    push    rcx
-    mov     rcx, [rax + 8]
-    bt      mErrorCodeFlag, ecx
-    jnc     @F
-    push    [rsp]             ; push additional rcx to make stack alignment
-@@:
-    xchg    rcx, [rsp]        ; restore rcx, save Exception Number in stack
-    push    [rax]             ; push rax into stack to keep code consistence
-
-;---------------------------------------;
-; CommonInterruptEntry                  ;
-;---------------------------------------;
-; The follow algorithm is used for the common interrupt routine.
-; Entry from each interrupt with a push eax and eax=interrupt number
-; Stack frame would be as follows as specified in IA32 manuals:
-;
-; +---------------------+ <-- 16-byte aligned ensured by processor
-; +    Old SS           +
-; +---------------------+
-; +    Old RSP          +
-; +---------------------+
-; +    RFlags           +
-; +---------------------+
-; +    CS               +
-; +---------------------+
-; +    RIP              +
-; +---------------------+
-; +    Error Code       +
-; +---------------------+
-; +   Vector Number     +
-; +---------------------+
-; +    RBP              +
-; +---------------------+ <-- RBP, 16-byte aligned
-; The follow algorithm is used for the common interrupt routine.
-CommonInterruptEntry PROC PUBLIC
-    cli
-    pop     rax
-    ;
-    ; All interrupt handlers are invoked through interrupt gates, so
-    ; IF flag automatically cleared at the entry point
-    ;
-    xchg    rcx, [rsp]      ; Save rcx into stack and save vector number into rcx
-    and     rcx, 0FFh
-    cmp     ecx, 32         ; Intel reserved vector for exceptions?
-    jae     NoErrorCode
-    bt      mErrorCodeFlag, ecx
-    jc      @F
-
-NoErrorCode:
-
-    ;
-    ; Push a dummy error code on the stack
-    ; to maintain coherent stack map
-    ;
-    push    [rsp]
-    mov     qword ptr [rsp + 8], 0
-@@:
-    push    rbp
-    mov     rbp, rsp
-    push    0             ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    push    0             ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-    ;
-    ; Stack:
-    ; +---------------------+ <-- 16-byte aligned ensured by processor
-    ; +    Old SS           +
-    ; +---------------------+
-    ; +    Old RSP          +
-    ; +---------------------+
-    ; +    RFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    RIP              +
-    ; +---------------------+
-    ; +    Error Code       +
-    ; +---------------------+
-    ; + RCX / Vector Number +
-    ; +---------------------+
-    ; +    RBP              +
-    ; +---------------------+ <-- RBP, 16-byte aligned
-    ;
-
-
-    ;
-    ; Since here the stack pointer is 16-byte aligned, so
-    ; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
-    ; is 16-byte aligned
-    ;
-
-;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;
-    push r15
-    push r14
-    push r13
-    push r12
-    push r11
-    push r10
-    push r9
-    push r8
-    push rax
-    push qword ptr [rbp + 8]   ; RCX
-    push rdx
-    push rbx
-    push qword ptr [rbp + 48]  ; RSP
-    push qword ptr [rbp]       ; RBP
-    push rsi
-    push rdi
-
-;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;  insure high 16 bits of each is zero
-    movzx   rax, word ptr [rbp + 56]
-    push    rax                      ; for ss
-    movzx   rax, word ptr [rbp + 32]
-    push    rax                      ; for cs
-    mov     rax, ds
-    push    rax
-    mov     rax, es
-    push    rax
-    mov     rax, fs
-    push    rax
-    mov     rax, gs
-    push    rax
-
-    mov     [rbp + 8], rcx               ; save vector number
-
-;; UINT64  Rip;
-    push    qword ptr [rbp + 24]
-
-;; UINT64  Gdtr[2], Idtr[2];
-    xor     rax, rax
-    push    rax
-    push    rax
-    sidt    [rsp]
-    xchg    rax, [rsp + 2]
-    xchg    rax, [rsp]
-    xchg    rax, [rsp + 8]
-
-    xor     rax, rax
-    push    rax
-    push    rax
-    sgdt    [rsp]
-    xchg    rax, [rsp + 2]
-    xchg    rax, [rsp]
-    xchg    rax, [rsp + 8]
-
-;; UINT64  Ldtr, Tr;
-    xor     rax, rax
-    str     ax
-    push    rax
-    sldt    ax
-    push    rax
-
-;; UINT64  RFlags;
-    push    qword ptr [rbp + 40]
-
-;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
-    mov     rax, cr8
-    push    rax
-    mov     rax, cr4
-    or      rax, 208h
-    mov     cr4, rax
-    push    rax
-    mov     rax, cr3
-    push    rax
-    mov     rax, cr2
-    push    rax
-    xor     rax, rax
-    push    rax
-    mov     rax, cr0
-    push    rax
-
-;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-    mov     rax, dr7
-    push    rax
-    mov     rax, dr6
-    push    rax
-    mov     rax, dr3
-    push    rax
-    mov     rax, dr2
-    push    rax
-    mov     rax, dr1
-    push    rax
-    mov     rax, dr0
-    push    rax
-
-;; FX_SAVE_STATE_X64 FxSaveState;
-    sub rsp, 512
-    mov rdi, rsp
-    db 0fh, 0aeh, 07h ;fxsave [rdi]
-
-;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
-    cld
-
-;; UINT32  ExceptionData;
-    push    qword ptr [rbp + 16]
-
-;; Prepare parameter and call
-    mov     rcx, [rbp + 8]
-    mov     rdx, rsp
-    ;
-    ; Per X64 calling convention, allocate maximum parameter stack space
-    ; and make sure RSP is 16-byte aligned
-    ;
-    sub     rsp, 4 * 8 + 8
-    mov     rax, CommonExceptionHandler
-    call    rax
-    add     rsp, 4 * 8 + 8
-
-    cli
-;; UINT64  ExceptionData;
-    add     rsp, 8
-
-;; FX_SAVE_STATE_X64 FxSaveState;
-
-    mov rsi, rsp
-    db 0fh, 0aeh, 0Eh ; fxrstor [rsi]
-    add rsp, 512
-
-;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-;; Skip restoration of DRx registers to support in-circuit emualators
-;; or debuggers set breakpoint in interrupt/exception context
-    add     rsp, 8 * 6
-
-;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
-    pop     rax
-    mov     cr0, rax
-    add     rsp, 8   ; not for Cr1
-    pop     rax
-    mov     cr2, rax
-    pop     rax
-    mov     cr3, rax
-    pop     rax
-    mov     cr4, rax
-    pop     rax
-    mov     cr8, rax
-
-;; UINT64  RFlags;
-    pop     qword ptr [rbp + 40]
-
-;; UINT64  Ldtr, Tr;
-;; UINT64  Gdtr[2], Idtr[2];
-;; Best not let anyone mess with these particular registers...
-    add     rsp, 48
-
-;; UINT64  Rip;
-    pop     qword ptr [rbp + 24]
-
-;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;
-    pop     rax
-    ; mov     gs, rax ; not for gs
-    pop     rax
-    ; mov     fs, rax ; not for fs
-    ; (X64 will not use fs and gs, so we do not restore it)
-    pop     rax
-    mov     es, rax
-    pop     rax
-    mov     ds, rax
-    pop     qword ptr [rbp + 32]  ; for cs
-    pop     qword ptr [rbp + 56]  ; for ss
-
-;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;
-    pop     rdi
-    pop     rsi
-    add     rsp, 8               ; not for rbp
-    pop     qword ptr [rbp + 48] ; for rsp
-    pop     rbx
-    pop     rdx
-    pop     rcx
-    pop     rax
-    pop     r8
-    pop     r9
-    pop     r10
-    pop     r11
-    pop     r12
-    pop     r13
-    pop     r14
-    pop     r15
-
-    mov     rsp, rbp
-    pop     rbp
-    add     rsp, 16
-    cmp     qword ptr [rsp - 32], 0  ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    jz      DoReturn
-    cmp     qword ptr [rsp - 40], 1  ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-    jz      ErrorCode
-    jmp     qword ptr [rsp - 32]
-ErrorCode:
-    sub     rsp, 8
-    jmp     qword ptr [rsp - 24]
-
-DoReturn:
-    cmp     mDoFarReturnFlag, 0   ; Check if need to do far return instead of IRET
-    jz      DoIret
-    push    rax
-    mov     rax, rsp          ; save old RSP to rax
-    mov     rsp, [rsp + 20h]
-    push    [rax + 10h]       ; save CS in new location
-    push    [rax + 8h]        ; save EIP in new location
-    push    [rax + 18h]       ; save EFLAGS in new location
-    mov     rax, [rax]        ; restore rax
-    popfq                     ; restore EFLAGS
-    DB      48h               ; prefix to composite "retq" with next "retf"
-    retf                      ; far return
-DoIret:
-    iretq
-
-CommonInterruptEntry ENDP
-
-;-------------------------------------------------------------------------------------
-;  GetTemplateAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-; comments here for definition of address map
-AsmGetTemplateAddressMap   PROC
-    mov     rax, offset AsmIdtVectorBegin
-    mov     qword ptr [rcx], rax
-    mov     qword ptr [rcx + 8h],  (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
-    mov     rax, offset HookAfterStubHeaderBegin
-    mov     qword ptr [rcx + 10h], rax
-    ret
-AsmGetTemplateAddressMap   ENDP
-
-;-------------------------------------------------------------------------------------
-;  AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-;-------------------------------------------------------------------------------------
-AsmVectorNumFixup   PROC
-    mov     rax, rdx
-    mov     [rcx + (@VectorNum - HookAfterStubHeaderBegin)], al
-    ret
-AsmVectorNumFixup   ENDP
-
-END
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
deleted file mode 100644
index ba8993d84b..0000000000
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
+++ /dev/null
@@ -1,387 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   ExceptionHandlerAsm.Asm
-;
-; Abstract:
-;
-;   x64 CPU Exception Handler
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
-;
-; CommonExceptionHandler()
-;
-
-extern ASM_PFX(mErrorCodeFlag)    ; Error code flags for exceptions
-extern ASM_PFX(mDoFarReturnFlag)  ; Do far return flag
-extern ASM_PFX(CommonExceptionHandler)
-
-SECTION .data
-
-DEFAULT REL
-SECTION .text
-
-ALIGN   8
-
-AsmIdtVectorBegin:
-%rep  32
-    db      0x6a        ; push  #VectorNum
-    db      ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
-    push    rax
-    mov     rax, ASM_PFX(CommonInterruptEntry)
-    jmp     rax
-%endrep
-AsmIdtVectorEnd:
-
-HookAfterStubHeaderBegin:
-    db      0x6a        ; push
-@VectorNum:
-    db      0          ; 0 will be fixed
-    push    rax
-    mov     rax, HookAfterStubHeaderEnd
-    jmp     rax
-HookAfterStubHeaderEnd:
-    mov     rax, rsp
-    and     sp,  0xfff0        ; make sure 16-byte aligned for exception context
-    sub     rsp, 0x18           ; reserve room for filling exception data later
-    push    rcx
-    mov     rcx, [rax + 8]
-    bt      [ASM_PFX(mErrorCodeFlag)], ecx
-    jnc     .0
-    push    qword [rsp]             ; push additional rcx to make stack alignment
-.0:
-    xchg    rcx, [rsp]        ; restore rcx, save Exception Number in stack
-    push    qword [rax]             ; push rax into stack to keep code consistence
-
-;---------------------------------------;
-; CommonInterruptEntry                  ;
-;---------------------------------------;
-; The follow algorithm is used for the common interrupt routine.
-; Entry from each interrupt with a push eax and eax=interrupt number
-; Stack frame would be as follows as specified in IA32 manuals:
-;
-; +---------------------+ <-- 16-byte aligned ensured by processor
-; +    Old SS           +
-; +---------------------+
-; +    Old RSP          +
-; +---------------------+
-; +    RFlags           +
-; +---------------------+
-; +    CS               +
-; +---------------------+
-; +    RIP              +
-; +---------------------+
-; +    Error Code       +
-; +---------------------+
-; +   Vector Number     +
-; +---------------------+
-; +    RBP              +
-; +---------------------+ <-- RBP, 16-byte aligned
-; The follow algorithm is used for the common interrupt routine.
-global ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
-    cli
-    pop     rax
-    ;
-    ; All interrupt handlers are invoked through interrupt gates, so
-    ; IF flag automatically cleared at the entry point
-    ;
-    xchg    rcx, [rsp]      ; Save rcx into stack and save vector number into rcx
-    and     rcx, 0xFF
-    cmp     ecx, 32         ; Intel reserved vector for exceptions?
-    jae     NoErrorCode
-    bt      [ASM_PFX(mErrorCodeFlag)], ecx
-    jc      HasErrorCode
-
-NoErrorCode:
-
-    ;
-    ; Push a dummy error code on the stack
-    ; to maintain coherent stack map
-    ;
-    push    qword [rsp]
-    mov     qword [rsp + 8], 0
-HasErrorCode:
-    push    rbp
-    mov     rbp, rsp
-    push    0             ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    push    0             ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-    ;
-    ; Stack:
-    ; +---------------------+ <-- 16-byte aligned ensured by processor
-    ; +    Old SS           +
-    ; +---------------------+
-    ; +    Old RSP          +
-    ; +---------------------+
-    ; +    RFlags           +
-    ; +---------------------+
-    ; +    CS               +
-    ; +---------------------+
-    ; +    RIP              +
-    ; +---------------------+
-    ; +    Error Code       +
-    ; +---------------------+
-    ; + RCX / Vector Number +
-    ; +---------------------+
-    ; +    RBP              +
-    ; +---------------------+ <-- RBP, 16-byte aligned
-    ;
-
-    ;
-    ; Since here the stack pointer is 16-byte aligned, so
-    ; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
-    ; is 16-byte aligned
-    ;
-
-;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;
-    push r15
-    push r14
-    push r13
-    push r12
-    push r11
-    push r10
-    push r9
-    push r8
-    push rax
-    push qword [rbp + 8]   ; RCX
-    push rdx
-    push rbx
-    push qword [rbp + 48]  ; RSP
-    push qword [rbp]       ; RBP
-    push rsi
-    push rdi
-
-;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;  insure high 16 bits of each is zero
-    movzx   rax, word [rbp + 56]
-    push    rax                      ; for ss
-    movzx   rax, word [rbp + 32]
-    push    rax                      ; for cs
-    mov     rax, ds
-    push    rax
-    mov     rax, es
-    push    rax
-    mov     rax, fs
-    push    rax
-    mov     rax, gs
-    push    rax
-
-    mov     [rbp + 8], rcx               ; save vector number
-
-;; UINT64  Rip;
-    push    qword [rbp + 24]
-
-;; UINT64  Gdtr[2], Idtr[2];
-    xor     rax, rax
-    push    rax
-    push    rax
-    sidt    [rsp]
-    xchg    rax, [rsp + 2]
-    xchg    rax, [rsp]
-    xchg    rax, [rsp + 8]
-
-    xor     rax, rax
-    push    rax
-    push    rax
-    sgdt    [rsp]
-    xchg    rax, [rsp + 2]
-    xchg    rax, [rsp]
-    xchg    rax, [rsp + 8]
-
-;; UINT64  Ldtr, Tr;
-    xor     rax, rax
-    str     ax
-    push    rax
-    sldt    ax
-    push    rax
-
-;; UINT64  RFlags;
-    push    qword [rbp + 40]
-
-;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
-    mov     rax, cr8
-    push    rax
-    mov     rax, cr4
-    or      rax, 0x208
-    mov     cr4, rax
-    push    rax
-    mov     rax, cr3
-    push    rax
-    mov     rax, cr2
-    push    rax
-    xor     rax, rax
-    push    rax
-    mov     rax, cr0
-    push    rax
-
-;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-    mov     rax, dr7
-    push    rax
-    mov     rax, dr6
-    push    rax
-    mov     rax, dr3
-    push    rax
-    mov     rax, dr2
-    push    rax
-    mov     rax, dr1
-    push    rax
-    mov     rax, dr0
-    push    rax
-
-;; FX_SAVE_STATE_X64 FxSaveState;
-    sub rsp, 512
-    mov rdi, rsp
-    db 0xf, 0xae, 0x7 ;fxsave [rdi]
-
-;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
-    cld
-
-;; UINT32  ExceptionData;
-    push    qword [rbp + 16]
-
-;; Prepare parameter and call
-    mov     rcx, [rbp + 8]
-    mov     rdx, rsp
-    ;
-    ; Per X64 calling convention, allocate maximum parameter stack space
-    ; and make sure RSP is 16-byte aligned
-    ;
-    sub     rsp, 4 * 8 + 8
-    mov     rax, ASM_PFX(CommonExceptionHandler)
-    call    rax
-    add     rsp, 4 * 8 + 8
-
-    cli
-;; UINT64  ExceptionData;
-    add     rsp, 8
-
-;; FX_SAVE_STATE_X64 FxSaveState;
-
-    mov rsi, rsp
-    db 0xf, 0xae, 0xE ; fxrstor [rsi]
-    add rsp, 512
-
-;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-;; Skip restoration of DRx registers to support in-circuit emualators
-;; or debuggers set breakpoint in interrupt/exception context
-    add     rsp, 8 * 6
-
-;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
-    pop     rax
-    mov     cr0, rax
-    add     rsp, 8   ; not for Cr1
-    pop     rax
-    mov     cr2, rax
-    pop     rax
-    mov     cr3, rax
-    pop     rax
-    mov     cr4, rax
-    pop     rax
-    mov     cr8, rax
-
-;; UINT64  RFlags;
-    pop     qword [rbp + 40]
-
-;; UINT64  Ldtr, Tr;
-;; UINT64  Gdtr[2], Idtr[2];
-;; Best not let anyone mess with these particular registers...
-    add     rsp, 48
-
-;; UINT64  Rip;
-    pop     qword [rbp + 24]
-
-;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;
-    pop     rax
-    ; mov     gs, rax ; not for gs
-    pop     rax
-    ; mov     fs, rax ; not for fs
-    ; (X64 will not use fs and gs, so we do not restore it)
-    pop     rax
-    mov     es, rax
-    pop     rax
-    mov     ds, rax
-    pop     qword [rbp + 32]  ; for cs
-    pop     qword [rbp + 56]  ; for ss
-
-;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;
-    pop     rdi
-    pop     rsi
-    add     rsp, 8               ; not for rbp
-    pop     qword [rbp + 48] ; for rsp
-    pop     rbx
-    pop     rdx
-    pop     rcx
-    pop     rax
-    pop     r8
-    pop     r9
-    pop     r10
-    pop     r11
-    pop     r12
-    pop     r13
-    pop     r14
-    pop     r15
-
-    mov     rsp, rbp
-    pop     rbp
-    add     rsp, 16
-    cmp     qword [rsp - 32], 0  ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
-    jz      DoReturn
-    cmp     qword [rsp - 40], 1  ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-    jz      ErrorCode
-    jmp     qword [rsp - 32]
-ErrorCode:
-    sub     rsp, 8
-    jmp     qword [rsp - 24]
-
-DoReturn:
-    cmp     qword [ASM_PFX(mDoFarReturnFlag)], 0   ; Check if need to do far return instead of IRET
-    jz      DoIret
-    push    rax
-    mov     rax, rsp          ; save old RSP to rax
-    mov     rsp, [rsp + 0x20]
-    push    qword [rax + 0x10]       ; save CS in new location
-    push    qword [rax + 0x8]        ; save EIP in new location
-    push    qword [rax + 0x18]       ; save EFLAGS in new location
-    mov     rax, [rax]        ; restore rax
-    popfq                     ; restore EFLAGS
-    DB      0x48               ; prefix to composite "retq" with next "retf"
-    retf                      ; far return
-DoIret:
-    iretq
-
-;-------------------------------------------------------------------------------------
-;  GetTemplateAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-; comments here for definition of address map
-global ASM_PFX(AsmGetTemplateAddressMap)
-ASM_PFX(AsmGetTemplateAddressMap):
-    mov     rax, AsmIdtVectorBegin
-    mov     qword [rcx], rax
-    mov     qword [rcx + 0x8],  (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
-    mov     rax, HookAfterStubHeaderBegin
-    mov     qword [rcx + 0x10], rax
-    ret
-
-;-------------------------------------------------------------------------------------
-;  AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmVectorNumFixup)
-ASM_PFX(AsmVectorNumFixup):
-    mov     rax, rdx
-    mov     [rcx + (@VectorNum - HookAfterStubHeaderBegin)], al
-    ret
-
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
deleted file mode 100644
index 9751ba1f0d..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ /dev/null
@@ -1,75 +0,0 @@
-## @file
-#  MP Initialize Library instance for DXE driver.
-#
-#  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = DxeMpInitLib
-  MODULE_UNI_FILE                = DxeMpInitLib.uni
-  FILE_GUID                      = B88F7146-9834-4c55-BFAC-481CC0C33736
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = MpInitLib|DXE_DRIVER
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.IA32]
-  Ia32/MpEqu.inc
-  Ia32/MpFuncs.nasm
-
-[Sources.X64]
-  X64/MpEqu.inc
-  X64/MpFuncs.nasm
-
-[Sources.common]
-  DxeMpLib.c
-  MpLib.c
-  MpLib.h
-  Microcode.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  LocalApicLib
-  MemoryAllocationLib
-  HobLib
-  MtrrLib
-  CpuLib
-  UefiCpuLib
-  UefiBootServicesTableLib
-  DebugAgentLib
-
-[Protocols]
-  gEfiTimerArchProtocolGuid                     ## SOMETIMES_CONSUMES
-
-[Guids]
-  gEfiEventExitBootServicesGuid                 ## CONSUMES  ## Event
-  gEfiEventLegacyBootGuid                       ## CONSUMES  ## Event
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber        ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds      ## SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize                      ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress            ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize         ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode                       ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate                   ## SOMETIMES_CONSUMES
-
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.uni b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.uni
deleted file mode 100644
index 99d79974be..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// MP Initialize Library instance for DXE driver.
-//
-// MP Initialize Library instance for DXE driver.
-//
-// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "MP Initialize Library instance for DXE driver."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "MP Initialize Library instance for DXE driver."
-
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
deleted file mode 100644
index b393244e05..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
+++ /dev/null
@@ -1,743 +0,0 @@
-/** @file
-  MP initialize support functions for DXE phase.
-
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "MpLib.h"
-
-#include <Library/UefiLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/DebugAgentLib.h>
-
-#include <Protocol/Timer.h>
-
-#define  AP_CHECK_INTERVAL     (EFI_TIMER_PERIOD_MILLISECONDS (100))
-#define  AP_SAFE_STACK_SIZE    128
-
-CPU_MP_DATA      *mCpuMpData = NULL;
-EFI_EVENT        mCheckAllApsEvent = NULL;
-EFI_EVENT        mMpInitExitBootServicesEvent = NULL;
-EFI_EVENT        mLegacyBootEvent = NULL;
-volatile BOOLEAN mStopCheckAllApsStatus = TRUE;
-VOID             *mReservedApLoopFunc = NULL;
-UINTN            mReservedTopOfApStack;
-volatile UINT32  mNumberToFinish = 0;
-
-/**
-  Enable Debug Agent to support source debugging on AP function.
-
-**/
-VOID
-EnableDebugAgent (
-  VOID
-  )
-{
-  //
-  // Initialize Debug Agent to support source level debug in DXE phase
-  //
-  InitializeDebugAgent (DEBUG_AGENT_INIT_DXE_AP, NULL, NULL);
-}
-
-/**
-  Get the pointer to CPU MP Data structure.
-
-  @return  The pointer to CPU MP Data structure.
-**/
-CPU_MP_DATA *
-GetCpuMpData (
-  VOID
-  )
-{
-  ASSERT (mCpuMpData != NULL);
-  return mCpuMpData;
-}
-
-/**
-  Save the pointer to CPU MP Data structure.
-
-  @param[in] CpuMpData  The pointer to CPU MP Data structure will be saved.
-**/
-VOID
-SaveCpuMpData (
-  IN CPU_MP_DATA   *CpuMpData
-  )
-{
-  mCpuMpData = CpuMpData;
-}
-
-/**
-  Allocate reset vector buffer.
-
-  @param[in, out]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-AllocateResetVector (
-  IN OUT CPU_MP_DATA          *CpuMpData
-  )
-{
-  EFI_STATUS            Status;
-  UINTN                 ApResetVectorSize;
-  EFI_PHYSICAL_ADDRESS  StartAddress;
-
-  if (CpuMpData->SaveRestoreFlag) {
-    BackupAndPrepareWakeupBuffer (CpuMpData);
-  } else {
-    ApResetVectorSize = CpuMpData->AddressMap.RendezvousFunnelSize +
-                        sizeof (MP_CPU_EXCHANGE_INFO);
-
-    StartAddress = BASE_1MB;
-    Status = gBS->AllocatePages (
-                    AllocateMaxAddress,
-                    EfiACPIMemoryNVS,
-                    EFI_SIZE_TO_PAGES (ApResetVectorSize),
-                    &StartAddress
-                    );
-    ASSERT_EFI_ERROR (Status);
-
-    CpuMpData->WakeupBuffer      = (UINTN) StartAddress;
-    CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN)
-                  (CpuMpData->WakeupBuffer + CpuMpData->AddressMap.RendezvousFunnelSize);
-    //
-    // copy AP reset code in it
-    //
-    CopyMem (
-      (VOID *) CpuMpData->WakeupBuffer,
-      (VOID *) CpuMpData->AddressMap.RendezvousFunnelAddress,
-      CpuMpData->AddressMap.RendezvousFunnelSize
-      );
-  }
-}
-
-/**
-  Free AP reset vector buffer.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-FreeResetVector (
-  IN CPU_MP_DATA              *CpuMpData
-  )
-{
-  EFI_STATUS            Status;
-  UINTN                 ApResetVectorSize;
-
-  if (CpuMpData->SaveRestoreFlag) {
-    RestoreWakeupBuffer (CpuMpData);
-  } else {
-    ApResetVectorSize = CpuMpData->AddressMap.RendezvousFunnelSize +
-                        sizeof (MP_CPU_EXCHANGE_INFO);
-    Status = gBS->FreePages(
-               (EFI_PHYSICAL_ADDRESS)CpuMpData->WakeupBuffer,
-               EFI_SIZE_TO_PAGES (ApResetVectorSize)
-               );
-    ASSERT_EFI_ERROR (Status);
-  }
-}
-
-/**
-  Checks APs status and updates APs status if needed.
-
-**/
-VOID
-CheckAndUpdateApsStatus (
-  VOID
-  )
-{
-  UINTN                   ProcessorNumber;
-  EFI_STATUS              Status;
-  CPU_MP_DATA             *CpuMpData;
-
-  CpuMpData = GetCpuMpData ();
-
-  //
-  // First, check whether pending StartupAllAPs() exists.
-  //
-  if (CpuMpData->WaitEvent != NULL) {
-
-    Status = CheckAllAPs ();
-    //
-    // If all APs finish for StartupAllAPs(), signal the WaitEvent for it.
-    //
-    if (Status != EFI_NOT_READY) {
-      Status = gBS->SignalEvent (CpuMpData->WaitEvent);
-      CpuMpData->WaitEvent = NULL;
-    }
-  }
-
-  //
-  // Second, check whether pending StartupThisAPs() callings exist.
-  //
-  for (ProcessorNumber = 0; ProcessorNumber < CpuMpData->CpuCount; ProcessorNumber++) {
-
-    if (CpuMpData->CpuData[ProcessorNumber].WaitEvent == NULL) {
-      continue;
-    }
-
-    Status = CheckThisAP (ProcessorNumber);
-
-    if (Status != EFI_NOT_READY) {
-      gBS->SignalEvent (CpuMpData->CpuData[ProcessorNumber].WaitEvent);
-     CpuMpData->CpuData[ProcessorNumber].WaitEvent = NULL;
-    }
-  }
-}
-
-/**
-  Checks APs' status periodically.
-
-  This function is triggered by timer periodically to check the
-  state of APs for StartupAllAPs() and StartupThisAP() executed
-  in non-blocking mode.
-
-  @param[in]  Event    Event triggered.
-  @param[in]  Context  Parameter passed with the event.
-
-**/
-VOID
-EFIAPI
-CheckApsStatus (
-  IN  EFI_EVENT                           Event,
-  IN  VOID                                *Context
-  )
-{
-  //
-  // If CheckApsStatus() is not stopped, otherwise return immediately.
-  //
-  if (!mStopCheckAllApsStatus) {
-    CheckAndUpdateApsStatus ();
-  }
-}
-
-/**
-  Get Protected mode code segment from current GDT table.
-
-  @return  Protected mode code segment value.
-**/
-UINT16
-GetProtectedModeCS (
-  VOID
-  )
-{
-  IA32_DESCRIPTOR          GdtrDesc;
-  IA32_SEGMENT_DESCRIPTOR  *GdtEntry;
-  UINTN                    GdtEntryCount;
-  UINT16                   Index;
-
-  Index = (UINT16) -1;
-  AsmReadGdtr (&GdtrDesc);
-  GdtEntryCount = (GdtrDesc.Limit + 1) / sizeof (IA32_SEGMENT_DESCRIPTOR);
-  GdtEntry = (IA32_SEGMENT_DESCRIPTOR *) GdtrDesc.Base;
-  for (Index = 0; Index < GdtEntryCount; Index++) {
-    if (GdtEntry->Bits.L == 0) {
-      if (GdtEntry->Bits.Type > 8 && GdtEntry->Bits.L == 0) {
-        break;
-      }
-    }
-    GdtEntry++;
-  }
-  ASSERT (Index != -1);
-  return Index * 8;
-}
-
-/**
-  Do sync on APs.
-
-  @param[in, out] Buffer  Pointer to private data buffer.
-**/
-VOID
-EFIAPI
-RelocateApLoop (
-  IN OUT VOID  *Buffer
-  )
-{
-  CPU_MP_DATA            *CpuMpData;
-  BOOLEAN                MwaitSupport;
-  ASM_RELOCATE_AP_LOOP   AsmRelocateApLoopFunc;
-  UINTN                  ProcessorNumber;
-
-  MpInitLibWhoAmI (&ProcessorNumber); 
-  CpuMpData    = GetCpuMpData ();
-  MwaitSupport = IsMwaitSupport ();
-  AsmRelocateApLoopFunc = (ASM_RELOCATE_AP_LOOP) (UINTN) mReservedApLoopFunc;
-  AsmRelocateApLoopFunc (
-    MwaitSupport,
-    CpuMpData->ApTargetCState,
-    CpuMpData->PmCodeSegment,
-    mReservedTopOfApStack - ProcessorNumber * AP_SAFE_STACK_SIZE,
-    (UINTN) &mNumberToFinish
-    );
-  //
-  // It should never reach here
-  //
-  ASSERT (FALSE);
-}
-
-/**
-  Callback function for ExitBootServices.
-
-  @param[in]  Event             Event whose notification function is being invoked.
-  @param[in]  Context           The pointer to the notification function's context,
-                                which is implementation-dependent.
-
-**/
-VOID
-EFIAPI
-MpInitChangeApLoopCallback (
-  IN EFI_EVENT                Event,
-  IN VOID                     *Context
-  )
-{
-  CPU_MP_DATA               *CpuMpData;
-
-  CpuMpData = GetCpuMpData ();
-  CpuMpData->SaveRestoreFlag = TRUE;
-  CpuMpData->PmCodeSegment = GetProtectedModeCS ();
-  CpuMpData->ApLoopMode = PcdGet8 (PcdCpuApLoopMode);
-  mNumberToFinish = CpuMpData->CpuCount - 1;
-  WakeUpAP (CpuMpData, TRUE, 0, RelocateApLoop, NULL);
-  while (mNumberToFinish > 0) {
-    CpuPause ();
-  }
-  DEBUG ((DEBUG_INFO, "%a() done!\n", __FUNCTION__));
-}
-
-/**
-  Initialize global data for MP support.
-
-  @param[in] CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-InitMpGlobalData (
-  IN CPU_MP_DATA               *CpuMpData
-  )
-{
-  EFI_STATUS                 Status;
-  EFI_PHYSICAL_ADDRESS       Address;
-  UINTN                      ApSafeBufferSize;
-
-  SaveCpuMpData (CpuMpData);
-
-  if (CpuMpData->CpuCount == 1) {
-    //
-    // If only BSP exists, return
-    //
-    return;
-  }
-
-  //
-  // Avoid APs access invalid buffer data which allocated by BootServices,
-  // so we will allocate reserved data for AP loop code. We also need to
-  // allocate this buffer below 4GB due to APs may be transferred to 32bit
-  // protected mode on long mode DXE.
-  // Allocating it in advance since memory services are not available in
-  // Exit Boot Services callback function.
-  //
-  ApSafeBufferSize  = CpuMpData->AddressMap.RelocateApLoopFuncSize;
-  ApSafeBufferSize += CpuMpData->CpuCount * AP_SAFE_STACK_SIZE;
-
-  Address = BASE_4GB - 1;
-  Status  = gBS->AllocatePages (
-                   AllocateMaxAddress,
-                   EfiReservedMemoryType,
-                   EFI_SIZE_TO_PAGES (ApSafeBufferSize),
-                   &Address
-                   );
-  ASSERT_EFI_ERROR (Status);
-  mReservedApLoopFunc = (VOID *) (UINTN) Address;
-  ASSERT (mReservedApLoopFunc != NULL);
-  mReservedTopOfApStack = (UINTN) Address + EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (ApSafeBufferSize));
-  ASSERT ((mReservedTopOfApStack & (UINTN)(CPU_STACK_ALIGNMENT - 1)) == 0);
-  CopyMem (
-    mReservedApLoopFunc,
-    CpuMpData->AddressMap.RelocateApLoopFuncAddress,
-    CpuMpData->AddressMap.RelocateApLoopFuncSize
-    );
-
-  Status = gBS->CreateEvent (
-                  EVT_TIMER | EVT_NOTIFY_SIGNAL,
-                  TPL_NOTIFY,
-                  CheckApsStatus,
-                  NULL,
-                  &mCheckAllApsEvent
-                  );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Set timer to check all APs status.
-  //
-  Status = gBS->SetTimer (
-                  mCheckAllApsEvent,
-                  TimerPeriodic,
-                  AP_CHECK_INTERVAL
-                  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = gBS->CreateEvent (
-                  EVT_SIGNAL_EXIT_BOOT_SERVICES,
-                  TPL_CALLBACK,
-                  MpInitChangeApLoopCallback,
-                  NULL,
-                  &mMpInitExitBootServicesEvent
-                  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = gBS->CreateEventEx (
-                  EVT_NOTIFY_SIGNAL,
-                  TPL_CALLBACK,
-                  MpInitChangeApLoopCallback,
-                  NULL,
-                  &gEfiEventLegacyBootGuid,
-                  &mLegacyBootEvent
-                  );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  This service executes a caller provided function on all enabled APs.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system. See type
-                                      EFI_AP_PROCEDURE.
-  @param[in]  SingleThread            If TRUE, then all the enabled APs execute
-                                      the function specified by Procedure one by
-                                      one, in ascending order of processor handle
-                                      number.  If FALSE, then all the enabled APs
-                                      execute the function specified by Procedure
-                                      simultaneously.
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.  If it is NULL, then execute in
-                                      blocking mode. BSP waits until all APs finish
-                                      or TimeoutInMicroSeconds expires.  If it's
-                                      not NULL, then execute in non-blocking mode.
-                                      BSP requests the function specified by
-                                      Procedure to be started on all the enabled
-                                      APs, and go on executing immediately. If
-                                      all return from Procedure, or TimeoutInMicroSeconds
-                                      expires, this event is signaled. The BSP
-                                      can use the CheckEvent() or WaitForEvent()
-                                      services to check the state of event.  Type
-                                      EFI_EVENT is defined in CreateEvent() in
-                                      the Unified Extensible Firmware Interface
-                                      Specification.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      APs to return from Procedure, either for
-                                      blocking or non-blocking mode. Zero means
-                                      infinity.  If the timeout expires before
-                                      all APs return from Procedure, then Procedure
-                                      on the failed APs is terminated. All enabled
-                                      APs are available for next function assigned
-                                      by MpInitLibStartupAllAPs() or
-                                      MPInitLibStartupThisAP().
-                                      If the timeout expires in blocking mode,
-                                      BSP returns EFI_TIMEOUT.  If the timeout
-                                      expires in non-blocking mode, WaitEvent
-                                      is signaled with SignalEvent().
-  @param[in]  ProcedureArgument       The parameter passed into Procedure for
-                                      all APs.
-  @param[out] FailedCpuList           If NULL, this parameter is ignored. Otherwise,
-                                      if all APs finish successfully, then its
-                                      content is set to NULL. If not all APs
-                                      finish before timeout expires, then its
-                                      content is set to address of the buffer
-                                      holding handle numbers of the failed APs.
-                                      The buffer is allocated by MP Initialization
-                                      library, and it's the caller's responsibility to
-                                      free the buffer with FreePool() service.
-                                      In blocking mode, it is ready for consumption
-                                      when the call returns. In non-blocking mode,
-                                      it is ready when WaitEvent is signaled.  The
-                                      list of failed CPU is terminated by
-                                      END_OF_CPU_LIST.
-
-  @retval EFI_SUCCESS             In blocking mode, all APs have finished before
-                                  the timeout expired.
-  @retval EFI_SUCCESS             In non-blocking mode, function has been dispatched
-                                  to all enabled APs.
-  @retval EFI_UNSUPPORTED         A non-blocking mode request was made after the
-                                  UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
-                                  signaled.
-  @retval EFI_UNSUPPORTED         WaitEvent is not NULL if non-blocking mode is not
-                                  supported.
-  @retval EFI_DEVICE_ERROR        Caller processor is AP.
-  @retval EFI_NOT_STARTED         No enabled APs exist in the system.
-  @retval EFI_NOT_READY           Any enabled APs are busy.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-  @retval EFI_TIMEOUT             In blocking mode, the timeout expired before
-                                  all enabled APs have finished.
-  @retval EFI_INVALID_PARAMETER   Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibStartupAllAPs (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  BOOLEAN                   SingleThread,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT UINTN                     **FailedCpuList         OPTIONAL
-  )
-{
-  EFI_STATUS              Status;
-
-  //
-  // Temporarily stop checkAllApsStatus for avoid resource dead-lock.
-  //
-  mStopCheckAllApsStatus = TRUE;
-
-  Status = StartupAllAPsWorker (
-             Procedure,
-             SingleThread,
-             WaitEvent,
-             TimeoutInMicroseconds,
-             ProcedureArgument,
-             FailedCpuList
-             );
-
-  //
-  // Start checkAllApsStatus
-  //
-  mStopCheckAllApsStatus = FALSE;
-
-  return Status;
-}
-
-/**
-  This service lets the caller get one enabled AP to execute a caller-provided
-  function.
-
-  @param[in]  Procedure               A pointer to the function to be run on the
-                                      designated AP of the system. See type
-                                      EFI_AP_PROCEDURE.
-  @param[in]  ProcessorNumber         The handle number of the AP. The range is
-                                      from 0 to the total number of logical
-                                      processors minus 1. The total number of
-                                      logical processors can be retrieved by
-                                      MpInitLibGetNumberOfProcessors().
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.  If it is NULL, then execute in
-                                      blocking mode. BSP waits until this AP finish
-                                      or TimeoutInMicroSeconds expires.  If it's
-                                      not NULL, then execute in non-blocking mode.
-                                      BSP requests the function specified by
-                                      Procedure to be started on this AP,
-                                      and go on executing immediately. If this AP
-                                      return from Procedure or TimeoutInMicroSeconds
-                                      expires, this event is signaled. The BSP
-                                      can use the CheckEvent() or WaitForEvent()
-                                      services to check the state of event.  Type
-                                      EFI_EVENT is defined in CreateEvent() in
-                                      the Unified Extensible Firmware Interface
-                                      Specification.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      this AP to finish this Procedure, either for
-                                      blocking or non-blocking mode. Zero means
-                                      infinity.  If the timeout expires before
-                                      this AP returns from Procedure, then Procedure
-                                      on the AP is terminated. The
-                                      AP is available for next function assigned
-                                      by MpInitLibStartupAllAPs() or
-                                      MpInitLibStartupThisAP().
-                                      If the timeout expires in blocking mode,
-                                      BSP returns EFI_TIMEOUT.  If the timeout
-                                      expires in non-blocking mode, WaitEvent
-                                      is signaled with SignalEvent().
-  @param[in]  ProcedureArgument       The parameter passed into Procedure on the
-                                      specified AP.
-  @param[out] Finished                If NULL, this parameter is ignored.  In
-                                      blocking mode, this parameter is ignored.
-                                      In non-blocking mode, if AP returns from
-                                      Procedure before the timeout expires, its
-                                      content is set to TRUE. Otherwise, the
-                                      value is set to FALSE. The caller can
-                                      determine if the AP returned from Procedure
-                                      by evaluating this value.
-
-  @retval EFI_SUCCESS             In blocking mode, specified AP finished before
-                                  the timeout expires.
-  @retval EFI_SUCCESS             In non-blocking mode, the function has been
-                                  dispatched to specified AP.
-  @retval EFI_UNSUPPORTED         A non-blocking mode request was made after the
-                                  UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
-                                  signaled.
-  @retval EFI_UNSUPPORTED         WaitEvent is not NULL if non-blocking mode is not
-                                  supported.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_TIMEOUT             In blocking mode, the timeout expired before
-                                  the specified AP has finished.
-  @retval EFI_NOT_READY           The specified AP is busy.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-  @retval EFI_NOT_FOUND           The processor with the handle specified by
-                                  ProcessorNumber does not exist.
-  @retval EFI_INVALID_PARAMETER   ProcessorNumber specifies the BSP or disabled AP.
-  @retval EFI_INVALID_PARAMETER   Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibStartupThisAP (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  UINTN                     ProcessorNumber,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT BOOLEAN                   *Finished               OPTIONAL
-  )
-{
-  EFI_STATUS              Status;
-
-  //
-  // temporarily stop checkAllApsStatus for avoid resource dead-lock.
-  //
-  mStopCheckAllApsStatus = TRUE;
-
-  Status = StartupThisAPWorker (
-             Procedure,
-             ProcessorNumber,
-             WaitEvent,
-             TimeoutInMicroseconds,
-             ProcedureArgument,
-             Finished
-             );
-
-  mStopCheckAllApsStatus = FALSE;
-
-  return Status;
-}
-
-/**
-  This service switches the requested AP to be the BSP from that point onward.
-  This service changes the BSP for all purposes. This call can only be performed
-  by the current BSP.
-
-  @param[in] ProcessorNumber   The handle number of AP that is to become the new
-                               BSP. The range is from 0 to the total number of
-                               logical processors minus 1. The total number of
-                               logical processors can be retrieved by
-                               MpInitLibGetNumberOfProcessors().
-  @param[in] EnableOldBSP      If TRUE, then the old BSP will be listed as an
-                               enabled AP. Otherwise, it will be disabled.
-
-  @retval EFI_SUCCESS             BSP successfully switched.
-  @retval EFI_UNSUPPORTED         Switching the BSP cannot be completed prior to
-                                  this service returning.
-  @retval EFI_UNSUPPORTED         Switching the BSP is not supported.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_NOT_FOUND           The processor with the handle specified by
-                                  ProcessorNumber does not exist.
-  @retval EFI_INVALID_PARAMETER   ProcessorNumber specifies the current BSP or
-                                  a disabled AP.
-  @retval EFI_NOT_READY           The specified AP is busy.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibSwitchBSP (
-  IN UINTN                     ProcessorNumber,
-  IN BOOLEAN                   EnableOldBSP
-  )
-{
-  EFI_STATUS                   Status;
-  EFI_TIMER_ARCH_PROTOCOL      *Timer;
-  UINT64                       TimerPeriod;
-
-  TimerPeriod = 0;
-  //
-  // Locate Timer Arch Protocol
-  //
-  Status = gBS->LocateProtocol (&gEfiTimerArchProtocolGuid, NULL, (VOID **) &Timer);
-  if (EFI_ERROR (Status)) {
-    Timer = NULL;
-  }
-
-  if (Timer != NULL) {
-    //
-    // Save current rate of DXE Timer
-    //
-    Timer->GetTimerPeriod (Timer, &TimerPeriod);
-    //
-    // Disable DXE Timer and drain pending interrupts
-    //
-    Timer->SetTimerPeriod (Timer, 0);
-  }
-
-  Status = SwitchBSPWorker (ProcessorNumber, EnableOldBSP);
-
-  if (Timer != NULL) {
-    //
-    // Enable and restore rate of DXE Timer
-    //
-    Timer->SetTimerPeriod (Timer, TimerPeriod);
-  }
-
-  return Status;
-}
-
-/**
-  This service lets the caller enable or disable an AP from this point onward.
-  This service may only be called from the BSP.
-
-  @param[in] ProcessorNumber   The handle number of AP.
-                               The range is from 0 to the total number of
-                               logical processors minus 1. The total number of
-                               logical processors can be retrieved by
-                               MpInitLibGetNumberOfProcessors().
-  @param[in] EnableAP          Specifies the new state for the processor for
-                               enabled, FALSE for disabled.
-  @param[in] HealthFlag        If not NULL, a pointer to a value that specifies
-                               the new health status of the AP. This flag
-                               corresponds to StatusFlag defined in
-                               EFI_MP_SERVICES_PROTOCOL.GetProcessorInfo(). Only
-                               the PROCESSOR_HEALTH_STATUS_BIT is used. All other
-                               bits are ignored.  If it is NULL, this parameter
-                               is ignored.
-
-  @retval EFI_SUCCESS             The specified AP was enabled or disabled successfully.
-  @retval EFI_UNSUPPORTED         Enabling or disabling an AP cannot be completed
-                                  prior to this service returning.
-  @retval EFI_UNSUPPORTED         Enabling or disabling an AP is not supported.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_NOT_FOUND           Processor with the handle specified by ProcessorNumber
-                                  does not exist.
-  @retval EFI_INVALID_PARAMETER   ProcessorNumber specifies the BSP.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibEnableDisableAP (
-  IN  UINTN                     ProcessorNumber,
-  IN  BOOLEAN                   EnableAP,
-  IN  UINT32                    *HealthFlag OPTIONAL
-  )
-{
-  EFI_STATUS     Status;
-  BOOLEAN        TempStopCheckState;
-
-  TempStopCheckState = FALSE;
-  //
-  // temporarily stop checkAllAPsStatus for initialize parameters.
-  //
-  if (!mStopCheckAllApsStatus) {
-    mStopCheckAllApsStatus = TRUE;
-    TempStopCheckState     = TRUE;
-  }
-
-  Status = EnableDisableApWorker (ProcessorNumber, EnableAP, HealthFlag);
-
-  if (TempStopCheckState) {
-    mStopCheckAllApsStatus = FALSE;
-  }
-
-  return Status;
-}
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
deleted file mode 100644
index 62762308e2..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
+++ /dev/null
@@ -1,43 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   MpEqu.inc
-;
-; Abstract:
-;
-;   This is the equates file for Multiple Processor support
-;
-;-------------------------------------------------------------------------------
-
-VacantFlag                    equ        00h
-NotVacantFlag                 equ        0ffh
-
-CPU_SWITCH_STATE_IDLE         equ        0
-CPU_SWITCH_STATE_STORED       equ        1
-CPU_SWITCH_STATE_LOADED       equ        2
-
-LockLocation                  equ        (RendezvousFunnelProcEnd - RendezvousFunnelProcStart)
-StackStartAddressLocation     equ        LockLocation + 04h
-StackSizeLocation             equ        LockLocation + 08h
-ApProcedureLocation           equ        LockLocation + 0Ch
-GdtrLocation                  equ        LockLocation + 10h
-IdtrLocation                  equ        LockLocation + 16h
-BufferStartLocation           equ        LockLocation + 1Ch
-ModeOffsetLocation            equ        LockLocation + 20h
-NumApsExecutingLocation       equ        LockLocation + 24h
-CodeSegmentLocation           equ        LockLocation + 28h
-DataSegmentLocation           equ        LockLocation + 2Ch
-EnableExecuteDisableLocation  equ        LockLocation + 30h
-Cr3Location                   equ        LockLocation + 34h
-InitFlagLocation              equ        LockLocation + 38h
-CpuInfoLocation               equ        LockLocation + 3Ch
-
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
deleted file mode 100644
index 52363e6e08..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ /dev/null
@@ -1,339 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   MpFuncs.nasm
-;
-; Abstract:
-;
-;   This is the assembly code for MP support
-;
-;-------------------------------------------------------------------------------
-
-%include "MpEqu.inc"
-extern ASM_PFX(InitializeFloatingPointUnits)
-
-SECTION .text
-
-;-------------------------------------------------------------------------------------
-;RendezvousFunnelProc  procedure follows. All APs execute their procedure. This
-;procedure serializes all the AP processors through an Init sequence. It must be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------------------
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
-RendezvousFunnelProcStart:
-; At this point CS = 0x(vv00) and ip= 0x0.
-BITS 16
-    mov        ebp, eax                        ; save BIST information
-
-    mov        ax, cs
-    mov        ds, ax
-    mov        es, ax
-    mov        ss, ax
-    xor        ax, ax
-    mov        fs, ax
-    mov        gs, ax
-
-    mov        si,  BufferStartLocation
-    mov        ebx, [si]
-
-    mov        si,  ModeOffsetLocation
-    mov        eax, [si]
-    mov        si,  CodeSegmentLocation
-    mov        edx, [si]
-    mov        di,  ax
-    sub        di,  02h
-    mov        [di], dx
-    sub        di,  04h
-    add        eax, ebx
-    mov        [di],eax
-
-    mov        si,  DataSegmentLocation
-    mov        edx, [si]
-
-    mov        si, GdtrLocation
-o32 lgdt       [cs:si]
-
-    mov        si, IdtrLocation
-o32 lidt       [cs:si]
-
-    xor        ax,  ax
-    mov        ds,  ax
-
-    mov        eax, cr0                        ; Get control register 0
-    or         eax, 000000003h                 ; Set PE bit (bit #0) & MP
-    mov        cr0, eax
-
-    jmp        0:strict dword 0                ; far jump to protected mode
-BITS 32
-Flat32Start:                                   ; protected mode entry point
-    mov        ds, dx
-    mov        es, dx
-    mov        fs, dx
-    mov        gs, dx
-    mov        ss, dx
-
-    mov        esi, ebx
-
-    mov         edi, esi
-    add         edi, EnableExecuteDisableLocation
-    cmp         byte [edi], 0
-    jz          SkipEnableExecuteDisable
-
-    ;
-    ; Enable IA32 PAE execute disable
-    ;
-
-    mov         ecx, 0xc0000080
-    rdmsr
-    bts         eax, 11
-    wrmsr
-
-    mov         edi, esi
-    add         edi, Cr3Location
-    mov         eax, dword [edi]
-    mov         cr3, eax
-
-    mov         eax, cr4
-    bts         eax, 5
-    mov         cr4, eax
-
-    mov         eax, cr0
-    bts         eax, 31
-    mov         cr0, eax
-
-SkipEnableExecuteDisable:
-    mov        edi, esi
-    add        edi, InitFlagLocation
-    cmp        dword [edi], 1       ; 1 == ApInitConfig
-    jnz        GetApicId
-
-    ; AP init
-    mov        edi, esi
-    add        edi, LockLocation
-    mov        eax, NotVacantFlag
-
-TestLock:
-    xchg       [edi], eax
-    cmp        eax, NotVacantFlag
-    jz         TestLock
-
-    mov        ecx, esi
-    add        ecx, NumApsExecutingLocation
-    inc        dword [ecx]
-    mov        ebx, [ecx]
-
-Releaselock:
-    mov        eax, VacantFlag
-    xchg       [edi], eax
-
-    mov        edi, esi
-    add        edi, StackSizeLocation
-    mov        eax, [edi]
-    mov        ecx, ebx
-    inc        ecx
-    mul        ecx                               ; EAX = StackSize * (CpuNumber + 1)
-    mov        edi, esi
-    add        edi, StackStartAddressLocation
-    add        eax, [edi]
-    mov        esp, eax
-    jmp        CProcedureInvoke
-
-GetApicId:
-    mov        eax, 0
-    cpuid
-    cmp        eax, 0bh
-    jb         NoX2Apic             ; CPUID level below CPUID_EXTENDED_TOPOLOGY
-
-    mov        eax, 0bh
-    xor        ecx, ecx
-    cpuid
-    test       ebx, 0ffffh
-    jz         NoX2Apic             ; CPUID.0BH:EBX[15:0] is zero
-
-    ; Processor is x2APIC capable; 32-bit x2APIC ID is already in EDX
-    jmp        GetProcessorNumber
-
-NoX2Apic:
-    ; Processor is not x2APIC capable, so get 8-bit APIC ID
-    mov        eax, 1
-    cpuid
-    shr        ebx, 24
-    mov        edx, ebx
-
-GetProcessorNumber:
-    ;
-    ; Get processor number for this AP
-    ; Note that BSP may become an AP due to SwitchBsp()
-    ;
-    xor         ebx, ebx
-    lea         eax, [esi + CpuInfoLocation]
-    mov         edi, [eax]
-
-GetNextProcNumber:
-    cmp         [edi], edx                       ; APIC ID match?
-    jz          ProgramStack
-    add         edi, 20
-    inc         ebx
-    jmp         GetNextProcNumber    
-
-ProgramStack:
-    mov         esp, [edi + 12]
-   
-CProcedureInvoke:
-    push       ebp               ; push BIST data at top of AP stack
-    xor        ebp, ebp          ; clear ebp for call stack trace
-    push       ebp
-    mov        ebp, esp
-
-    mov        eax, ASM_PFX(InitializeFloatingPointUnits)
-    call       eax               ; Call assembly function to initialize FPU per UEFI spec
-
-    push       ebx               ; Push NumApsExecuting
-    mov        eax, esi
-    add        eax, LockLocation
-    push       eax               ; push address of exchange info data buffer
-
-    mov        edi, esi
-    add        edi, ApProcedureLocation
-    mov        eax, [edi]
-
-    call       eax               ; Invoke C function
-
-    jmp        $                 ; Never reach here
-RendezvousFunnelProcEnd:
-
-;-------------------------------------------------------------------------------------
-;  AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmRelocateApLoop)
-ASM_PFX(AsmRelocateApLoop):
-AsmRelocateApLoopStart:
-    mov        eax, esp
-    mov        esp, [eax + 16]     ; TopOfApStack
-    push       dword [eax]         ; push return address for stack trace
-    push       ebp
-    mov        ebp, esp
-    mov        ebx, [eax + 8]      ; ApTargetCState
-    mov        ecx, [eax + 4]      ; MwaitSupport
-    mov        eax, [eax + 20]     ; CountTofinish
-    lock dec   dword [eax]         ; (*CountTofinish)--
-    cmp        cl,  1              ; Check mwait-monitor support
-    jnz        HltLoop
-MwaitLoop:
-    mov        eax, esp
-    xor        ecx, ecx
-    xor        edx, edx
-    monitor
-    mov        eax, ebx            ; Mwait Cx, Target C-State per eax[7:4]
-    shl        eax, 4
-    mwait
-    jmp        MwaitLoop
-HltLoop:
-    cli
-    hlt
-    jmp        HltLoop
-AsmRelocateApLoopEnd:
-
-;-------------------------------------------------------------------------------------
-;  AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmGetAddressMap)
-ASM_PFX(AsmGetAddressMap):
-    pushad
-    mov        ebp,esp
-
-    mov        ebx,  [ebp + 24h]
-    mov        dword [ebx], RendezvousFunnelProcStart
-    mov        dword [ebx +  4h], Flat32Start - RendezvousFunnelProcStart
-    mov        dword [ebx +  8h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
-    mov        dword [ebx + 0Ch], AsmRelocateApLoopStart
-    mov        dword [ebx + 10h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
-
-    popad
-    ret
-
-;-------------------------------------------------------------------------------------
-;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
-;about to become an AP. It switches it'stack with the current AP.
-;AsmExchangeRole (IN   CPU_EXCHANGE_INFO    *MyInfo, IN   CPU_EXCHANGE_INFO    *OthersInfo);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmExchangeRole)
-ASM_PFX(AsmExchangeRole):
-    ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
-    ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
-    pushad
-    mov        ebp,esp
-
-    ; esi contains MyInfo pointer
-    mov        esi, [ebp + 24h]
-
-    ; edi contains OthersInfo pointer
-    mov        edi, [ebp + 28h]
-
-    ;Store EFLAGS, GDTR and IDTR register to stack
-    pushfd
-    mov        eax, cr4
-    push       eax       ; push cr4 firstly
-    mov        eax, cr0
-    push       eax
-
-    sgdt       [esi + 8]
-    sidt       [esi + 14]
-
-    ; Store the its StackPointer
-    mov        [esi + 4],esp
-
-    ; update its switch state to STORED
-    mov        byte [esi], CPU_SWITCH_STATE_STORED
-
-WaitForOtherStored:
-    ; wait until the other CPU finish storing its state
-    cmp        byte [edi], CPU_SWITCH_STATE_STORED
-    jz         OtherStored
-    pause
-    jmp        WaitForOtherStored
-
-OtherStored:
-    ; Since another CPU already stored its state, load them
-    ; load GDTR value
-    lgdt       [edi + 8]
-
-    ; load IDTR value
-    lidt       [edi + 14]
-
-    ; load its future StackPointer
-    mov        esp, [edi + 4]
-
-    ; update the other CPU's switch state to LOADED
-    mov        byte [edi], CPU_SWITCH_STATE_LOADED
-
-WaitForOtherLoaded:
-    ; wait until the other CPU finish loading new state,
-    ; otherwise the data in stack may corrupt
-    cmp        byte [esi], CPU_SWITCH_STATE_LOADED
-    jz         OtherLoaded
-    pause
-    jmp        WaitForOtherLoaded
-
-OtherLoaded:
-    ; since the other CPU already get the data it want, leave this procedure
-    pop        eax
-    mov        cr0, eax
-    pop        eax
-    mov        cr4, eax
-    popfd
-
-    popad
-    ret
diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/MpInitLib/Microcode.c
deleted file mode 100644
index 982995be7d..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/Microcode.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/** @file
-  Implementation of loading microcode on processors.
-
-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "MpLib.h"
-
-/**
-  Get microcode update signature of currently loaded microcode update.
-
-  @return  Microcode signature.
-**/
-UINT32
-GetCurrentMicrocodeSignature (
-  VOID
-  )
-{
-  MSR_IA32_BIOS_SIGN_ID_REGISTER   BiosSignIdMsr;
-
-  AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
-  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
-  BiosSignIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID);
-  return BiosSignIdMsr.Bits.MicrocodeUpdateSignature;
-}
-
-/**
-  Detect whether specified processor can find matching microcode patch and load it.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-MicrocodeDetect (
-  IN CPU_MP_DATA             *CpuMpData
-  )
-{
-  UINT64                                  MicrocodePatchAddress;
-  UINT64                                  MicrocodePatchRegionSize;
-  UINT32                                  ExtendedTableLength;
-  UINT32                                  ExtendedTableCount;
-  CPU_MICROCODE_EXTENDED_TABLE            *ExtendedTable;
-  CPU_MICROCODE_EXTENDED_TABLE_HEADER     *ExtendedTableHeader;
-  CPU_MICROCODE_HEADER                    *MicrocodeEntryPoint;
-  UINTN                                   MicrocodeEnd;
-  UINTN                                   Index;
-  UINT8                                   PlatformId;
-  CPUID_VERSION_INFO_EAX                  Eax;
-  UINT32                                  CurrentRevision;
-  UINT32                                  LatestRevision;
-  UINTN                                   TotalSize;
-  UINT32                                  CheckSum32;
-  BOOLEAN                                 CorrectMicrocode;
-  VOID                                    *MicrocodeData;
-  MSR_IA32_PLATFORM_ID_REGISTER           PlatformIdMsr;
-
-  MicrocodePatchAddress    = PcdGet64 (PcdCpuMicrocodePatchAddress);
-  MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
-  if (MicrocodePatchRegionSize == 0) {
-    //
-    // There is no microcode patches
-    //
-    return;
-  }
-
-  CurrentRevision = GetCurrentMicrocodeSignature ();
-  if (CurrentRevision != 0) {
-    //
-    // Skip loading microcode if it has been loaded successfully
-    //
-    return;
-  }
-
-  ExtendedTableLength = 0;
-  //
-  // Here data of CPUID leafs have not been collected into context buffer, so
-  // GetProcessorCpuid() cannot be used here to retrieve sCPUID data.
-  //
-  AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);
-
-  //
-  // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID
-  //
-  PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
-  PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;
-
-  LatestRevision = 0;
-  MicrocodeData  = NULL;
-  MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);
-  MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;
-  do {
-    //
-    // Check if the microcode is for the Cpu and the version is newer
-    // and the update can be processed on the platform
-    //
-    CorrectMicrocode = FALSE;
-    if (MicrocodeEntryPoint->HeaderVersion == 0x1) {
-      //
-      // It is the microcode header. It is not the padding data between microcode patches
-      // because the padding data should not include 0x00000001 and it should be the repeated
-      // byte format (like 0xXYXYXYXY....).
-      //
-      if (MicrocodeEntryPoint->ProcessorSignature.Uint32 == Eax.Uint32 &&
-          MicrocodeEntryPoint->UpdateRevision > LatestRevision &&
-          (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))
-          ) {
-        if (MicrocodeEntryPoint->DataSize == 0) {
-          CheckSum32 = CalculateSum32 ((UINT32 *) MicrocodeEntryPoint, 2048);
-        } else {
-          CheckSum32 = CalculateSum32 (
-                         (UINT32 *) MicrocodeEntryPoint,
-                         MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER)
-                         );
-        }
-        if (CheckSum32 == 0) {
-          CorrectMicrocode = TRUE;
-        }
-      } else if ((MicrocodeEntryPoint->DataSize != 0) &&
-                 (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {
-        ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize +
-                                sizeof (CPU_MICROCODE_HEADER));
-        if (ExtendedTableLength != 0) {
-          //
-          // Extended Table exist, check if the CPU in support list
-          //
-          ExtendedTableHeader = (CPU_MICROCODE_EXTENDED_TABLE_HEADER *) ((UINT8 *) (MicrocodeEntryPoint)
-                                  + MicrocodeEntryPoint->DataSize + sizeof (CPU_MICROCODE_HEADER));
-          //
-          // Calculate Extended Checksum
-          //
-          if ((ExtendedTableLength % 4) == 0) {
-            CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTableHeader, ExtendedTableLength);
-            if (CheckSum32 == 0) {
-              //
-              // Checksum correct
-              //
-              ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
-              ExtendedTable      = (CPU_MICROCODE_EXTENDED_TABLE *) (ExtendedTableHeader + 1);
-              for (Index = 0; Index < ExtendedTableCount; Index ++) {
-                CheckSum32 = CalculateSum32 ((UINT32 *) ExtendedTable, sizeof(CPU_MICROCODE_EXTENDED_TABLE));
-                if (CheckSum32 == 0) {
-                  //
-                  // Verify Header
-                  //
-                  if ((ExtendedTable->ProcessorSignature.Uint32 == Eax.Uint32) &&
-                      (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {
-                    //
-                    // Find one
-                    //
-                    CorrectMicrocode = TRUE;
-                    break;
-                  }
-                }
-                ExtendedTable ++;
-              }
-            }
-          }
-        }
-      }
-    } else {
-      //
-      // It is the padding data between the microcode patches for microcode patches alignment.
-      // Because the microcode patch is the multiple of 1-KByte, the padding data should not
-      // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode
-      // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to
-      // find the next possible microcode patch header.
-      //
-      MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
-      continue;
-    }
-    //
-    // Get the next patch.
-    //
-    if (MicrocodeEntryPoint->DataSize == 0) {
-      TotalSize = 2048;
-    } else {
-      TotalSize = MicrocodeEntryPoint->TotalSize;
-    }
-
-    if (CorrectMicrocode) {
-      LatestRevision = MicrocodeEntryPoint->UpdateRevision;
-      MicrocodeData = (VOID *) ((UINTN) MicrocodeEntryPoint + sizeof (CPU_MICROCODE_HEADER));
-    }
-
-    MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);
-  } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));
-
-  if (LatestRevision > CurrentRevision) {
-    //
-    // BIOS only authenticate updates that contain a numerically larger revision
-    // than the currently loaded revision, where Current Signature < New Update
-    // Revision. A processor with no loaded update is considered to have a
-    // revision equal to zero.
-    //
-    ASSERT (MicrocodeData != NULL);
-    AsmWriteMsr64 (
-        MSR_IA32_BIOS_UPDT_TRIG,
-        (UINT64) (UINTN) MicrocodeData
-        );
-    //
-    // Get and check new microcode signature
-    //
-    CurrentRevision = GetCurrentMicrocodeSignature ();
-    if (CurrentRevision != LatestRevision) {
-      AcquireSpinLock(&CpuMpData->MpLock);
-      DEBUG ((EFI_D_ERROR, "Updated microcode signature [0x%08x] does not match \
-                loaded microcode signature [0x%08x]\n", CurrentRevision, LatestRevision));
-      ReleaseSpinLock(&CpuMpData->MpLock);
-    }
-  }
-}
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
deleted file mode 100644
index 03d6c2d89e..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ /dev/null
@@ -1,2126 +0,0 @@
-/** @file
-  CPU MP Initialize Library common functions.
-
-  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "MpLib.h"
-
-EFI_GUID mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;
-
-/**
-  The function will check if BSP Execute Disable is enabled.
-
-  DxeIpl may have enabled Execute Disable for BSP, APs need to
-  get the status and sync up the settings.
-  If BSP's CR0.Paging is not set, BSP execute Disble feature is
-  not working actually.
-
-  @retval TRUE      BSP Execute Disable is enabled.
-  @retval FALSE     BSP Execute Disable is not enabled.
-**/
-BOOLEAN
-IsBspExecuteDisableEnabled (
-  VOID
-  )
-{
-  UINT32                      Eax;
-  CPUID_EXTENDED_CPU_SIG_EDX  Edx;
-  MSR_IA32_EFER_REGISTER      EferMsr;
-  BOOLEAN                     Enabled;
-  IA32_CR0                    Cr0;
-
-  Enabled = FALSE;
-  Cr0.UintN = AsmReadCr0 ();
-  if (Cr0.Bits.PG != 0) {
-    //
-    // If CR0 Paging bit is set
-    //
-    AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);
-    if (Eax >= CPUID_EXTENDED_CPU_SIG) {
-      AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);
-      //
-      // CPUID 0x80000001
-      // Bit 20: Execute Disable Bit available.
-      //
-      if (Edx.Bits.NX != 0) {
-        EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);
-        //
-        // MSR 0xC0000080
-        // Bit 11: Execute Disable Bit enable.
-        //
-        if (EferMsr.Bits.NXE != 0) {
-          Enabled = TRUE;
-        }
-      }
-    }
-  }
-
-  return Enabled;
-}
-
-/**
-  Worker function for SwitchBSP().
-
-  Worker function for SwitchBSP(), assigned to the AP which is intended
-  to become BSP.
-
-  @param[in] Buffer   Pointer to CPU MP Data
-**/
-VOID
-EFIAPI
-FutureBSPProc (
-  IN  VOID            *Buffer
-  )
-{
-  CPU_MP_DATA         *DataInHob;
-
-  DataInHob = (CPU_MP_DATA *) Buffer;
-  AsmExchangeRole (&DataInHob->APInfo, &DataInHob->BSPInfo);
-}
-
-/**
-  Get the Application Processors state.
-
-  @param[in]  CpuData    The pointer to CPU_AP_DATA of specified AP
-
-  @return  The AP status
-**/
-CPU_STATE
-GetApState (
-  IN  CPU_AP_DATA     *CpuData
-  )
-{
-  return CpuData->State;
-}
-
-/**
-  Set the Application Processors state.
-
-  @param[in]   CpuData    The pointer to CPU_AP_DATA of specified AP
-  @param[in]   State      The AP status
-**/
-VOID
-SetApState (
-  IN  CPU_AP_DATA     *CpuData,
-  IN  CPU_STATE       State
-  )
-{
-  AcquireSpinLock (&CpuData->ApLock);
-  CpuData->State = State;
-  ReleaseSpinLock (&CpuData->ApLock);
-}
-
-/**
-  Save BSP's local APIC timer setting.
-
-  @param[in] CpuMpData          Pointer to CPU MP Data
-**/
-VOID
-SaveLocalApicTimerSetting (
-  IN CPU_MP_DATA   *CpuMpData
-  )
-{
-  //
-  // Record the current local APIC timer setting of BSP
-  //
-  GetApicTimerState (
-    &CpuMpData->DivideValue,
-    &CpuMpData->PeriodicMode,
-    &CpuMpData->Vector
-    );
-  CpuMpData->CurrentTimerCount   = GetApicTimerCurrentCount ();
-  CpuMpData->TimerInterruptState = GetApicTimerInterruptState ();
-}
-
-/**
-  Sync local APIC timer setting from BSP to AP.
-
-  @param[in] CpuMpData          Pointer to CPU MP Data
-**/
-VOID
-SyncLocalApicTimerSetting (
-  IN CPU_MP_DATA   *CpuMpData
-  )
-{
-  //
-  // Sync local APIC timer setting from BSP to AP
-  //
-  InitializeApicTimer (
-    CpuMpData->DivideValue,
-    CpuMpData->CurrentTimerCount,
-    CpuMpData->PeriodicMode,
-    CpuMpData->Vector
-    );
-  //
-  // Disable AP's local APIC timer interrupt
-  //
-  DisableApicTimerInterrupt ();
-}
-
-/**
-  Save the volatile registers required to be restored following INIT IPI.
-
-  @param[out]  VolatileRegisters    Returns buffer saved the volatile resisters
-**/
-VOID
-SaveVolatileRegisters (
-  OUT CPU_VOLATILE_REGISTERS    *VolatileRegisters
-  )
-{
-  CPUID_VERSION_INFO_EDX        VersionInfoEdx;
-
-  VolatileRegisters->Cr0 = AsmReadCr0 ();
-  VolatileRegisters->Cr3 = AsmReadCr3 ();
-  VolatileRegisters->Cr4 = AsmReadCr4 ();
-
-  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);
-  if (VersionInfoEdx.Bits.DE != 0) {
-    //
-    // If processor supports Debugging Extensions feature
-    // by CPUID.[EAX=01H]:EDX.BIT2
-    //
-    VolatileRegisters->Dr0 = AsmReadDr0 ();
-    VolatileRegisters->Dr1 = AsmReadDr1 ();
-    VolatileRegisters->Dr2 = AsmReadDr2 ();
-    VolatileRegisters->Dr3 = AsmReadDr3 ();
-    VolatileRegisters->Dr6 = AsmReadDr6 ();
-    VolatileRegisters->Dr7 = AsmReadDr7 ();
-  }
-}
-
-/**
-  Restore the volatile registers following INIT IPI.
-
-  @param[in]  VolatileRegisters   Pointer to volatile resisters
-  @param[in]  IsRestoreDr         TRUE:  Restore DRx if supported
-                                  FALSE: Do not restore DRx
-**/
-VOID
-RestoreVolatileRegisters (
-  IN CPU_VOLATILE_REGISTERS    *VolatileRegisters,
-  IN BOOLEAN                   IsRestoreDr
-  )
-{
-  CPUID_VERSION_INFO_EDX        VersionInfoEdx;
-
-  AsmWriteCr0 (VolatileRegisters->Cr0);
-  AsmWriteCr3 (VolatileRegisters->Cr3);
-  AsmWriteCr4 (VolatileRegisters->Cr4);
-
-  if (IsRestoreDr) {
-    AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);
-    if (VersionInfoEdx.Bits.DE != 0) {
-      //
-      // If processor supports Debugging Extensions feature
-      // by CPUID.[EAX=01H]:EDX.BIT2
-      //
-      AsmWriteDr0 (VolatileRegisters->Dr0);
-      AsmWriteDr1 (VolatileRegisters->Dr1);
-      AsmWriteDr2 (VolatileRegisters->Dr2);
-      AsmWriteDr3 (VolatileRegisters->Dr3);
-      AsmWriteDr6 (VolatileRegisters->Dr6);
-      AsmWriteDr7 (VolatileRegisters->Dr7);
-    }
-  }
-}
-
-/**
-  Detect whether Mwait-monitor feature is supported.
-
-  @retval TRUE    Mwait-monitor feature is supported.
-  @retval FALSE   Mwait-monitor feature is not supported.
-**/
-BOOLEAN
-IsMwaitSupport (
-  VOID
-  )
-{
-  CPUID_VERSION_INFO_ECX        VersionInfoEcx;
-
-  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &VersionInfoEcx.Uint32, NULL);
-  return (VersionInfoEcx.Bits.MONITOR == 1) ? TRUE : FALSE;
-}
-
-/**
-  Get AP loop mode.
-
-  @param[out] MonitorFilterSize  Returns the largest monitor-line size in bytes.
-
-  @return The AP loop mode.
-**/
-UINT8
-GetApLoopMode (
-  OUT UINT32     *MonitorFilterSize
-  )
-{
-  UINT8                         ApLoopMode;
-  CPUID_MONITOR_MWAIT_EBX       MonitorMwaitEbx;
-
-  ASSERT (MonitorFilterSize != NULL);
-
-  ApLoopMode = PcdGet8 (PcdCpuApLoopMode);
-  ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);
-  if (ApLoopMode == ApInMwaitLoop) {
-    if (!IsMwaitSupport ()) {
-      //
-      // If processor does not support MONITOR/MWAIT feature,
-      // force AP in Hlt-loop mode
-      //
-      ApLoopMode = ApInHltLoop;
-    }
-  }
-
-  if (ApLoopMode != ApInMwaitLoop) {
-    *MonitorFilterSize = sizeof (UINT32);
-  } else {
-    //
-    // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes
-    // CPUID.[EAX=05H].EDX: C-states supported using MWAIT
-    //
-    AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &MonitorMwaitEbx.Uint32, NULL, NULL);
-    *MonitorFilterSize = MonitorMwaitEbx.Bits.LargestMonitorLineSize;
-  }
-
-  return ApLoopMode;
-}
-
-/**
-  Sort the APIC ID of all processors.
-
-  This function sorts the APIC ID of all processors so that processor number is
-  assigned in the ascending order of APIC ID which eases MP debugging.
-
-  @param[in] CpuMpData        Pointer to PEI CPU MP Data
-**/
-VOID
-SortApicId (
-  IN CPU_MP_DATA   *CpuMpData
-  )
-{
-  UINTN             Index1;
-  UINTN             Index2;
-  UINTN             Index3;
-  UINT32            ApicId;
-  CPU_INFO_IN_HOB   CpuInfo;
-  UINT32            ApCount;
-  CPU_INFO_IN_HOB   *CpuInfoInHob;
-
-  ApCount = CpuMpData->CpuCount - 1;
-  CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-  if (ApCount != 0) {
-    for (Index1 = 0; Index1 < ApCount; Index1++) {
-      Index3 = Index1;
-      //
-      // Sort key is the hardware default APIC ID
-      //
-      ApicId = CpuInfoInHob[Index1].ApicId;
-      for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {
-        if (ApicId > CpuInfoInHob[Index2].ApicId) {
-          Index3 = Index2;
-          ApicId = CpuInfoInHob[Index2].ApicId;
-        }
-      }
-      if (Index3 != Index1) {
-        CopyMem (&CpuInfo, &CpuInfoInHob[Index3], sizeof (CPU_INFO_IN_HOB));
-        CopyMem (
-          &CpuInfoInHob[Index3],
-          &CpuInfoInHob[Index1],
-          sizeof (CPU_INFO_IN_HOB)
-          );
-        CopyMem (&CpuInfoInHob[Index1], &CpuInfo, sizeof (CPU_INFO_IN_HOB));
-      }
-    }
-
-    //
-    // Get the processor number for the BSP
-    //
-    ApicId = GetInitialApicId ();
-    for (Index1 = 0; Index1 < CpuMpData->CpuCount; Index1++) {
-      if (CpuInfoInHob[Index1].ApicId == ApicId) {
-        CpuMpData->BspNumber = (UINT32) Index1;
-        break;
-      }
-    }
-  }
-}
-
-/**
-  Enable x2APIC mode on APs.
-
-  @param[in, out] Buffer  Pointer to private data buffer.
-**/
-VOID
-EFIAPI
-ApFuncEnableX2Apic (
-  IN OUT VOID  *Buffer
-  )
-{
-  SetApicMode (LOCAL_APIC_MODE_X2APIC);
-}
-
-/**
-  Do sync on APs.
-
-  @param[in, out] Buffer  Pointer to private data buffer.
-**/
-VOID
-EFIAPI
-ApInitializeSync (
-  IN OUT VOID  *Buffer
-  )
-{
-  CPU_MP_DATA  *CpuMpData;
-
-  CpuMpData = (CPU_MP_DATA *) Buffer;
-  //
-  // Load microcode on AP
-  //
-  MicrocodeDetect (CpuMpData);
-  //
-  // Sync BSP's MTRR table to AP
-  //
-  MtrrSetAllMtrrs (&CpuMpData->MtrrTable);
-}
-
-/**
-  Find the current Processor number by APIC ID.
-
-  @param[in]  CpuMpData         Pointer to PEI CPU MP Data
-  @param[out] ProcessorNumber   Return the pocessor number found
-
-  @retval EFI_SUCCESS          ProcessorNumber is found and returned.
-  @retval EFI_NOT_FOUND        ProcessorNumber is not found.
-**/
-EFI_STATUS
-GetProcessorNumber (
-  IN CPU_MP_DATA               *CpuMpData,
-  OUT UINTN                    *ProcessorNumber
-  )
-{
-  UINTN                   TotalProcessorNumber;
-  UINTN                   Index;
-  CPU_INFO_IN_HOB         *CpuInfoInHob;
-
-  CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-
-  TotalProcessorNumber = CpuMpData->CpuCount;
-  for (Index = 0; Index < TotalProcessorNumber; Index ++) {
-    if (CpuInfoInHob[Index].ApicId == GetApicId ()) {
-      *ProcessorNumber = Index;
-      return EFI_SUCCESS;
-    }
-  }
-  return EFI_NOT_FOUND;
-}
-
-/**
-  This function will get CPU count in the system.
-
-  @param[in] CpuMpData        Pointer to PEI CPU MP Data
-
-  @return  CPU count detected
-**/
-UINTN
-CollectProcessorCount (
-  IN CPU_MP_DATA         *CpuMpData
-  )
-{
-  //
-  // Send 1st broadcast IPI to APs to wakeup APs
-  //
-  CpuMpData->InitFlag     = ApInitConfig;
-  CpuMpData->X2ApicEnable = FALSE;
-  WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL);
-  CpuMpData->InitFlag = ApInitDone;
-  ASSERT (CpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
-  //
-  // Wait for all APs finished the initialization
-  //
-  while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {
-    CpuPause ();
-  }
-
-  if (CpuMpData->X2ApicEnable) {
-    DEBUG ((DEBUG_INFO, "Force x2APIC mode!\n"));
-    //
-    // Wakeup all APs to enable x2APIC mode
-    //
-    WakeUpAP (CpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);
-    //
-    // Wait for all known APs finished
-    //
-    while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {
-      CpuPause ();
-    }
-    //
-    // Enable x2APIC on BSP
-    //
-    SetApicMode (LOCAL_APIC_MODE_X2APIC);
-  }
-  DEBUG ((DEBUG_INFO, "APIC MODE is %d\n", GetApicMode ()));
-  //
-  // Sort BSP/Aps by CPU APIC ID in ascending order
-  //
-  SortApicId (CpuMpData);
-
-  DEBUG ((DEBUG_INFO, "MpInitLib: Find %d processors in system.\n", CpuMpData->CpuCount));
-
-  return CpuMpData->CpuCount;
-}
-
-/**
-  Initialize CPU AP Data when AP is wakeup at the first time.
-
-  @param[in, out] CpuMpData        Pointer to PEI CPU MP Data
-  @param[in]      ProcessorNumber  The handle number of processor
-  @param[in]      BistData         Processor BIST data
-  @param[in]      ApTopOfStack     Top of AP stack
-
-**/
-VOID
-InitializeApData (
-  IN OUT CPU_MP_DATA      *CpuMpData,
-  IN     UINTN            ProcessorNumber,
-  IN     UINT32           BistData,
-  IN     UINT64           ApTopOfStack
-  )
-{
-  CPU_INFO_IN_HOB          *CpuInfoInHob;
-
-  CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-  CpuInfoInHob[ProcessorNumber].InitialApicId = GetInitialApicId ();
-  CpuInfoInHob[ProcessorNumber].ApicId        = GetApicId ();
-  CpuInfoInHob[ProcessorNumber].Health        = BistData;
-  CpuInfoInHob[ProcessorNumber].ApTopOfStack  = ApTopOfStack;
-
-  CpuMpData->CpuData[ProcessorNumber].Waiting    = FALSE;
-  CpuMpData->CpuData[ProcessorNumber].CpuHealthy = (BistData == 0) ? TRUE : FALSE;
-  if (CpuInfoInHob[ProcessorNumber].InitialApicId >= 0xFF) {
-    //
-    // Set x2APIC mode if there are any logical processor reporting
-    // an Initial APIC ID of 255 or greater.
-    //
-    AcquireSpinLock(&CpuMpData->MpLock);
-    CpuMpData->X2ApicEnable = TRUE;
-    ReleaseSpinLock(&CpuMpData->MpLock);
-  }
-
-  InitializeSpinLock(&CpuMpData->CpuData[ProcessorNumber].ApLock);
-  SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateIdle);
-}
-
-/**
-  This function will be called from AP reset code if BSP uses WakeUpAP.
-
-  @param[in] ExchangeInfo     Pointer to the MP exchange info buffer
-  @param[in] NumApsExecuting  Number of current executing AP
-**/
-VOID
-EFIAPI
-ApWakeupFunction (
-  IN MP_CPU_EXCHANGE_INFO      *ExchangeInfo,
-  IN UINTN                     NumApsExecuting
-  )
-{
-  CPU_MP_DATA                *CpuMpData;
-  UINTN                      ProcessorNumber;
-  EFI_AP_PROCEDURE           Procedure;
-  VOID                       *Parameter;
-  UINT32                     BistData;
-  volatile UINT32            *ApStartupSignalBuffer;
-  CPU_INFO_IN_HOB            *CpuInfoInHob;
-  UINT64                     ApTopOfStack;
-
-  //
-  // AP finished assembly code and begin to execute C code
-  //
-  CpuMpData = ExchangeInfo->CpuMpData;
-
-  //
-  // AP's local APIC settings will be lost after received INIT IPI
-  // We need to re-initialize them at here
-  //
-  ProgramVirtualWireMode ();
-  SyncLocalApicTimerSetting (CpuMpData);
-
-  while (TRUE) {
-    if (CpuMpData->InitFlag == ApInitConfig) {
-      //
-      // Add CPU number
-      //
-      InterlockedIncrement ((UINT32 *) &CpuMpData->CpuCount);
-      ProcessorNumber = NumApsExecuting;
-      //
-      // This is first time AP wakeup, get BIST information from AP stack
-      //
-      ApTopOfStack  = CpuMpData->Buffer + (ProcessorNumber + 1) * CpuMpData->CpuApStackSize;
-      BistData = *(UINT32 *) ((UINTN) ApTopOfStack - sizeof (UINTN));
-      //
-      // Do some AP initialize sync
-      //
-      ApInitializeSync (CpuMpData);
-      //
-      // Sync BSP's Control registers to APs
-      //
-      RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);
-      InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStack);
-      ApStartupSignalBuffer = CpuMpData->CpuData[ProcessorNumber].StartupApSignal;
-    } else {
-      //
-      // Execute AP function if AP is ready
-      //
-      GetProcessorNumber (CpuMpData, &ProcessorNumber);
-      //
-      // Clear AP start-up signal when AP waken up
-      //
-      ApStartupSignalBuffer = CpuMpData->CpuData[ProcessorNumber].StartupApSignal;
-      InterlockedCompareExchange32 (
-        (UINT32 *) ApStartupSignalBuffer,
-        WAKEUP_AP_SIGNAL,
-        0
-        );
-      if (CpuMpData->ApLoopMode == ApInHltLoop) {
-        //
-        // Restore AP's volatile registers saved
-        //
-        RestoreVolatileRegisters (&CpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);
-      }
-
-      if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateReady) {
-        Procedure = (EFI_AP_PROCEDURE)CpuMpData->CpuData[ProcessorNumber].ApFunction;
-        Parameter = (VOID *) CpuMpData->CpuData[ProcessorNumber].ApFunctionArgument;
-        if (Procedure != NULL) {
-          SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateBusy);
-          //
-          // Enable source debugging on AP function
-          //         
-          EnableDebugAgent ();
-          //
-          // Invoke AP function here
-          //
-          Procedure (Parameter);
-          CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-          if (CpuMpData->SwitchBspFlag) {
-            //
-            // Re-get the processor number due to BSP/AP maybe exchange in AP function
-            //
-            GetProcessorNumber (CpuMpData, &ProcessorNumber);
-            CpuMpData->CpuData[ProcessorNumber].ApFunction = 0;
-            CpuMpData->CpuData[ProcessorNumber].ApFunctionArgument = 0;
-            ApStartupSignalBuffer = CpuMpData->CpuData[ProcessorNumber].StartupApSignal;
-            CpuInfoInHob[ProcessorNumber].ApTopOfStack = CpuInfoInHob[CpuMpData->NewBspNumber].ApTopOfStack;
-          } else {
-            //
-            // Re-get the CPU APICID and Initial APICID
-            //
-            CpuInfoInHob[ProcessorNumber].ApicId        = GetApicId ();
-            CpuInfoInHob[ProcessorNumber].InitialApicId = GetInitialApicId ();
-          }
-        }
-        SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateFinished);
-      }
-    }
-
-    //
-    // AP finished executing C code
-    //
-    InterlockedIncrement ((UINT32 *) &CpuMpData->FinishedCount);
-
-    //
-    // Place AP is specified loop mode
-    //
-    if (CpuMpData->ApLoopMode == ApInHltLoop) {
-      //
-      // Save AP volatile registers
-      //
-      SaveVolatileRegisters (&CpuMpData->CpuData[ProcessorNumber].VolatileRegisters);
-      //
-      // Place AP in HLT-loop
-      //
-      while (TRUE) {
-        DisableInterrupts ();
-        CpuSleep ();
-        CpuPause ();
-      }
-    }
-    while (TRUE) {
-      DisableInterrupts ();
-      if (CpuMpData->ApLoopMode == ApInMwaitLoop) {
-        //
-        // Place AP in MWAIT-loop
-        //
-        AsmMonitor ((UINTN) ApStartupSignalBuffer, 0, 0);
-        if (*ApStartupSignalBuffer != WAKEUP_AP_SIGNAL) {
-          //
-          // Check AP start-up signal again.
-          // If AP start-up signal is not set, place AP into
-          // the specified C-state
-          //
-          AsmMwait (CpuMpData->ApTargetCState << 4, 0);
-        }
-      } else if (CpuMpData->ApLoopMode == ApInRunLoop) {
-        //
-        // Place AP in Run-loop
-        //
-        CpuPause ();
-      } else {
-        ASSERT (FALSE);
-      }
-
-      //
-      // If AP start-up signal is written, AP is waken up
-      // otherwise place AP in loop again
-      //
-      if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {
-        break;
-      }
-    }
-  }
-}
-
-/**
-  Wait for AP wakeup and write AP start-up signal till AP is waken up.
-
-  @param[in] ApStartupSignalBuffer  Pointer to AP wakeup signal
-**/
-VOID
-WaitApWakeup (
-  IN volatile UINT32        *ApStartupSignalBuffer
-  )
-{
-  //
-  // If AP is waken up, StartupApSignal should be cleared.
-  // Otherwise, write StartupApSignal again till AP waken up.
-  //
-  while (InterlockedCompareExchange32 (
-          (UINT32 *) ApStartupSignalBuffer,
-          WAKEUP_AP_SIGNAL,
-          WAKEUP_AP_SIGNAL
-          ) != 0) {
-    CpuPause ();
-  }
-}
-
-/**
-  This function will fill the exchange info structure.
-
-  @param[in] CpuMpData          Pointer to CPU MP Data
-
-**/
-VOID
-FillExchangeInfoData (
-  IN CPU_MP_DATA               *CpuMpData
-  )
-{
-  volatile MP_CPU_EXCHANGE_INFO    *ExchangeInfo;
-
-  ExchangeInfo                  = CpuMpData->MpCpuExchangeInfo;
-  ExchangeInfo->Lock            = 0;
-  ExchangeInfo->StackStart      = CpuMpData->Buffer;
-  ExchangeInfo->StackSize       = CpuMpData->CpuApStackSize;
-  ExchangeInfo->BufferStart     = CpuMpData->WakeupBuffer;
-  ExchangeInfo->ModeOffset      = CpuMpData->AddressMap.ModeEntryOffset;
-
-  ExchangeInfo->CodeSegment     = AsmReadCs ();
-  ExchangeInfo->DataSegment     = AsmReadDs ();
-
-  ExchangeInfo->Cr3             = AsmReadCr3 ();
-
-  ExchangeInfo->CFunction       = (UINTN) ApWakeupFunction;
-  ExchangeInfo->NumApsExecuting = 0;
-  ExchangeInfo->InitFlag        = (UINTN) CpuMpData->InitFlag;
-  ExchangeInfo->CpuInfo         = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-  ExchangeInfo->CpuMpData       = CpuMpData;
-
-  ExchangeInfo->EnableExecuteDisable = IsBspExecuteDisableEnabled ();
-
-  //
-  // Get the BSP's data of GDT and IDT
-  //
-  AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);
-  AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);
-}
-
-/**
-  Helper function that waits until the finished AP count reaches the specified
-  limit, or the specified timeout elapses (whichever comes first).
-
-  @param[in] CpuMpData        Pointer to CPU MP Data.
-  @param[in] FinishedApLimit  The number of finished APs to wait for.
-  @param[in] TimeLimit        The number of microseconds to wait for.
-**/
-VOID
-TimedWaitForApFinish (
-  IN CPU_MP_DATA               *CpuMpData,
-  IN UINT32                    FinishedApLimit,
-  IN UINT32                    TimeLimit
-  );
-
-/**
-  This function will be called by BSP to wakeup AP.
-
-  @param[in] CpuMpData          Pointer to CPU MP Data
-  @param[in] Broadcast          TRUE:  Send broadcast IPI to all APs
-                                FALSE: Send IPI to AP by ApicId
-  @param[in] ProcessorNumber    The handle number of specified processor
-  @param[in] Procedure          The function to be invoked by AP
-  @param[in] ProcedureArgument  The argument to be passed into AP function
-**/
-VOID
-WakeUpAP (
-  IN CPU_MP_DATA               *CpuMpData,
-  IN BOOLEAN                   Broadcast,
-  IN UINTN                     ProcessorNumber,
-  IN EFI_AP_PROCEDURE          Procedure,              OPTIONAL
-  IN VOID                      *ProcedureArgument      OPTIONAL
-  )
-{
-  volatile MP_CPU_EXCHANGE_INFO    *ExchangeInfo;
-  UINTN                            Index;
-  CPU_AP_DATA                      *CpuData;
-  BOOLEAN                          ResetVectorRequired;
-  CPU_INFO_IN_HOB                  *CpuInfoInHob;
-
-  CpuMpData->FinishedCount = 0;
-  ResetVectorRequired = FALSE;
-
-  if (CpuMpData->ApLoopMode == ApInHltLoop ||
-      CpuMpData->InitFlag   != ApInitDone) {
-    ResetVectorRequired = TRUE;
-    AllocateResetVector (CpuMpData);
-    FillExchangeInfoData (CpuMpData);
-    SaveLocalApicTimerSetting (CpuMpData);
-  } else if (CpuMpData->ApLoopMode == ApInMwaitLoop) {
-    //
-    // Get AP target C-state each time when waking up AP,
-    // for it maybe updated by platform again
-    //
-    CpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);
-  }
-
-  ExchangeInfo = CpuMpData->MpCpuExchangeInfo;
-
-  if (Broadcast) {
-    for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
-      if (Index != CpuMpData->BspNumber) {
-        CpuData = &CpuMpData->CpuData[Index];
-        CpuData->ApFunction         = (UINTN) Procedure;
-        CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;
-        SetApState (CpuData, CpuStateReady);
-        if (CpuMpData->InitFlag != ApInitConfig) {
-          *(UINT32 *) CpuData->StartupApSignal = WAKEUP_AP_SIGNAL;
-        }
-      }
-    }
-    if (ResetVectorRequired) {
-      //
-      // Wakeup all APs
-      //
-      SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);
-    }
-    if (CpuMpData->InitFlag == ApInitConfig) {
-      //
-      // Wait for all potential APs waken up in one specified period
-      //
-      TimedWaitForApFinish (
-        CpuMpData,
-        PcdGet32 (PcdCpuMaxLogicalProcessorNumber) - 1,
-        PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds)
-        );
-    } else {
-      //
-      // Wait all APs waken up if this is not the 1st broadcast of SIPI
-      //
-      for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
-        CpuData = &CpuMpData->CpuData[Index];
-        if (Index != CpuMpData->BspNumber) {
-          WaitApWakeup (CpuData->StartupApSignal);
-        }
-      }
-    }
-  } else {
-    CpuData = &CpuMpData->CpuData[ProcessorNumber];
-    CpuData->ApFunction         = (UINTN) Procedure;
-    CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;
-    SetApState (CpuData, CpuStateReady);
-    //
-    // Wakeup specified AP
-    //
-    ASSERT (CpuMpData->InitFlag != ApInitConfig);
-    *(UINT32 *) CpuData->StartupApSignal = WAKEUP_AP_SIGNAL;
-    if (ResetVectorRequired) {
-      CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-      SendInitSipiSipi (
-        CpuInfoInHob[ProcessorNumber].ApicId,
-        (UINT32) ExchangeInfo->BufferStart
-        );
-    }
-    //
-    // Wait specified AP waken up
-    //
-    WaitApWakeup (CpuData->StartupApSignal);
-  }
-
-  if (ResetVectorRequired) {
-    FreeResetVector (CpuMpData);
-  }
-}
-
-/**
-  Calculate timeout value and return the current performance counter value.
-
-  Calculate the number of performance counter ticks required for a timeout.
-  If TimeoutInMicroseconds is 0, return value is also 0, which is recognized
-  as infinity.
-
-  @param[in]  TimeoutInMicroseconds   Timeout value in microseconds.
-  @param[out] CurrentTime             Returns the current value of the performance counter.
-
-  @return Expected time stamp counter for timeout.
-          If TimeoutInMicroseconds is 0, return value is also 0, which is recognized
-          as infinity.
-
-**/
-UINT64
-CalculateTimeout (
-  IN  UINTN   TimeoutInMicroseconds,
-  OUT UINT64  *CurrentTime
-  )
-{
-  //
-  // Read the current value of the performance counter
-  //
-  *CurrentTime = GetPerformanceCounter ();
-
-  //
-  // If TimeoutInMicroseconds is 0, return value is also 0, which is recognized
-  // as infinity.
-  //
-  if (TimeoutInMicroseconds == 0) {
-    return 0;
-  }
-
-  //
-  // GetPerformanceCounterProperties () returns the timestamp counter's frequency
-  // in Hz. So multiply the return value with TimeoutInMicroseconds and then divide
-  // it by 1,000,000, to get the number of ticks for the timeout value.
-  //
-  return DivU64x32 (
-           MultU64x64 (
-             GetPerformanceCounterProperties (NULL, NULL),
-             TimeoutInMicroseconds
-             ),
-           1000000
-           );
-}
-
-/**
-  Checks whether timeout expires.
-
-  Check whether the number of elapsed performance counter ticks required for
-  a timeout condition has been reached.
-  If Timeout is zero, which means infinity, return value is always FALSE.
-
-  @param[in, out]  PreviousTime   On input,  the value of the performance counter
-                                  when it was last read.
-                                  On output, the current value of the performance
-                                  counter
-  @param[in]       TotalTime      The total amount of elapsed time in performance
-                                  counter ticks.
-  @param[in]       Timeout        The number of performance counter ticks required
-                                  to reach a timeout condition.
-
-  @retval TRUE                    A timeout condition has been reached.
-  @retval FALSE                   A timeout condition has not been reached.
-
-**/
-BOOLEAN
-CheckTimeout (
-  IN OUT UINT64  *PreviousTime,
-  IN     UINT64  *TotalTime,
-  IN     UINT64  Timeout
-  )
-{
-  UINT64  Start;
-  UINT64  End;
-  UINT64  CurrentTime;
-  INT64   Delta;
-  INT64   Cycle;
-
-  if (Timeout == 0) {
-    return FALSE;
-  }
-  GetPerformanceCounterProperties (&Start, &End);
-  Cycle = End - Start;
-  if (Cycle < 0) {
-    Cycle = -Cycle;
-  }
-  Cycle++;
-  CurrentTime = GetPerformanceCounter();
-  Delta = (INT64) (CurrentTime - *PreviousTime);
-  if (Start > End) {
-    Delta = -Delta;
-  }
-  if (Delta < 0) {
-    Delta += Cycle;
-  }
-  *TotalTime += Delta;
-  *PreviousTime = CurrentTime;
-  if (*TotalTime > Timeout) {
-    return TRUE;
-  }
-  return FALSE;
-}
-
-/**
-  Helper function that waits until the finished AP count reaches the specified
-  limit, or the specified timeout elapses (whichever comes first).
-
-  @param[in] CpuMpData        Pointer to CPU MP Data.
-  @param[in] FinishedApLimit  The number of finished APs to wait for.
-  @param[in] TimeLimit        The number of microseconds to wait for.
-**/
-VOID
-TimedWaitForApFinish (
-  IN CPU_MP_DATA               *CpuMpData,
-  IN UINT32                    FinishedApLimit,
-  IN UINT32                    TimeLimit
-  )
-{
-  //
-  // CalculateTimeout() and CheckTimeout() consider a TimeLimit of 0
-  // "infinity", so check for (TimeLimit == 0) explicitly.
-  //
-  if (TimeLimit == 0) {
-    return;
-  }
-
-  CpuMpData->TotalTime = 0;
-  CpuMpData->ExpectedTime = CalculateTimeout (
-                              TimeLimit,
-                              &CpuMpData->CurrentTime
-                              );
-  while (CpuMpData->FinishedCount < FinishedApLimit &&
-         !CheckTimeout (
-            &CpuMpData->CurrentTime,
-            &CpuMpData->TotalTime,
-            CpuMpData->ExpectedTime
-            )) {
-    CpuPause ();
-  }
-
-  if (CpuMpData->FinishedCount >= FinishedApLimit) {
-    DEBUG ((
-      DEBUG_VERBOSE,
-      "%a: reached FinishedApLimit=%u in %Lu microseconds\n",
-      __FUNCTION__,
-      FinishedApLimit,
-      DivU64x64Remainder (
-        MultU64x32 (CpuMpData->TotalTime, 1000000),
-        GetPerformanceCounterProperties (NULL, NULL),
-        NULL
-        )
-      ));
-  }
-}
-
-/**
-  Reset an AP to Idle state.
-
-  Any task being executed by the AP will be aborted and the AP
-  will be waiting for a new task in Wait-For-SIPI state.
-
-  @param[in] ProcessorNumber  The handle number of processor.
-**/
-VOID
-ResetProcessorToIdleState (
-  IN UINTN                     ProcessorNumber
-  )
-{
-  CPU_MP_DATA           *CpuMpData;
-
-  CpuMpData = GetCpuMpData ();
-
-  CpuMpData->InitFlag = ApInitReconfig;
-  WakeUpAP (CpuMpData, FALSE, ProcessorNumber, NULL, NULL);
-  while (CpuMpData->FinishedCount < 1) {
-    CpuPause ();
-  }
-  CpuMpData->InitFlag = ApInitDone;
-
-  SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateIdle);
-}
-
-/**
-  Searches for the next waiting AP.
-
-  Search for the next AP that is put in waiting state by single-threaded StartupAllAPs().
-
-  @param[out]  NextProcessorNumber  Pointer to the processor number of the next waiting AP.
-
-  @retval EFI_SUCCESS          The next waiting AP has been found.
-  @retval EFI_NOT_FOUND        No waiting AP exists.
-
-**/
-EFI_STATUS
-GetNextWaitingProcessorNumber (
-  OUT UINTN                    *NextProcessorNumber
-  )
-{
-  UINTN           ProcessorNumber;
-  CPU_MP_DATA     *CpuMpData;
-
-  CpuMpData = GetCpuMpData ();
-
-  for (ProcessorNumber = 0; ProcessorNumber < CpuMpData->CpuCount; ProcessorNumber++) {
-    if (CpuMpData->CpuData[ProcessorNumber].Waiting) {
-      *NextProcessorNumber = ProcessorNumber;
-      return EFI_SUCCESS;
-    }
-  }
-
-  return EFI_NOT_FOUND;
-}
-
-/** Checks status of specified AP.
-
-  This function checks whether the specified AP has finished the task assigned
-  by StartupThisAP(), and whether timeout expires.
-
-  @param[in]  ProcessorNumber       The handle number of processor.
-
-  @retval EFI_SUCCESS           Specified AP has finished task assigned by StartupThisAPs().
-  @retval EFI_TIMEOUT           The timeout expires.
-  @retval EFI_NOT_READY         Specified AP has not finished task and timeout has not expired.
-**/
-EFI_STATUS
-CheckThisAP (
-  IN UINTN        ProcessorNumber
-  )
-{
-  CPU_MP_DATA     *CpuMpData;
-  CPU_AP_DATA     *CpuData;
-
-  CpuMpData = GetCpuMpData ();
-  CpuData   = &CpuMpData->CpuData[ProcessorNumber];
-
-  //
-  //  Check the CPU state of AP. If it is CpuStateFinished, then the AP has finished its task.
-  //  Only BSP and corresponding AP access this unit of CPU Data. This means the AP will not modify the
-  //  value of state after setting the it to CpuStateFinished, so BSP can safely make use of its value.
-  //
-  //
-  // If the AP finishes for StartupThisAP(), return EFI_SUCCESS.
-  //
-  if (GetApState(CpuData) == CpuStateFinished) {
-    if (CpuData->Finished != NULL) {
-      *(CpuData->Finished) = TRUE;
-    }
-    SetApState (CpuData, CpuStateIdle);
-    return EFI_SUCCESS;
-  } else {
-    //
-    // If timeout expires for StartupThisAP(), report timeout.
-    //
-    if (CheckTimeout (&CpuData->CurrentTime, &CpuData->TotalTime, CpuData->ExpectedTime)) {
-      if (CpuData->Finished != NULL) {
-        *(CpuData->Finished) = FALSE;
-      }
-      //
-      // Reset failed AP to idle state
-      //
-      ResetProcessorToIdleState (ProcessorNumber);
-
-      return EFI_TIMEOUT;
-    }
-  }
-  return EFI_NOT_READY;
-}
-
-/**
-  Checks status of all APs.
-
-  This function checks whether all APs have finished task assigned by StartupAllAPs(),
-  and whether timeout expires.
-
-  @retval EFI_SUCCESS           All APs have finished task assigned by StartupAllAPs().
-  @retval EFI_TIMEOUT           The timeout expires.
-  @retval EFI_NOT_READY         APs have not finished task and timeout has not expired.
-**/
-EFI_STATUS
-CheckAllAPs (
-  VOID
-  )
-{
-  UINTN           ProcessorNumber;
-  UINTN           NextProcessorNumber;
-  UINTN           ListIndex;
-  EFI_STATUS      Status;
-  CPU_MP_DATA     *CpuMpData;
-  CPU_AP_DATA     *CpuData;
-
-  CpuMpData = GetCpuMpData ();
-
-  NextProcessorNumber = 0;
-
-  //
-  // Go through all APs that are responsible for the StartupAllAPs().
-  //
-  for (ProcessorNumber = 0; ProcessorNumber < CpuMpData->CpuCount; ProcessorNumber++) {
-    if (!CpuMpData->CpuData[ProcessorNumber].Waiting) {
-      continue;
-    }
-
-    CpuData = &CpuMpData->CpuData[ProcessorNumber];
-    //
-    // Check the CPU state of AP. If it is CpuStateFinished, then the AP has finished its task.
-    // Only BSP and corresponding AP access this unit of CPU Data. This means the AP will not modify the
-    // value of state after setting the it to CpuStateFinished, so BSP can safely make use of its value.
-    //
-    if (GetApState(CpuData) == CpuStateFinished) {
-      CpuMpData->RunningCount ++;
-      CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;
-      SetApState(CpuData, CpuStateIdle);
-
-      //
-      // If in Single Thread mode, then search for the next waiting AP for execution.
-      //
-      if (CpuMpData->SingleThread) {
-        Status = GetNextWaitingProcessorNumber (&NextProcessorNumber);
-
-        if (!EFI_ERROR (Status)) {
-          WakeUpAP (
-            CpuMpData,
-            FALSE,
-            (UINT32) NextProcessorNumber,
-            CpuMpData->Procedure,
-            CpuMpData->ProcArguments
-            );
-         }
-      }
-    }
-  }
-
-  //
-  // If all APs finish, return EFI_SUCCESS.
-  //
-  if (CpuMpData->RunningCount == CpuMpData->StartCount) {
-    return EFI_SUCCESS;
-  }
-
-  //
-  // If timeout expires, report timeout.
-  //
-  if (CheckTimeout (
-       &CpuMpData->CurrentTime,
-       &CpuMpData->TotalTime,
-       CpuMpData->ExpectedTime)
-       ) {
-    //
-    // If FailedCpuList is not NULL, record all failed APs in it.
-    //
-    if (CpuMpData->FailedCpuList != NULL) {
-      *CpuMpData->FailedCpuList =
-         AllocatePool ((CpuMpData->StartCount - CpuMpData->FinishedCount + 1) * sizeof (UINTN));
-      ASSERT (*CpuMpData->FailedCpuList != NULL);
-    }
-    ListIndex = 0;
-
-    for (ProcessorNumber = 0; ProcessorNumber < CpuMpData->CpuCount; ProcessorNumber++) {
-      //
-      // Check whether this processor is responsible for StartupAllAPs().
-      //
-      if (CpuMpData->CpuData[ProcessorNumber].Waiting) {
-        //
-        // Reset failed APs to idle state
-        //
-        ResetProcessorToIdleState (ProcessorNumber);
-        CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;
-        if (CpuMpData->FailedCpuList != NULL) {
-          (*CpuMpData->FailedCpuList)[ListIndex++] = ProcessorNumber;
-        }
-      }
-    }
-    if (CpuMpData->FailedCpuList != NULL) {
-      (*CpuMpData->FailedCpuList)[ListIndex] = END_OF_CPU_LIST;
-    }
-    return EFI_TIMEOUT;
-  }
-  return EFI_NOT_READY;
-}
-
-/**
-  MP Initialize Library initialization.
-
-  This service will allocate AP reset vector and wakeup all APs to do APs
-  initialization.
-
-  This service must be invoked before all other MP Initialize Library
-  service are invoked.
-
-  @retval  EFI_SUCCESS           MP initialization succeeds.
-  @retval  Others                MP initialization fails.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibInitialize (
-  VOID
-  )
-{
-  CPU_MP_DATA              *OldCpuMpData;
-  CPU_INFO_IN_HOB          *CpuInfoInHob;
-  UINT32                   MaxLogicalProcessorNumber;
-  UINT32                   ApStackSize;
-  MP_ASSEMBLY_ADDRESS_MAP  AddressMap;
-  UINTN                    BufferSize;
-  UINT32                   MonitorFilterSize;
-  VOID                     *MpBuffer;
-  UINTN                    Buffer;
-  CPU_MP_DATA              *CpuMpData;
-  UINT8                    ApLoopMode;
-  UINT8                    *MonitorBuffer;
-  UINTN                    Index;
-  UINTN                    ApResetVectorSize;
-  UINTN                    BackupBufferAddr;
-
-  OldCpuMpData = GetCpuMpDataFromGuidedHob ();
-  if (OldCpuMpData == NULL) {
-    MaxLogicalProcessorNumber = PcdGet32(PcdCpuMaxLogicalProcessorNumber);
-  } else {
-    MaxLogicalProcessorNumber = OldCpuMpData->CpuCount;
-  }
-  ASSERT (MaxLogicalProcessorNumber != 0);
-
-  AsmGetAddressMap (&AddressMap);
-  ApResetVectorSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);
-  ApStackSize = PcdGet32(PcdCpuApStackSize);
-  ApLoopMode  = GetApLoopMode (&MonitorFilterSize);
-
-  BufferSize  = ApStackSize * MaxLogicalProcessorNumber;
-  BufferSize += MonitorFilterSize * MaxLogicalProcessorNumber;
-  BufferSize += sizeof (CPU_MP_DATA);
-  BufferSize += ApResetVectorSize;
-  BufferSize += (sizeof (CPU_AP_DATA) + sizeof (CPU_INFO_IN_HOB))* MaxLogicalProcessorNumber;
-  MpBuffer    = AllocatePages (EFI_SIZE_TO_PAGES (BufferSize));
-  ASSERT (MpBuffer != NULL);
-  ZeroMem (MpBuffer, BufferSize);
-  Buffer = (UINTN) MpBuffer;
-
-  MonitorBuffer    = (UINT8 *) (Buffer + ApStackSize * MaxLogicalProcessorNumber);
-  BackupBufferAddr = (UINTN) MonitorBuffer + MonitorFilterSize * MaxLogicalProcessorNumber;
-  CpuMpData = (CPU_MP_DATA *) (BackupBufferAddr + ApResetVectorSize);
-  CpuMpData->Buffer           = Buffer;
-  CpuMpData->CpuApStackSize   = ApStackSize;
-  CpuMpData->BackupBuffer     = BackupBufferAddr;
-  CpuMpData->BackupBufferSize = ApResetVectorSize;
-  CpuMpData->SaveRestoreFlag  = FALSE;
-  CpuMpData->WakeupBuffer     = (UINTN) -1;
-  CpuMpData->CpuCount         = 1;
-  CpuMpData->BspNumber        = 0;
-  CpuMpData->WaitEvent        = NULL;
-  CpuMpData->SwitchBspFlag    = FALSE;
-  CpuMpData->CpuData          = (CPU_AP_DATA *) (CpuMpData + 1);
-  CpuMpData->CpuInfoInHob     = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);
-  InitializeSpinLock(&CpuMpData->MpLock);
-  //
-  // Save BSP's Control registers to APs
-  //
-  SaveVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters);
-  //
-  // Set BSP basic information
-  //
-  InitializeApData (CpuMpData, 0, 0, CpuMpData->Buffer);
-  //
-  // Save assembly code information
-  //
-  CopyMem (&CpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));
-  //
-  // Finally set AP loop mode
-  //
-  CpuMpData->ApLoopMode = ApLoopMode;
-  DEBUG ((DEBUG_INFO, "AP Loop Mode is %d\n", CpuMpData->ApLoopMode));
-  //
-  // Set up APs wakeup signal buffer
-  //
-  for (Index = 0; Index < MaxLogicalProcessorNumber; Index++) {
-    CpuMpData->CpuData[Index].StartupApSignal =
-      (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);
-  }
-  //
-  // Load Microcode on BSP
-  //
-  MicrocodeDetect (CpuMpData);
-  //
-  // Store BSP's MTRR setting
-  //
-  MtrrGetAllMtrrs (&CpuMpData->MtrrTable);
-
-  if (OldCpuMpData == NULL) {
-    if (MaxLogicalProcessorNumber > 1) {
-      //
-      // Wakeup all APs and calculate the processor count in system
-      //
-      CollectProcessorCount (CpuMpData);
-    }
-  } else {
-    //
-    // APs have been wakeup before, just get the CPU Information
-    // from HOB
-    //
-    CpuMpData->CpuCount  = OldCpuMpData->CpuCount;
-    CpuMpData->BspNumber = OldCpuMpData->BspNumber;
-    CpuMpData->InitFlag  = ApInitReconfig;
-    CpuMpData->CpuInfoInHob = OldCpuMpData->CpuInfoInHob;
-    CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-    for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
-      InitializeSpinLock(&CpuMpData->CpuData[Index].ApLock);
-      if (CpuInfoInHob[Index].InitialApicId >= 255) {
-        CpuMpData->X2ApicEnable = TRUE;
-      }
-      CpuMpData->CpuData[Index].CpuHealthy = (CpuInfoInHob[Index].Health == 0)? TRUE:FALSE;
-      CpuMpData->CpuData[Index].ApFunction = 0;
-      CopyMem (
-        &CpuMpData->CpuData[Index].VolatileRegisters,
-        &CpuMpData->CpuData[0].VolatileRegisters,
-        sizeof (CPU_VOLATILE_REGISTERS)
-        );
-    }
-    if (MaxLogicalProcessorNumber > 1) {
-      //
-      // Wakeup APs to do some AP initialize sync
-      //
-      WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData);
-      //
-      // Wait for all APs finished initialization
-      //
-      while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {
-        CpuPause ();
-      }
-      CpuMpData->InitFlag = ApInitDone;
-      for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
-        SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);
-      }
-    }
-  }
-
-  //
-  // Initialize global data for MP support
-  //
-  InitMpGlobalData (CpuMpData);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Gets detailed MP-related information on the requested processor at the
-  instant this call is made. This service may only be called from the BSP.
-
-  @param[in]  ProcessorNumber       The handle number of processor.
-  @param[out] ProcessorInfoBuffer   A pointer to the buffer where information for
-                                    the requested processor is deposited.
-  @param[out]  HealthData            Return processor health data.
-
-  @retval EFI_SUCCESS             Processor information was returned.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_INVALID_PARAMETER   ProcessorInfoBuffer is NULL.
-  @retval EFI_NOT_FOUND           The processor with the handle specified by
-                                  ProcessorNumber does not exist in the platform.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibGetProcessorInfo (
-  IN  UINTN                      ProcessorNumber,
-  OUT EFI_PROCESSOR_INFORMATION  *ProcessorInfoBuffer,
-  OUT EFI_HEALTH_FLAGS           *HealthData  OPTIONAL
-  )
-{
-  CPU_MP_DATA            *CpuMpData;
-  UINTN                  CallerNumber;
-  CPU_INFO_IN_HOB        *CpuInfoInHob;
-
-  CpuMpData = GetCpuMpData ();
-  CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
-
-  //
-  // Check whether caller processor is BSP
-  //
-  MpInitLibWhoAmI (&CallerNumber);
-  if (CallerNumber != CpuMpData->BspNumber) {
-    return EFI_DEVICE_ERROR;
-  }
-
-  if (ProcessorInfoBuffer == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if (ProcessorNumber >= CpuMpData->CpuCount) {
-    return EFI_NOT_FOUND;
-  }
-
-  ProcessorInfoBuffer->ProcessorId = (UINT64) CpuInfoInHob[ProcessorNumber].ApicId;
-  ProcessorInfoBuffer->StatusFlag  = 0;
-  if (ProcessorNumber == CpuMpData->BspNumber) {
-    ProcessorInfoBuffer->StatusFlag |= PROCESSOR_AS_BSP_BIT;
-  }
-  if (CpuMpData->CpuData[ProcessorNumber].CpuHealthy) {
-    ProcessorInfoBuffer->StatusFlag |= PROCESSOR_HEALTH_STATUS_BIT;
-  }
-  if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateDisabled) {
-    ProcessorInfoBuffer->StatusFlag &= ~PROCESSOR_ENABLED_BIT;
-  } else {
-    ProcessorInfoBuffer->StatusFlag |= PROCESSOR_ENABLED_BIT;
-  }
-
-  //
-  // Get processor location information
-  //
-  GetProcessorLocationByApicId (
-    CpuInfoInHob[ProcessorNumber].ApicId,
-    &ProcessorInfoBuffer->Location.Package,
-    &ProcessorInfoBuffer->Location.Core,
-    &ProcessorInfoBuffer->Location.Thread
-    );
-
-  if (HealthData != NULL) {
-    HealthData->Uint32 = CpuInfoInHob[ProcessorNumber].Health;
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Worker function to switch the requested AP to be the BSP from that point onward.
-
-  @param[in] ProcessorNumber   The handle number of AP that is to become the new BSP.
-  @param[in] EnableOldBSP      If TRUE, then the old BSP will be listed as an
-                               enabled AP. Otherwise, it will be disabled.
-
-  @retval EFI_SUCCESS          BSP successfully switched.
-  @retval others               Failed to switch BSP. 
-
-**/
-EFI_STATUS
-SwitchBSPWorker (
-  IN UINTN                     ProcessorNumber,
-  IN BOOLEAN                   EnableOldBSP
-  )
-{
-  CPU_MP_DATA                  *CpuMpData;
-  UINTN                        CallerNumber;
-  CPU_STATE                    State;
-  MSR_IA32_APIC_BASE_REGISTER  ApicBaseMsr;
-  BOOLEAN                      OldInterruptState;
-  BOOLEAN                      OldTimerInterruptState;
-
-  //
-  // Save and Disable Local APIC timer interrupt
-  //
-  OldTimerInterruptState = GetApicTimerInterruptState ();
-  DisableApicTimerInterrupt ();
-  //
-  // Before send both BSP and AP to a procedure to exchange their roles,
-  // interrupt must be disabled. This is because during the exchange role
-  // process, 2 CPU may use 1 stack. If interrupt happens, the stack will
-  // be corrupted, since interrupt return address will be pushed to stack
-  // by hardware.
-  //
-  OldInterruptState = SaveAndDisableInterrupts ();
-
-  //
-  // Mask LINT0 & LINT1 for the old BSP
-  //
-  DisableLvtInterrupts ();
-
-  CpuMpData = GetCpuMpData ();
-
-  //
-  // Check whether caller processor is BSP
-  //
-  MpInitLibWhoAmI (&CallerNumber);
-  if (CallerNumber != CpuMpData->BspNumber) {
-    return EFI_SUCCESS;
-  }
-
-  if (ProcessorNumber >= CpuMpData->CpuCount) {
-    return EFI_NOT_FOUND;
-  }
-
-  //
-  // Check whether specified AP is disabled
-  //
-  State = GetApState (&CpuMpData->CpuData[ProcessorNumber]);
-  if (State == CpuStateDisabled) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check whether ProcessorNumber specifies the current BSP
-  //
-  if (ProcessorNumber == CpuMpData->BspNumber) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check whether specified AP is busy
-  //
-  if (State == CpuStateBusy) {
-    return EFI_NOT_READY;
-  }
-
-  CpuMpData->BSPInfo.State = CPU_SWITCH_STATE_IDLE;
-  CpuMpData->APInfo.State  = CPU_SWITCH_STATE_IDLE;
-  CpuMpData->SwitchBspFlag = TRUE;
-  CpuMpData->NewBspNumber  = ProcessorNumber;
-
-  //
-  // Clear the BSP bit of MSR_IA32_APIC_BASE
-  //
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-  ApicBaseMsr.Bits.BSP = 0;
-  AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
-
-  //
-  // Need to wakeUp AP (future BSP).
-  //
-  WakeUpAP (CpuMpData, FALSE, ProcessorNumber, FutureBSPProc, CpuMpData);
-
-  AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo);
-
-  //
-  // Set the BSP bit of MSR_IA32_APIC_BASE on new BSP
-  //
-  ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
-  ApicBaseMsr.Bits.BSP = 1;
-  AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
-
-  //
-  // Wait for old BSP finished AP task
-  //
-  while (GetApState (&CpuMpData->CpuData[CallerNumber]) != CpuStateFinished) {
-    CpuPause ();
-  }
-
-  CpuMpData->SwitchBspFlag = FALSE;
-  //
-  // Set old BSP enable state
-  //
-  if (!EnableOldBSP) {
-    SetApState (&CpuMpData->CpuData[CallerNumber], CpuStateDisabled);
-  } else {
-    SetApState (&CpuMpData->CpuData[CallerNumber], CpuStateIdle);
-  }
-  //
-  // Save new BSP number
-  //
-  CpuMpData->BspNumber = (UINT32) ProcessorNumber;
-
-  //
-  // Restore interrupt state.
-  //
-  SetInterruptState (OldInterruptState);
-
-  if (OldTimerInterruptState) {
-    EnableApicTimerInterrupt ();
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Worker function to let the caller enable or disable an AP from this point onward.
-  This service may only be called from the BSP.
-
-  @param[in] ProcessorNumber   The handle number of AP.
-  @param[in] EnableAP          Specifies the new state for the processor for
-                               enabled, FALSE for disabled.
-  @param[in] HealthFlag        If not NULL, a pointer to a value that specifies
-                               the new health status of the AP.
-
-  @retval EFI_SUCCESS          The specified AP was enabled or disabled successfully.
-  @retval others               Failed to Enable/Disable AP.
-
-**/
-EFI_STATUS
-EnableDisableApWorker (
-  IN  UINTN                     ProcessorNumber,
-  IN  BOOLEAN                   EnableAP,
-  IN  UINT32                    *HealthFlag OPTIONAL
-  )
-{
-  CPU_MP_DATA               *CpuMpData;
-  UINTN                     CallerNumber;
-
-  CpuMpData = GetCpuMpData ();
-
-  //
-  // Check whether caller processor is BSP
-  //
-  MpInitLibWhoAmI (&CallerNumber);
-  if (CallerNumber != CpuMpData->BspNumber) {
-    return EFI_DEVICE_ERROR;
-  }
-
-  if (ProcessorNumber == CpuMpData->BspNumber) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if (ProcessorNumber >= CpuMpData->CpuCount) {
-    return EFI_NOT_FOUND;
-  }
-
-  if (!EnableAP) {
-    SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateDisabled);
-  } else {
-    SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateIdle);
-  }
-
-  if (HealthFlag != NULL) {
-    CpuMpData->CpuData[ProcessorNumber].CpuHealthy =
-          (BOOLEAN) ((*HealthFlag & PROCESSOR_HEALTH_STATUS_BIT) != 0);
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
-  This return the handle number for the calling processor.  This service may be
-  called from the BSP and APs.
-
-  @param[out] ProcessorNumber  Pointer to the handle number of AP.
-                               The range is from 0 to the total number of
-                               logical processors minus 1. The total number of
-                               logical processors can be retrieved by
-                               MpInitLibGetNumberOfProcessors().
-
-  @retval EFI_SUCCESS             The current processor handle number was returned
-                                  in ProcessorNumber.
-  @retval EFI_INVALID_PARAMETER   ProcessorNumber is NULL.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibWhoAmI (
-  OUT UINTN                    *ProcessorNumber
-  )
-{
-  CPU_MP_DATA           *CpuMpData;
-
-  if (ProcessorNumber == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  CpuMpData = GetCpuMpData ();
-
-  return GetProcessorNumber (CpuMpData, ProcessorNumber);
-}
-
-/**
-  Retrieves the number of logical processor in the platform and the number of
-  those logical processors that are enabled on this boot. This service may only
-  be called from the BSP.
-
-  @param[out] NumberOfProcessors          Pointer to the total number of logical
-                                          processors in the system, including the BSP
-                                          and disabled APs.
-  @param[out] NumberOfEnabledProcessors   Pointer to the number of enabled logical
-                                          processors that exist in system, including
-                                          the BSP.
-
-  @retval EFI_SUCCESS             The number of logical processors and enabled
-                                  logical processors was retrieved.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_INVALID_PARAMETER   NumberOfProcessors is NULL and NumberOfEnabledProcessors
-                                  is NULL.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibGetNumberOfProcessors (
-  OUT UINTN                     *NumberOfProcessors,       OPTIONAL
-  OUT UINTN                     *NumberOfEnabledProcessors OPTIONAL
-  )
-{
-  CPU_MP_DATA             *CpuMpData;
-  UINTN                   CallerNumber;
-  UINTN                   ProcessorNumber;
-  UINTN                   EnabledProcessorNumber;
-  UINTN                   Index;
-
-  CpuMpData = GetCpuMpData ();
-
-  if ((NumberOfProcessors == NULL) && (NumberOfEnabledProcessors == NULL)) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check whether caller processor is BSP
-  //
-  MpInitLibWhoAmI (&CallerNumber);
-  if (CallerNumber != CpuMpData->BspNumber) {
-    return EFI_DEVICE_ERROR;
-  }
-
-  ProcessorNumber        = CpuMpData->CpuCount;
-  EnabledProcessorNumber = 0;
-  for (Index = 0; Index < ProcessorNumber; Index++) {
-    if (GetApState (&CpuMpData->CpuData[Index]) != CpuStateDisabled) {
-      EnabledProcessorNumber ++;
-    }
-  }
-
-  if (NumberOfProcessors != NULL) {
-    *NumberOfProcessors = ProcessorNumber;
-  }
-  if (NumberOfEnabledProcessors != NULL) {
-    *NumberOfEnabledProcessors = EnabledProcessorNumber;
-  }
-
-  return EFI_SUCCESS;
-}
-
-
-/**
-  Worker function to execute a caller provided function on all enabled APs.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system.
-  @param[in]  SingleThread            If TRUE, then all the enabled APs execute
-                                      the function specified by Procedure one by
-                                      one, in ascending order of processor handle
-                                      number.  If FALSE, then all the enabled APs
-                                      execute the function specified by Procedure
-                                      simultaneously.
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      APs to return from Procedure, either for
-                                      blocking or non-blocking mode.
-  @param[in]  ProcedureArgument       The parameter passed into Procedure for
-                                      all APs.
-  @param[out] FailedCpuList           If all APs finish successfully, then its
-                                      content is set to NULL. If not all APs
-                                      finish before timeout expires, then its
-                                      content is set to address of the buffer
-                                      holding handle numbers of the failed APs.
-
-  @retval EFI_SUCCESS             In blocking mode, all APs have finished before
-                                  the timeout expired.
-  @retval EFI_SUCCESS             In non-blocking mode, function has been dispatched
-                                  to all enabled APs.
-  @retval others                  Failed to Startup all APs.
-
-**/
-EFI_STATUS
-StartupAllAPsWorker (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  BOOLEAN                   SingleThread,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT UINTN                     **FailedCpuList         OPTIONAL
-  )
-{
-  EFI_STATUS              Status;
-  CPU_MP_DATA             *CpuMpData;
-  UINTN                   ProcessorCount;
-  UINTN                   ProcessorNumber;
-  UINTN                   CallerNumber;
-  CPU_AP_DATA             *CpuData;
-  BOOLEAN                 HasEnabledAp;
-  CPU_STATE               ApState;
-
-  CpuMpData = GetCpuMpData ();
-
-  if (FailedCpuList != NULL) {
-    *FailedCpuList = NULL;
-  }
-
-  if (CpuMpData->CpuCount == 1) {
-    return EFI_NOT_STARTED;
-  }
-
-  if (Procedure == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check whether caller processor is BSP
-  //
-  MpInitLibWhoAmI (&CallerNumber);
-  if (CallerNumber != CpuMpData->BspNumber) {
-    return EFI_DEVICE_ERROR;
-  }
-
-  //
-  // Update AP state
-  //
-  CheckAndUpdateApsStatus ();
-
-  ProcessorCount = CpuMpData->CpuCount;
-  HasEnabledAp   = FALSE;
-  //
-  // Check whether all enabled APs are idle.
-  // If any enabled AP is not idle, return EFI_NOT_READY.
-  //
-  for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {
-    CpuData = &CpuMpData->CpuData[ProcessorNumber];
-    if (ProcessorNumber != CpuMpData->BspNumber) {
-      ApState = GetApState (CpuData);
-      if (ApState != CpuStateDisabled) {
-        HasEnabledAp = TRUE;
-        if (ApState != CpuStateIdle) {
-          //
-          // If any enabled APs are busy, return EFI_NOT_READY.
-          //
-          return EFI_NOT_READY;
-        }
-      }
-    }
-  }
-
-  if (!HasEnabledAp) {
-    //
-    // If no enabled AP exists, return EFI_NOT_STARTED.
-    //
-    return EFI_NOT_STARTED;
-  }
-
-  CpuMpData->StartCount = 0;
-  for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {
-    CpuData = &CpuMpData->CpuData[ProcessorNumber];
-    CpuData->Waiting = FALSE;
-    if (ProcessorNumber != CpuMpData->BspNumber) {
-      if (CpuData->State == CpuStateIdle) {
-        //
-        // Mark this processor as responsible for current calling.
-        //
-        CpuData->Waiting = TRUE;
-        CpuMpData->StartCount++;
-      }
-    }
-  }
-
-  CpuMpData->Procedure     = Procedure;
-  CpuMpData->ProcArguments = ProcedureArgument;
-  CpuMpData->SingleThread  = SingleThread;
-  CpuMpData->FinishedCount = 0;
-  CpuMpData->RunningCount  = 0;
-  CpuMpData->FailedCpuList = FailedCpuList;
-  CpuMpData->ExpectedTime  = CalculateTimeout (
-                               TimeoutInMicroseconds,
-                               &CpuMpData->CurrentTime
-                               );
-  CpuMpData->TotalTime     = 0;
-  CpuMpData->WaitEvent     = WaitEvent;
-
-  if (!SingleThread) {
-    WakeUpAP (CpuMpData, TRUE, 0, Procedure, ProcedureArgument);
-  } else {
-    for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {
-      if (ProcessorNumber == CallerNumber) {
-        continue;
-      }
-      if (CpuMpData->CpuData[ProcessorNumber].Waiting) {
-        WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument);
-        break;
-      }
-    }
-  }
-
-  Status = EFI_SUCCESS;
-  if (WaitEvent == NULL) {
-    do {
-      Status = CheckAllAPs ();
-    } while (Status == EFI_NOT_READY);
-  }
-
-  return Status;
-}
-
-/**
-  Worker function to let the caller get one enabled AP to execute a caller-provided
-  function.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system.
-  @param[in]  ProcessorNumber         The handle number of the AP.
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      APs to return from Procedure, either for
-                                      blocking or non-blocking mode.
-  @param[in]  ProcedureArgument       The parameter passed into Procedure for
-                                      all APs.
-  @param[out] Finished                If AP returns from Procedure before the
-                                      timeout expires, its content is set to TRUE.
-                                      Otherwise, the value is set to FALSE.
-
-  @retval EFI_SUCCESS             In blocking mode, specified AP finished before
-                                  the timeout expires.
-  @retval others                  Failed to Startup AP.
-
-**/
-EFI_STATUS
-StartupThisAPWorker (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  UINTN                     ProcessorNumber,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT BOOLEAN                   *Finished               OPTIONAL
-  )
-{
-  EFI_STATUS              Status;
-  CPU_MP_DATA             *CpuMpData;
-  CPU_AP_DATA             *CpuData;
-  UINTN                   CallerNumber;
-
-  CpuMpData = GetCpuMpData ();
-
-  if (Finished != NULL) {
-    *Finished = FALSE;
-  }
-
-  //
-  // Check whether caller processor is BSP
-  //
-  MpInitLibWhoAmI (&CallerNumber);
-  if (CallerNumber != CpuMpData->BspNumber) {
-    return EFI_DEVICE_ERROR;
-  }
-
-  //
-  // Check whether processor with the handle specified by ProcessorNumber exists
-  //
-  if (ProcessorNumber >= CpuMpData->CpuCount) {
-    return EFI_NOT_FOUND;
-  }
-
-  //
-  // Check whether specified processor is BSP
-  //
-  if (ProcessorNumber == CpuMpData->BspNumber) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Check parameter Procedure
-  //
-  if (Procedure == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // Update AP state
-  //
-  CheckAndUpdateApsStatus ();
-
-  //
-  // Check whether specified AP is disabled
-  //
-  if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateDisabled) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  //
-  // If WaitEvent is not NULL, execute in non-blocking mode.
-  // BSP saves data for CheckAPsStatus(), and returns EFI_SUCCESS.
-  // CheckAPsStatus() will check completion and timeout periodically.
-  //
-  CpuData = &CpuMpData->CpuData[ProcessorNumber];
-  CpuData->WaitEvent    = WaitEvent;
-  CpuData->Finished     = Finished;
-  CpuData->ExpectedTime = CalculateTimeout (TimeoutInMicroseconds, &CpuData->CurrentTime);
-  CpuData->TotalTime    = 0;
-
-  WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument);
-
-  //
-  // If WaitEvent is NULL, execute in blocking mode.
-  // BSP checks AP's state until it finishes or TimeoutInMicrosecsond expires.
-  //
-  Status = EFI_SUCCESS;
-  if (WaitEvent == NULL) {
-    do {
-      Status = CheckThisAP (ProcessorNumber);
-    } while (Status == EFI_NOT_READY);
-  }
-
-  return Status;
-}
-
-/**
-  Get pointer to CPU MP Data structure from GUIDed HOB.
-
-  @return  The pointer to CPU MP Data structure.
-**/
-CPU_MP_DATA *
-GetCpuMpDataFromGuidedHob (
-  VOID
-  )
-{
-  EFI_HOB_GUID_TYPE       *GuidHob;
-  VOID                    *DataInHob;
-  CPU_MP_DATA             *CpuMpData;
-
-  CpuMpData = NULL;
-  GuidHob = GetFirstGuidHob (&mCpuInitMpLibHobGuid);
-  if (GuidHob != NULL) {
-    DataInHob = GET_GUID_HOB_DATA (GuidHob);
-    CpuMpData = (CPU_MP_DATA *) (*(UINTN *) DataInHob);
-  }
-  return CpuMpData;
-}
-
-/**
-  Get available system memory below 1MB by specified size.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-BackupAndPrepareWakeupBuffer(
-  IN CPU_MP_DATA              *CpuMpData
-  )
-{
-  CopyMem (
-    (VOID *) CpuMpData->BackupBuffer,
-    (VOID *) CpuMpData->WakeupBuffer,
-    CpuMpData->BackupBufferSize
-    );
-  CopyMem (
-    (VOID *) CpuMpData->WakeupBuffer,
-    (VOID *) CpuMpData->AddressMap.RendezvousFunnelAddress,
-    CpuMpData->AddressMap.RendezvousFunnelSize
-    );
-}
-
-/**
-  Restore wakeup buffer data.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-RestoreWakeupBuffer(
-  IN CPU_MP_DATA              *CpuMpData
-  )
-{
-  CopyMem (
-    (VOID *) CpuMpData->WakeupBuffer,
-    (VOID *) CpuMpData->BackupBuffer,
-    CpuMpData->BackupBufferSize
-    );
-}
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
deleted file mode 100644
index 7a272d78ec..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ /dev/null
@@ -1,594 +0,0 @@
-/** @file
-  Common header file for MP Initialize Library.
-
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _MP_LIB_H_
-#define _MP_LIB_H_
-
-#include <PiPei.h>
-
-#include <Register/Cpuid.h>
-#include <Register/Msr.h>
-#include <Register/LocalApic.h>
-#include <Register/Microcode.h>
-
-#include <Library/MpInitLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/CpuLib.h>
-#include <Library/UefiCpuLib.h>
-#include <Library/TimerLib.h>
-#include <Library/SynchronizationLib.h>
-#include <Library/MtrrLib.h>
-#include <Library/HobLib.h>
-
-#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')
-
-#define CPU_INIT_MP_LIB_HOB_GUID \
-  { \
-    0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \
-  }
-
-//
-//  The MP data for switch BSP
-//
-#define CPU_SWITCH_STATE_IDLE   0
-#define CPU_SWITCH_STATE_STORED 1
-#define CPU_SWITCH_STATE_LOADED 2
-
-//
-// CPU exchange information for switch BSP
-//
-typedef struct {
-  UINT8             State;        // offset 0
-  UINTN             StackPointer; // offset 4 / 8
-  IA32_DESCRIPTOR   Gdtr;         // offset 8 / 16
-  IA32_DESCRIPTOR   Idtr;         // offset 14 / 26
-} CPU_EXCHANGE_ROLE_INFO;
-
-//
-// AP loop state when APs are in idle state
-// It's value is the same with PcdCpuApLoopMode
-//
-typedef enum {
-  ApInHltLoop   = 1,
-  ApInMwaitLoop = 2,
-  ApInRunLoop   = 3
-} AP_LOOP_MODE;
-
-//
-// AP initialization state during APs wakeup
-//
-typedef enum {
-  ApInitConfig   = 1,
-  ApInitReconfig = 2,
-  ApInitDone     = 3
-} AP_INIT_STATE;
-
-//
-// AP state
-//
-typedef enum {
-  CpuStateIdle,
-  CpuStateReady,
-  CpuStateBusy,
-  CpuStateFinished,
-  CpuStateDisabled
-} CPU_STATE;
-
-//
-// CPU volatile registers around INIT-SIPI-SIPI
-//
-typedef struct {
-  UINTN                          Cr0;
-  UINTN                          Cr3;
-  UINTN                          Cr4;
-  UINTN                          Dr0;
-  UINTN                          Dr1;
-  UINTN                          Dr2;
-  UINTN                          Dr3;
-  UINTN                          Dr6;
-  UINTN                          Dr7;
-} CPU_VOLATILE_REGISTERS;
-
-//
-// AP related data
-//
-typedef struct {
-  SPIN_LOCK                      ApLock;
-  volatile UINT32                *StartupApSignal;
-  volatile UINTN                 ApFunction;
-  volatile UINTN                 ApFunctionArgument;
-  BOOLEAN                        CpuHealthy;
-  volatile CPU_STATE             State;
-  CPU_VOLATILE_REGISTERS         VolatileRegisters;
-  BOOLEAN                        Waiting;
-  BOOLEAN                        *Finished;
-  UINT64                         ExpectedTime;
-  UINT64                         CurrentTime;
-  UINT64                         TotalTime;
-  EFI_EVENT                      WaitEvent;
-} CPU_AP_DATA;
-
-//
-// Basic CPU information saved in Guided HOB.
-// Because the contents will be shard between PEI and DXE,
-// we need to make sure the each fields offset same in different
-// architecture.
-//
-#pragma pack (1)
-typedef struct {
-  UINT32                         InitialApicId;
-  UINT32                         ApicId;
-  UINT32                         Health;
-  UINT64                         ApTopOfStack;
-} CPU_INFO_IN_HOB;
-#pragma pack ()
-
-//
-// AP reset code information including code address and size,
-// this structure will be shared be C code and assembly code.
-// It is natural aligned by design.
-//
-typedef struct {
-  UINT8             *RendezvousFunnelAddress;
-  UINTN             ModeEntryOffset;
-  UINTN             RendezvousFunnelSize;
-  UINT8             *RelocateApLoopFuncAddress;
-  UINTN             RelocateApLoopFuncSize;
-} MP_ASSEMBLY_ADDRESS_MAP;
-
-typedef struct _CPU_MP_DATA  CPU_MP_DATA;
-
-#pragma pack(1)
-
-//
-// MP CPU exchange information for AP reset code
-// This structure is required to be packed because fixed field offsets
-// into this structure are used in assembly code in this module
-//
-typedef struct {
-  UINTN                 Lock;
-  UINTN                 StackStart;
-  UINTN                 StackSize;
-  UINTN                 CFunction;
-  IA32_DESCRIPTOR       GdtrProfile;
-  IA32_DESCRIPTOR       IdtrProfile;
-  UINTN                 BufferStart;
-  UINTN                 ModeOffset;
-  UINTN                 NumApsExecuting;
-  UINTN                 CodeSegment;
-  UINTN                 DataSegment;
-  UINTN                 EnableExecuteDisable;
-  UINTN                 Cr3;
-  UINTN                 InitFlag;
-  CPU_INFO_IN_HOB       *CpuInfo;
-  CPU_MP_DATA           *CpuMpData;
-} MP_CPU_EXCHANGE_INFO;
-
-#pragma pack()
-
-//
-// CPU MP Data save in memory
-//
-struct _CPU_MP_DATA {
-  UINT64                         CpuInfoInHob;
-  UINT32                         CpuCount;
-  UINT32                         BspNumber;
-  //
-  // The above fields data will be passed from PEI to DXE
-  // Please make sure the fields offset same in the different
-  // architecture.
-  //
-  SPIN_LOCK                      MpLock;
-  UINTN                          Buffer;
-  UINTN                          CpuApStackSize;
-  MP_ASSEMBLY_ADDRESS_MAP        AddressMap;
-  UINTN                          WakeupBuffer;
-  UINTN                          BackupBuffer;
-  UINTN                          BackupBufferSize;
-  BOOLEAN                        SaveRestoreFlag;
-
-  volatile UINT32                StartCount;
-  volatile UINT32                FinishedCount;
-  volatile UINT32                RunningCount;
-  BOOLEAN                        SingleThread;
-  EFI_AP_PROCEDURE               Procedure;
-  VOID                           *ProcArguments;
-  BOOLEAN                        *Finished;
-  UINT64                         ExpectedTime;
-  UINT64                         CurrentTime;
-  UINT64                         TotalTime;
-  EFI_EVENT                      WaitEvent;
-  UINTN                          **FailedCpuList;
-
-  AP_INIT_STATE                  InitFlag;
-  BOOLEAN                        X2ApicEnable;
-  BOOLEAN                        SwitchBspFlag;
-  UINTN                          NewBspNumber;
-  CPU_EXCHANGE_ROLE_INFO         BSPInfo;
-  CPU_EXCHANGE_ROLE_INFO         APInfo;
-  MTRR_SETTINGS                  MtrrTable;
-  UINT8                          ApLoopMode;
-  UINT8                          ApTargetCState;
-  UINT16                         PmCodeSegment;
-  CPU_AP_DATA                    *CpuData;
-  volatile MP_CPU_EXCHANGE_INFO  *MpCpuExchangeInfo;
-
-  UINT32                         CurrentTimerCount;
-  UINTN                          DivideValue;
-  UINT8                          Vector;
-  BOOLEAN                        PeriodicMode;
-  BOOLEAN                        TimerInterruptState;
-};
-
-extern EFI_GUID mCpuInitMpLibHobGuid;
-
-/**
-  Assembly code to place AP into safe loop mode.
-
-  Place AP into targeted C-State if MONITOR is supported, otherwise
-  place AP into hlt state.
-  Place AP in protected mode if the current is long mode. Due to AP maybe
-  wakeup by some hardware event. It could avoid accessing page table that
-  may not available during booting to OS.
-
-  @param[in] MwaitSupport    TRUE indicates MONITOR is supported.
-                             FALSE indicates MONITOR is not supported.
-  @param[in] ApTargetCState  Target C-State value.
-  @param[in] PmCodeSegment   Protected mode code segment value.
-**/
-typedef
-VOID
-(EFIAPI * ASM_RELOCATE_AP_LOOP) (
-  IN BOOLEAN                 MwaitSupport,
-  IN UINTN                   ApTargetCState,
-  IN UINTN                   PmCodeSegment,
-  IN UINTN                   TopOfApStack,
-  IN UINTN                   NumberToFinish
-  );
-
-/**
-  Assembly code to get starting address and size of the rendezvous entry for APs.
-  Information for fixing a jump instruction in the code is also returned.
-
-  @param[out] AddressMap  Output buffer for address map information.
-**/
-VOID
-EFIAPI
-AsmGetAddressMap (
-  OUT MP_ASSEMBLY_ADDRESS_MAP    *AddressMap
-  );
-
-/**
-  This function is called by both the BSP and the AP which is to become the BSP to
-  Exchange execution context including stack between them. After return from this
-  function, the BSP becomes AP and the AP becomes the BSP.
-
-  @param[in] MyInfo      Pointer to buffer holding the exchanging information for the executing processor.
-  @param[in] OthersInfo  Pointer to buffer holding the exchanging information for the peer.
-
-**/
-VOID
-EFIAPI
-AsmExchangeRole (
-  IN CPU_EXCHANGE_ROLE_INFO    *MyInfo,
-  IN CPU_EXCHANGE_ROLE_INFO    *OthersInfo
-  );
-
-/**
-  Get the pointer to CPU MP Data structure.
-
-  @return  The pointer to CPU MP Data structure.
-**/
-CPU_MP_DATA *
-GetCpuMpData (
-  VOID
-  );
-
-/**
-  Save the pointer to CPU MP Data structure.
-
-  @param[in] CpuMpData  The pointer to CPU MP Data structure will be saved.
-**/
-VOID
-SaveCpuMpData (
-  IN CPU_MP_DATA   *CpuMpData
-  );
-
-/**
-  Allocate reset vector buffer.
-
-  @param[in, out]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-AllocateResetVector (
-  IN OUT CPU_MP_DATA          *CpuMpData
-  );
-
-/**
-  Free AP reset vector buffer.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-FreeResetVector (
-  IN CPU_MP_DATA              *CpuMpData
-  );
-
-/**
-  This function will be called by BSP to wakeup AP.
-
-  @param[in] CpuMpData          Pointer to CPU MP Data
-  @param[in] Broadcast          TRUE:  Send broadcast IPI to all APs
-                                FALSE: Send IPI to AP by ApicId
-  @param[in] ProcessorNumber    The handle number of specified processor
-  @param[in] Procedure          The function to be invoked by AP
-  @param[in] ProcedureArgument  The argument to be passed into AP function
-**/
-VOID
-WakeUpAP (
-  IN CPU_MP_DATA               *CpuMpData,
-  IN BOOLEAN                   Broadcast,
-  IN UINTN                     ProcessorNumber,
-  IN EFI_AP_PROCEDURE          Procedure,              OPTIONAL
-  IN VOID                      *ProcedureArgument      OPTIONAL
-  );
-
-/**
-  Initialize global data for MP support.
-
-  @param[in] CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-InitMpGlobalData (
-  IN CPU_MP_DATA               *CpuMpData
-  );
-
-/**
-  Worker function to execute a caller provided function on all enabled APs.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system.
-  @param[in]  SingleThread            If TRUE, then all the enabled APs execute
-                                      the function specified by Procedure one by
-                                      one, in ascending order of processor handle
-                                      number.  If FALSE, then all the enabled APs
-                                      execute the function specified by Procedure
-                                      simultaneously.
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      APs to return from Procedure, either for
-                                      blocking or non-blocking mode.
-  @param[in]  ProcedureArgument       The parameter passed into Procedure for
-                                      all APs.
-  @param[out] FailedCpuList           If all APs finish successfully, then its
-                                      content is set to NULL. If not all APs
-                                      finish before timeout expires, then its
-                                      content is set to address of the buffer
-                                      holding handle numbers of the failed APs.
-
-  @retval EFI_SUCCESS             In blocking mode, all APs have finished before
-                                  the timeout expired.
-  @retval EFI_SUCCESS             In non-blocking mode, function has been dispatched
-                                  to all enabled APs.
-  @retval others                  Failed to Startup all APs.
-
-**/
-EFI_STATUS
-StartupAllAPsWorker (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  BOOLEAN                   SingleThread,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT UINTN                     **FailedCpuList         OPTIONAL
-  );
-
-/**
-  Worker function to let the caller get one enabled AP to execute a caller-provided
-  function.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system.
-  @param[in]  ProcessorNumber         The handle number of the AP.
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      APs to return from Procedure, either for
-                                      blocking or non-blocking mode.
-  @param[in]  ProcedureArgument       The parameter passed into Procedure for
-                                      all APs.
-  @param[out] Finished                If AP returns from Procedure before the
-                                      timeout expires, its content is set to TRUE.
-                                      Otherwise, the value is set to FALSE.
-
-  @retval EFI_SUCCESS             In blocking mode, specified AP finished before
-                                  the timeout expires.
-  @retval others                  Failed to Startup AP.
-
-**/
-EFI_STATUS
-StartupThisAPWorker (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  UINTN                     ProcessorNumber,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT BOOLEAN                   *Finished               OPTIONAL
-  );
-
-/**
-  Worker function to switch the requested AP to be the BSP from that point onward.
-
-  @param[in] ProcessorNumber   The handle number of AP that is to become the new BSP.
-  @param[in] EnableOldBSP      If TRUE, then the old BSP will be listed as an
-                               enabled AP. Otherwise, it will be disabled.
-
-  @retval EFI_SUCCESS          BSP successfully switched.
-  @retval others               Failed to switch BSP. 
-
-**/
-EFI_STATUS
-SwitchBSPWorker (
-  IN UINTN                     ProcessorNumber,
-  IN BOOLEAN                   EnableOldBSP
-  );
-
-/**
-  Worker function to let the caller enable or disable an AP from this point onward.
-  This service may only be called from the BSP.
-
-  @param[in] ProcessorNumber   The handle number of AP.
-  @param[in] EnableAP          Specifies the new state for the processor for
-                               enabled, FALSE for disabled.
-  @param[in] HealthFlag        If not NULL, a pointer to a value that specifies
-                               the new health status of the AP.
-
-  @retval EFI_SUCCESS          The specified AP was enabled or disabled successfully.
-  @retval others               Failed to Enable/Disable AP.
-
-**/
-EFI_STATUS
-EnableDisableApWorker (
-  IN  UINTN                     ProcessorNumber,
-  IN  BOOLEAN                   EnableAP,
-  IN  UINT32                    *HealthFlag OPTIONAL
-  );
-
-/**
-  Get pointer to CPU MP Data structure from GUIDed HOB.
-
-  @return  The pointer to CPU MP Data structure.
-**/
-CPU_MP_DATA *
-GetCpuMpDataFromGuidedHob (
-  VOID
-  );
-
-/** Checks status of specified AP.
-
-  This function checks whether the specified AP has finished the task assigned
-  by StartupThisAP(), and whether timeout expires.
-
-  @param[in]  ProcessorNumber       The handle number of processor.
-
-  @retval EFI_SUCCESS           Specified AP has finished task assigned by StartupThisAPs().
-  @retval EFI_TIMEOUT           The timeout expires.
-  @retval EFI_NOT_READY         Specified AP has not finished task and timeout has not expired.
-**/
-EFI_STATUS
-CheckThisAP (
-  IN UINTN        ProcessorNumber
-  );
-
-/**
-  Checks status of all APs.
-
-  This function checks whether all APs have finished task assigned by StartupAllAPs(),
-  and whether timeout expires.
-
-  @retval EFI_SUCCESS           All APs have finished task assigned by StartupAllAPs().
-  @retval EFI_TIMEOUT           The timeout expires.
-  @retval EFI_NOT_READY         APs have not finished task and timeout has not expired.
-**/
-EFI_STATUS
-CheckAllAPs (
-  VOID
-  );
-
-/**
-  Checks APs status and updates APs status if needed.
-
-**/
-VOID
-CheckAndUpdateApsStatus (
-  VOID
-  );
-
-/**
-  Detect whether specified processor can find matching microcode patch and load it.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-MicrocodeDetect (
-  IN CPU_MP_DATA             *CpuMpData
-  );
-
-/**
-  Detect whether Mwait-monitor feature is supported.
-
-  @retval TRUE    Mwait-monitor feature is supported.
-  @retval FALSE   Mwait-monitor feature is not supported.
-**/
-BOOLEAN
-IsMwaitSupport (
-  VOID
-  );
-
-/**
-  Notify function on End Of PEI PPI.
-
-  On S3 boot, this function will restore wakeup buffer data.
-  On normal boot, this function will flag wakeup buffer to be un-used type.
-
-  @param[in]  PeiServices        The pointer to the PEI Services Table.
-  @param[in]  NotifyDescriptor   Address of the notification descriptor data structure.
-  @param[in]  Ppi                Address of the PPI that was installed.
-
-  @retval EFI_SUCCESS        When everything is OK.
-**/
-EFI_STATUS
-EFIAPI
-CpuMpEndOfPeiCallback (
-  IN EFI_PEI_SERVICES             **PeiServices,
-  IN EFI_PEI_NOTIFY_DESCRIPTOR    *NotifyDescriptor,
-  IN VOID                         *Ppi
-  );
-
-/**
-  Get available system memory below 1MB by specified size.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-BackupAndPrepareWakeupBuffer(
-  IN CPU_MP_DATA              *CpuMpData
-  );
-
-/**
-  Restore wakeup buffer data.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-RestoreWakeupBuffer(
-  IN CPU_MP_DATA              *CpuMpData
-  );
-
-/**
-  Enable Debug Agent to support source debugging on AP function.
-
-**/
-VOID
-EnableDebugAgent (
-  VOID
-  );
-
-#endif
-
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
deleted file mode 100644
index 0c6873da79..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ /dev/null
@@ -1,70 +0,0 @@
-## @file
-#  MP Initialize Library instance for PEI driver.
-#
-#  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PeiMpInitLib
-  MODULE_UNI_FILE                = PeiMpInitLib.uni
-  FILE_GUID                      = B00F6090-7739-4830-B906-E0032D388987
-  MODULE_TYPE                    = PEIM
-  VERSION_STRING                 = 1.1
-  LIBRARY_CLASS                  = MpInitLib|PEIM
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.IA32]
-  Ia32/MpEqu.inc
-  Ia32/MpFuncs.nasm
-
-[Sources.X64]
-  X64/MpEqu.inc
-  X64/MpFuncs.nasm
-
-[Sources.common]
-  PeiMpLib.c
-  MpLib.c
-  MpLib.h
-  Microcode.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  LocalApicLib
-  MemoryAllocationLib
-  HobLib
-  PeiServicesLib
-  MtrrLib
-  CpuLib
-  UefiCpuLib
-  SynchronizationLib
-
-[Ppis]
-  gEfiEndOfPeiSignalPpiGuid                     ## NOTIFY
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber        ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds      ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize                      ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress            ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize         ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode                       ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate                   ## SOMETIMES_CONSUMES
-
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.uni b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.uni
deleted file mode 100644
index d16f306685..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// MP Initialize Library instance for PEI driver.
-//
-// MP Initialize Library instance for PEI driver.
-//
-// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "MP Initialize Library instance for PEI driver."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "MP Initialize Library instance for PEI driver."
-
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
deleted file mode 100644
index fb1d48fad8..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
+++ /dev/null
@@ -1,624 +0,0 @@
-/** @file
-  MP initialize support functions for PEI phase.
-
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "MpLib.h"
-#include <Ppi/EndOfPeiPhase.h>
-#include <Library/PeiServicesLib.h>
-
-//
-// Global PEI notify function descriptor on EndofPei event
-//
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mMpInitLibNotifyList = {
-  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
-  &gEfiEndOfPeiSignalPpiGuid,
-  CpuMpEndOfPeiCallback
-};
-
-
-/**
-  Enable Debug Agent to support source debugging on AP function.
-
-**/
-VOID
-EnableDebugAgent (
-  VOID
-  )
-{
-}
-
-/**
-  Get pointer to CPU MP Data structure.
-
-  @return  The pointer to CPU MP Data structure.
-**/
-CPU_MP_DATA *
-GetCpuMpData (
-  VOID
-  )
-{
-  CPU_MP_DATA      *CpuMpData;
-
-  CpuMpData = GetCpuMpDataFromGuidedHob ();
-  ASSERT (CpuMpData != NULL);
-  return CpuMpData;
-}
-
-/**
-  Save the pointer to CPU MP Data structure.
-
-  @param[in] CpuMpData  The pointer to CPU MP Data structure will be saved.
-**/
-VOID
-SaveCpuMpData (
-  IN CPU_MP_DATA   *CpuMpData
-  )
-{
-  UINT64           Data64;
-  //
-  // Build location of CPU MP DATA buffer in HOB
-  //
-  Data64 = (UINT64) (UINTN) CpuMpData;
-  BuildGuidDataHob (
-    &mCpuInitMpLibHobGuid,
-    (VOID *) &Data64,
-    sizeof (UINT64)
-    );
-}
-
-/**
-  Notify function on End Of PEI PPI.
-
-  On S3 boot, this function will restore wakeup buffer data.
-  On normal boot, this function will flag wakeup buffer to be un-used type.
-
-  @param[in]  PeiServices        The pointer to the PEI Services Table.
-  @param[in]  NotifyDescriptor   Address of the notification descriptor data structure.
-  @param[in]  Ppi                Address of the PPI that was installed.
-
-  @retval EFI_SUCCESS        When everything is OK.
-**/
-EFI_STATUS
-EFIAPI
-CpuMpEndOfPeiCallback (
-  IN EFI_PEI_SERVICES             **PeiServices,
-  IN EFI_PEI_NOTIFY_DESCRIPTOR    *NotifyDescriptor,
-  IN VOID                         *Ppi
-  )
-{
-  EFI_STATUS                Status;
-  EFI_BOOT_MODE             BootMode;
-  CPU_MP_DATA               *CpuMpData;
-  EFI_PEI_HOB_POINTERS      Hob;
-  EFI_HOB_MEMORY_ALLOCATION *MemoryHob;
-
-  DEBUG ((DEBUG_INFO, "PeiMpInitLib: CpuMpEndOfPeiCallback () invoked\n"));
-
-  Status = PeiServicesGetBootMode (&BootMode);
-  ASSERT_EFI_ERROR (Status);
-
-  CpuMpData = GetCpuMpData ();
-  if (BootMode != BOOT_ON_S3_RESUME) {
-    //
-    // Get the HOB list for processing
-    //
-    Hob.Raw = GetHobList ();
-    //
-    // Collect memory ranges
-    //
-    while (!END_OF_HOB_LIST (Hob)) {
-      if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {
-        MemoryHob = Hob.MemoryAllocation;
-        if (MemoryHob->AllocDescriptor.MemoryBaseAddress == CpuMpData->WakeupBuffer) {
-          //
-          // Flag this HOB type to un-used
-          //
-          GET_HOB_TYPE (Hob) = EFI_HOB_TYPE_UNUSED;
-          break;
-        }
-      }
-      Hob.Raw = GET_NEXT_HOB (Hob);
-    }
-  } else {
-    CpuMpData->SaveRestoreFlag = TRUE;
-    RestoreWakeupBuffer (CpuMpData);
-  }
-  return EFI_SUCCESS;
-}
-
-/**
-  Check if AP wakeup buffer is overlapped with existing allocated buffer.
-
-  @param[in]  WakeupBufferStart     AP wakeup buffer start address.
-  @param[in]  WakeupBufferEnd       AP wakeup buffer end address.
-
-  @retval  TRUE       There is overlap.
-  @retval  FALSE      There is no overlap.
-**/
-BOOLEAN
-CheckOverlapWithAllocatedBuffer (
-  IN UINTN                WakeupBufferStart,
-  IN UINTN                WakeupBufferEnd
-  )
-{
-  EFI_PEI_HOB_POINTERS      Hob;
-  EFI_HOB_MEMORY_ALLOCATION *MemoryHob;
-  BOOLEAN                   Overlapped;
-  UINTN                     MemoryStart;
-  UINTN                     MemoryEnd;
-
-  Overlapped = FALSE;
-  //
-  // Get the HOB list for processing
-  //
-  Hob.Raw = GetHobList ();
-  //
-  // Collect memory ranges
-  //
-  while (!END_OF_HOB_LIST (Hob)) {
-    if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {
-      MemoryHob   = Hob.MemoryAllocation;
-      MemoryStart = (UINTN) MemoryHob->AllocDescriptor.MemoryBaseAddress;
-      MemoryEnd   = (UINTN) (MemoryHob->AllocDescriptor.MemoryBaseAddress +
-                             MemoryHob->AllocDescriptor.MemoryLength);
-      if (!((WakeupBufferStart >= MemoryEnd) || (WakeupBufferEnd <= MemoryStart))) {
-        Overlapped = TRUE;
-        break;
-      }
-    }
-    Hob.Raw = GET_NEXT_HOB (Hob);
-  }
-  return Overlapped;
-}
-
-/**
-  Get available system memory below 1MB by specified size.
-
-  @param[in] WakeupBufferSize   Wakeup buffer size required
-
-  @retval other   Return wakeup buffer address below 1MB.
-  @retval -1      Cannot find free memory below 1MB.
-**/
-UINTN
-GetWakeupBuffer (
-  IN UINTN                WakeupBufferSize
-  )
-{
-  EFI_PEI_HOB_POINTERS    Hob;
-  UINTN                   WakeupBufferStart;
-  UINTN                   WakeupBufferEnd;
-
-  WakeupBufferSize = (WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1);
-
-  //
-  // Get the HOB list for processing
-  //
-  Hob.Raw = GetHobList ();
-
-  //
-  // Collect memory ranges
-  //
-  while (!END_OF_HOB_LIST (Hob)) {
-    if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
-      if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&
-          (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
-          ((Hob.ResourceDescriptor->ResourceAttribute &
-            (EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |
-             EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |
-             EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED
-             )) == 0)
-           ) {
-        //
-        // Need memory under 1MB to be collected here
-        //
-        WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);
-        if (WakeupBufferEnd > BASE_1MB) {
-          //
-          // Wakeup buffer should be under 1MB
-          //
-          WakeupBufferEnd = BASE_1MB;
-        }
-        while (WakeupBufferEnd > WakeupBufferSize) {
-          //
-          // Wakeup buffer should be aligned on 4KB
-          //
-          WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);
-          if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {
-            break;
-          }
-          if (CheckOverlapWithAllocatedBuffer (WakeupBufferStart, WakeupBufferEnd)) {
-            //
-            // If this range is overlapped with existing allocated buffer, skip it
-            // and find the next range
-            //
-            WakeupBufferEnd -= WakeupBufferSize;
-            continue;
-          }
-          DEBUG ((DEBUG_INFO, "WakeupBufferStart = %x, WakeupBufferSize = %x\n",
-                               WakeupBufferStart, WakeupBufferSize));
-          //
-          // Create a memory allocation HOB.
-          //
-          BuildMemoryAllocationHob (
-            WakeupBufferStart,
-            WakeupBufferSize,
-            EfiBootServicesData
-            );
-          return WakeupBufferStart;
-        }
-      }
-    }
-    //
-    // Find the next HOB
-    //
-    Hob.Raw = GET_NEXT_HOB (Hob);
-  }
-
-  return (UINTN) -1;
-}
-
-/**
-  Allocate reset vector buffer.
-
-  @param[in, out]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-AllocateResetVector (
-  IN OUT CPU_MP_DATA          *CpuMpData
-  )
-{
-  UINTN           ApResetVectorSize;
-
-  if (CpuMpData->WakeupBuffer == (UINTN) -1) {
-    ApResetVectorSize = CpuMpData->AddressMap.RendezvousFunnelSize +
-                          sizeof (MP_CPU_EXCHANGE_INFO);
-
-    CpuMpData->WakeupBuffer      = GetWakeupBuffer (ApResetVectorSize);
-    CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN)
-                    (CpuMpData->WakeupBuffer + CpuMpData->AddressMap.RendezvousFunnelSize);
-    BackupAndPrepareWakeupBuffer (CpuMpData);
-  }
-
-  if (CpuMpData->SaveRestoreFlag) {
-    BackupAndPrepareWakeupBuffer (CpuMpData);
-  }
-}
-
-/**
-  Free AP reset vector buffer.
-
-  @param[in]  CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-FreeResetVector (
-  IN CPU_MP_DATA              *CpuMpData
-  )
-{
-  if (CpuMpData->SaveRestoreFlag) {
-    RestoreWakeupBuffer (CpuMpData);
-  }
-}
-
-/**
-  Checks APs status and updates APs status if needed.
-
-**/
-VOID
-CheckAndUpdateApsStatus (
-  VOID
-  )
-{
-}
-
-/**
-  Initialize global data for MP support.
-
-  @param[in] CpuMpData  The pointer to CPU MP Data structure.
-**/
-VOID
-InitMpGlobalData (
-  IN CPU_MP_DATA               *CpuMpData
-  )
-{
-  EFI_STATUS      Status;
-
-  SaveCpuMpData (CpuMpData);
-
-  if (CpuMpData->CpuCount == 1) {
-    //
-    // If only BSP exists, return
-    //
-    return;
-  }
-
-  //
-  // Register an event for EndOfPei
-  //
-  Status  = PeiServicesNotifyPpi (&mMpInitLibNotifyList);
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  This service executes a caller provided function on all enabled APs.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system. See type
-                                      EFI_AP_PROCEDURE.
-  @param[in]  SingleThread            If TRUE, then all the enabled APs execute
-                                      the function specified by Procedure one by
-                                      one, in ascending order of processor handle
-                                      number.  If FALSE, then all the enabled APs
-                                      execute the function specified by Procedure
-                                      simultaneously.
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.  If it is NULL, then execute in
-                                      blocking mode. BSP waits until all APs finish
-                                      or TimeoutInMicroSeconds expires.  If it's
-                                      not NULL, then execute in non-blocking mode.
-                                      BSP requests the function specified by
-                                      Procedure to be started on all the enabled
-                                      APs, and go on executing immediately. If
-                                      all return from Procedure, or TimeoutInMicroSeconds
-                                      expires, this event is signaled. The BSP
-                                      can use the CheckEvent() or WaitForEvent()
-                                      services to check the state of event.  Type
-                                      EFI_EVENT is defined in CreateEvent() in
-                                      the Unified Extensible Firmware Interface
-                                      Specification.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      APs to return from Procedure, either for
-                                      blocking or non-blocking mode. Zero means
-                                      infinity.  If the timeout expires before
-                                      all APs return from Procedure, then Procedure
-                                      on the failed APs is terminated. All enabled
-                                      APs are available for next function assigned
-                                      by MpInitLibStartupAllAPs() or
-                                      MPInitLibStartupThisAP().
-                                      If the timeout expires in blocking mode,
-                                      BSP returns EFI_TIMEOUT.  If the timeout
-                                      expires in non-blocking mode, WaitEvent
-                                      is signaled with SignalEvent().
-  @param[in]  ProcedureArgument       The parameter passed into Procedure for
-                                      all APs.
-  @param[out] FailedCpuList           If NULL, this parameter is ignored. Otherwise,
-                                      if all APs finish successfully, then its
-                                      content is set to NULL. If not all APs
-                                      finish before timeout expires, then its
-                                      content is set to address of the buffer
-                                      holding handle numbers of the failed APs.
-                                      The buffer is allocated by MP Initialization
-                                      library, and it's the caller's responsibility to
-                                      free the buffer with FreePool() service.
-                                      In blocking mode, it is ready for consumption
-                                      when the call returns. In non-blocking mode,
-                                      it is ready when WaitEvent is signaled.  The
-                                      list of failed CPU is terminated by
-                                      END_OF_CPU_LIST.
-
-  @retval EFI_SUCCESS             In blocking mode, all APs have finished before
-                                  the timeout expired.
-  @retval EFI_SUCCESS             In non-blocking mode, function has been dispatched
-                                  to all enabled APs.
-  @retval EFI_UNSUPPORTED         A non-blocking mode request was made after the
-                                  UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
-                                  signaled.
-  @retval EFI_UNSUPPORTED         WaitEvent is not NULL if non-blocking mode is not
-                                  supported.
-  @retval EFI_DEVICE_ERROR        Caller processor is AP.
-  @retval EFI_NOT_STARTED         No enabled APs exist in the system.
-  @retval EFI_NOT_READY           Any enabled APs are busy.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-  @retval EFI_TIMEOUT             In blocking mode, the timeout expired before
-                                  all enabled APs have finished.
-  @retval EFI_INVALID_PARAMETER   Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibStartupAllAPs (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  BOOLEAN                   SingleThread,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT UINTN                     **FailedCpuList         OPTIONAL
-  )
-{
-  if (WaitEvent != NULL) {
-    return EFI_UNSUPPORTED;
-  }
-
-  return StartupAllAPsWorker (
-           Procedure,
-           SingleThread,
-           NULL,
-           TimeoutInMicroseconds,
-           ProcedureArgument,
-           FailedCpuList
-           );
-}
-
-/**
-  This service lets the caller get one enabled AP to execute a caller-provided
-  function.
-
-  @param[in]  Procedure               A pointer to the function to be run on the
-                                      designated AP of the system. See type
-                                      EFI_AP_PROCEDURE.
-  @param[in]  ProcessorNumber         The handle number of the AP. The range is
-                                      from 0 to the total number of logical
-                                      processors minus 1. The total number of
-                                      logical processors can be retrieved by
-                                      MpInitLibGetNumberOfProcessors().
-  @param[in]  WaitEvent               The event created by the caller with CreateEvent()
-                                      service.  If it is NULL, then execute in
-                                      blocking mode. BSP waits until this AP finish
-                                      or TimeoutInMicroSeconds expires.  If it's
-                                      not NULL, then execute in non-blocking mode.
-                                      BSP requests the function specified by
-                                      Procedure to be started on this AP,
-                                      and go on executing immediately. If this AP
-                                      return from Procedure or TimeoutInMicroSeconds
-                                      expires, this event is signaled. The BSP
-                                      can use the CheckEvent() or WaitForEvent()
-                                      services to check the state of event.  Type
-                                      EFI_EVENT is defined in CreateEvent() in
-                                      the Unified Extensible Firmware Interface
-                                      Specification.
-  @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for
-                                      this AP to finish this Procedure, either for
-                                      blocking or non-blocking mode. Zero means
-                                      infinity.  If the timeout expires before
-                                      this AP returns from Procedure, then Procedure
-                                      on the AP is terminated. The
-                                      AP is available for next function assigned
-                                      by MpInitLibStartupAllAPs() or
-                                      MpInitLibStartupThisAP().
-                                      If the timeout expires in blocking mode,
-                                      BSP returns EFI_TIMEOUT.  If the timeout
-                                      expires in non-blocking mode, WaitEvent
-                                      is signaled with SignalEvent().
-  @param[in]  ProcedureArgument       The parameter passed into Procedure on the
-                                      specified AP.
-  @param[out] Finished                If NULL, this parameter is ignored.  In
-                                      blocking mode, this parameter is ignored.
-                                      In non-blocking mode, if AP returns from
-                                      Procedure before the timeout expires, its
-                                      content is set to TRUE. Otherwise, the
-                                      value is set to FALSE. The caller can
-                                      determine if the AP returned from Procedure
-                                      by evaluating this value.
-
-  @retval EFI_SUCCESS             In blocking mode, specified AP finished before
-                                  the timeout expires.
-  @retval EFI_SUCCESS             In non-blocking mode, the function has been
-                                  dispatched to specified AP.
-  @retval EFI_UNSUPPORTED         A non-blocking mode request was made after the
-                                  UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
-                                  signaled.
-  @retval EFI_UNSUPPORTED         WaitEvent is not NULL if non-blocking mode is not
-                                  supported.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_TIMEOUT             In blocking mode, the timeout expired before
-                                  the specified AP has finished.
-  @retval EFI_NOT_READY           The specified AP is busy.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-  @retval EFI_NOT_FOUND           The processor with the handle specified by
-                                  ProcessorNumber does not exist.
-  @retval EFI_INVALID_PARAMETER   ProcessorNumber specifies the BSP or disabled AP.
-  @retval EFI_INVALID_PARAMETER   Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibStartupThisAP (
-  IN  EFI_AP_PROCEDURE          Procedure,
-  IN  UINTN                     ProcessorNumber,
-  IN  EFI_EVENT                 WaitEvent               OPTIONAL,
-  IN  UINTN                     TimeoutInMicroseconds,
-  IN  VOID                      *ProcedureArgument      OPTIONAL,
-  OUT BOOLEAN                   *Finished               OPTIONAL
-  )
-{
-  if (WaitEvent != NULL) {
-    return EFI_UNSUPPORTED;
-  }
-
-  return StartupThisAPWorker (
-           Procedure,
-           ProcessorNumber,
-           NULL,
-           TimeoutInMicroseconds,
-           ProcedureArgument,
-           Finished
-           );
-}
-
-/**
-  This service switches the requested AP to be the BSP from that point onward.
-  This service changes the BSP for all purposes. This call can only be performed
-  by the current BSP.
-
-  @param[in] ProcessorNumber   The handle number of AP that is to become the new
-                               BSP. The range is from 0 to the total number of
-                               logical processors minus 1. The total number of
-                               logical processors can be retrieved by
-                               MpInitLibGetNumberOfProcessors().
-  @param[in] EnableOldBSP      If TRUE, then the old BSP will be listed as an
-                               enabled AP. Otherwise, it will be disabled.
-
-  @retval EFI_SUCCESS             BSP successfully switched.
-  @retval EFI_UNSUPPORTED         Switching the BSP cannot be completed prior to
-                                  this service returning.
-  @retval EFI_UNSUPPORTED         Switching the BSP is not supported.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_NOT_FOUND           The processor with the handle specified by
-                                  ProcessorNumber does not exist.
-  @retval EFI_INVALID_PARAMETER   ProcessorNumber specifies the current BSP or
-                                  a disabled AP.
-  @retval EFI_NOT_READY           The specified AP is busy.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibSwitchBSP (
-  IN UINTN                     ProcessorNumber,
-  IN  BOOLEAN                  EnableOldBSP
-  )
-{
-  return SwitchBSPWorker (ProcessorNumber, EnableOldBSP);
-}
-
-/**
-  This service lets the caller enable or disable an AP from this point onward.
-  This service may only be called from the BSP.
-
-  @param[in] ProcessorNumber   The handle number of AP.
-                               The range is from 0 to the total number of
-                               logical processors minus 1. The total number of
-                               logical processors can be retrieved by
-                               MpInitLibGetNumberOfProcessors().
-  @param[in] EnableAP          Specifies the new state for the processor for
-                               enabled, FALSE for disabled.
-  @param[in] HealthFlag        If not NULL, a pointer to a value that specifies
-                               the new health status of the AP. This flag
-                               corresponds to StatusFlag defined in
-                               EFI_MP_SERVICES_PROTOCOL.GetProcessorInfo(). Only
-                               the PROCESSOR_HEALTH_STATUS_BIT is used. All other
-                               bits are ignored.  If it is NULL, this parameter
-                               is ignored.
-
-  @retval EFI_SUCCESS             The specified AP was enabled or disabled successfully.
-  @retval EFI_UNSUPPORTED         Enabling or disabling an AP cannot be completed
-                                  prior to this service returning.
-  @retval EFI_UNSUPPORTED         Enabling or disabling an AP is not supported.
-  @retval EFI_DEVICE_ERROR        The calling processor is an AP.
-  @retval EFI_NOT_FOUND           Processor with the handle specified by ProcessorNumber
-                                  does not exist.
-  @retval EFI_INVALID_PARAMETER   ProcessorNumber specifies the BSP.
-  @retval EFI_NOT_READY           MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibEnableDisableAP (
-  IN  UINTN                     ProcessorNumber,
-  IN  BOOLEAN                   EnableAP,
-  IN  UINT32                    *HealthFlag OPTIONAL
-  )
-{
-  return EnableDisableApWorker (ProcessorNumber, EnableAP, HealthFlag);
-}
-
-
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
deleted file mode 100644
index a63cd23a40..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
+++ /dev/null
@@ -1,43 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   MpEqu.inc
-;
-; Abstract:
-;
-;   This is the equates file for Multiple Processor support
-;
-;-------------------------------------------------------------------------------
-
-VacantFlag                    equ        00h
-NotVacantFlag                 equ        0ffh
-
-CPU_SWITCH_STATE_IDLE         equ        0
-CPU_SWITCH_STATE_STORED       equ        1
-CPU_SWITCH_STATE_LOADED       equ        2
-
-LockLocation                  equ        (RendezvousFunnelProcEnd - RendezvousFunnelProcStart)
-StackStartAddressLocation     equ        LockLocation + 08h
-StackSizeLocation             equ        LockLocation + 10h
-ApProcedureLocation           equ        LockLocation + 18h
-GdtrLocation                  equ        LockLocation + 20h
-IdtrLocation                  equ        LockLocation + 2Ah
-BufferStartLocation           equ        LockLocation + 34h
-ModeOffsetLocation            equ        LockLocation + 3Ch
-NumApsExecutingLocation       equ        LockLocation + 44h
-CodeSegmentLocation           equ        LockLocation + 4Ch
-DataSegmentLocation           equ        LockLocation + 54h
-EnableExecuteDisableLocation  equ        LockLocation + 5Ch
-Cr3Location                   equ        LockLocation + 64h
-InitFlagLocation              equ        LockLocation + 6Ch
-CpuInfoLocation               equ        LockLocation + 74h
-
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
deleted file mode 100644
index fa54d01542..0000000000
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ /dev/null
@@ -1,398 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   MpFuncs.nasm
-;
-; Abstract:
-;
-;   This is the assembly code for MP support
-;
-;-------------------------------------------------------------------------------
-
-%include "MpEqu.inc"
-extern ASM_PFX(InitializeFloatingPointUnits)
-
-DEFAULT REL
-
-SECTION .text
-
-;-------------------------------------------------------------------------------------
-;RendezvousFunnelProc  procedure follows. All APs execute their procedure. This
-;procedure serializes all the AP processors through an Init sequence. It must be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------------------
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
-RendezvousFunnelProcStart:
-; At this point CS = 0x(vv00) and ip= 0x0.
-; Save BIST information to ebp firstly
-
-BITS 16
-    mov        ebp, eax                        ; Save BIST information
-
-    mov        ax, cs
-    mov        ds, ax
-    mov        es, ax
-    mov        ss, ax
-    xor        ax, ax
-    mov        fs, ax
-    mov        gs, ax
-
-    mov        si,  BufferStartLocation
-    mov        ebx, [si]
-
-    mov        di,  ModeOffsetLocation
-    mov        eax, [di]
-    mov        di,  CodeSegmentLocation
-    mov        edx, [di]
-    mov        di,  ax
-    sub        di,  02h
-    mov        [di],dx                         ; Patch long mode CS
-    sub        di,  04h
-    add        eax, ebx
-    mov        [di],eax                        ; Patch address
-
-    mov        si, GdtrLocation
-o32 lgdt       [cs:si]
-
-    mov        si, IdtrLocation
-o32 lidt       [cs:si]
-
-    mov        si, EnableExecuteDisableLocation
-    cmp        byte [si], 0
-    jz         SkipEnableExecuteDisableBit
-
-    ;
-    ; Enable execute disable bit
-    ;
-    mov        ecx, 0c0000080h             ; EFER MSR number
-    rdmsr                                  ; Read EFER
-    bts        eax, 11                     ; Enable Execute Disable Bit
-    wrmsr                                  ; Write EFER
-
-SkipEnableExecuteDisableBit:
-
-    mov        di,  DataSegmentLocation
-    mov        edi, [di]                   ; Save long mode DS in edi
-
-    mov        si, Cr3Location             ; Save CR3 in ecx
-    mov        ecx, [si]
-
-    xor        ax,  ax
-    mov        ds,  ax                     ; Clear data segment
-
-    mov        eax, cr0                    ; Get control register 0
-    or         eax, 000000003h             ; Set PE bit (bit #0) & MP
-    mov        cr0, eax
-
-    mov        eax, cr4
-    bts        eax, 5
-    mov        cr4, eax
-
-    mov        cr3, ecx                    ; Load CR3
-
-    mov        ecx, 0c0000080h             ; EFER MSR number
-    rdmsr                                  ; Read EFER
-    bts        eax, 8                      ; Set LME=1
-    wrmsr                                  ; Write EFER
-
-    mov        eax, cr0                    ; Read CR0
-    bts        eax, 31                     ; Set PG=1
-    mov        cr0, eax                    ; Write CR0
-
-    jmp        0:strict dword 0  ; far jump to long mode
-BITS 64
-LongModeStart:
-    mov        eax, edi
-    mov        ds,  ax
-    mov        es,  ax
-    mov        ss,  ax
-
-    mov        esi, ebx
-    lea        edi, [esi + InitFlagLocation]
-    cmp        qword [edi], 1       ; ApInitConfig
-    jnz        GetApicId
-
-    ; AP init
-    mov        edi, esi
-    add        edi, LockLocation
-    mov        rax, NotVacantFlag
-
-TestLock:
-    xchg       qword [edi], rax
-    cmp        rax, NotVacantFlag
-    jz         TestLock
-
-    lea        ecx, [esi + NumApsExecutingLocation]
-    inc        dword [ecx]
-    mov        ebx, [ecx]
-
-Releaselock:
-    mov        rax, VacantFlag
-    xchg       qword [edi], rax
-    ; program stack
-    mov        edi, esi
-    add        edi, StackSizeLocation
-    mov        eax, dword [edi]
-    mov        ecx, ebx
-    inc        ecx
-    mul        ecx                               ; EAX = StackSize * (CpuNumber + 1)
-    mov        edi, esi
-    add        edi, StackStartAddressLocation
-    add        rax, qword [edi]
-    mov        rsp, rax
-    jmp        CProcedureInvoke
-
-GetApicId:
-    mov        eax, 0
-    cpuid
-    cmp        eax, 0bh
-    jb         NoX2Apic             ; CPUID level below CPUID_EXTENDED_TOPOLOGY
-
-    mov        eax, 0bh
-    xor        ecx, ecx
-    cpuid
-    test       ebx, 0ffffh
-    jz         NoX2Apic             ; CPUID.0BH:EBX[15:0] is zero
-
-    ; Processor is x2APIC capable; 32-bit x2APIC ID is already in EDX
-    jmp        GetProcessorNumber
-
-NoX2Apic:
-    ; Processor is not x2APIC capable, so get 8-bit APIC ID
-    mov        eax, 1
-    cpuid
-    shr        ebx, 24
-    mov        edx, ebx
-
-GetProcessorNumber:
-    ;
-    ; Get processor number for this AP
-    ; Note that BSP may become an AP due to SwitchBsp()
-    ;
-    xor         ebx, ebx
-    lea         eax, [esi + CpuInfoLocation]
-    mov         edi, [eax]
-
-GetNextProcNumber:
-    cmp         dword [edi], edx                      ; APIC ID match?
-    jz          ProgramStack
-    add         edi, 20
-    inc         ebx
-    jmp         GetNextProcNumber    
-
-ProgramStack:
-    mov         rsp, qword [edi + 12]
-
-CProcedureInvoke:
-    push       rbp               ; Push BIST data at top of AP stack
-    xor        rbp, rbp          ; Clear ebp for call stack trace
-    push       rbp
-    mov        rbp, rsp
-
-    mov        rax, ASM_PFX(InitializeFloatingPointUnits)
-    sub        rsp, 20h
-    call       rax               ; Call assembly function to initialize FPU per UEFI spec
-    add        rsp, 20h
-
-    mov        edx, ebx          ; edx is NumApsExecuting
-    mov        ecx, esi
-    add        ecx, LockLocation ; rcx is address of exchange info data buffer
-
-    mov        edi, esi
-    add        edi, ApProcedureLocation
-    mov        rax, qword [edi]
-
-    sub        rsp, 20h
-    call       rax               ; Invoke C function
-    add        rsp, 20h
-    jmp        $                 ; Should never reach here
-
-RendezvousFunnelProcEnd:
-
-;-------------------------------------------------------------------------------------
-;  AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmRelocateApLoop)
-ASM_PFX(AsmRelocateApLoop):
-AsmRelocateApLoopStart:
-    mov        rax, [rsp + 40]   ; CountTofinish
-    lock dec   dword [rax]       ; (*CountTofinish)--
-    mov        rsp, r9
-    push       rcx
-    push       rdx
-
-    lea        rsi, [PmEntry]    ; rsi <- The start address of transition code
-
-    push       r8
-    push       rsi
-    DB         0x48
-    retf
-BITS 32
-PmEntry:
-    mov        eax, cr0
-    btr        eax, 31           ; Clear CR0.PG
-    mov        cr0, eax          ; Disable paging and caches
-
-    mov        ebx, edx          ; Save EntryPoint to rbx, for rdmsr will overwrite rdx
-    mov        ecx, 0xc0000080
-    rdmsr
-    and        ah, ~ 1           ; Clear LME
-    wrmsr
-    mov        eax, cr4
-    and        al, ~ (1 << 5)    ; Clear PAE
-    mov        cr4, eax
-
-    pop        edx
-    add        esp, 4
-    pop        ecx,
-    add        esp, 4
-    cmp        cl, 1              ; Check mwait-monitor support
-    jnz        HltLoop
-    mov        ebx, edx           ; Save C-State to ebx
-MwaitLoop:
-    mov        eax, esp           ; Set Monitor Address
-    xor        ecx, ecx           ; ecx = 0
-    xor        edx, edx           ; edx = 0
-    monitor
-    mov        eax, ebx           ; Mwait Cx, Target C-State per eax[7:4]
-    shl        eax, 4
-    mwait
-    jmp        MwaitLoop
-HltLoop:
-    cli
-    hlt
-    jmp        HltLoop
-BITS 64
-AsmRelocateApLoopEnd:
-
-;-------------------------------------------------------------------------------------
-;  AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmGetAddressMap)
-ASM_PFX(AsmGetAddressMap):
-    mov        rax, ASM_PFX(RendezvousFunnelProc)
-    mov        qword [rcx], rax
-    mov        qword [rcx +  8h], LongModeStart - RendezvousFunnelProcStart
-    mov        qword [rcx + 10h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
-    mov        rax, ASM_PFX(AsmRelocateApLoop)
-    mov        qword [rcx + 18h], rax
-    mov        qword [rcx + 20h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
-    ret
-
-;-------------------------------------------------------------------------------------
-;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
-;about to become an AP. It switches its stack with the current AP.
-;AsmExchangeRole (IN   CPU_EXCHANGE_INFO    *MyInfo, IN   CPU_EXCHANGE_INFO    *OthersInfo);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmExchangeRole)
-ASM_PFX(AsmExchangeRole):
-    ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
-    ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
-
-    push       rax
-    push       rbx
-    push       rcx
-    push       rdx
-    push       rsi
-    push       rdi
-    push       rbp
-    push       r8
-    push       r9
-    push       r10
-    push       r11
-    push       r12
-    push       r13
-    push       r14
-    push       r15
-
-    mov        rax, cr0
-    push       rax
-
-    mov        rax, cr4
-    push       rax
-
-    ; rsi contains MyInfo pointer
-    mov        rsi, rcx
-
-    ; rdi contains OthersInfo pointer
-    mov        rdi, rdx
-
-    ;Store EFLAGS, GDTR and IDTR regiter to stack
-    pushfq
-    sgdt       [rsi + 16]
-    sidt       [rsi + 26]
-
-    ; Store the its StackPointer
-    mov        [rsi + 8], rsp
-
-    ; update its switch state to STORED
-    mov        byte [rsi], CPU_SWITCH_STATE_STORED
-
-WaitForOtherStored:
-    ; wait until the other CPU finish storing its state
-    cmp        byte [rdi], CPU_SWITCH_STATE_STORED
-    jz         OtherStored
-    pause
-    jmp        WaitForOtherStored
-
-OtherStored:
-    ; Since another CPU already stored its state, load them
-    ; load GDTR value
-    lgdt       [rdi + 16]
-
-    ; load IDTR value
-    lidt       [rdi + 26]
-
-    ; load its future StackPointer
-    mov        rsp, [rdi + 8]
-
-    ; update the other CPU's switch state to LOADED
-    mov        byte [rdi], CPU_SWITCH_STATE_LOADED
-
-WaitForOtherLoaded:
-    ; wait until the other CPU finish loading new state,
-    ; otherwise the data in stack may corrupt
-    cmp        byte [rsi], CPU_SWITCH_STATE_LOADED
-    jz         OtherLoaded
-    pause
-    jmp        WaitForOtherLoaded
-
-OtherLoaded:
-    ; since the other CPU already get the data it want, leave this procedure
-    popfq
-
-    pop        rax
-    mov        cr4, rax
-
-    pop        rax
-    mov        cr0, rax
-
-    pop        r15
-    pop        r14
-    pop        r13
-    pop        r12
-    pop        r11
-    pop        r10
-    pop        r9
-    pop        r8
-    pop        rbp
-    pop        rdi
-    pop        rsi
-    pop        rdx
-    pop        rcx
-    pop        rbx
-    pop        rax
-
-    ret
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
deleted file mode 100644
index c38191a7ef..0000000000
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
+++ /dev/null
@@ -1,2441 +0,0 @@
-/** @file
-  MTRR setting library
-
-  @par Note: 
-    Most of services in this library instance are suggested to be invoked by BSP only,
-    except for MtrrSetAllMtrrs() which is used to sync BSP's MTRR setting to APs.
-
-  Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-
-#include <Register/Cpuid.h>
-#include <Register/Msr.h>
-
-#include <Library/MtrrLib.h>
-#include <Library/BaseLib.h>
-#include <Library/CpuLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-
-#define OR_SEED      0x0101010101010101ull
-#define CLEAR_SEED   0xFFFFFFFFFFFFFFFFull
-
-#define MTRR_LIB_ASSERT_ALIGNED(B, L) ASSERT ((B & ~(L - 1)) == B);
-//
-// Context to save and restore when MTRRs are programmed
-//
-typedef struct {
-  UINTN    Cr4;
-  BOOLEAN  InterruptState;
-} MTRR_CONTEXT;
-
-typedef struct {
-  UINT64                 BaseAddress;
-  UINT64                 Length;
-  MTRR_MEMORY_CACHE_TYPE Type;
-} MEMORY_RANGE;
-
-//
-// This table defines the offset, base and length of the fixed MTRRs
-//
-CONST FIXED_MTRR  mMtrrLibFixedMtrrTable[] = {
-  {
-    MSR_IA32_MTRR_FIX64K_00000,
-    0,
-    SIZE_64KB
-  },
-  {
-    MSR_IA32_MTRR_FIX16K_80000,
-    0x80000,
-    SIZE_16KB
-  },
-  {
-    MSR_IA32_MTRR_FIX16K_A0000,
-    0xA0000,
-    SIZE_16KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_C0000,
-    0xC0000,
-    SIZE_4KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_C8000,
-    0xC8000,
-    SIZE_4KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_D0000,
-    0xD0000,
-    SIZE_4KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_D8000,
-    0xD8000,
-    SIZE_4KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_E0000,
-    0xE0000,
-    SIZE_4KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_E8000,
-    0xE8000,
-    SIZE_4KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_F0000,
-    0xF0000,
-    SIZE_4KB
-  },
-  {
-    MSR_IA32_MTRR_FIX4K_F8000,
-    0xF8000,
-    SIZE_4KB
-  }
-};
-
-//
-// Lookup table used to print MTRRs
-//
-GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8 *mMtrrMemoryCacheTypeShortName[] = {
-  "UC",  // CacheUncacheable
-  "WC",  // CacheWriteCombining
-  "R*",  // Invalid
-  "R*",  // Invalid
-  "WT",  // CacheWriteThrough
-  "WP",  // CacheWriteProtected
-  "WB",  // CacheWriteBack
-  "R*"   // Invalid
-};
-
-/**
-  Worker function returns the variable MTRR count for the CPU.
-
-  @return Variable MTRR count
-
-**/
-UINT32
-GetVariableMtrrCountWorker (
-  VOID
-  )
-{
-  MSR_IA32_MTRRCAP_REGISTER MtrrCap;
-
-  MtrrCap.Uint64 = AsmReadMsr64 (MSR_IA32_MTRRCAP);
-  ASSERT (MtrrCap.Bits.VCNT <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-  return MtrrCap.Bits.VCNT;
-}
-
-/**
-  Returns the variable MTRR count for the CPU.
-
-  @return Variable MTRR count
-
-**/
-UINT32
-EFIAPI
-GetVariableMtrrCount (
-  VOID
-  )
-{
-  if (!IsMtrrSupported ()) {
-    return 0;
-  }
-  return GetVariableMtrrCountWorker ();
-}
-
-/**
-  Worker function returns the firmware usable variable MTRR count for the CPU.
-
-  @return Firmware usable variable MTRR count
-
-**/
-UINT32
-GetFirmwareVariableMtrrCountWorker (
-  VOID
-  )
-{
-  UINT32  VariableMtrrCount;
-  UINT32  ReservedMtrrNumber;
-
-  VariableMtrrCount = GetVariableMtrrCountWorker ();
-  ReservedMtrrNumber = PcdGet32 (PcdCpuNumberOfReservedVariableMtrrs);
-  if (VariableMtrrCount < ReservedMtrrNumber) {
-    return 0;
-  }
-
-  return VariableMtrrCount - ReservedMtrrNumber;
-}
-
-/**
-  Returns the firmware usable variable MTRR count for the CPU.
-
-  @return Firmware usable variable MTRR count
-
-**/
-UINT32
-EFIAPI
-GetFirmwareVariableMtrrCount (
-  VOID
-  )
-{
-  if (!IsMtrrSupported ()) {
-    return 0;
-  }
-  return GetFirmwareVariableMtrrCountWorker ();
-}
-
-/**
-  Worker function returns the default MTRR cache type for the system.
-
-  If MtrrSetting is not NULL, returns the default MTRR cache type from input
-  MTRR settings buffer.
-  If MtrrSetting is NULL, returns the default MTRR cache type from MSR.
-
-  @param[in]  MtrrSetting    A buffer holding all MTRRs content.
-
-  @return  The default MTRR cache type.
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-MtrrGetDefaultMemoryTypeWorker (
-  IN MTRR_SETTINGS      *MtrrSetting
-  )
-{
-  MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;
-
-  if (MtrrSetting == NULL) {
-    DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
-  } else {
-    DefType.Uint64 = MtrrSetting->MtrrDefType;
-  }
-
-  return (MTRR_MEMORY_CACHE_TYPE) DefType.Bits.Type;
-}
-
-
-/**
-  Returns the default MTRR cache type for the system.
-
-  @return  The default MTRR cache type.
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-EFIAPI
-MtrrGetDefaultMemoryType (
-  VOID
-  )
-{
-  if (!IsMtrrSupported ()) {
-    return CacheUncacheable;
-  }
-  return MtrrGetDefaultMemoryTypeWorker (NULL);
-}
-
-/**
-  Preparation before programming MTRR.
-
-  This function will do some preparation for programming MTRRs:
-  disable cache, invalid cache and disable MTRR caching functionality
-
-  @param[out] MtrrContext  Pointer to context to save
-
-**/
-VOID
-MtrrLibPreMtrrChange (
-  OUT MTRR_CONTEXT  *MtrrContext
-  )
-{
-  MSR_IA32_MTRR_DEF_TYPE_REGISTER  DefType;
-  //
-  // Disable interrupts and save current interrupt state
-  //
-  MtrrContext->InterruptState = SaveAndDisableInterrupts();
-
-  //
-  // Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
-  //
-  AsmDisableCache ();
-
-  //
-  // Save original CR4 value and clear PGE flag (Bit 7)
-  //
-  MtrrContext->Cr4 = AsmReadCr4 ();
-  AsmWriteCr4 (MtrrContext->Cr4 & (~BIT7));
-
-  //
-  // Flush all TLBs
-  //
-  CpuFlushTlb ();
-
-  //
-  // Disable MTRRs
-  //
-  DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
-  DefType.Bits.E = 0;
-  AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);
-}
-
-/**
-  Cleaning up after programming MTRRs.
-
-  This function will do some clean up after programming MTRRs:
-  Flush all TLBs,  re-enable caching, restore CR4.
-
-  @param[in] MtrrContext  Pointer to context to restore
-
-**/
-VOID
-MtrrLibPostMtrrChangeEnableCache (
-  IN MTRR_CONTEXT  *MtrrContext
-  )
-{
-  //
-  // Flush all TLBs
-  //
-  CpuFlushTlb ();
-
-  //
-  // Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
-  //
-  AsmEnableCache ();
-
-  //
-  // Restore original CR4 value
-  //
-  AsmWriteCr4 (MtrrContext->Cr4);
-
-  //
-  // Restore original interrupt state
-  //
-  SetInterruptState (MtrrContext->InterruptState);
-}
-
-/**
-  Cleaning up after programming MTRRs.
-
-  This function will do some clean up after programming MTRRs:
-  enable MTRR caching functionality, and enable cache
-
-  @param[in] MtrrContext  Pointer to context to restore
-
-**/
-VOID
-MtrrLibPostMtrrChange (
-  IN MTRR_CONTEXT  *MtrrContext
-  )
-{
-  MSR_IA32_MTRR_DEF_TYPE_REGISTER  DefType;
-  //
-  // Enable Cache MTRR
-  //
-  DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
-  DefType.Bits.E = 1;
-  DefType.Bits.FE = 1;
-  AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);
-
-  MtrrLibPostMtrrChangeEnableCache (MtrrContext);
-}
-
-/**
-  Worker function gets the content in fixed MTRRs
-
-  @param[out]  FixedSettings  A buffer to hold fixed MTRRs content.
-
-  @retval The pointer of FixedSettings
-
-**/
-MTRR_FIXED_SETTINGS*
-MtrrGetFixedMtrrWorker (
-  OUT MTRR_FIXED_SETTINGS         *FixedSettings
-  )
-{
-  UINT32  Index;
-
-  for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
-      FixedSettings->Mtrr[Index] =
-        AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
-  }
-
-  return FixedSettings;
-}
-
-
-/**
-  This function gets the content in fixed MTRRs
-
-  @param[out]  FixedSettings  A buffer to hold fixed MTRRs content.
-
-  @retval The pointer of FixedSettings
-
-**/
-MTRR_FIXED_SETTINGS*
-EFIAPI
-MtrrGetFixedMtrr (
-  OUT MTRR_FIXED_SETTINGS         *FixedSettings
-  )
-{
-  if (!IsMtrrSupported ()) {
-    return FixedSettings;
-  }
-
-  return MtrrGetFixedMtrrWorker (FixedSettings);
-}
-
-
-/**
-  Worker function will get the raw value in variable MTRRs
-
-  If MtrrSetting is not NULL, gets the variable MTRRs raw value from input
-  MTRR settings buffer.
-  If MtrrSetting is NULL, gets the variable MTRRs raw value from MTRRs.
-
-  @param[in]  MtrrSetting        A buffer holding all MTRRs content.
-  @param[in]  VariableMtrrCount  Number of variable MTRRs.
-  @param[out] VariableSettings   A buffer to hold variable MTRRs content.
-
-  @return The VariableSettings input pointer
-
-**/
-MTRR_VARIABLE_SETTINGS*
-MtrrGetVariableMtrrWorker (
-  IN  MTRR_SETTINGS           *MtrrSetting,
-  IN  UINT32                  VariableMtrrCount,
-  OUT MTRR_VARIABLE_SETTINGS  *VariableSettings
-  )
-{
-  UINT32  Index;
-
-  ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-
-  for (Index = 0; Index < VariableMtrrCount; Index++) {
-    if (MtrrSetting == NULL) {
-      VariableSettings->Mtrr[Index].Base =
-        AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1));
-      VariableSettings->Mtrr[Index].Mask =
-        AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1));
-    } else {
-      VariableSettings->Mtrr[Index].Base = MtrrSetting->Variables.Mtrr[Index].Base;
-      VariableSettings->Mtrr[Index].Mask = MtrrSetting->Variables.Mtrr[Index].Mask;
-    }
-  }
-
-  return  VariableSettings;
-}
-
-/**
-  This function will get the raw value in variable MTRRs
-
-  @param[out]  VariableSettings   A buffer to hold variable MTRRs content.
-
-  @return The VariableSettings input pointer
-
-**/
-MTRR_VARIABLE_SETTINGS*
-EFIAPI
-MtrrGetVariableMtrr (
-  OUT MTRR_VARIABLE_SETTINGS         *VariableSettings
-  )
-{
-  if (!IsMtrrSupported ()) {
-    return VariableSettings;
-  }
-
-  return MtrrGetVariableMtrrWorker (
-           NULL,
-           GetVariableMtrrCountWorker (),
-           VariableSettings
-           );
-}
-
-/**
-  Programs fixed MTRRs registers.
-
-  @param[in]      Type             The memory type to set.
-  @param[in, out] Base             The base address of memory range.
-  @param[in, out] Length           The length of memory range.
-  @param[in, out] LastMsrNum       On input, the last index of the fixed MTRR MSR to program.
-                                   On return, the current index of the fixed MTRR MSR to program.
-  @param[out]     ReturnClearMask  The bits to clear in the fixed MTRR MSR.
-  @param[out]     ReturnOrMask     The bits to set in the fixed MTRR MSR.
-
-  @retval RETURN_SUCCESS      The cache type was updated successfully
-  @retval RETURN_UNSUPPORTED  The requested range or cache type was invalid
-                              for the fixed MTRRs.
-
-**/
-RETURN_STATUS
-MtrrLibProgramFixedMtrr (
-  IN     MTRR_MEMORY_CACHE_TYPE  Type,
-  IN OUT UINT64                  *Base,
-  IN OUT UINT64                  *Length,
-  IN OUT UINT32                  *LastMsrNum,
-  OUT    UINT64                  *ReturnClearMask,
-  OUT    UINT64                  *ReturnOrMask
-  )
-{
-  UINT32  MsrNum;
-  UINT32  LeftByteShift;
-  UINT32  RightByteShift;
-  UINT64  OrMask;
-  UINT64  ClearMask;
-  UINT64  SubLength;
-
-  //
-  // Find the fixed MTRR index to be programmed
-  //
-  for (MsrNum = *LastMsrNum + 1; MsrNum < MTRR_NUMBER_OF_FIXED_MTRR; MsrNum++) {
-    if ((*Base >= mMtrrLibFixedMtrrTable[MsrNum].BaseAddress) &&
-        (*Base <
-            (
-              mMtrrLibFixedMtrrTable[MsrNum].BaseAddress +
-              (8 * mMtrrLibFixedMtrrTable[MsrNum].Length)
-            )
-          )
-        ) {
-      break;
-    }
-  }
-
-  if (MsrNum == MTRR_NUMBER_OF_FIXED_MTRR) {
-    return RETURN_UNSUPPORTED;
-  }
-
-  //
-  // Find the begin offset in fixed MTRR and calculate byte offset of left shift
-  //
-  LeftByteShift = ((UINT32)*Base - mMtrrLibFixedMtrrTable[MsrNum].BaseAddress)
-               / mMtrrLibFixedMtrrTable[MsrNum].Length;
-
-  if (LeftByteShift >= 8) {
-    return RETURN_UNSUPPORTED;
-  }
-
-  //
-  // Find the end offset in fixed MTRR and calculate byte offset of right shift
-  //
-  SubLength = mMtrrLibFixedMtrrTable[MsrNum].Length * (8 - LeftByteShift);
-  if (*Length >= SubLength) {
-    RightByteShift = 0;
-  } else {
-    RightByteShift = 8 - LeftByteShift -
-                (UINT32)(*Length) / mMtrrLibFixedMtrrTable[MsrNum].Length;
-    if ((LeftByteShift >= 8) ||
-        (((UINT32)(*Length) % mMtrrLibFixedMtrrTable[MsrNum].Length) != 0)
-        ) {
-      return RETURN_UNSUPPORTED;
-    }
-    //
-    // Update SubLength by actual length
-    //
-    SubLength = *Length;
-  }
-
-  ClearMask = CLEAR_SEED;
-  OrMask    = MultU64x32 (OR_SEED, (UINT32) Type);
-
-  if (LeftByteShift != 0) {
-    //
-    // Clear the low bits by LeftByteShift
-    //
-    ClearMask &= LShiftU64 (ClearMask, LeftByteShift * 8);
-    OrMask    &= LShiftU64 (OrMask, LeftByteShift * 8);
-  }
-
-  if (RightByteShift != 0) {
-    //
-    // Clear the high bits by RightByteShift
-    //
-    ClearMask &= RShiftU64 (ClearMask, RightByteShift * 8);
-    OrMask    &= RShiftU64 (OrMask, RightByteShift * 8);
-  }
-
-  *Length -= SubLength;
-  *Base   += SubLength;
-
-  *LastMsrNum      = MsrNum;
-  *ReturnClearMask = ClearMask;
-  *ReturnOrMask    = OrMask;
-
-  return RETURN_SUCCESS;
-}
-
-
-/**
-  Worker function gets the attribute of variable MTRRs.
-
-  This function shadows the content of variable MTRRs into an
-  internal array: VariableMtrr.
-
-  @param[in]   VariableSettings      The variable MTRR values to shadow
-  @param[in]   VariableMtrrCount     The number of variable MTRRs
-  @param[in]   MtrrValidBitsMask     The mask for the valid bit of the MTRR
-  @param[in]   MtrrValidAddressMask  The valid address mask for MTRR
-  @param[out]  VariableMtrr          The array to shadow variable MTRRs content
-
-  @return      Number of MTRRs which has been used.
-
-**/
-UINT32
-MtrrGetMemoryAttributeInVariableMtrrWorker (
-  IN  MTRR_VARIABLE_SETTINGS  *VariableSettings,
-  IN  UINTN                   VariableMtrrCount,
-  IN  UINT64                  MtrrValidBitsMask,
-  IN  UINT64                  MtrrValidAddressMask,
-  OUT VARIABLE_MTRR           *VariableMtrr
-  )
-{
-  UINTN   Index;
-  UINT32  UsedMtrr;
-
-  ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * MTRR_NUMBER_OF_VARIABLE_MTRR);
-  for (Index = 0, UsedMtrr = 0; Index < VariableMtrrCount; Index++) {
-    if (((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &VariableSettings->Mtrr[Index].Mask)->Bits.V != 0) {
-      VariableMtrr[Index].Msr         = (UINT32)Index;
-      VariableMtrr[Index].BaseAddress = (VariableSettings->Mtrr[Index].Base & MtrrValidAddressMask);
-      VariableMtrr[Index].Length      = ((~(VariableSettings->Mtrr[Index].Mask & MtrrValidAddressMask)) & MtrrValidBitsMask) + 1;
-      VariableMtrr[Index].Type        = (VariableSettings->Mtrr[Index].Base & 0x0ff);
-      VariableMtrr[Index].Valid       = TRUE;
-      VariableMtrr[Index].Used        = TRUE;
-      UsedMtrr++;
-    }
-  }
-  return UsedMtrr;
-}
-
-
-/**
-  Gets the attribute of variable MTRRs.
-
-  This function shadows the content of variable MTRRs into an
-  internal array: VariableMtrr.
-
-  @param[in]   MtrrValidBitsMask     The mask for the valid bit of the MTRR
-  @param[in]   MtrrValidAddressMask  The valid address mask for MTRR
-  @param[out]  VariableMtrr          The array to shadow variable MTRRs content
-
-  @return                       The return value of this parameter indicates the
-                                number of MTRRs which has been used.
-
-**/
-UINT32
-EFIAPI
-MtrrGetMemoryAttributeInVariableMtrr (
-  IN  UINT64                    MtrrValidBitsMask,
-  IN  UINT64                    MtrrValidAddressMask,
-  OUT VARIABLE_MTRR             *VariableMtrr
-  )
-{
-  MTRR_VARIABLE_SETTINGS  VariableSettings;
-
-  if (!IsMtrrSupported ()) {
-    return 0;
-  }
-
-  MtrrGetVariableMtrrWorker (
-    NULL,
-    GetVariableMtrrCountWorker (),
-    &VariableSettings
-    );
-
-  return MtrrGetMemoryAttributeInVariableMtrrWorker (
-           &VariableSettings,
-           GetFirmwareVariableMtrrCountWorker (),
-           MtrrValidBitsMask,
-           MtrrValidAddressMask,
-           VariableMtrr
-           );
-}
-
-/**
-  Return the least alignment of address.
-
-  @param Address    The address to return the alignment.
-  @param Alignment0 The alignment to return when Address is 0.
-
-  @return The least alignment of the Address.
-**/
-UINT64
-MtrrLibLeastAlignment (
-  UINT64    Address,
-  UINT64    Alignment0
-)
-{
-  if (Address == 0) {
-    return Alignment0;
-  }
-
-  return LShiftU64 (1, (UINTN) LowBitSet64 (Address));
-}
-
-/**
-  Return the number of required variable MTRRs to positively cover the
-  specified range.
-
-  @param BaseAddress Base address of the range.
-  @param Length      Length of the range.
-  @param Alignment0  Alignment of 0.
-
-  @return The number of the required variable MTRRs.
-**/
-UINT32
-MtrrLibGetPositiveMtrrNumber (
-  IN UINT64      BaseAddress,
-  IN UINT64      Length,
-  IN UINT64      Alignment0
-)
-{
-  UINT64         SubLength;
-  UINT32         MtrrNumber;
-  BOOLEAN        UseLeastAlignment;
-
-  UseLeastAlignment = TRUE;
-  SubLength = 0;
-
-  //
-  // Calculate the alignment of the base address.
-  //
-  for (MtrrNumber = 0; Length != 0; MtrrNumber++) {
-    if (UseLeastAlignment) {
-      SubLength = MtrrLibLeastAlignment (BaseAddress, Alignment0);
-
-      if (SubLength > Length) {
-        //
-        // Set a flag when remaining length is too small
-        //  so that MtrrLibLeastAlignment() is not called in following loops.
-        //
-        UseLeastAlignment = FALSE;
-      }
-    }
-
-    if (!UseLeastAlignment) {
-      SubLength = GetPowerOfTwo64 (Length);
-    }
-
-    BaseAddress += SubLength;
-    Length -= SubLength;
-  }
-
-  return MtrrNumber;
-}
-
-/**
-  Return whether the left MTRR type precedes the right MTRR type.
-
-  The MTRR type precedence rules are:
-    1. UC precedes any other type
-    2. WT precedes WB
-  For further details, please refer the IA32 Software Developer's Manual,
-  Volume 3, Section "MTRR Precedences".
-
-  @param Left  The left MTRR type.
-  @param Right The right MTRR type.
-
-  @retval TRUE  Left precedes Right.
-  @retval FALSE Left doesn't precede Right.
-**/
-BOOLEAN
-MtrrLibTypeLeftPrecedeRight (
-  IN MTRR_MEMORY_CACHE_TYPE  Left,
-  IN MTRR_MEMORY_CACHE_TYPE  Right
-)
-{
-  return (BOOLEAN) (Left == CacheUncacheable || (Left == CacheWriteThrough && Right == CacheWriteBack));
-}
-
-
-/**
-  Return whether the type of the specified range can precede the specified type.
-
-  @param Ranges     Memory range array holding memory type settings for all
-                    the memory address.
-  @param RangeCount Count of memory ranges.
-  @param Type       Type to check precedence.
-  @param SubBase    Base address of the specified range.
-  @param SubLength  Length of the specified range.
-
-  @retval TRUE  The type of the specified range can precede the Type.
-  @retval FALSE The type of the specified range cannot precede the Type.
-                So the subtraction is not applicable.
-**/
-BOOLEAN
-MtrrLibSubstractable (
-  IN CONST MEMORY_RANGE     *Ranges,
-  IN UINT32                  RangeCount,
-  IN MTRR_MEMORY_CACHE_TYPE  Type,
-  IN UINT64                  SubBase,
-  IN UINT64                  SubLength
-)
-{
-  UINT32                     Index;
-  UINT64                     Length;
-  // WT > WB
-  // UC > *
-  for (Index = 0; Index < RangeCount; Index++) {
-    if (Ranges[Index].BaseAddress <= SubBase && SubBase < Ranges[Index].BaseAddress + Ranges[Index].Length) {
-
-      if (Ranges[Index].BaseAddress + Ranges[Index].Length >= SubBase + SubLength) {
-        return MtrrLibTypeLeftPrecedeRight (Ranges[Index].Type, Type);
-
-      } else {
-        if (!MtrrLibTypeLeftPrecedeRight (Ranges[Index].Type, Type)) {
-          return FALSE;
-        }
-
-        Length = Ranges[Index].BaseAddress + Ranges[Index].Length - SubBase;
-        SubBase += Length;
-        SubLength -= Length;
-      }
-    }
-  }
-
-  ASSERT (FALSE);
-  return FALSE;
-}
-
-/**
-  Return the number of required variable MTRRs to cover the specified range.
-
-  The routine considers subtraction in the both side of the range to find out
-  the most optimal solution (which uses the least MTRRs).
-
-  @param Ranges            Array holding memory type settings of all memory
-                           address.
-  @param RangeCount        Count of memory ranges.
-  @param VariableMtrr      Array holding allocated variable MTRRs.
-  @param VariableMtrrCount Count of allocated variable MTRRs.
-  @param BaseAddress       Base address of the specified range.
-  @param Length            Length of the specified range.
-  @param Type              MTRR type of the specified range.
-  @param Alignment0        Alignment of 0.
-  @param SubLeft           Return the count of left subtraction.
-  @param SubRight          Return the count of right subtraction.
-
-  @return Number of required variable MTRRs.
-**/
-UINT32
-MtrrLibGetMtrrNumber (
-  IN CONST MEMORY_RANGE    *Ranges,
-  IN UINT32                 RangeCount,
-  IN CONST VARIABLE_MTRR    *VariableMtrr,
-  IN UINT32                 VariableMtrrCount,
-  IN UINT64                 BaseAddress,
-  IN UINT64                 Length,
-  IN MTRR_MEMORY_CACHE_TYPE Type,
-  IN UINT64                 Alignment0,
-  OUT UINT32                *SubLeft, // subtractive from BaseAddress to get more aligned address, to save MTRR
-  OUT UINT32                *SubRight // subtractive from BaseAddress + Length, to save MTRR
-  )
-{
-  UINT64  Alignment;
-  UINT32  LeastLeftMtrrNumber;
-  UINT32  MiddleMtrrNumber;
-  UINT32  LeastRightMtrrNumber;
-  UINT32  CurrentMtrrNumber;
-  UINT32  SubtractiveCount;
-  UINT32  SubtractiveMtrrNumber;
-  UINT32  LeastSubtractiveMtrrNumber;
-  UINT64  SubtractiveBaseAddress;
-  UINT64  SubtractiveLength;
-  UINT64  BaseAlignment;
-  UINT32  Index;
-
-  *SubLeft = 0;
-  *SubRight = 0;
-  LeastSubtractiveMtrrNumber = 0;
-  BaseAlignment = 0;
-
-  //
-  // Get the optimal left subtraction solution.
-  //
-  if (BaseAddress != 0) {
-    SubtractiveBaseAddress = 0;
-    SubtractiveLength      = 0;
-    //
-    // Get the MTRR number needed without left subtraction.
-    //
-    LeastLeftMtrrNumber = MtrrLibGetPositiveMtrrNumber (BaseAddress, Length, Alignment0);
-
-    //
-    // Left subtraction bit by bit, to find the optimal left subtraction solution.
-    //
-    for (SubtractiveMtrrNumber = 0, SubtractiveCount = 1; BaseAddress != 0; SubtractiveCount++) {
-      Alignment = MtrrLibLeastAlignment (BaseAddress, Alignment0);
-
-      //
-      // Check whether the memory type of [BaseAddress - Alignment, BaseAddress) can override Type.
-      // IA32 Manual defines the following override rules:
-      //   WT > WB
-      //   UC > * (any)
-      //
-      if (!MtrrLibSubstractable (Ranges, RangeCount, Type, BaseAddress - Alignment, Alignment)) {
-        break;
-      }
-
-      for (Index = 0; Index < VariableMtrrCount; Index++) {
-        if ((VariableMtrr[Index].BaseAddress == BaseAddress - Alignment) &&
-            (VariableMtrr[Index].Length == Alignment)) {
-          break;
-        }
-      }
-      if (Index == VariableMtrrCount) {
-        //
-        // Increment SubtractiveMtrrNumber when [BaseAddress - Alignment, BaseAddress) is not be planed as a MTRR
-        //
-        SubtractiveMtrrNumber++;
-      }
-
-      BaseAddress -= Alignment;
-      Length += Alignment;
-
-      CurrentMtrrNumber = SubtractiveMtrrNumber + MtrrLibGetPositiveMtrrNumber (BaseAddress, Length, Alignment0);
-      if (CurrentMtrrNumber <= LeastLeftMtrrNumber) {
-        LeastLeftMtrrNumber = CurrentMtrrNumber;
-        LeastSubtractiveMtrrNumber = SubtractiveMtrrNumber;
-        *SubLeft = SubtractiveCount;
-        SubtractiveBaseAddress = BaseAddress;
-        SubtractiveLength = Length;
-      }
-    }
-
-    //
-    // If left subtraction is better, subtract BaseAddress to left, and enlarge Length
-    //
-    if (*SubLeft != 0) {
-      BaseAddress = SubtractiveBaseAddress;
-      Length = SubtractiveLength;
-    }
-  }
-
-  //
-  // Increment BaseAddress greedily until (BaseAddress + Alignment) exceeds (BaseAddress + Length)
-  //
-  MiddleMtrrNumber = 0;
-  while (Length != 0) {
-    BaseAlignment = MtrrLibLeastAlignment (BaseAddress, Alignment0);
-    if (BaseAlignment > Length) {
-      break;
-    }
-    BaseAddress += BaseAlignment;
-    Length -= BaseAlignment;
-    MiddleMtrrNumber++;
-  }
-
-
-  if (Length == 0) {
-    return LeastSubtractiveMtrrNumber + MiddleMtrrNumber;
-  }
-
-
-  //
-  // Get the optimal right subtraction solution.
-  //
-
-  //
-  // Get the MTRR number needed without right subtraction.
-  //
-  LeastRightMtrrNumber = MtrrLibGetPositiveMtrrNumber (BaseAddress, Length, Alignment0);
-
-  for (SubtractiveCount = 1; Length < BaseAlignment; SubtractiveCount++) {
-    Alignment = MtrrLibLeastAlignment (BaseAddress + Length, Alignment0);
-    if (!MtrrLibSubstractable (Ranges, RangeCount, Type, BaseAddress + Length, Alignment)) {
-      break;
-    }
-
-    Length += Alignment;
-
-    //
-    // SubtractiveCount = Number of MTRRs used for subtraction
-    //
-    CurrentMtrrNumber = SubtractiveCount + MtrrLibGetPositiveMtrrNumber (BaseAddress, Length, Alignment0);
-    if (CurrentMtrrNumber <= LeastRightMtrrNumber) {
-      LeastRightMtrrNumber = CurrentMtrrNumber;
-      *SubRight = SubtractiveCount;
-      SubtractiveLength = Length;
-    }
-  }
-
-  return LeastSubtractiveMtrrNumber + MiddleMtrrNumber + LeastRightMtrrNumber;
-}
-
-/**
-  Initializes the valid bits mask and valid address mask for MTRRs.
-
-  This function initializes the valid bits mask and valid address mask for MTRRs.
-
-  @param[out]  MtrrValidBitsMask     The mask for the valid bit of the MTRR
-  @param[out]  MtrrValidAddressMask  The valid address mask for the MTRR
-
-**/
-VOID
-MtrrLibInitializeMtrrMask (
-  OUT UINT64 *MtrrValidBitsMask,
-  OUT UINT64 *MtrrValidAddressMask
-  )
-{
-  UINT32                          MaxExtendedFunction;
-  CPUID_VIR_PHY_ADDRESS_SIZE_EAX  VirPhyAddressSize;
-
-
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
-
-  if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
-    AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);
-  } else {
-    VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
-  }
-
-  *MtrrValidBitsMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
-  *MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL;
-}
-
-
-/**
-  Determines the real attribute of a memory range.
-
-  This function is to arbitrate the real attribute of the memory when
-  there are 2 MTRRs covers the same memory range. For further details,
-  please refer the IA32 Software Developer's Manual, Volume 3,
-  Section "MTRR Precedences".
-
-  @param[in]  MtrrType1    The first kind of Memory type
-  @param[in]  MtrrType2    The second kind of memory type
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-MtrrLibPrecedence (
-  IN MTRR_MEMORY_CACHE_TYPE    MtrrType1,
-  IN MTRR_MEMORY_CACHE_TYPE    MtrrType2
-  )
-{
-  if (MtrrType1 == MtrrType2) {
-    return MtrrType1;
-  }
-
-  ASSERT (
-    MtrrLibTypeLeftPrecedeRight (MtrrType1, MtrrType2) ||
-    MtrrLibTypeLeftPrecedeRight (MtrrType2, MtrrType1)
-  );
-
-  if (MtrrLibTypeLeftPrecedeRight (MtrrType1, MtrrType2)) {
-    return MtrrType1;
-  } else {
-    return MtrrType2;
-  }
-}
-
-/**
-  Worker function will get the memory cache type of the specific address.
-
-  If MtrrSetting is not NULL, gets the memory cache type from input
-  MTRR settings buffer.
-  If MtrrSetting is NULL, gets the memory cache type from MTRRs.
-
-  @param[in]  MtrrSetting        A buffer holding all MTRRs content.
-  @param[in]  Address            The specific address
-
-  @return Memory cache type of the specific address
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-MtrrGetMemoryAttributeByAddressWorker (
-  IN MTRR_SETTINGS      *MtrrSetting,
-  IN PHYSICAL_ADDRESS   Address
-  )
-{
-  MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;
-  UINT64                          FixedMtrr;
-  UINTN                           Index;
-  UINTN                           SubIndex;
-  MTRR_MEMORY_CACHE_TYPE          MtrrType;
-  VARIABLE_MTRR                   VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
-  UINT64                          MtrrValidBitsMask;
-  UINT64                          MtrrValidAddressMask;
-  UINT32                          VariableMtrrCount;
-  MTRR_VARIABLE_SETTINGS          VariableSettings;
-
-  //
-  // Check if MTRR is enabled, if not, return UC as attribute
-  //
-  if (MtrrSetting == NULL) {
-    DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
-  } else {
-    DefType.Uint64 = MtrrSetting->MtrrDefType;
-  }
-
-  if (DefType.Bits.E == 0) {
-    return CacheUncacheable;
-  }
-
-  //
-  // If address is less than 1M, then try to go through the fixed MTRR
-  //
-  if (Address < BASE_1MB) {
-    if (DefType.Bits.FE != 0) {
-      //
-      // Go through the fixed MTRR
-      //
-      for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
-        if (Address >= mMtrrLibFixedMtrrTable[Index].BaseAddress &&
-            Address < mMtrrLibFixedMtrrTable[Index].BaseAddress +
-            (mMtrrLibFixedMtrrTable[Index].Length * 8)) {
-          SubIndex =
-            ((UINTN) Address - mMtrrLibFixedMtrrTable[Index].BaseAddress) /
-            mMtrrLibFixedMtrrTable[Index].Length;
-          if (MtrrSetting == NULL) {
-            FixedMtrr = AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
-          } else {
-            FixedMtrr = MtrrSetting->Fixed.Mtrr[Index];
-          }
-          return (MTRR_MEMORY_CACHE_TYPE) (RShiftU64 (FixedMtrr, SubIndex * 8) & 0xFF);
-        }
-      }
-    }
-  }
-
-  VariableMtrrCount = GetVariableMtrrCountWorker ();
-  ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-  MtrrGetVariableMtrrWorker (MtrrSetting, VariableMtrrCount, &VariableSettings);
-
-  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
-  MtrrGetMemoryAttributeInVariableMtrrWorker (
-    &VariableSettings,
-    VariableMtrrCount,
-    MtrrValidBitsMask,
-    MtrrValidAddressMask,
-    VariableMtrr
-  );
-
-  //
-  // Go through the variable MTRR
-  //
-  MtrrType = CacheInvalid;
-  for (Index = 0; Index < VariableMtrrCount; Index++) {
-    if (VariableMtrr[Index].Valid) {
-      if (Address >= VariableMtrr[Index].BaseAddress &&
-          Address < VariableMtrr[Index].BaseAddress + VariableMtrr[Index].Length) {
-        if (MtrrType == CacheInvalid) {
-          MtrrType = (MTRR_MEMORY_CACHE_TYPE) VariableMtrr[Index].Type;
-        } else {
-          MtrrType = MtrrLibPrecedence (MtrrType, (MTRR_MEMORY_CACHE_TYPE) VariableMtrr[Index].Type);
-        }
-      }
-    }
-  }
-
-  //
-  // If there is no MTRR which covers the Address, use the default MTRR type.
-  //
-  if (MtrrType == CacheInvalid) {
-    MtrrType = (MTRR_MEMORY_CACHE_TYPE) DefType.Bits.Type;
-  }
-
-  return MtrrType;
-}
-
-
-/**
-  This function will get the memory cache type of the specific address.
-
-  This function is mainly for debug purpose.
-
-  @param[in]  Address   The specific address
-
-  @return Memory cache type of the specific address
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-EFIAPI
-MtrrGetMemoryAttribute (
-  IN PHYSICAL_ADDRESS   Address
-  )
-{
-  if (!IsMtrrSupported ()) {
-    return CacheUncacheable;
-  }
-
-  return MtrrGetMemoryAttributeByAddressWorker (NULL, Address);
-}
-
-/**
-  Worker function prints all MTRRs for debugging.
-
-  If MtrrSetting is not NULL, print MTRR settings from input MTRR
-  settings buffer.
-  If MtrrSetting is NULL, print MTRR settings from MTRRs.
-
-  @param  MtrrSetting    A buffer holding all MTRRs content.
-**/
-VOID
-MtrrDebugPrintAllMtrrsWorker (
-  IN MTRR_SETTINGS    *MtrrSetting
-  )
-{
-  DEBUG_CODE (
-    MTRR_SETTINGS  LocalMtrrs;
-    MTRR_SETTINGS  *Mtrrs;
-    UINTN          Index;
-    UINTN          Index1;
-    UINTN          VariableMtrrCount;
-    UINT64         Base;
-    UINT64         Limit;
-    UINT64         MtrrBase;
-    UINT64         MtrrLimit;
-    UINT64         RangeBase;
-    UINT64         RangeLimit;
-    UINT64         NoRangeBase;
-    UINT64         NoRangeLimit;
-    UINT32         RegEax;
-    UINTN          MemoryType;
-    UINTN          PreviousMemoryType;
-    BOOLEAN        Found;
-
-    if (!IsMtrrSupported ()) {
-      return;
-    }
-
-    DEBUG((DEBUG_CACHE, "MTRR Settings\n"));
-    DEBUG((DEBUG_CACHE, "=============\n"));
-
-    if (MtrrSetting != NULL) {
-      Mtrrs = MtrrSetting;
-    } else {
-      MtrrGetAllMtrrs (&LocalMtrrs);
-      Mtrrs = &LocalMtrrs;
-    }
-
-    DEBUG((DEBUG_CACHE, "MTRR Default Type: %016lx\n", Mtrrs->MtrrDefType));
-    for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
-      DEBUG((DEBUG_CACHE, "Fixed MTRR[%02d]   : %016lx\n", Index, Mtrrs->Fixed.Mtrr[Index]));
-    }
-
-    VariableMtrrCount = GetVariableMtrrCount ();
-    for (Index = 0; Index < VariableMtrrCount; Index++) {
-      DEBUG((DEBUG_CACHE, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
-        Index,
-        Mtrrs->Variables.Mtrr[Index].Base,
-        Mtrrs->Variables.Mtrr[Index].Mask
-        ));
-    }
-    DEBUG((DEBUG_CACHE, "\n"));
-    DEBUG((DEBUG_CACHE, "MTRR Ranges\n"));
-    DEBUG((DEBUG_CACHE, "====================================\n"));
-
-    Base = 0;
-    PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
-    for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
-      Base = mMtrrLibFixedMtrrTable[Index].BaseAddress;
-      for (Index1 = 0; Index1 < 8; Index1++) {
-      MemoryType = (UINTN)(RShiftU64 (Mtrrs->Fixed.Mtrr[Index], Index1 * 8) & 0xff);
-        if (MemoryType > CacheWriteBack) {
-          MemoryType = MTRR_CACHE_INVALID_TYPE;
-        }
-        if (MemoryType != PreviousMemoryType) {
-          if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
-            DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
-          }
-          PreviousMemoryType = MemoryType;
-          DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
-        }
-        Base += mMtrrLibFixedMtrrTable[Index].Length;
-      }
-    }
-    DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
-
-    VariableMtrrCount = GetVariableMtrrCount ();
-
-    Limit        = BIT36 - 1;
-    AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
-    if (RegEax >= 0x80000008) {
-      AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-      Limit = LShiftU64 (1, RegEax & 0xff) - 1;
-    }
-    Base = BASE_1MB;
-    PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
-    do {
-      MemoryType = MtrrGetMemoryAttributeByAddressWorker (Mtrrs, Base);
-      if (MemoryType > CacheWriteBack) {
-        MemoryType = MTRR_CACHE_INVALID_TYPE;
-      }
-
-      if (MemoryType != PreviousMemoryType) {
-        if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
-          DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
-        }
-        PreviousMemoryType = MemoryType;
-        DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
-      }
-
-      RangeBase    = BASE_1MB;
-      NoRangeBase  = BASE_1MB;
-      RangeLimit   = Limit;
-      NoRangeLimit = Limit;
-
-      for (Index = 0, Found = FALSE; Index < VariableMtrrCount; Index++) {
-        if ((Mtrrs->Variables.Mtrr[Index].Mask & BIT11) == 0) {
-          //
-          // If mask is not valid, then do not display range
-          //
-          continue;
-        }
-        MtrrBase  = (Mtrrs->Variables.Mtrr[Index].Base & (~(SIZE_4KB - 1)));
-        MtrrLimit = MtrrBase + ((~(Mtrrs->Variables.Mtrr[Index].Mask & (~(SIZE_4KB - 1)))) & Limit);
-
-        if (Base >= MtrrBase && Base < MtrrLimit) {
-          Found = TRUE;
-        }
-
-        if (Base >= MtrrBase && MtrrBase > RangeBase) {
-          RangeBase = MtrrBase;
-        }
-        if (Base > MtrrLimit && MtrrLimit > RangeBase) {
-          RangeBase = MtrrLimit + 1;
-        }
-        if (Base < MtrrBase && MtrrBase < RangeLimit) {
-          RangeLimit = MtrrBase - 1;
-        }
-        if (Base < MtrrLimit && MtrrLimit <= RangeLimit) {
-          RangeLimit = MtrrLimit;
-        }
-
-        if (Base > MtrrLimit && NoRangeBase < MtrrLimit) {
-          NoRangeBase = MtrrLimit + 1;
-        }
-        if (Base < MtrrBase && NoRangeLimit > MtrrBase) {
-          NoRangeLimit = MtrrBase - 1;
-        }
-      }
-
-      if (Found) {
-        Base = RangeLimit + 1;
-      } else {
-        Base = NoRangeLimit + 1;
-      }
-    } while (Base < Limit);
-    DEBUG((DEBUG_CACHE, "%016lx\n\n", Base - 1));
-  );
-}
-
-
-/**
-  This function prints all MTRRs for debugging.
-**/
-VOID
-EFIAPI
-MtrrDebugPrintAllMtrrs (
-  VOID
-  )
-{
-  MtrrDebugPrintAllMtrrsWorker (NULL);
-}
-
-/**
-  Update the Ranges array to change the specified range identified by
-  BaseAddress and Length to Type.
-
-  @param Ranges      Array holding memory type settings for all memory regions.
-  @param Capacity    The maximum count of memory ranges the array can hold.
-  @param Count       Return the new memory range count in the array.
-  @param BaseAddress The base address of the memory range to change type.
-  @param Length      The length of the memory range to change type.
-  @param Type        The new type of the specified memory range.
-
-  @retval RETURN_SUCCESS          The type of the specified memory range is
-                                  changed successfully.
-  @retval RETURN_OUT_OF_RESOURCES The new type set causes the count of memory
-                                  range exceeds capacity.
-**/
-RETURN_STATUS
-MtrrLibSetMemoryType (
-  IN MEMORY_RANGE                 *Ranges,
-  IN UINT32                        Capacity,
-  IN OUT UINT32                    *Count,
-  IN UINT64                        BaseAddress,
-  IN UINT64                        Length,
-  IN MTRR_MEMORY_CACHE_TYPE        Type
-  )
-{
-  UINT32                           Index;
-  UINT64                           Limit;
-  UINT64                           LengthLeft;
-  UINT64                           LengthRight;
-  UINT32                           StartIndex;
-  UINT32                           EndIndex;
-  UINT32                           DeltaCount;
-
-  LengthRight = 0;
-  LengthLeft  = 0;
-  Limit = BaseAddress + Length;
-  StartIndex = *Count;
-  EndIndex = *Count;
-  for (Index = 0; Index < *Count; Index++) {
-    if ((StartIndex == *Count) &&
-        (Ranges[Index].BaseAddress <= BaseAddress) &&
-        (BaseAddress < Ranges[Index].BaseAddress + Ranges[Index].Length)) {
-      StartIndex = Index;
-      LengthLeft = BaseAddress - Ranges[Index].BaseAddress;
-    }
-
-    if ((EndIndex == *Count) &&
-        (Ranges[Index].BaseAddress < Limit) &&
-        (Limit <= Ranges[Index].BaseAddress + Ranges[Index].Length)) {
-      EndIndex = Index;
-      LengthRight = Ranges[Index].BaseAddress + Ranges[Index].Length - Limit;
-      break;
-    }
-  }
-
-  ASSERT (StartIndex != *Count && EndIndex != *Count);
-  if (StartIndex == EndIndex && Ranges[StartIndex].Type == Type) {
-    return RETURN_SUCCESS;
-  }
-
-  //
-  // The type change may cause merging with previous range or next range.
-  // Update the StartIndex, EndIndex, BaseAddress, Length so that following
-  // logic doesn't need to consider merging.
-  //
-  if (StartIndex != 0) {
-    if (LengthLeft == 0 && Ranges[StartIndex - 1].Type == Type) {
-      StartIndex--;
-      Length += Ranges[StartIndex].Length;
-      BaseAddress -= Ranges[StartIndex].Length;
-    }
-  }
-  if (EndIndex != (*Count) - 1) {
-    if (LengthRight == 0 && Ranges[EndIndex + 1].Type == Type) {
-      EndIndex++;
-      Length += Ranges[EndIndex].Length;
-    }
-  }
-
-  //
-  // |- 0 -|- 1 -|- 2 -|- 3 -| StartIndex EndIndex DeltaCount  Count (Count = 4)
-  //   |++++++++++++++++++|    0          3         1=3-0-2    3
-  //   |+++++++|               0          1        -1=1-0-2    5
-  //   |+|                     0          0        -2=0-0-2    6
-  // |+++|                     0          0        -1=0-0-2+1  5
-  //
-  //
-  DeltaCount = EndIndex - StartIndex - 2;
-  if (LengthLeft == 0) {
-    DeltaCount++;
-  }
-  if (LengthRight == 0) {
-    DeltaCount++;
-  }
-  if (*Count - DeltaCount > Capacity) {
-    return RETURN_OUT_OF_RESOURCES;
-  }
-
-  //
-  // Reserve (-DeltaCount) space
-  //
-  CopyMem (&Ranges[EndIndex + 1 - DeltaCount], &Ranges[EndIndex + 1], (*Count - EndIndex - 1) * sizeof (Ranges[0]));
-  *Count -= DeltaCount;
-
-  if (LengthLeft != 0) {
-    Ranges[StartIndex].Length = LengthLeft;
-    StartIndex++;
-  }
-  if (LengthRight != 0) {
-    Ranges[EndIndex - DeltaCount].BaseAddress = BaseAddress + Length;
-    Ranges[EndIndex - DeltaCount].Length = LengthRight;
-    Ranges[EndIndex - DeltaCount].Type = Ranges[EndIndex].Type;
-  }
-  Ranges[StartIndex].BaseAddress = BaseAddress;
-  Ranges[StartIndex].Length = Length;
-  Ranges[StartIndex].Type = Type;
-  return RETURN_SUCCESS;
-}
-
-/**
-  Allocate one or more variable MTRR to cover the range identified by
-  BaseAddress and Length.
-
-  @param Ranges               Memory range array holding the memory type
-                              settings for all memory address.
-  @param RangeCount           Count of memory ranges.
-  @param VariableMtrr         Variable MTRR array.
-  @param VariableMtrrCapacity Capacity of variable MTRR array.
-  @param VariableMtrrCount    Count of variable MTRR.
-  @param BaseAddress          Base address of the memory range.
-  @param Length               Length of the memory range.
-  @param Type                 MTRR type of the memory range.
-  @param Alignment0           Alignment of 0.
-
-  @retval RETURN_SUCCESS          Variable MTRRs are allocated successfully.
-  @retval RETURN_OUT_OF_RESOURCES Count of variable MTRRs exceeds capacity.
-**/
-RETURN_STATUS
-MtrrLibSetMemoryAttributeInVariableMtrr (
-  IN CONST MEMORY_RANGE           *Ranges,
-  IN UINT32                        RangeCount,
-  IN OUT VARIABLE_MTRR             *VariableMtrr,
-  IN UINT32                        VariableMtrrCapacity,
-  IN OUT UINT32                    *VariableMtrrCount,
-  IN UINT64                        BaseAddress,
-  IN UINT64                        Length,
-  IN MTRR_MEMORY_CACHE_TYPE        Type,
-  IN UINT64                        Alignment0
-  );
-
-/**
-  Allocate one or more variable MTRR to cover the range identified by
-  BaseAddress and Length.
-
-  The routine recursively calls MtrrLibSetMemoryAttributeInVariableMtrr()
-  to allocate variable MTRRs when the range contains several sub-ranges
-  with different attributes.
-
-  @param Ranges               Memory range array holding the memory type
-                              settings for all memory address.
-  @param RangeCount           Count of memory ranges.
-  @param VariableMtrr         Variable MTRR array.
-  @param VariableMtrrCapacity Capacity of variable MTRR array.
-  @param VariableMtrrCount    Count of variable MTRR.
-  @param BaseAddress          Base address of the memory range.
-  @param Length               Length of the memory range.
-  @param Type                 MTRR type of the range.
-                              If it's CacheInvalid, the memory range may
-                              contains several sub-ranges with different
-                              attributes.
-  @param Alignment0           Alignment of 0.
-
-  @retval RETURN_SUCCESS          Variable MTRRs are allocated successfully.
-  @retval RETURN_OUT_OF_RESOURCES Count of variable MTRRs exceeds capacity.
-**/
-RETURN_STATUS
-MtrrLibAddVariableMtrr (
-  IN CONST MEMORY_RANGE           *Ranges,
-  IN UINT32                        RangeCount,
-  IN OUT VARIABLE_MTRR             *VariableMtrr,
-  IN UINT32                        VariableMtrrCapacity,
-  IN OUT UINT32                    *VariableMtrrCount,
-  IN PHYSICAL_ADDRESS              BaseAddress,
-  IN UINT64                        Length,
-  IN MTRR_MEMORY_CACHE_TYPE        Type,
-  IN UINT64                        Alignment0
-)
-{
-  RETURN_STATUS                    Status;
-  UINT32                           Index;
-  UINT64                           SubLength;
-
-  MTRR_LIB_ASSERT_ALIGNED (BaseAddress, Length);
-  if (Type == CacheInvalid) {
-    for (Index = 0; Index < RangeCount; Index++) {
-      if (Ranges[Index].BaseAddress <= BaseAddress && BaseAddress < Ranges[Index].BaseAddress + Ranges[Index].Length) {
-
-        //
-        // Because the Length may not be aligned to BaseAddress, below code calls
-        // MtrrLibSetMemoryAttributeInVariableMtrr() instead of itself.
-        // MtrrLibSetMemoryAttributeInVariableMtrr() splits the range to several
-        // aligned ranges.
-        //
-        if (Ranges[Index].BaseAddress + Ranges[Index].Length >= BaseAddress + Length) {
-          return MtrrLibSetMemoryAttributeInVariableMtrr (
-            Ranges, RangeCount, VariableMtrr, VariableMtrrCapacity, VariableMtrrCount,
-            BaseAddress, Length, Ranges[Index].Type, Alignment0
-          );
-        } else {
-          SubLength = Ranges[Index].BaseAddress + Ranges[Index].Length - BaseAddress;
-          Status = MtrrLibSetMemoryAttributeInVariableMtrr (
-            Ranges, RangeCount, VariableMtrr, VariableMtrrCapacity, VariableMtrrCount,
-            BaseAddress, SubLength, Ranges[Index].Type, Alignment0
-          );
-          if (RETURN_ERROR (Status)) {
-            return Status;
-          }
-          BaseAddress += SubLength;
-          Length -= SubLength;
-        }
-      }
-    }
-
-    //
-    // Because memory ranges cover all the memory addresses, it's impossible to be here.
-    //
-    ASSERT (FALSE);
-    return RETURN_DEVICE_ERROR;
-  } else {
-    for (Index = 0; Index < *VariableMtrrCount; Index++) {
-      if (VariableMtrr[Index].BaseAddress == BaseAddress && VariableMtrr[Index].Length == Length) {
-        ASSERT (VariableMtrr[Index].Type == Type);
-        break;
-      }
-    }
-    if (Index == *VariableMtrrCount) {
-      if (*VariableMtrrCount == VariableMtrrCapacity) {
-        return RETURN_OUT_OF_RESOURCES;
-      }
-      VariableMtrr[Index].BaseAddress = BaseAddress;
-      VariableMtrr[Index].Length = Length;
-      VariableMtrr[Index].Type = Type;
-      VariableMtrr[Index].Valid = TRUE;
-      VariableMtrr[Index].Used = TRUE;
-      (*VariableMtrrCount)++;
-    }
-    return RETURN_SUCCESS;
-  }
-}
-
-/**
-  Allocate one or more variable MTRR to cover the range identified by
-  BaseAddress and Length.
-
-  @param Ranges               Memory range array holding the memory type
-                              settings for all memory address.
-  @param RangeCount           Count of memory ranges.
-  @param VariableMtrr         Variable MTRR array.
-  @param VariableMtrrCapacity Capacity of variable MTRR array.
-  @param VariableMtrrCount    Count of variable MTRR.
-  @param BaseAddress          Base address of the memory range.
-  @param Length               Length of the memory range.
-  @param Type                 MTRR type of the memory range.
-  @param Alignment0           Alignment of 0.
-
-  @retval RETURN_SUCCESS          Variable MTRRs are allocated successfully.
-  @retval RETURN_OUT_OF_RESOURCES Count of variable MTRRs exceeds capacity.
-**/
-RETURN_STATUS
-MtrrLibSetMemoryAttributeInVariableMtrr (
-  IN CONST MEMORY_RANGE     *Ranges,
-  IN UINT32                 RangeCount,
-  IN OUT VARIABLE_MTRR      *VariableMtrr,
-  IN UINT32                 VariableMtrrCapacity,
-  IN OUT UINT32             *VariableMtrrCount,
-  IN UINT64                 BaseAddress,
-  IN UINT64                 Length,
-  IN MTRR_MEMORY_CACHE_TYPE Type,
-  IN UINT64                 Alignment0
-)
-{
-  UINT64                    Alignment;
-  UINT32                    MtrrNumber;
-  UINT32                    SubtractiveLeft;
-  UINT32                    SubtractiveRight;
-  BOOLEAN                   UseLeastAlignment;
-
-  Alignment = 0;
-
-  MtrrNumber = MtrrLibGetMtrrNumber (Ranges, RangeCount, VariableMtrr, *VariableMtrrCount,
-                                     BaseAddress, Length, Type, Alignment0, &SubtractiveLeft, &SubtractiveRight);
-
-  if (MtrrNumber + *VariableMtrrCount > VariableMtrrCapacity) {
-    return RETURN_OUT_OF_RESOURCES;
-  }
-
-  while (SubtractiveLeft-- != 0) {
-    Alignment = MtrrLibLeastAlignment (BaseAddress, Alignment0);
-    ASSERT (Alignment <= Length);
-
-    MtrrLibAddVariableMtrr (Ranges, RangeCount, VariableMtrr, VariableMtrrCapacity, VariableMtrrCount,
-                            BaseAddress - Alignment, Alignment, CacheInvalid, Alignment0);
-    BaseAddress -= Alignment;
-    Length += Alignment;
-  }
-
-  while (Length != 0) {
-    Alignment = MtrrLibLeastAlignment (BaseAddress, Alignment0);
-    if (Alignment > Length) {
-      break;
-    }
-    MtrrLibAddVariableMtrr (NULL, 0, VariableMtrr, VariableMtrrCapacity, VariableMtrrCount,
-                            BaseAddress, Alignment, Type, Alignment0);
-    BaseAddress += Alignment;
-    Length -= Alignment;
-  }
-
-  while (SubtractiveRight-- != 0) {
-    Alignment = MtrrLibLeastAlignment (BaseAddress + Length, Alignment0);
-    MtrrLibAddVariableMtrr (Ranges, RangeCount, VariableMtrr, VariableMtrrCapacity, VariableMtrrCount,
-                            BaseAddress + Length, Alignment, CacheInvalid, Alignment0);
-    Length += Alignment;
-  }
-
-  UseLeastAlignment = TRUE;
-  while (Length != 0) {
-    if (UseLeastAlignment) {
-      Alignment = MtrrLibLeastAlignment (BaseAddress, Alignment0);
-      if (Alignment > Length) {
-        UseLeastAlignment = FALSE;
-      }
-    }
-
-    if (!UseLeastAlignment) {
-      Alignment = GetPowerOfTwo64 (Length);
-    }
-
-    MtrrLibAddVariableMtrr (NULL, 0, VariableMtrr, VariableMtrrCapacity, VariableMtrrCount,
-                            BaseAddress, Alignment, Type, Alignment0);
-    BaseAddress += Alignment;
-    Length -= Alignment;
-  }
-  return RETURN_SUCCESS;
-}
-
-/**
-  Return an array of memory ranges holding memory type settings for all memory
-  address.
-
-  @param DefaultType       The default memory type.
-  @param TotalLength       The total length of the memory.
-  @param VariableMtrr      The variable MTRR array.
-  @param VariableMtrrCount The count of variable MTRRs.
-  @param Ranges            Return the memory range array holding memory type
-                           settings for all memory address.
-  @param RangeCapacity     The capacity of memory range array.
-  @param RangeCount        Return the count of memory range.
-
-  @retval RETURN_SUCCESS          The memory range array is returned successfully.
-  @retval RETURN_OUT_OF_RESOURCES The count of memory ranges exceeds capacity.
-**/
-RETURN_STATUS
-MtrrLibGetMemoryTypes (
-  IN MTRR_MEMORY_CACHE_TYPE      DefaultType,
-  IN UINT64                      TotalLength,
-  IN CONST VARIABLE_MTRR         *VariableMtrr,
-  IN UINT32                      VariableMtrrCount,
-  OUT MEMORY_RANGE               *Ranges,
-  IN UINT32                      RangeCapacity,
-  OUT UINT32                     *RangeCount
-)
-{
-  RETURN_STATUS                  Status;
-  UINTN                          Index;
-
-  //
-  // WT > WB
-  // UC > *
-  // UC > * (except WB, UC) > WB
-  //
-
-  //
-  // 0. Set whole range as DefaultType
-  //
-  *RangeCount = 1;
-  Ranges[0].BaseAddress = 0;
-  Ranges[0].Length = TotalLength;
-  Ranges[0].Type = DefaultType;
-
-  //
-  // 1. Set WB
-  //
-  for (Index = 0; Index < VariableMtrrCount; Index++) {
-    if (VariableMtrr[Index].Valid && VariableMtrr[Index].Type == CacheWriteBack) {
-      Status = MtrrLibSetMemoryType (
-        Ranges, RangeCapacity, RangeCount,
-        VariableMtrr[Index].BaseAddress, VariableMtrr[Index].Length, (MTRR_MEMORY_CACHE_TYPE) VariableMtrr[Index].Type
-      );
-      if (RETURN_ERROR (Status)) {
-        return Status;
-      }
-    }
-  }
-
-  //
-  // 2. Set other types than WB or UC
-  //
-  for (Index = 0; Index < VariableMtrrCount; Index++) {
-    if (VariableMtrr[Index].Valid && VariableMtrr[Index].Type != CacheWriteBack && VariableMtrr[Index].Type != CacheUncacheable) {
-      Status = MtrrLibSetMemoryType (
-        Ranges, RangeCapacity, RangeCount,
-        VariableMtrr[Index].BaseAddress, VariableMtrr[Index].Length, (MTRR_MEMORY_CACHE_TYPE) VariableMtrr[Index].Type
-      );
-      if (RETURN_ERROR (Status)) {
-        return Status;
-      }
-    }
-  }
-
-  //
-  // 3. Set UC
-  //
-  for (Index = 0; Index < VariableMtrrCount; Index++) {
-    if (VariableMtrr[Index].Valid && VariableMtrr[Index].Type == CacheUncacheable) {
-      Status = MtrrLibSetMemoryType (
-        Ranges, RangeCapacity, RangeCount,
-        VariableMtrr[Index].BaseAddress, VariableMtrr[Index].Length, (MTRR_MEMORY_CACHE_TYPE) VariableMtrr[Index].Type
-      );
-      if (RETURN_ERROR (Status)) {
-        return Status;
-      }
-    }
-  }
-  return RETURN_SUCCESS;
-}
-
-/**
-  Worker function attempts to set the attributes for a memory range.
-
-  If MtrrSetting is not NULL, set the attributes into the input MTRR
-  settings buffer.
-  If MtrrSetting is NULL, set the attributes into MTRRs registers.
-
-  @param[in, out]  MtrrSetting       A buffer holding all MTRRs content.
-  @param[in]       BaseAddress       The physical address that is the start
-                                     address of a memory range.
-  @param[in]       Length            The size in bytes of the memory range.
-  @param[in]       Type              The MTRR type to set for the memory range.
-
-  @retval RETURN_SUCCESS            The attributes were set for the memory
-                                    range.
-  @retval RETURN_INVALID_PARAMETER  Length is zero.
-  @retval RETURN_UNSUPPORTED        The processor does not support one or
-                                    more bytes of the memory resource range
-                                    specified by BaseAddress and Length.
-  @retval RETURN_UNSUPPORTED        The MTRR type is not support for the
-                                    memory resource range specified
-                                    by BaseAddress and Length.
-  @retval RETURN_OUT_OF_RESOURCES   There are not enough system resources to
-                                    modify the attributes of the memory
-                                    resource range.
-
-**/
-RETURN_STATUS
-MtrrSetMemoryAttributeWorker (
-  IN OUT MTRR_SETTINGS           *MtrrSetting,
-  IN PHYSICAL_ADDRESS            BaseAddress,
-  IN UINT64                      Length,
-  IN MTRR_MEMORY_CACHE_TYPE      Type
-  )
-{
-  RETURN_STATUS             Status;
-  UINT32                    Index;
-  UINT32                    WorkingIndex;
-  //
-  // N variable MTRRs can maximumly separate (2N + 1) Ranges, plus 1 range for [0, 1M).
-  //
-  MEMORY_RANGE              Ranges[MTRR_NUMBER_OF_VARIABLE_MTRR * 2 + 2];
-  UINT32                    RangeCount;
-  UINT64                    MtrrValidBitsMask;
-  UINT64                    MtrrValidAddressMask;
-  UINT64                    Alignment0;
-  MTRR_CONTEXT              MtrrContext;
-  BOOLEAN                   MtrrContextValid;
-
-  MTRR_MEMORY_CACHE_TYPE    DefaultType;
-
-  UINT32                    MsrIndex;
-  UINT64                    ClearMask;
-  UINT64                    OrMask;
-  UINT64                    NewValue;
-  BOOLEAN                   FixedSettingsValid[MTRR_NUMBER_OF_FIXED_MTRR];
-  BOOLEAN                   FixedSettingsModified[MTRR_NUMBER_OF_FIXED_MTRR];
-  MTRR_FIXED_SETTINGS       WorkingFixedSettings;
-
-  UINT32                    FirmwareVariableMtrrCount;
-  MTRR_VARIABLE_SETTINGS    *VariableSettings;
-  MTRR_VARIABLE_SETTINGS    OriginalVariableSettings;
-  UINT32                    OriginalVariableMtrrCount;
-  VARIABLE_MTRR             OriginalVariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
-  UINT32                    WorkingVariableMtrrCount;
-  VARIABLE_MTRR             WorkingVariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
-  BOOLEAN                   VariableSettingModified[MTRR_NUMBER_OF_VARIABLE_MTRR];
-  UINTN                     FreeVariableMtrrCount;
-
-  if (Length == 0) {
-    return RETURN_INVALID_PARAMETER;
-  }
-
-  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
-  if (((BaseAddress & ~MtrrValidAddressMask) != 0) || (Length & ~MtrrValidAddressMask) != 0) {
-    return RETURN_UNSUPPORTED;
-  }
-  OriginalVariableMtrrCount = 0;
-  VariableSettings          = NULL;
-
-  ZeroMem (&WorkingFixedSettings, sizeof (WorkingFixedSettings));
-  for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
-    FixedSettingsValid[Index]    = FALSE;
-    FixedSettingsModified[Index] = FALSE;
-  }
-
-  //
-  // Check if Fixed MTRR
-  //
-  if (BaseAddress < BASE_1MB) {
-    MsrIndex = (UINT32)-1;
-    while ((BaseAddress < BASE_1MB) && (Length != 0)) {
-      Status = MtrrLibProgramFixedMtrr (Type, &BaseAddress, &Length, &MsrIndex, &ClearMask, &OrMask);
-      if (RETURN_ERROR (Status)) {
-        return Status;
-      }
-      if (MtrrSetting != NULL) {
-        MtrrSetting->Fixed.Mtrr[MsrIndex] = (MtrrSetting->Fixed.Mtrr[MsrIndex] & ~ClearMask) | OrMask;
-        ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *) &MtrrSetting->MtrrDefType)->Bits.FE = 1;
-      } else {
-        if (!FixedSettingsValid[MsrIndex]) {
-          WorkingFixedSettings.Mtrr[MsrIndex] = AsmReadMsr64 (mMtrrLibFixedMtrrTable[MsrIndex].Msr);
-          FixedSettingsValid[MsrIndex] = TRUE;
-        }
-        NewValue = (WorkingFixedSettings.Mtrr[MsrIndex] & ~ClearMask) | OrMask;
-        if (WorkingFixedSettings.Mtrr[MsrIndex] != NewValue) {
-          WorkingFixedSettings.Mtrr[MsrIndex] = NewValue;
-          FixedSettingsModified[MsrIndex] = TRUE;
-        }
-      }
-    }
-
-    if (Length == 0) {
-      //
-      // A Length of 0 can only make sense for fixed MTTR ranges.
-      // Since we just handled the fixed MTRRs, we can skip the
-      // variable MTRR section.
-      //
-      goto Done;
-    }
-  }
-
-  //
-  // Read the default MTRR type
-  //
-  DefaultType = MtrrGetDefaultMemoryTypeWorker (MtrrSetting);
-
-  //
-  // Read all variable MTRRs and convert to Ranges.
-  //
-  OriginalVariableMtrrCount = GetVariableMtrrCountWorker ();
-  if (MtrrSetting == NULL) {
-    ZeroMem (&OriginalVariableSettings, sizeof (OriginalVariableSettings));
-    MtrrGetVariableMtrrWorker (NULL, OriginalVariableMtrrCount, &OriginalVariableSettings);
-    VariableSettings = &OriginalVariableSettings;
-  } else {
-    VariableSettings = &MtrrSetting->Variables;
-  }
-  MtrrGetMemoryAttributeInVariableMtrrWorker (VariableSettings, OriginalVariableMtrrCount, MtrrValidBitsMask, MtrrValidAddressMask, OriginalVariableMtrr);
-
-  Status = MtrrLibGetMemoryTypes (
-    DefaultType, MtrrValidBitsMask + 1, OriginalVariableMtrr, OriginalVariableMtrrCount,
-    Ranges, 2 * OriginalVariableMtrrCount + 1, &RangeCount
-  );
-  ASSERT (Status == RETURN_SUCCESS);
-
-  FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCountWorker ();
-  ASSERT (RangeCount <= 2 * FirmwareVariableMtrrCount + 1);
-
-  //
-  // Force [0, 1M) to UC, so that it doesn't impact left subtraction algorithm.
-  //
-  Status = MtrrLibSetMemoryType (Ranges, 2 * FirmwareVariableMtrrCount + 2, &RangeCount, 0, SIZE_1MB, CacheUncacheable);
-  ASSERT (Status == RETURN_SUCCESS);
-  //
-  // Apply Type to [BaseAddress, BaseAddress + Length)
-  //
-  Status = MtrrLibSetMemoryType (Ranges, 2 * FirmwareVariableMtrrCount + 2, &RangeCount, BaseAddress, Length, Type);
-  if (RETURN_ERROR (Status)) {
-    return Status;
-  }
-
-  Alignment0 = LShiftU64 (1, (UINTN) HighBitSet64 (MtrrValidBitsMask));
-  WorkingVariableMtrrCount = 0;
-  ZeroMem (&WorkingVariableMtrr, sizeof (WorkingVariableMtrr));
-  for (Index = 0; Index < RangeCount; Index++) {
-    if (Ranges[Index].Type != DefaultType) {
-      //
-      // Maximum allowed MTRR count is (FirmwareVariableMtrrCount + 1)
-      // Because potentially the range [0, 1MB) is not merged, but can be ignored because fixed MTRR covers that
-      //
-      Status = MtrrLibSetMemoryAttributeInVariableMtrr (
-        Ranges, RangeCount,
-        WorkingVariableMtrr, FirmwareVariableMtrrCount + 1, &WorkingVariableMtrrCount,
-        Ranges[Index].BaseAddress, Ranges[Index].Length,
-        Ranges[Index].Type, Alignment0
-      );
-      if (RETURN_ERROR (Status)) {
-        return Status;
-      }
-    }
-  }
-
-  //
-  // Remove the [0, 1MB) MTRR if it still exists (not merged with other range)
-  //
-  if (WorkingVariableMtrr[0].BaseAddress == 0 && WorkingVariableMtrr[0].Length == SIZE_1MB) {
-    ASSERT (WorkingVariableMtrr[0].Type == CacheUncacheable);
-    WorkingVariableMtrrCount--;
-    CopyMem (&WorkingVariableMtrr[0], &WorkingVariableMtrr[1], WorkingVariableMtrrCount * sizeof (VARIABLE_MTRR));
-  }
-
-  if (WorkingVariableMtrrCount > FirmwareVariableMtrrCount) {
-    return RETURN_OUT_OF_RESOURCES;
-  }
-
-  for (Index = 0; Index < OriginalVariableMtrrCount; Index++) {
-    VariableSettingModified[Index] = FALSE;
-
-    if (!OriginalVariableMtrr[Index].Valid) {
-      continue;
-    }
-    for (WorkingIndex = 0; WorkingIndex < WorkingVariableMtrrCount; WorkingIndex++) {
-      if (OriginalVariableMtrr[Index].BaseAddress == WorkingVariableMtrr[WorkingIndex].BaseAddress &&
-          OriginalVariableMtrr[Index].Length == WorkingVariableMtrr[WorkingIndex].Length &&
-          OriginalVariableMtrr[Index].Type == WorkingVariableMtrr[WorkingIndex].Type) {
-        break;
-      }
-    }
-
-    if (WorkingIndex == WorkingVariableMtrrCount) {
-      //
-      // Remove the one from OriginalVariableMtrr which is not in WorkingVariableMtrr
-      //
-      OriginalVariableMtrr[Index].Valid = FALSE;
-      VariableSettingModified[Index] = TRUE;
-    } else {
-      //
-      // Remove the one from WorkingVariableMtrr which is also in OriginalVariableMtrr
-      //
-      WorkingVariableMtrr[WorkingIndex].Valid = FALSE;
-    }
-    //
-    // The above two operations cause that valid MTRR only exists in either OriginalVariableMtrr or WorkingVariableMtrr.
-    //
-  }
-
-  //
-  // Merge remaining MTRRs from WorkingVariableMtrr to OriginalVariableMtrr
-  //
-  for (FreeVariableMtrrCount = 0, WorkingIndex = 0, Index = 0; Index < OriginalVariableMtrrCount; Index++) {
-    if (!OriginalVariableMtrr[Index].Valid) {
-      for (; WorkingIndex < WorkingVariableMtrrCount; WorkingIndex++) {
-        if (WorkingVariableMtrr[WorkingIndex].Valid) {
-          break;
-        }
-      }
-      if (WorkingIndex == WorkingVariableMtrrCount) {
-        FreeVariableMtrrCount++;
-      } else {
-        CopyMem (&OriginalVariableMtrr[Index], &WorkingVariableMtrr[WorkingIndex], sizeof (VARIABLE_MTRR));
-        VariableSettingModified[Index] = TRUE;
-        WorkingIndex++;
-      }
-    }
-  }
-  ASSERT (OriginalVariableMtrrCount - FreeVariableMtrrCount <= FirmwareVariableMtrrCount);
-
-  //
-  // Move MTRRs after the FirmwraeVariableMtrrCount position to beginning
-  //
-  WorkingIndex = FirmwareVariableMtrrCount;
-  for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
-    if (!OriginalVariableMtrr[Index].Valid) {
-      //
-      // Found an empty MTRR in WorkingIndex position
-      //
-      for (; WorkingIndex < OriginalVariableMtrrCount; WorkingIndex++) {
-        if (OriginalVariableMtrr[WorkingIndex].Valid) {
-          break;
-        }
-      }
-
-      if (WorkingIndex != OriginalVariableMtrrCount) {
-        CopyMem (&OriginalVariableMtrr[Index], &OriginalVariableMtrr[WorkingIndex], sizeof (VARIABLE_MTRR));
-        VariableSettingModified[Index] = TRUE;
-        VariableSettingModified[WorkingIndex] = TRUE;
-        OriginalVariableMtrr[WorkingIndex].Valid = FALSE;
-      }
-    }
-  }
-
-  //
-  // Convert OriginalVariableMtrr to VariableSettings
-  // NOTE: MTRR from FirmwareVariableMtrr to OriginalVariableMtrr need to update as well.
-  //
-  for (Index = 0; Index < OriginalVariableMtrrCount; Index++) {
-    if (VariableSettingModified[Index]) {
-      if (OriginalVariableMtrr[Index].Valid) {
-        VariableSettings->Mtrr[Index].Base = (OriginalVariableMtrr[Index].BaseAddress & MtrrValidAddressMask) | (UINT8) OriginalVariableMtrr[Index].Type;
-        VariableSettings->Mtrr[Index].Mask = ((~(OriginalVariableMtrr[Index].Length - 1)) & MtrrValidAddressMask) | BIT11;
-      } else {
-        VariableSettings->Mtrr[Index].Base = 0;
-        VariableSettings->Mtrr[Index].Mask = 0;
-      }
-    }
-  }
-
-Done:
-  if (MtrrSetting != NULL) {
-    ((MSR_IA32_MTRR_DEF_TYPE_REGISTER *) &MtrrSetting->MtrrDefType)->Bits.E = 1;
-    return RETURN_SUCCESS;
-  }
-
-  MtrrContextValid = FALSE;
-  //
-  // Write fixed MTRRs that have been modified
-  //
-  for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
-    if (FixedSettingsModified[Index]) {
-      if (!MtrrContextValid) {
-        MtrrLibPreMtrrChange (&MtrrContext);
-        MtrrContextValid = TRUE;
-      }
-      AsmWriteMsr64 (
-        mMtrrLibFixedMtrrTable[Index].Msr,
-        WorkingFixedSettings.Mtrr[Index]
-        );
-    }
-  }
-
-  //
-  // Write variable MTRRs
-  // When only fixed MTRRs were changed, below loop doesn't run
-  // because OriginalVariableMtrrCount equals to 0.
-  //
-  for (Index = 0; Index < OriginalVariableMtrrCount; Index++) {
-    if (VariableSettingModified[Index]) {
-      if (!MtrrContextValid) {
-        MtrrLibPreMtrrChange (&MtrrContext);
-        MtrrContextValid = TRUE;
-      }
-      AsmWriteMsr64 (
-        MSR_IA32_MTRR_PHYSBASE0 + (Index << 1),
-        VariableSettings->Mtrr[Index].Base
-      );
-      AsmWriteMsr64 (
-        MSR_IA32_MTRR_PHYSMASK0 + (Index << 1),
-        VariableSettings->Mtrr[Index].Mask
-      );
-    }
-  }
-  if (MtrrContextValid) {
-    MtrrLibPostMtrrChange (&MtrrContext);
-  }
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  This function attempts to set the attributes for a memory range.
-
-  @param[in]  BaseAddress        The physical address that is the start
-                                 address of a memory range.
-  @param[in]  Length             The size in bytes of the memory range.
-  @param[in]  Attributes         The bit mask of attributes to set for the
-                                 memory range.
-
-  @retval RETURN_SUCCESS            The attributes were set for the memory
-                                    range.
-  @retval RETURN_INVALID_PARAMETER  Length is zero.
-  @retval RETURN_UNSUPPORTED        The processor does not support one or
-                                    more bytes of the memory resource range
-                                    specified by BaseAddress and Length.
-  @retval RETURN_UNSUPPORTED        The bit mask of attributes is not support
-                                    for the memory resource range specified
-                                    by BaseAddress and Length.
-  @retval RETURN_ACCESS_DENIED      The attributes for the memory resource
-                                    range specified by BaseAddress and Length
-                                    cannot be modified.
-  @retval RETURN_OUT_OF_RESOURCES   There are not enough system resources to
-                                    modify the attributes of the memory
-                                    resource range.
-
-**/
-RETURN_STATUS
-EFIAPI
-MtrrSetMemoryAttribute (
-  IN PHYSICAL_ADDRESS        BaseAddress,
-  IN UINT64                  Length,
-  IN MTRR_MEMORY_CACHE_TYPE  Attribute
-  )
-{
-  RETURN_STATUS              Status;
-
-  if (!IsMtrrSupported ()) {
-    return RETURN_UNSUPPORTED;
-  }
-
-  Status = MtrrSetMemoryAttributeWorker (NULL, BaseAddress, Length, Attribute);
-  DEBUG ((DEBUG_CACHE, "MtrrSetMemoryAttribute() %a: [%016lx, %016lx) - %r\n",
-          mMtrrMemoryCacheTypeShortName[Attribute], BaseAddress, BaseAddress + Length, Status));
-
-  if (!RETURN_ERROR (Status)) {
-    MtrrDebugPrintAllMtrrsWorker (NULL);
-  }
-  return Status;
-}
-
-/**
-  This function attempts to set the attributes into MTRR setting buffer for a memory range.
-
-  @param[in, out]  MtrrSetting  MTRR setting buffer to be set.
-  @param[in]       BaseAddress  The physical address that is the start address
-                                of a memory range.
-  @param[in]       Length       The size in bytes of the memory range.
-  @param[in]       Attribute    The bit mask of attributes to set for the
-                                memory range.
-
-  @retval RETURN_SUCCESS            The attributes were set for the memory range.
-  @retval RETURN_INVALID_PARAMETER  Length is zero.
-  @retval RETURN_UNSUPPORTED        The processor does not support one or more bytes of the
-                                    memory resource range specified by BaseAddress and Length.
-  @retval RETURN_UNSUPPORTED        The bit mask of attributes is not support for the memory resource
-                                    range specified by BaseAddress and Length.
-  @retval RETURN_ACCESS_DENIED      The attributes for the memory resource range specified by
-                                    BaseAddress and Length cannot be modified.
-  @retval RETURN_OUT_OF_RESOURCES   There are not enough system resources to modify the attributes of
-                                    the memory resource range.
-
-**/
-RETURN_STATUS
-EFIAPI
-MtrrSetMemoryAttributeInMtrrSettings (
-  IN OUT MTRR_SETTINGS       *MtrrSetting,
-  IN PHYSICAL_ADDRESS        BaseAddress,
-  IN UINT64                  Length,
-  IN MTRR_MEMORY_CACHE_TYPE  Attribute
-  )
-{
-  RETURN_STATUS              Status;
-  Status = MtrrSetMemoryAttributeWorker (MtrrSetting, BaseAddress, Length, Attribute);
-  DEBUG((DEBUG_CACHE, "MtrrSetMemoryAttributeMtrrSettings(%p) %a: [%016lx, %016lx) - %r\n",
-         MtrrSetting, mMtrrMemoryCacheTypeShortName[Attribute], BaseAddress, BaseAddress + Length, Status));
-
-  if (!RETURN_ERROR (Status)) {
-    MtrrDebugPrintAllMtrrsWorker (MtrrSetting);
-  }
-
-  return Status;
-}
-
-/**
-  Worker function setting variable MTRRs
-
-  @param[in]  VariableSettings   A buffer to hold variable MTRRs content.
-
-**/
-VOID
-MtrrSetVariableMtrrWorker (
-  IN MTRR_VARIABLE_SETTINGS         *VariableSettings
-  )
-{
-  UINT32  Index;
-  UINT32  VariableMtrrCount;
-
-  VariableMtrrCount = GetVariableMtrrCountWorker ();
-  ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-
-  for (Index = 0; Index < VariableMtrrCount; Index++) {
-    AsmWriteMsr64 (
-      MSR_IA32_MTRR_PHYSBASE0 + (Index << 1),
-      VariableSettings->Mtrr[Index].Base
-      );
-    AsmWriteMsr64 (
-      MSR_IA32_MTRR_PHYSMASK0 + (Index << 1),
-      VariableSettings->Mtrr[Index].Mask
-      );
-  }
-}
-
-
-/**
-  This function sets variable MTRRs
-
-  @param[in]  VariableSettings   A buffer to hold variable MTRRs content.
-
-  @return The pointer of VariableSettings
-
-**/
-MTRR_VARIABLE_SETTINGS*
-EFIAPI
-MtrrSetVariableMtrr (
-  IN MTRR_VARIABLE_SETTINGS         *VariableSettings
-  )
-{
-  MTRR_CONTEXT  MtrrContext;
-
-  if (!IsMtrrSupported ()) {
-    return VariableSettings;
-  }
-
-  MtrrLibPreMtrrChange (&MtrrContext);
-  MtrrSetVariableMtrrWorker (VariableSettings);
-  MtrrLibPostMtrrChange (&MtrrContext);
-  MtrrDebugPrintAllMtrrs ();
-
-  return  VariableSettings;
-}
-
-/**
-  Worker function setting fixed MTRRs
-
-  @param[in]  FixedSettings  A buffer to hold fixed MTRRs content.
-
-**/
-VOID
-MtrrSetFixedMtrrWorker (
-  IN MTRR_FIXED_SETTINGS          *FixedSettings
-  )
-{
-  UINT32  Index;
-
-  for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
-     AsmWriteMsr64 (
-       mMtrrLibFixedMtrrTable[Index].Msr,
-       FixedSettings->Mtrr[Index]
-       );
-  }
-}
-
-
-/**
-  This function sets fixed MTRRs
-
-  @param[in]  FixedSettings  A buffer to hold fixed MTRRs content.
-
-  @retval The pointer of FixedSettings
-
-**/
-MTRR_FIXED_SETTINGS*
-EFIAPI
-MtrrSetFixedMtrr (
-  IN MTRR_FIXED_SETTINGS          *FixedSettings
-  )
-{
-  MTRR_CONTEXT  MtrrContext;
-
-  if (!IsMtrrSupported ()) {
-    return FixedSettings;
-  }
-
-  MtrrLibPreMtrrChange (&MtrrContext);
-  MtrrSetFixedMtrrWorker (FixedSettings);
-  MtrrLibPostMtrrChange (&MtrrContext);
-  MtrrDebugPrintAllMtrrs ();
-
-  return FixedSettings;
-}
-
-
-/**
-  This function gets the content in all MTRRs (variable and fixed)
-
-  @param[out]  MtrrSetting  A buffer to hold all MTRRs content.
-
-  @retval the pointer of MtrrSetting
-
-**/
-MTRR_SETTINGS *
-EFIAPI
-MtrrGetAllMtrrs (
-  OUT MTRR_SETTINGS                *MtrrSetting
-  )
-{
-  if (!IsMtrrSupported ()) {
-    return MtrrSetting;
-  }
-
-  //
-  // Get fixed MTRRs
-  //
-  MtrrGetFixedMtrrWorker (&MtrrSetting->Fixed);
-
-  //
-  // Get variable MTRRs
-  //
-  MtrrGetVariableMtrrWorker (
-    NULL,
-    GetVariableMtrrCountWorker (),
-    &MtrrSetting->Variables
-    );
-
-  //
-  // Get MTRR_DEF_TYPE value
-  //
-  MtrrSetting->MtrrDefType = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);
-
-  return MtrrSetting;
-}
-
-
-/**
-  This function sets all MTRRs (variable and fixed)
-
-  @param[in]  MtrrSetting  A buffer holding all MTRRs content.
-
-  @retval The pointer of MtrrSetting
-
-**/
-MTRR_SETTINGS *
-EFIAPI
-MtrrSetAllMtrrs (
-  IN MTRR_SETTINGS                *MtrrSetting
-  )
-{
-  MTRR_CONTEXT  MtrrContext;
-
-  if (!IsMtrrSupported ()) {
-    return MtrrSetting;
-  }
-
-  MtrrLibPreMtrrChange (&MtrrContext);
-
-  //
-  // Set fixed MTRRs
-  //
-  MtrrSetFixedMtrrWorker (&MtrrSetting->Fixed);
-
-  //
-  // Set variable MTRRs
-  //
-  MtrrSetVariableMtrrWorker (&MtrrSetting->Variables);
-
-  //
-  // Set MTRR_DEF_TYPE value
-  //
-  AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType);
-
-  MtrrLibPostMtrrChangeEnableCache (&MtrrContext);
-
-  return MtrrSetting;
-}
-
-
-/**
-  Checks if MTRR is supported.
-
-  @retval TRUE  MTRR is supported.
-  @retval FALSE MTRR is not supported.
-
-**/
-BOOLEAN
-EFIAPI
-IsMtrrSupported (
-  VOID
-  )
-{
-  CPUID_VERSION_INFO_EDX    Edx;
-  MSR_IA32_MTRRCAP_REGISTER MtrrCap;
-
-  //
-  // Check CPUID(1).EDX[12] for MTRR capability
-  //
-  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &Edx.Uint32);
-  if (Edx.Bits.MTRR == 0) {
-    return FALSE;
-  }
-
-  //
-  // Check number of variable MTRRs and fixed MTRRs existence.
-  // If number of variable MTRRs is zero, or fixed MTRRs do not
-  // exist, return false.
-  //
-  MtrrCap.Uint64 = AsmReadMsr64 (MSR_IA32_MTRRCAP);
-  if ((MtrrCap.Bits.VCNT == 0) || (MtrrCap.Bits.FIX == 0)) {
-    return FALSE;
-  }
-  return TRUE;
-}
-
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf b/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
deleted file mode 100644
index 01a4d84da0..0000000000
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
+++ /dev/null
@@ -1,46 +0,0 @@
-## @file
-#  MTRR library provides APIs for MTRR operation.
-#
-#  Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = MtrrLib
-  MODULE_UNI_FILE                = MtrrLib.uni
-  FILE_GUID                      = 6826b408-f4f3-47ee-917f-af7047f9d937
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = MtrrLib 
-
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources]
-  MtrrLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseMemoryLib
-  BaseLib
-  CpuLib
-  DebugLib
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs   ## SOMETIMES_CONSUMES
-
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.uni b/UefiCpuPkg/Library/MtrrLib/MtrrLib.uni
deleted file mode 100644
index 34753a089a..0000000000
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// MTRR library provides APIs for MTRR operation.
-//
-// MTRR library provides APIs for MTRR operation.
-//
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-// 
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "MTRR library provides APIs for MTRR operation"
-
-#string STR_MODULE_DESCRIPTION          #language en-US "MTRR library provides APIs for MTRR operation."
-
diff --git a/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.c b/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.c
deleted file mode 100644
index ad3e9090c6..0000000000
--- a/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/** @file
-Null instance of Platform Sec Lib.
-
-Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution.  The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Ppi/SecPlatformInformation.h>
-
-/**
-  A developer supplied function to perform platform specific operations.
-
-  It's a developer supplied function to perform any operations appropriate to a
-  given platform. It's invoked just before passing control to PEI core by SEC
-  core. Platform developer may modify the SecCoreData passed to PEI Core.
-  It returns a platform specific PPI list that platform wishes to pass to PEI core.
-  The Generic SEC core module will merge this list to join the final list passed to
-  PEI core.
-
-  @param  SecCoreData           The same parameter as passing to PEI core. It
-                                could be overridden by this function.
-
-  @return The platform specific PPI list to be passed to PEI core or
-          NULL if there is no need of such platform specific PPI list.
-
-**/
-EFI_PEI_PPI_DESCRIPTOR *
-EFIAPI
-SecPlatformMain (
-  IN OUT   EFI_SEC_PEI_HAND_OFF        *SecCoreData
-  )
-{
-  return NULL;
-}
-
-/**
-  This interface conveys state information out of the Security (SEC) phase into PEI.
-
-  @param  PeiServices               Pointer to the PEI Services Table.
-  @param  StructureSize             Pointer to the variable describing size of the input buffer.
-  @param  PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
-
-  @retval EFI_SUCCESS           The data was successfully returned.
-  @retval EFI_BUFFER_TOO_SMALL  The buffer was too small.
-
-**/
-EFI_STATUS
-EFIAPI
-SecPlatformInformation (
-  IN CONST EFI_PEI_SERVICES                     **PeiServices,
-  IN OUT   UINT64                               *StructureSize,
-     OUT   EFI_SEC_PLATFORM_INFORMATION_RECORD  *PlatformInformationRecord
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  This interface disables temporary memory in SEC Phase.
-**/
-VOID
-EFIAPI
-SecPlatformDisableTemporaryMemory (
-  VOID
-  )
-{
-}
-
-/**
-  This function provides dummy function so that SecCore can pass build
-  validation. All real platform library instances need to implement the real
-  entry point in assembly.
-**/
-VOID
-EFIAPI
-_ModuleEntryPoint (
-  VOID
-  )
-{
-  return;
-}
diff --git a/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf b/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
deleted file mode 100644
index 3f8868adee..0000000000
--- a/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
+++ /dev/null
@@ -1,37 +0,0 @@
-## @file
-#  Library functions for PlatformSecLib.
-#
-#  Null instance of Platform Sec Lib.
-#
-#  Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PlatformSecLibNull
-  MODULE_UNI_FILE                = PlatformSecLibNull.uni
-  FILE_GUID                      = 6695974D-968C-420b-80B9-7870CD20118F
-  MODULE_TYPE                    = SEC
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = PlatformSecLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources]
-  PlatformSecLibNull.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
diff --git a/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.uni b/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.uni
deleted file mode 100644
index d7212f0351..0000000000
--- a/UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.uni
+++ /dev/null
@@ -1,20 +0,0 @@
-// /** @file
-// Library functions for PlatformSecLib.
-//
-// Null instance of Platform Sec Library.
-//
-// Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-#string STR_MODULE_ABSTRACT             #language en-US "Library functions for PlatformSecLib"
-
-#string STR_MODULE_DESCRIPTION          #language en-US "Null instance of Platform Sec Library."
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
deleted file mode 100644
index 5e11b2b21c..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ /dev/null
@@ -1,751 +0,0 @@
-/** @file
-  CPU Features Initialize functions.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "RegisterCpuFeatures.h"
-
-/**
-  Worker function to save PcdCpuFeaturesCapability.
-
-  @param[in]  SupportedFeatureMask  The pointer to CPU feature bits mask buffer
-**/
-VOID
-SetCapabilityPcd (
-  IN UINT8               *SupportedFeatureMask
-  )
-{
-  EFI_STATUS             Status;
-  UINTN                  BitMaskSize;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesCapability);
-  Status = PcdSetPtrS (PcdCpuFeaturesCapability, &BitMaskSize, SupportedFeatureMask);
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Worker function to save PcdCpuFeaturesSetting.
-
-  @param[in]  SupportedFeatureMask  The pointer to CPU feature bits mask buffer
-**/
-VOID
-SetSettingPcd (
-  IN UINT8               *SupportedFeatureMask
-  )
-{
-  EFI_STATUS             Status;
-  UINTN                  BitMaskSize;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSetting);
-  Status = PcdSetPtrS (PcdCpuFeaturesSetting, &BitMaskSize, SupportedFeatureMask);
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Worker function to get PcdCpuFeaturesSupport.
-
-  @return  The pointer to CPU feature bits mask buffer.
-**/
-UINT8 *
-GetSupportPcds (
-  VOID
-  )
-{
-  UINTN                  BitMaskSize;
-  UINT8                  *SupportBitMask;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-  SupportBitMask = AllocateZeroPool (BitMaskSize);
-  ASSERT (SupportBitMask != NULL);
-  SupportBitMask = (UINT8 *) PcdGetPtr (PcdCpuFeaturesSupport);
-
-  return SupportBitMask;
-}
-
-/**
-  Worker function to get PcdCpuFeaturesUserConfiguration.
-
-  @return  The pointer to CPU feature bits mask buffer.
-**/
-UINT8 *
-GetConfigurationPcds (
-  VOID
-  )
-{
-  UINTN                  BitMaskSize;
-  UINT8                  *SupportBitMask;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesUserConfiguration);
-  SupportBitMask = AllocateZeroPool (BitMaskSize);
-  ASSERT (SupportBitMask != NULL);
-  SupportBitMask = (UINT8 *) PcdGetPtr (PcdCpuFeaturesUserConfiguration);
-
-  return SupportBitMask;
-}
-
-/**
-  Collects CPU type and feature information.
-
-  @param[in, out]  CpuInfo  The pointer to CPU feature information
-**/
-VOID
-FillProcessorInfo (
-  IN OUT REGISTER_CPU_FEATURE_INFORMATION        *CpuInfo
-  )
-{
-  CPUID_VERSION_INFO_EAX Eax;
-  CPUID_VERSION_INFO_ECX Ecx;
-  CPUID_VERSION_INFO_EDX Edx;
-  UINT32                 DisplayedFamily;
-  UINT32                 DisplayedModel;
-
-  AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, &Ecx.Uint32, &Edx.Uint32);
-
-  DisplayedFamily = Eax.Bits.FamilyId;
-  if (Eax.Bits.FamilyId == 0x0F) {
-    DisplayedFamily |= (Eax.Bits.ExtendedFamilyId << 4);
-  }
-
-  DisplayedModel = Eax.Bits.Model;
-  if (Eax.Bits.FamilyId == 0x06 || Eax.Bits.FamilyId == 0x0f) {
-    DisplayedModel |= (Eax.Bits.ExtendedModelId << 4);
-  }
-
-  CpuInfo->DisplayFamily = DisplayedFamily;
-  CpuInfo->DisplayModel  = DisplayedModel;
-  CpuInfo->SteppingId    = Eax.Bits.SteppingId;
-  CpuInfo->ProcessorType = Eax.Bits.ProcessorType;
-  CpuInfo->CpuIdVersionInfoEcx.Uint32 = Ecx.Uint32;
-  CpuInfo->CpuIdVersionInfoEdx.Uint32 = Edx.Uint32;
-}
-
-/**
-  Prepares for private data used for CPU features.
-
-  @param[in]  NumberOfCpus  Number of processor in system
-**/
-VOID
-CpuInitDataInitialize (
-  IN UINTN                             NumberOfCpus
-  )
-{
-  EFI_STATUS                           Status;
-  UINTN                                ProcessorNumber;
-  EFI_PROCESSOR_INFORMATION            ProcessorInfoBuffer;
-  CPU_FEATURES_ENTRY                   *CpuFeature;
-  CPU_FEATURES_INIT_ORDER              *InitOrder;
-  CPU_FEATURES_DATA                    *CpuFeaturesData;
-  LIST_ENTRY                           *Entry;
-
-  CpuFeaturesData = GetCpuFeaturesData ();
-  CpuFeaturesData->InitOrder = AllocateZeroPool (sizeof (CPU_FEATURES_INIT_ORDER) * NumberOfCpus);
-  ASSERT (CpuFeaturesData->InitOrder != NULL);
-  CpuFeaturesData->BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-
-  //
-  // Collect CPU Features information
-  //
-  Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
-  while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
-    CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
-    ASSERT (CpuFeature->InitializeFunc != NULL);
-    if (CpuFeature->GetConfigDataFunc != NULL) {
-      CpuFeature->ConfigData = CpuFeature->GetConfigDataFunc (NumberOfCpus);
-    }
-    Entry = Entry->ForwardLink;
-  }
-
-  for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {
-    InitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];
-    InitOrder->FeaturesSupportedMask = AllocateZeroPool (CpuFeaturesData->BitMaskSize);
-    ASSERT (InitOrder->FeaturesSupportedMask != NULL);
-    InitializeListHead (&InitOrder->OrderList);
-    Status = GetProcessorInformation (ProcessorNumber, &ProcessorInfoBuffer);
-    ASSERT_EFI_ERROR (Status);
-    CopyMem (
-      &InitOrder->CpuInfo.ProcessorInfo,
-      &ProcessorInfoBuffer,
-      sizeof (EFI_PROCESSOR_INFORMATION)
-      );
-  }
-  //
-  // Get support and configuration PCDs
-  //
-  CpuFeaturesData->SupportPcds       = GetSupportPcds ();
-  CpuFeaturesData->ConfigurationPcds = GetConfigurationPcds ();
-}
-
-/**
-  Worker function to do OR operation on CPU feature supported bits mask buffer.
-
-  @param[in]  SupportedFeatureMask  The pointer to CPU feature bits mask buffer
-  @param[in]  OrFeatureBitMask      The feature bit mask to do OR operation
-**/
-VOID
-SupportedMaskOr (
-  IN UINT8               *SupportedFeatureMask,
-  IN UINT8               *OrFeatureBitMask
-  )
-{
-  UINTN                  Index;
-  UINTN                  BitMaskSize;
-  UINT8                  *Data1;
-  UINT8                  *Data2;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-  Data1 = SupportedFeatureMask;
-  Data2 = OrFeatureBitMask;
-  for (Index = 0; Index < BitMaskSize; Index++) {
-    *(Data1++) |=  *(Data2++);
-  }
-}
-
-/**
-  Worker function to do AND operation on CPU feature supported bits mask buffer.
-
-  @param[in]  SupportedFeatureMask  The pointer to CPU feature bits mask buffer
-  @param[in]  AndFeatureBitMask     The feature bit mask to do AND operation
-**/
-VOID
-SupportedMaskAnd (
-  IN UINT8               *SupportedFeatureMask,
-  IN UINT8               *AndFeatureBitMask
-  )
-{
-  UINTN                  Index;
-  UINTN                  BitMaskSize;
-  UINT8                  *Data1;
-  UINT8                  *Data2;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-  Data1 = SupportedFeatureMask;
-  Data2 = AndFeatureBitMask;
-  for (Index = 0; Index < BitMaskSize; Index++) {
-    *(Data1++) &=  *(Data2++);
-  }
-}
-
-/**
-  Worker function to check if the compared CPU feature set in the CPU feature
-  supported bits mask buffer.
-
-  @param[in]  SupportedFeatureMask   The pointer to CPU feature bits mask buffer
-  @param[in]  ComparedFeatureBitMask The feature bit mask to be compared
-
-  @retval TRUE   The ComparedFeatureBitMask is set in CPU feature supported bits
-                 mask buffer.
-  @retval FALSE  The ComparedFeatureBitMask is not set in CPU feature supported bits
-                 mask buffer.
-**/
-BOOLEAN
-IsBitMaskMatch (
-  IN UINT8               *SupportedFeatureMask,
-  IN UINT8               *ComparedFeatureBitMask
-  )
-{
-  UINTN                  Index;
-  UINTN                  BitMaskSize;
-  UINT8                  *Data1;
-  UINT8                  *Data2;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-
-  Data1 = SupportedFeatureMask;
-  Data2 = ComparedFeatureBitMask;
-  for (Index = 0; Index < BitMaskSize; Index++) {
-    if (((*(Data1++)) & (*(Data2++))) != 0) {
-      return TRUE;
-    }
-  }
-  return FALSE;
-}
-
-/**
-  Collects processor data for calling processor.
-
-  @param[in,out]  Buffer  The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-CollectProcessorData (
-  IN OUT VOID                          *Buffer
-  )
-{
-  UINTN                                ProcessorNumber;
-  CPU_FEATURES_ENTRY                   *CpuFeature;
-  REGISTER_CPU_FEATURE_INFORMATION     *CpuInfo;
-  LIST_ENTRY                           *Entry;
-  CPU_FEATURES_DATA                    *CpuFeaturesData;
-
-  CpuFeaturesData = GetCpuFeaturesData ();
-  ProcessorNumber = GetProcessorIndex ();
-  CpuInfo = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo;
-  //
-  // collect processor information
-  //
-  FillProcessorInfo (CpuInfo);
-  Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
-  while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
-    CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
-    if (IsBitMaskMatch (CpuFeaturesData->SupportPcds, CpuFeature->FeatureMask)) {
-      if (CpuFeature->SupportFunc == NULL) {
-        //
-        // If SupportFunc is NULL, then the feature is supported.
-        //
-        SupportedMaskOr (
-          CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedMask,
-          CpuFeature->FeatureMask
-          );
-      } else if (CpuFeature->SupportFunc (ProcessorNumber, CpuInfo, CpuFeature->ConfigData)) {
-        SupportedMaskOr (
-          CpuFeaturesData->InitOrder[ProcessorNumber].FeaturesSupportedMask,
-          CpuFeature->FeatureMask
-          );
-      }
-    }
-    Entry = Entry->ForwardLink;
-  }
-}
-
-/**
-  Dump the contents of a CPU register table.
-
-  @param[in]  ProcessorNumber  The index of the CPU to show the register table contents
-
-  @note This service could be called by BSP only.
-**/
-VOID
-DumpRegisterTableOnProcessor (
-  IN UINTN                             ProcessorNumber
-  )
-{
-  CPU_FEATURES_DATA                    *CpuFeaturesData;
-  UINTN                                FeatureIndex;
-  CPU_REGISTER_TABLE                   *RegisterTable;
-  CPU_REGISTER_TABLE_ENTRY             *RegisterTableEntry;
-  CPU_REGISTER_TABLE_ENTRY             *RegisterTableEntryHead;
-  UINT32                               DebugPrintErrorLevel;
-
-  DebugPrintErrorLevel = (ProcessorNumber == 0) ? DEBUG_INFO : DEBUG_VERBOSE;
-  CpuFeaturesData      = GetCpuFeaturesData ();
-  //
-  // Debug information
-  //
-  RegisterTable = &CpuFeaturesData->RegisterTable[ProcessorNumber];
-  DEBUG ((DebugPrintErrorLevel, "RegisterTable->TableLength = %d\n", RegisterTable->TableLength));
-
-  RegisterTableEntryHead = (CPU_REGISTER_TABLE_ENTRY *) (UINTN) RegisterTable->RegisterTableEntry;
-
-  for (FeatureIndex = 0; FeatureIndex < RegisterTable->TableLength; FeatureIndex++) {
-    RegisterTableEntry = &RegisterTableEntryHead[FeatureIndex];
-    switch (RegisterTableEntry->RegisterType) {
-    case Msr:
-      DEBUG ((
-        DebugPrintErrorLevel,
-        "Processor: %d:   MSR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
-        ProcessorNumber,
-        RegisterTableEntry->Index,
-        RegisterTableEntry->ValidBitStart,
-        RegisterTableEntry->ValidBitLength,
-        RegisterTableEntry->Value
-        ));
-      break;
-    case ControlRegister:
-      DEBUG ((
-        DebugPrintErrorLevel,
-        "Processor: %d:    CR: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
-        ProcessorNumber,
-        RegisterTableEntry->Index,
-        RegisterTableEntry->ValidBitStart,
-        RegisterTableEntry->ValidBitLength,
-        RegisterTableEntry->Value
-        ));
-      break;
-    case MemoryMapped:
-      DEBUG ((
-        DebugPrintErrorLevel,
-        "Processor: %d:  MMIO: %lx, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
-        ProcessorNumber,
-        RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32),
-        RegisterTableEntry->ValidBitStart,
-        RegisterTableEntry->ValidBitLength,
-        RegisterTableEntry->Value
-        ));
-      break;
-    case CacheControl:
-      DEBUG ((
-        DebugPrintErrorLevel,
-        "Processor: %d: CACHE: %x, Bit Start: %d, Bit Length: %d, Value: %lx\r\n",
-        ProcessorNumber,
-        RegisterTableEntry->Index,
-        RegisterTableEntry->ValidBitStart,
-        RegisterTableEntry->ValidBitLength,
-        RegisterTableEntry->Value
-        ));
-      break;
-    default:
-      break;
-    }
-  }
-}
-
-/**
-  Analysis register CPU features on each processor and save CPU setting in CPU register table.
-
-  @param[in]  NumberOfCpus  Number of processor in system
-
-**/
-VOID
-AnalysisProcessorFeatures (
-  IN UINTN                             NumberOfCpus
-  )
-{
-  EFI_STATUS                           Status;
-  UINTN                                ProcessorNumber;
-  CPU_FEATURES_ENTRY                   *CpuFeature;
-  CPU_FEATURES_ENTRY                   *CpuFeatureInOrder;
-  CPU_FEATURES_INIT_ORDER              *CpuInitOrder;
-  REGISTER_CPU_FEATURE_INFORMATION     *CpuInfo;
-  LIST_ENTRY                           *Entry;
-  CPU_FEATURES_DATA                    *CpuFeaturesData;
-
-  CpuFeaturesData = GetCpuFeaturesData ();
-  CpuFeaturesData->CapabilityPcds = AllocatePool (CpuFeaturesData->BitMaskSize);
-  ASSERT (CpuFeaturesData->CapabilityPcds != NULL);
-  SetMem (CpuFeaturesData->CapabilityPcds, CpuFeaturesData->BitMaskSize, 0xFF);
-  for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {
-    CpuInitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];
-    //
-    // Calculate the last capability on all processors
-    //
-    SupportedMaskAnd (CpuFeaturesData->CapabilityPcds, CpuInitOrder->FeaturesSupportedMask);
-  }
-  //
-  // Calculate the last setting
-  //
-
-  CpuFeaturesData->SettingPcds = AllocateCopyPool (CpuFeaturesData->BitMaskSize, CpuFeaturesData->CapabilityPcds);
-  ASSERT (CpuFeaturesData->SettingPcds != NULL);
-  SupportedMaskAnd (CpuFeaturesData->SettingPcds, CpuFeaturesData->ConfigurationPcds);
-
-  //
-  // Save PCDs and display CPU PCDs
-  //
-  SetCapabilityPcd (CpuFeaturesData->CapabilityPcds);
-  SetSettingPcd (CpuFeaturesData->SettingPcds);
-
-  //
-  // Dump the last CPU feature list
-  //
-  DEBUG_CODE (
-    DEBUG ((DEBUG_INFO, "Last CPU features list...\n"));
-    Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
-    while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
-      CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
-      if (IsBitMaskMatch (CpuFeature->FeatureMask, CpuFeaturesData->CapabilityPcds)) {
-        if (IsBitMaskMatch (CpuFeature->FeatureMask, CpuFeaturesData->SettingPcds)) {
-          DEBUG ((DEBUG_INFO, "[Enable   ] "));
-        } else {
-          DEBUG ((DEBUG_INFO, "[Disable  ] "));
-        }
-      } else {
-        DEBUG ((DEBUG_INFO, "[Unsupport] "));
-      }
-      DumpCpuFeature (CpuFeature);
-      Entry = Entry->ForwardLink;
-    }
-    DEBUG ((DEBUG_INFO, "PcdCpuFeaturesSupport:\n"));
-    DumpCpuFeatureMask (CpuFeaturesData->SupportPcds);
-    DEBUG ((DEBUG_INFO, "PcdCpuFeaturesUserConfiguration:\n"));
-    DumpCpuFeatureMask (CpuFeaturesData->ConfigurationPcds);
-    DEBUG ((DEBUG_INFO, "PcdCpuFeaturesCapability:\n"));
-    DumpCpuFeatureMask (CpuFeaturesData->CapabilityPcds);
-    DEBUG ((DEBUG_INFO, "PcdCpuFeaturesSetting:\n"));
-    DumpCpuFeatureMask (CpuFeaturesData->SettingPcds);
-  );
-
-  for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {
-    CpuInitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];
-    Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
-    while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
-      //
-      // Insert each feature into processor's order list
-      //
-      CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
-      if (IsBitMaskMatch (CpuFeature->FeatureMask, CpuFeaturesData->CapabilityPcds)) {
-        CpuFeatureInOrder = AllocateCopyPool (sizeof (CPU_FEATURES_ENTRY), CpuFeature);
-        ASSERT (CpuFeatureInOrder != NULL);
-        InsertTailList (&CpuInitOrder->OrderList, &CpuFeatureInOrder->Link);
-      }
-      Entry = Entry->ForwardLink;
-    }
-    //
-    // Go through ordered feature list to initialize CPU features
-    //
-    CpuInfo = &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo;
-    Entry = GetFirstNode (&CpuInitOrder->OrderList);
-    while (!IsNull (&CpuInitOrder->OrderList, Entry)) {
-      CpuFeatureInOrder = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
-      if (IsBitMaskMatch (CpuFeatureInOrder->FeatureMask, CpuFeaturesData->SettingPcds)) {
-        Status = CpuFeatureInOrder->InitializeFunc (ProcessorNumber, CpuInfo, CpuFeatureInOrder->ConfigData, TRUE);
-      } else {
-        Status = CpuFeatureInOrder->InitializeFunc (ProcessorNumber, CpuInfo, CpuFeatureInOrder->ConfigData, FALSE);
-      }
-      ASSERT_EFI_ERROR (Status);
-      Entry = Entry->ForwardLink;
-    }
-    //
-    // Dump the RegisterTable
-    //
-    DumpRegisterTableOnProcessor (ProcessorNumber);
-  }
-}
-
-/**
-  Initialize the CPU registers from a register table.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-
-  @note This service could be called by BSP/APs.
-**/
-VOID
-ProgramProcessorRegister (
-  IN UINTN  ProcessorNumber
-  )
-{
-  CPU_FEATURES_DATA         *CpuFeaturesData;
-  CPU_REGISTER_TABLE        *RegisterTable;
-  CPU_REGISTER_TABLE_ENTRY  *RegisterTableEntry;
-  UINTN                     Index;
-  UINTN                     Value;
-  CPU_REGISTER_TABLE_ENTRY  *RegisterTableEntryHead;
-
-  CpuFeaturesData = GetCpuFeaturesData ();
-  RegisterTable = &CpuFeaturesData->RegisterTable[ProcessorNumber];
-
-  //
-  // Traverse Register Table of this logical processor
-  //
-  RegisterTableEntryHead = (CPU_REGISTER_TABLE_ENTRY *) (UINTN) RegisterTable->RegisterTableEntry;
-
-  for (Index = 0; Index < RegisterTable->TableLength; Index++) {
-
-    RegisterTableEntry = &RegisterTableEntryHead[Index];
-
-    //
-    // Check the type of specified register
-    //
-    switch (RegisterTableEntry->RegisterType) {
-    //
-    // The specified register is Control Register
-    //
-    case ControlRegister:
-      switch (RegisterTableEntry->Index) {
-      case 0:
-        Value = AsmReadCr0 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          RegisterTableEntry->Value
-                          );
-        AsmWriteCr0 (Value);
-        break;
-      case 2:
-        Value = AsmReadCr2 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          RegisterTableEntry->Value
-                          );
-        AsmWriteCr2 (Value);
-        break;
-      case 3:
-        Value = AsmReadCr3 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          RegisterTableEntry->Value
-                          );
-        AsmWriteCr3 (Value);
-        break;
-      case 4:
-        Value = AsmReadCr4 ();
-        Value = (UINTN) BitFieldWrite64 (
-                          Value,
-                          RegisterTableEntry->ValidBitStart,
-                          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-                          RegisterTableEntry->Value
-                          );
-        AsmWriteCr4 (Value);
-        break;
-      case 8:
-        //
-        //  Do we need to support CR8?
-        //
-        break;
-      default:
-        break;
-      }
-      break;
-    //
-    // The specified register is Model Specific Register
-    //
-    case Msr:
-      //
-      // Get lock to avoid Package/Core scope MSRs programming issue in parallel execution mode
-      //
-      AcquireSpinLock (&CpuFeaturesData->MsrLock);
-      if (RegisterTableEntry->ValidBitLength >= 64) {
-        //
-        // If length is not less than 64 bits, then directly write without reading
-        //
-        AsmWriteMsr64 (
-          RegisterTableEntry->Index,
-          RegisterTableEntry->Value
-          );
-      } else {
-        //
-        // Set the bit section according to bit start and length
-        //
-        AsmMsrBitFieldWrite64 (
-          RegisterTableEntry->Index,
-          RegisterTableEntry->ValidBitStart,
-          RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-          RegisterTableEntry->Value
-          );
-      }
-      ReleaseSpinLock (&CpuFeaturesData->MsrLock);
-      break;
-    //
-    // MemoryMapped operations
-    //
-    case MemoryMapped:
-      AcquireSpinLock (&CpuFeaturesData->MemoryMappedLock);
-      MmioBitFieldWrite32 (
-        (UINTN)(RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32)),
-        RegisterTableEntry->ValidBitStart,
-        RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
-        (UINT32)RegisterTableEntry->Value
-        );
-      ReleaseSpinLock (&CpuFeaturesData->MemoryMappedLock);
-      break;
-    //
-    // Enable or disable cache
-    //
-    case CacheControl:
-      //
-      // If value of the entry is 0, then disable cache.  Otherwise, enable cache.
-      //
-      if (RegisterTableEntry->Value == 0) {
-        AsmDisableCache ();
-      } else {
-        AsmEnableCache ();
-      }
-      break;
-
-    default:
-      break;
-    }
-  }
-}
-
-/**
-  Programs registers for the calling processor.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-
-**/
-VOID
-EFIAPI
-SetProcessorRegister (
-  IN OUT VOID            *Buffer
-  )
-{
-  UINTN                  ProcessorNumber;
-
-  ProcessorNumber = GetProcessorIndex ();
-  ProgramProcessorRegister (ProcessorNumber);
-}
-
-/**
-  Performs CPU features detection.
-
-  This service will invoke MP service to check CPU features'
-  capabilities on BSP/APs.
-
-  @note This service could be called by BSP only.
-**/
-VOID
-EFIAPI
-CpuFeaturesDetect (
-  VOID
-  )
-{
-  UINTN                  NumberOfCpus;
-  UINTN                  NumberOfEnabledProcessors;
-
-  GetNumberOfProcessor (&NumberOfCpus, &NumberOfEnabledProcessors);
-
-  CpuInitDataInitialize (NumberOfCpus);
-
-  //
-  // Wakeup all APs for data collection.
-  //
-  StartupAPsWorker (CollectProcessorData);
-
-  //
-  // Collect data on BSP
-  //
-  CollectProcessorData (NULL);
-
-  AnalysisProcessorFeatures (NumberOfCpus);
-}
-
-/**
-  Performs CPU features Initialization.
-
-  This service will invoke MP service to perform CPU features
-  initialization on BSP/APs per user configuration.
-
-  @note This service could be called by BSP only.
-**/
-VOID
-EFIAPI
-CpuFeaturesInitialize (
-  VOID
-  )
-{
-  CPU_FEATURES_DATA      *CpuFeaturesData;
-  UINTN                  OldBspNumber;
-
-  CpuFeaturesData = GetCpuFeaturesData ();
-
-  OldBspNumber = GetProcessorIndex();
-  CpuFeaturesData->BspNumber = OldBspNumber;
-  //
-  // Wakeup all APs for programming.
-  //
-  StartupAPsWorker (SetProcessorRegister);
-  //
-  // Programming BSP
-  //
-  SetProcessorRegister (NULL);
-  //
-  // Switch to new BSP if required
-  //
-  if (CpuFeaturesData->BspNumber != OldBspNumber) {
-    SwitchNewBsp (CpuFeaturesData->BspNumber);
-  }
-}
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c
deleted file mode 100644
index 902a339529..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/** @file
-  CPU Register Table Library functions.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-
-#include <Library/UefiBootServicesTableLib.h>
-
-#include "RegisterCpuFeatures.h"
-
-CPU_FEATURES_DATA          mCpuFeaturesData = {0};
-EFI_MP_SERVICES_PROTOCOL   *mCpuFeaturesMpServices = NULL;
-
-/**
-  Worker function to get CPU_FEATURES_DATA pointer.
-
-  @return Pointer to CPU_FEATURES_DATA.
-**/
-CPU_FEATURES_DATA *
-GetCpuFeaturesData (
-  VOID
-  )
-{
-  return &mCpuFeaturesData;
-}
-
-/**
-  Worker function to get EFI_MP_SERVICES_PROTOCOL pointer.
-
-  @return Pointer to EFI_MP_SERVICES_PROTOCOL.
-**/
-EFI_MP_SERVICES_PROTOCOL *
-GetMpProtocol (
-  VOID
-  )
-{
-  EFI_STATUS             Status;
-
-  if (mCpuFeaturesMpServices == NULL) {
-    //
-    // Get MP Services Protocol
-    //
-    Status = gBS->LocateProtocol (
-                  &gEfiMpServiceProtocolGuid,
-                  NULL,
-                  (VOID **)&mCpuFeaturesMpServices
-                  );
-    ASSERT_EFI_ERROR (Status);
-  }
-
-  ASSERT (mCpuFeaturesMpServices != NULL);
-  return mCpuFeaturesMpServices;
-}
-
-/**
-  Worker function to return processor index.
-
-  @return  The processor index.
-**/
-UINTN
-GetProcessorIndex (
-  VOID
-  )
-{
-  EFI_STATUS                           Status;
-  UINTN                                ProcessorIndex;
-  EFI_MP_SERVICES_PROTOCOL             *MpServices;
-
-  MpServices = GetMpProtocol ();
-  Status = MpServices->WhoAmI(MpServices, &ProcessorIndex);
-  ASSERT_EFI_ERROR (Status);
-  return ProcessorIndex;
-}
-
-/**
-  Gets detailed MP-related information on the requested processor at the
-  instant this call is made.
-
-  @param[in]  ProcessorNumber       The handle number of processor.
-  @param[out] ProcessorInfoBuffer   A pointer to the buffer where information for
-                                    the requested processor is deposited.
-
-  @return Status of MpServices->GetProcessorInfo().
-**/
-EFI_STATUS
-GetProcessorInformation (
-  IN  UINTN                            ProcessorNumber,
-  OUT EFI_PROCESSOR_INFORMATION        *ProcessorInfoBuffer
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_MP_SERVICES_PROTOCOL             *MpServices;
-
-  MpServices = GetMpProtocol ();
-  Status = MpServices->GetProcessorInfo (
-               MpServices,
-               ProcessorNumber,
-               ProcessorInfoBuffer
-               );
-  return Status;
-}
-
-/**
-  Worker function to execute a caller provided function on all enabled APs.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system.
-**/
-VOID
-StartupAPsWorker (
-  IN  EFI_AP_PROCEDURE                 Procedure
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_MP_SERVICES_PROTOCOL             *MpServices;
-
-  MpServices = GetMpProtocol ();
-  //
-  // Wakeup all APs
-  //
-  Status = MpServices->StartupAllAPs (
-                 MpServices,
-                 Procedure,
-                 FALSE,
-                 NULL,
-                 0,
-                 NULL,
-                 NULL
-                 );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Worker function to switch the requested AP to be the BSP from that point onward.
-
-  @param[in] ProcessorNumber   The handle number of AP that is to become the new BSP.
-**/
-VOID
-SwitchNewBsp (
-  IN  UINTN                            ProcessorNumber
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_MP_SERVICES_PROTOCOL             *MpServices;
-
-  MpServices = GetMpProtocol ();
-  //
-  // Wakeup all APs
-  //
-  Status = MpServices->SwitchBSP (
-                 MpServices,
-                 ProcessorNumber,
-                 TRUE
-                 );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Worker function to retrieve the number of logical processor in the platform.
-
-  @param[out] NumberOfCpus                Pointer to the total number of logical
-                                          processors in the system, including the BSP
-                                          and disabled APs.
-  @param[out] NumberOfEnabledProcessors   Pointer to the number of enabled logical
-                                          processors that exist in system, including
-                                          the BSP.
-**/
-VOID
-GetNumberOfProcessor (
-  OUT UINTN                            *NumberOfCpus,
-  OUT UINTN                            *NumberOfEnabledProcessors
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_MP_SERVICES_PROTOCOL             *MpServices;
-
-  MpServices = GetMpProtocol ();
-
-  //
-  // Get the number of CPUs
-  //
-  Status = MpServices->GetNumberOfProcessors (
-                         MpServices,
-                         NumberOfCpus,
-                         NumberOfEnabledProcessors
-                         );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Allocates ACPI NVS memory to save ACPI_CPU_DATA.
-
-  @return  Pointer to allocated ACPI_CPU_DATA.
-**/
-ACPI_CPU_DATA *
-AllocateAcpiCpuData (
-  VOID
-  )
-{
-  //
-  // CpuS3DataDxe will do it.
-  //
-  ASSERT (FALSE);
-  return NULL;
-}
-
-/**
-  Enlarges CPU register table for each processor.
-
-  @param[in, out]  RegisterTable   Pointer processor's CPU register table
-**/
-VOID
-EnlargeRegisterTable (
-  IN OUT CPU_REGISTER_TABLE            *RegisterTable
-  )
-{
-  EFI_STATUS            Status;
-  EFI_PHYSICAL_ADDRESS  Address;
-  UINTN                 AllocatePages;
-
-  Address = BASE_4GB - 1;
-  AllocatePages = RegisterTable->AllocatedSize / EFI_PAGE_SIZE;
-  Status  = gBS->AllocatePages (
-                   AllocateMaxAddress,
-                   EfiACPIMemoryNVS,
-                   AllocatePages + 1,
-                   &Address
-                   );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // If there are records existing in the register table, then copy its contents
-  // to new region and free the old one.
-  //
-  if (RegisterTable->AllocatedSize > 0) {
-    CopyMem (
-      (VOID *) (UINTN) Address,
-      (VOID *) (UINTN) RegisterTable->RegisterTableEntry,
-      RegisterTable->AllocatedSize
-      );
-    //
-    // RegisterTableEntry is allocated by gBS->AllocatePages() service.
-    // So, gBS->FreePages() service is used to free it.
-    //
-    gBS->FreePages (
-      RegisterTable->RegisterTableEntry,
-      AllocatePages
-      );
-  }
-
-  //
-  // Adjust the allocated size and register table base address.
-  //
-  RegisterTable->AllocatedSize     += EFI_PAGE_SIZE;
-  RegisterTable->RegisterTableEntry = Address;
-}
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.inf b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.inf
deleted file mode 100644
index 62ac8a9635..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/DxeRegisterCpuFeaturesLib.inf
+++ /dev/null
@@ -1,62 +0,0 @@
-## @file
-#  Register CPU Features Library DXE instance.
-#
-#  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = DxeRegisterCpuFeaturesLib
-  MODULE_UNI_FILE                = DxeRegisterCpuFeaturesLib.uni
-  FILE_GUID                      = ADE8F745-AA2E-49f6-8ED4-746B34867E52
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = RegisterCpuFeaturesLib|DXE_DRIVER
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.common]
-  DxeRegisterCpuFeaturesLib.c
-  RegisterCpuFeaturesLib.c
-  RegisterCpuFeatures.h
-  CpuFeaturesInitialize.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  PcdLib
-  LocalApicLib
-  BaseMemoryLib
-  MemoryAllocationLib
-  SynchronizationLib
-  UefiBootServicesTableLib
-  IoLib
-
-[Protocols]
-  gEfiMpServiceProtocolGuid                                            ## CONSUMES
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress                        ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport                      ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration            ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability                   ## PRODUCES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting                      ## PRODUCES
-
-[Depex]
-  gEfiMpServiceProtocolGuid AND gEdkiiCpuFeaturesSetDoneGuid
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
deleted file mode 100644
index 6804eddf65..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.c
+++ /dev/null
@@ -1,390 +0,0 @@
-/** @file
-  CPU Register Table Library functions.
-
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Library/HobLib.h>
-#include <Library/PeiServicesLib.h>
-#include <Library/PeiServicesTablePointerLib.h>
-#include <Ppi/MpServices.h>
-#include "RegisterCpuFeatures.h"
-
-#define REGISTER_CPU_FEATURES_GUID \
-  { \
-    0xa694c467, 0x697a, 0x446b, { 0xb9, 0x29, 0x5b, 0x14, 0xa0, 0xcf, 0x39, 0xf } \
-  }
-
-EFI_GUID mRegisterCpuFeaturesHobGuid = REGISTER_CPU_FEATURES_GUID;
-
-/**
-  Worker function to get CPU_FEATURES_DATA pointer.
-
-  @return Pointer to CPU_FEATURES_DATA.
-**/
-CPU_FEATURES_DATA *
-GetCpuFeaturesData (
-  VOID
-  )
-{
-  CPU_FEATURES_DATA       *CpuInitData;
-  EFI_HOB_GUID_TYPE       *GuidHob;
-  VOID                    *DataInHob;
-  UINT64                  Data64;
-
-  CpuInitData = NULL;
-  GuidHob = GetFirstGuidHob (&mRegisterCpuFeaturesHobGuid);
-  if (GuidHob != NULL) {
-    DataInHob = GET_GUID_HOB_DATA (GuidHob);
-    CpuInitData = (CPU_FEATURES_DATA *) (*(UINTN *) DataInHob);
-    ASSERT (CpuInitData != NULL);
-  } else {
-    CpuInitData = AllocateZeroPool (sizeof (CPU_FEATURES_DATA));
-    ASSERT (CpuInitData != NULL);
-    //
-    // Build location of CPU MP DATA buffer in HOB
-    //
-    Data64 = (UINT64) (UINTN) CpuInitData;
-    BuildGuidDataHob (
-      &mRegisterCpuFeaturesHobGuid,
-      (VOID *) &Data64,
-      sizeof (UINT64)
-      );
-  }
-
-  return CpuInitData;
-}
-
-/**
-  Worker function to get MP PPI service pointer.
-
-  @return PEI PPI service pointer.
-**/
-EFI_PEI_MP_SERVICES_PPI *
-GetMpPpi (
-  VOID
-  )
-{
-  EFI_STATUS                 Status;
-  EFI_PEI_MP_SERVICES_PPI    *CpuMpPpi;
-
-  //
-  // Get MP Services Protocol
-  //
-  Status = PeiServicesLocatePpi (
-             &gEfiPeiMpServicesPpiGuid,
-             0,
-             NULL,
-             (VOID **)&CpuMpPpi
-             );
-  ASSERT_EFI_ERROR (Status);
-  return CpuMpPpi;
-}
-
-/**
-  Worker function to return processor index.
-
-  @return  The processor index.
-**/
-UINTN
-GetProcessorIndex (
-  VOID
-  )
-{
-  EFI_STATUS                 Status;
-  EFI_PEI_MP_SERVICES_PPI    *CpuMpPpi;
-  UINTN                      ProcessorIndex;
-
-  CpuMpPpi = GetMpPpi ();
-
-  Status = CpuMpPpi->WhoAmI(GetPeiServicesTablePointer (), CpuMpPpi, &ProcessorIndex);
-  ASSERT_EFI_ERROR (Status);
-  return ProcessorIndex;
-}
-
-/**
-  Worker function to MP-related information on the requested processor at the
-  instant this call is made.
-
-  @param[in]  ProcessorNumber       The handle number of processor.
-  @param[out] ProcessorInfoBuffer   A pointer to the buffer where information for
-                                    the requested processor is deposited.
-
-  @return Status of MpServices->GetProcessorInfo().
-**/
-EFI_STATUS
-GetProcessorInformation (
-  IN  UINTN                            ProcessorNumber,
-  OUT EFI_PROCESSOR_INFORMATION        *ProcessorInfoBuffer
-  )
-{
-  EFI_PEI_MP_SERVICES_PPI    *CpuMpPpi;
-  EFI_STATUS                 Status;
-
-  CpuMpPpi = GetMpPpi ();
-  Status = CpuMpPpi->GetProcessorInfo (
-               GetPeiServicesTablePointer(),
-               CpuMpPpi,
-               ProcessorNumber,
-               ProcessorInfoBuffer
-               );
-  return Status;
-}
-
-/**
-  Worker function to execute a caller provided function on all enabled APs.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system.
-**/
-VOID
-StartupAPsWorker (
-  IN  EFI_AP_PROCEDURE                 Procedure
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_PEI_MP_SERVICES_PPI              *CpuMpPpi;
-
-  //
-  // Get MP Services Protocol
-  //
-  Status = PeiServicesLocatePpi (
-             &gEfiPeiMpServicesPpiGuid,
-             0,
-             NULL,
-             (VOID **)&CpuMpPpi
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Wakeup all APs for data collection.
-  //
-  Status = CpuMpPpi->StartupAllAPs (
-                 GetPeiServicesTablePointer (),
-                 CpuMpPpi,
-                 Procedure,
-                 FALSE,
-                 0,
-                 NULL
-                 );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Worker function to switch the requested AP to be the BSP from that point onward.
-
-  @param[in] ProcessorNumber   The handle number of AP that is to become the new BSP.
-**/
-VOID
-SwitchNewBsp (
-  IN  UINTN                            ProcessorNumber
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_PEI_MP_SERVICES_PPI              *CpuMpPpi;
-
-  //
-  // Get MP Services Protocol
-  //
-  Status = PeiServicesLocatePpi (
-             &gEfiPeiMpServicesPpiGuid,
-             0,
-             NULL,
-             (VOID **)&CpuMpPpi
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Wakeup all APs for data collection.
-  //
-  Status = CpuMpPpi->SwitchBSP (
-                 GetPeiServicesTablePointer (),
-                 CpuMpPpi,
-                 ProcessorNumber,
-                 TRUE
-                 );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Worker function to retrieve the number of logical processor in the platform.
-
-  @param[out] NumberOfCpus                Pointer to the total number of logical
-                                          processors in the system, including the BSP
-                                          and disabled APs.
-  @param[out] NumberOfEnabledProcessors   Pointer to the number of enabled logical
-                                          processors that exist in system, including
-                                          the BSP.
-**/
-VOID
-GetNumberOfProcessor (
-  OUT UINTN                            *NumberOfCpus,
-  OUT UINTN                            *NumberOfEnabledProcessors
-  )
-{
-  EFI_STATUS                 Status;
-  EFI_PEI_MP_SERVICES_PPI    *CpuMpPpi;
-
-  //
-  // Get MP Services Protocol
-  //
-  Status = PeiServicesLocatePpi (
-             &gEfiPeiMpServicesPpiGuid,
-             0,
-             NULL,
-             (VOID **)&CpuMpPpi
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Get the number of CPUs
-  //
-  Status = CpuMpPpi->GetNumberOfProcessors (
-                         GetPeiServicesTablePointer (),
-                         CpuMpPpi,
-                         NumberOfCpus,
-                         NumberOfEnabledProcessors
-                         );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-  Allocates ACPI NVS memory to save ACPI_CPU_DATA.
-
-  @return  Pointer to allocated ACPI_CPU_DATA.
-**/
-ACPI_CPU_DATA *
-AllocateAcpiCpuData (
-  VOID
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_PEI_MP_SERVICES_PPI              *CpuMpPpi;
-  UINTN                                NumberOfCpus;
-  UINTN                                NumberOfEnabledProcessors;
-  ACPI_CPU_DATA                        *AcpiCpuData;
-  EFI_PHYSICAL_ADDRESS                 Address;
-  UINTN                                TableSize;
-  CPU_REGISTER_TABLE                   *RegisterTable;
-  UINTN                                Index;
-  EFI_PROCESSOR_INFORMATION            ProcessorInfoBuffer;
-
-  Status = PeiServicesAllocatePages (
-             EfiACPIMemoryNVS,
-             EFI_SIZE_TO_PAGES (sizeof (ACPI_CPU_DATA)),
-             &Address
-             );
-  ASSERT_EFI_ERROR (Status);
-  AcpiCpuData = (ACPI_CPU_DATA *) (UINTN) Address;
-  ASSERT (AcpiCpuData != NULL);
-
-  //
-  // Get MP Services Protocol
-  //
-  Status = PeiServicesLocatePpi (
-             &gEfiPeiMpServicesPpiGuid,
-             0,
-             NULL,
-             (VOID **)&CpuMpPpi
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Get the number of CPUs
-  //
-  Status = CpuMpPpi->GetNumberOfProcessors (
-                         GetPeiServicesTablePointer (),
-                         CpuMpPpi,
-                         &NumberOfCpus,
-                         &NumberOfEnabledProcessors
-                         );
-  ASSERT_EFI_ERROR (Status);
-  AcpiCpuData->NumberOfCpus = (UINT32)NumberOfCpus;
-
-  //
-  // Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs
-  //
-  TableSize = 2 * NumberOfCpus * sizeof (CPU_REGISTER_TABLE);
-  Status = PeiServicesAllocatePages (
-             EfiACPIMemoryNVS,
-             EFI_SIZE_TO_PAGES (TableSize),
-             &Address
-             );
-  ASSERT_EFI_ERROR (Status);
-  RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) Address;
-
-  for (Index = 0; Index < NumberOfCpus; Index++) {
-    Status = CpuMpPpi->GetProcessorInfo (
-                         GetPeiServicesTablePointer (),
-                         CpuMpPpi,
-                         Index,
-                         &ProcessorInfoBuffer
-                         );
-    ASSERT_EFI_ERROR (Status);
-
-    RegisterTable[Index].InitialApicId      = (UINT32)ProcessorInfoBuffer.ProcessorId;
-    RegisterTable[Index].TableLength        = 0;
-    RegisterTable[Index].AllocatedSize      = 0;
-    RegisterTable[Index].RegisterTableEntry = 0;
-
-    RegisterTable[NumberOfCpus + Index].InitialApicId      = (UINT32)ProcessorInfoBuffer.ProcessorId;
-    RegisterTable[NumberOfCpus + Index].TableLength        = 0;
-    RegisterTable[NumberOfCpus + Index].AllocatedSize      = 0;
-    RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0;
-  }
-  AcpiCpuData->RegisterTable           = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable;
-  AcpiCpuData->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus);
-
-  return AcpiCpuData;
-}
-
-/**
-  Enlarges CPU register table for each processor.
-
-  @param[in, out]  RegisterTable   Pointer processor's CPU register table
-**/
-VOID
-EnlargeRegisterTable (
-  IN OUT CPU_REGISTER_TABLE            *RegisterTable
-  )
-{
-  EFI_STATUS                           Status;
-  EFI_PHYSICAL_ADDRESS                 Address;
-  UINTN                                AllocatePages;
-
-  AllocatePages = RegisterTable->AllocatedSize / EFI_PAGE_SIZE;
-  Status = PeiServicesAllocatePages (
-             EfiACPIMemoryNVS,
-             AllocatePages + 1,
-             &Address
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // If there are records existing in the register table, then copy its contents
-  // to new region and free the old one.
-  //
-  if (RegisterTable->AllocatedSize > 0) {
-    CopyMem (
-      (VOID *) (UINTN) Address,
-      (VOID *) (UINTN) RegisterTable->RegisterTableEntry,
-      RegisterTable->AllocatedSize
-      );
-  }
-
-  //
-  // Adjust the allocated size and register table base address.
-  //
-  RegisterTable->AllocatedSize += EFI_PAGE_SIZE;
-  RegisterTable->RegisterTableEntry = Address;
-}
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.inf b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.inf
deleted file mode 100644
index 5e9ab2c304..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/PeiRegisterCpuFeaturesLib.inf
+++ /dev/null
@@ -1,64 +0,0 @@
-## @file
-#  Register CPU Features Library PEI instance.
-#
-#  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PeiRegisterCpuFeaturesLib
-  MODULE_UNI_FILE                = PeiRegisterCpuFeaturesLib.uni
-  FILE_GUID                      = D8855DB3-8348-41B5-BDA4-385351767D41
-  MODULE_TYPE                    = PEIM
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = RegisterCpuFeaturesLib|PEIM
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources.common]
-  PeiRegisterCpuFeaturesLib.c
-  RegisterCpuFeaturesLib.c
-  RegisterCpuFeatures.h
-  CpuFeaturesInitialize.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  PcdLib
-  LocalApicLib
-  BaseMemoryLib
-  MemoryAllocationLib
-  SynchronizationLib
-  HobLib
-  PeiServicesLib
-  PeiServicesTablePointerLib
-  IoLib
-
-[Ppis]
-  gEfiPeiMpServicesPpiGuid                                             ## CONSUMES
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress                        ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSupport                      ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesUserConfiguration            ## CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesCapability                   ## PRODUCES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesSetting                      ## PRODUCES
-
-[Depex]
-  gEfiPeiMpServicesPpiGuid AND gEdkiiCpuFeaturesSetDoneGuid
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h
deleted file mode 100644
index 7731f885b3..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeatures.h
+++ /dev/null
@@ -1,193 +0,0 @@
-/** @file
-  CPU Register Table Library definitions.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _REGISTER_CPU_FEATURES_H_
-#define _REGISTER_CPU_FEATURES_H_
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/RegisterCpuFeaturesLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/SynchronizationLib.h>
-#include <Library/IoLib.h>
-
-#include <AcpiCpuData.h>
-
-#define CPU_FEATURE_ENTRY_SIGNATURE  SIGNATURE_32 ('C', 'F', 'E', 'S')
-
-#define CPU_FEATURE_NAME_SIZE        128
-
-typedef struct {
-  REGISTER_CPU_FEATURE_INFORMATION     CpuInfo;
-  UINT8                                *FeaturesSupportedMask;
-  LIST_ENTRY                           OrderList;
-} CPU_FEATURES_INIT_ORDER;
-
-typedef struct {
-  UINT32                       Signature;
-  LIST_ENTRY                   Link;
-  UINT8                        *FeatureMask;
-  CHAR8                        *FeatureName;
-  CPU_FEATURE_GET_CONFIG_DATA  GetConfigDataFunc;
-  CPU_FEATURE_SUPPORT          SupportFunc;
-  CPU_FEATURE_INITIALIZE       InitializeFunc;
-  UINT8                        *BeforeFeatureBitMask;
-  UINT8                        *AfterFeatureBitMask;
-  VOID                         *ConfigData;
-  BOOLEAN                      BeforeAll;
-  BOOLEAN                      AfterAll;
-} CPU_FEATURES_ENTRY;
-
-typedef struct {
-  UINTN                    FeaturesCount;
-  UINT32                   BitMaskSize;
-  SPIN_LOCK                MsrLock;
-  SPIN_LOCK                MemoryMappedLock;
-  LIST_ENTRY               FeatureList;
-
-  CPU_FEATURES_INIT_ORDER  *InitOrder;
-  UINT8                    *SupportPcds;
-  UINT8                    *CapabilityPcds;
-  UINT8                    *ConfigurationPcds;
-  UINT8                    *SettingPcds;
-
-  CPU_REGISTER_TABLE       *RegisterTable;
-  CPU_REGISTER_TABLE       *PreSmmRegisterTable;
-  UINTN                    BspNumber;
-} CPU_FEATURES_DATA;
-
-#define CPU_FEATURE_ENTRY_FROM_LINK(a) \
-  CR ( \
-  (a), \
-  CPU_FEATURES_ENTRY, \
-  Link, \
-  CPU_FEATURE_ENTRY_SIGNATURE \
-  )
-
-/**
-  Worker function to get CPU_FEATURES_DATA pointer.
-
-  @return Pointer to CPU_FEATURES_DATA.
-**/
-CPU_FEATURES_DATA *
-GetCpuFeaturesData (
-  VOID
-  );
-
-/**
-  Enlarges CPU register table for each processor.
-
-  @param[in, out]  RegisterTable   Pointer processor's CPU register table
-**/
-VOID
-EnlargeRegisterTable (
-  IN OUT CPU_REGISTER_TABLE            *RegisterTable
-  );
-
-/**
-  Allocates ACPI NVS memory to save ACPI_CPU_DATA.
-
-  @return  Pointer to allocated ACPI_CPU_DATA.
-**/
-ACPI_CPU_DATA *
-AllocateAcpiCpuData (
-  VOID
-  );
-
-/**
-  Worker function to return processor index.
-
-  @return  The processor index.
-**/
-UINTN
-GetProcessorIndex (
-  VOID
-  );
-
-/**
-  Gets detailed MP-related information on the requested processor at the
-  instant this call is made.
-
-  @param[in]  ProcessorNumber       The handle number of processor.
-  @param[out] ProcessorInfoBuffer   A pointer to the buffer where information for
-                                    the requested processor is deposited.
-
-  @return Status of MpServices->GetProcessorInfo().
-**/
-EFI_STATUS
-GetProcessorInformation (
-  IN  UINTN                            ProcessorNumber,
-  OUT EFI_PROCESSOR_INFORMATION        *ProcessorInfoBuffer
-  );
-
-/**
-  Worker function to execute a caller provided function on all enabled APs.
-
-  @param[in]  Procedure               A pointer to the function to be run on
-                                      enabled APs of the system.
-**/
-VOID
-StartupAPsWorker (
-  IN  EFI_AP_PROCEDURE                 Procedure
-  );
-
-/**
-  Worker function to retrieve the number of logical processor in the platform.
-
-  @param[out] NumberOfCpus                Pointer to the total number of logical
-                                          processors in the system, including the BSP
-                                          and disabled APs.
-  @param[out] NumberOfEnabledProcessors   Pointer to the number of enabled logical
-                                          processors that exist in system, including
-                                          the BSP.
-**/
-VOID
-GetNumberOfProcessor (
-  OUT UINTN                            *NumberOfCpus,
-  OUT UINTN                            *NumberOfEnabledProcessors
-  );
-
-/**
-  Worker function to switch the requested AP to be the BSP from that point onward.
-
-  @param[in] ProcessorNumber   The handle number of AP that is to become the new BSP.
-**/
-VOID
-SwitchNewBsp (
-  IN  UINTN                            ProcessorNumber
-  );
-
-/**
-  Function that uses DEBUG() macros to display the contents of a a CPU feature bit mask.
-
-  @param[in]  FeatureMask  A pointer to the CPU feature bit mask.
-**/
-VOID
-DumpCpuFeatureMask (
-  IN UINT8               *FeatureMask
-  );
-
-/**
-  Dump CPU feature name or CPU feature bit mask.
-
-  @param[in]  CpuFeature   Pointer to CPU_FEATURES_ENTRY
-**/
-VOID
-DumpCpuFeature (
-  IN CPU_FEATURES_ENTRY  *CpuFeature
-  );
-
-#endif
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesDxe.uni b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesDxe.uni
deleted file mode 100644
index d928952551..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesDxe.uni
+++ /dev/null
@@ -1,22 +0,0 @@
-// /** @file
-// CPU Register Table Library instance.
-//
-// CPU Register Table Library instance.
-//
-// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "CPU Register Table Library instance"
-
-#string STR_MODULE_DESCRIPTION          #language en-US "CPU Register Table Library instance."
-
diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
deleted file mode 100644
index 338f1a495c..0000000000
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/RegisterCpuFeaturesLib.c
+++ /dev/null
@@ -1,775 +0,0 @@
-/** @file
-  CPU Register Table Library functions.
-
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "RegisterCpuFeatures.h"
-
-/**
-  Checks if two CPU feature bit masks are equal.
-
-  @param[in]  FirstFeatureMask  The first input CPU feature bit mask
-  @param[in]  SecondFeatureMask The second input CPU feature bit mask
-
-  @retval TRUE  Two CPU feature bit masks are equal.
-  @retval FALSE Two CPU feature bit masks are not equal.
-**/
-BOOLEAN
-IsCpuFeatureMatch (
-  IN UINT8               *FirstFeatureMask,
-  IN UINT8               *SecondFeatureMask
-  )
-{
-  UINT32                 BitMaskSize;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-  if (CompareMem (FirstFeatureMask, SecondFeatureMask, BitMaskSize) == 0) {
-    return TRUE;
-  } else {
-    return FALSE;
-  }
-}
-
-/**
-  Function that uses DEBUG() macros to display the contents of a a CPU feature bit mask.
-
-  @param[in]  FeatureMask  A pointer to the CPU feature bit mask.
-**/
-VOID
-DumpCpuFeatureMask (
-  IN UINT8               *FeatureMask
-  )
-{
-  UINTN                  Index;
-  UINT8                  *Data8;
-  UINT32                 BitMaskSize;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-  Data8       = (UINT8 *) FeatureMask;
-  for (Index = 0; Index < BitMaskSize; Index++) {
-    DEBUG ((DEBUG_INFO, " %02x ", *Data8++));
-  }
-  DEBUG ((DEBUG_INFO, "\n"));
-}
-
-/**
-  Dump CPU feature name or CPU feature bit mask.
-
-  @param[in]  CpuFeature   Pointer to CPU_FEATURES_ENTRY
-**/
-VOID
-DumpCpuFeature (
-  IN CPU_FEATURES_ENTRY  *CpuFeature
-  )
-{
-
-  if (CpuFeature->FeatureName != NULL) {
-    DEBUG ((DEBUG_INFO, "FeatureName: %a\n", CpuFeature->FeatureName));
-  } else {
-    DEBUG ((DEBUG_INFO, "FeatureMask = "));
-    DumpCpuFeatureMask (CpuFeature->FeatureMask);
-  }
-}
-
-/**
-  Determines if the feature bit mask is in dependent CPU feature bit mask buffer.
-
-  @param[in]  FeatureMask        Pointer to CPU feature bit mask
-  @param[in]  DependentBitMask   Pointer to dependent CPU feature bit mask buffer
-
-  @retval TRUE  The feature bit mask is in dependent CPU feature bit mask buffer.
-  @retval FALSE The feature bit mask is not in dependent CPU feature bit mask buffer.
-**/
-BOOLEAN
-IsBitMaskMatchCheck (
-  IN UINT8        *FeatureMask,
-  IN UINT8        *DependentBitMask
-  )
-{
-  UINTN      Index;
-  UINTN      BitMaskSize;
-  UINT8      *Data1;
-  UINT8      *Data2;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-
-  Data1 = FeatureMask;
-  Data2 = DependentBitMask;
-  for (Index = 0; Index < BitMaskSize; Index++) {
-    if (((*(Data1++)) & (*(Data2++))) != 0) {
-      return TRUE;
-    }
-  }
-  return FALSE;
-}
-
-/**
-  Checks and adjusts CPU features order per dependency relationship.
-
-  @param[in]  FeatureList        Pointer to CPU feature list
-**/
-VOID
-CheckCpuFeaturesDependency (
-  IN LIST_ENTRY              *FeatureList
-  )
-{
-  LIST_ENTRY                 *CurrentEntry;
-  CPU_FEATURES_ENTRY         *CpuFeature;
-  LIST_ENTRY                 *CheckEntry;
-  CPU_FEATURES_ENTRY         *CheckFeature;
-  BOOLEAN                    Swapped;
-  LIST_ENTRY                 *TempEntry;
-
-  CurrentEntry = GetFirstNode (FeatureList);
-  while (!IsNull (FeatureList, CurrentEntry)) {
-    Swapped = FALSE;
-    CpuFeature = CPU_FEATURE_ENTRY_FROM_LINK (CurrentEntry);
-    if (CpuFeature->BeforeAll) {
-      //
-      // Check all features dispatched before this entry
-      //
-      CheckEntry = GetFirstNode (FeatureList);
-      while (CheckEntry != CurrentEntry) {
-        CheckFeature = CPU_FEATURE_ENTRY_FROM_LINK (CheckEntry);
-        if (!CheckFeature->BeforeAll) {
-          //
-          // If this feature has no BeforeAll flag and is dispatched before CpuFeature,
-          // insert currentEntry before Checked feature
-          //
-          RemoveEntryList (CurrentEntry);
-          InsertTailList (CheckEntry, CurrentEntry);
-          Swapped = TRUE;
-          break;
-        }
-        CheckEntry = CheckEntry->ForwardLink;
-      }
-      if (Swapped) {
-        continue;
-      }
-    }
-
-    if (CpuFeature->AfterAll) {
-      //
-      // Check all features dispatched after this entry
-      //
-      CheckEntry = GetNextNode (FeatureList, CurrentEntry);
-      while (!IsNull (FeatureList, CheckEntry)) {
-        CheckFeature = CPU_FEATURE_ENTRY_FROM_LINK (CheckEntry);
-        if (!CheckFeature->AfterAll) {
-          //
-          // If this feature has no AfterAll flag and is dispatched after CpuFeature,
-          // insert currentEntry after Checked feature
-          //
-          TempEntry = GetNextNode (FeatureList, CurrentEntry);
-          RemoveEntryList (CurrentEntry);
-          InsertHeadList (CheckEntry, CurrentEntry);
-          CurrentEntry = TempEntry;
-          Swapped = TRUE;
-          break;
-        }
-        CheckEntry = CheckEntry->ForwardLink;
-      }
-      if (Swapped) {
-        continue;
-      }
-    }
-
-    if (CpuFeature->BeforeFeatureBitMask != NULL) {
-      //
-      // Check all features dispatched before this entry
-      //
-      CheckEntry = GetFirstNode (FeatureList);
-      while (CheckEntry != CurrentEntry) {
-        CheckFeature = CPU_FEATURE_ENTRY_FROM_LINK (CheckEntry);
-        if (IsBitMaskMatchCheck (CheckFeature->FeatureMask, CpuFeature->BeforeFeatureBitMask)) {
-          //
-          // If there is dependency, swap them
-          //
-          RemoveEntryList (CurrentEntry);
-          InsertTailList (CheckEntry, CurrentEntry);
-          Swapped = TRUE;
-          break;
-        }
-        CheckEntry = CheckEntry->ForwardLink;
-      }
-      if (Swapped) {
-        continue;
-      }
-    }
-
-    if (CpuFeature->AfterFeatureBitMask != NULL) {
-      //
-      // Check all features dispatched after this entry
-      //
-      CheckEntry = GetNextNode (FeatureList, CurrentEntry);
-      while (!IsNull (FeatureList, CheckEntry)) {
-        CheckFeature = CPU_FEATURE_ENTRY_FROM_LINK (CheckEntry);
-        if (IsBitMaskMatchCheck (CheckFeature->FeatureMask, CpuFeature->AfterFeatureBitMask)) {
-          //
-          // If there is dependency, swap them
-          //
-          TempEntry = GetNextNode (FeatureList, CurrentEntry);
-          RemoveEntryList (CurrentEntry);
-          InsertHeadList (CheckEntry, CurrentEntry);
-          CurrentEntry = TempEntry;
-          Swapped = TRUE;
-          break;
-        }
-        CheckEntry = CheckEntry->ForwardLink;
-      }
-      if (Swapped) {
-        continue;
-      }
-    }
-    //
-    // No swap happened, check the next feature
-    //
-    CurrentEntry = CurrentEntry->ForwardLink;
-  }
-}
-
-/**
-  Worker function to register CPU Feature.
-
-  @param[in]  CpuFeature            Pointer to CPU feature entry
-
-  @retval  RETURN_SUCCESS           The CPU feature was successfully registered.
-  @retval  RETURN_OUT_OF_RESOURCES  There are not enough resources to register
-                                    the CPU feature.
-  @retval  RETURN_UNSUPPORTED       Registration of the CPU feature is not
-                                    supported due to a circular dependency between
-                                    BEFORE and AFTER features.
-**/
-RETURN_STATUS
-RegisterCpuFeatureWorker (
-  IN CPU_FEATURES_ENTRY      *CpuFeature
-  )
-{
-  EFI_STATUS                 Status;
-  CPU_FEATURES_DATA          *CpuFeaturesData;
-  CPU_FEATURES_ENTRY         *CpuFeatureEntry;
-  LIST_ENTRY                 *Entry;
-  UINT32                     BitMaskSize;
-  BOOLEAN                    FeatureExist;
-
-  BitMaskSize     = PcdGetSize (PcdCpuFeaturesSupport);
-  CpuFeaturesData = GetCpuFeaturesData ();
-  if (CpuFeaturesData->FeaturesCount == 0) {
-    InitializeListHead (&CpuFeaturesData->FeatureList);
-    InitializeSpinLock (&CpuFeaturesData->MsrLock);
-    InitializeSpinLock (&CpuFeaturesData->MemoryMappedLock);
-    CpuFeaturesData->BitMaskSize = BitMaskSize;
-  }
-  ASSERT (CpuFeaturesData->BitMaskSize == BitMaskSize);
-
-  FeatureExist = FALSE;
-  CpuFeatureEntry = NULL;
-  Entry = GetFirstNode (&CpuFeaturesData->FeatureList);
-  while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {
-    CpuFeatureEntry = CPU_FEATURE_ENTRY_FROM_LINK (Entry);
-    if (IsCpuFeatureMatch (CpuFeature->FeatureMask, CpuFeatureEntry->FeatureMask)) {
-      //
-      // If this feature already registered
-      //
-      FeatureExist = TRUE;
-      break;
-    }
-    Entry = Entry->ForwardLink;
-  }
-
-  if (!FeatureExist) {
-    DEBUG ((DEBUG_INFO, "[NEW] "));
-    DumpCpuFeature (CpuFeature);
-    InsertTailList (&CpuFeaturesData->FeatureList, &CpuFeature->Link);
-    CpuFeaturesData->FeaturesCount++;
-  } else {
-    DEBUG ((DEBUG_INFO, "[OVERRIDE] "));
-    DumpCpuFeature (CpuFeature);
-    ASSERT (CpuFeatureEntry != NULL);
-    //
-    // Overwrite original parameters of CPU feature
-    //
-    if (CpuFeature->GetConfigDataFunc != NULL) {
-      CpuFeatureEntry->GetConfigDataFunc = CpuFeature->GetConfigDataFunc;
-    }
-    if (CpuFeature->SupportFunc != NULL) {
-      CpuFeatureEntry->SupportFunc = CpuFeature->SupportFunc;
-    }
-    if (CpuFeature->InitializeFunc != NULL) {
-      CpuFeatureEntry->InitializeFunc = CpuFeature->InitializeFunc;
-    }
-    if (CpuFeature->FeatureName != NULL) {
-      if (CpuFeatureEntry->FeatureName == NULL) {
-        CpuFeatureEntry->FeatureName = AllocatePool (CPU_FEATURE_NAME_SIZE);
-        ASSERT (CpuFeatureEntry->FeatureName != NULL);
-      }
-      Status = AsciiStrCpyS (CpuFeatureEntry->FeatureName, CPU_FEATURE_NAME_SIZE, CpuFeature->FeatureName);
-      ASSERT_EFI_ERROR (Status);
-      FreePool (CpuFeature->FeatureName);
-    }
-    if (CpuFeature->BeforeFeatureBitMask != NULL) {
-      if (CpuFeatureEntry->BeforeFeatureBitMask != NULL) {
-        FreePool (CpuFeatureEntry->BeforeFeatureBitMask);
-      }
-      CpuFeatureEntry->BeforeFeatureBitMask = CpuFeature->BeforeFeatureBitMask;
-    }
-    if (CpuFeature->AfterFeatureBitMask != NULL) {
-      if (CpuFeatureEntry->AfterFeatureBitMask != NULL) {
-        FreePool (CpuFeatureEntry->AfterFeatureBitMask);
-      }
-      CpuFeatureEntry->AfterFeatureBitMask = CpuFeature->AfterFeatureBitMask;
-    }
-    CpuFeatureEntry->BeforeAll = CpuFeature->BeforeAll;
-    CpuFeatureEntry->AfterAll  = CpuFeature->AfterAll;
-
-    FreePool (CpuFeature->FeatureMask);
-    FreePool (CpuFeature);
-  }
-  //
-  // Verify CPU features dependency can change CPU feature order
-  //
-  CheckCpuFeaturesDependency (&CpuFeaturesData->FeatureList);
-  return RETURN_SUCCESS;
-}
-
-/**
-  Sets CPU feature bit mask in CPU feature bit mask buffer.
-
-  @param[in]  FeaturesBitMask       Pointer to CPU feature bit mask buffer
-  @param[in]  Feature               The bit number of the CPU feature
-  @param[in]  BitMaskSize           CPU feature bit mask buffer size
-**/
-VOID
-SetCpuFeaturesBitMask (
-  IN UINT8               **FeaturesBitMask,
-  IN UINT32              Feature,
-  IN UINTN               BitMaskSize
-  )
-{
-  UINT8                  *CpuFeaturesBitMask;
-
-  ASSERT (FeaturesBitMask != NULL);
-  CpuFeaturesBitMask = *FeaturesBitMask;
-  if (CpuFeaturesBitMask == NULL) {
-    CpuFeaturesBitMask = AllocateZeroPool (BitMaskSize);
-    ASSERT (CpuFeaturesBitMask != NULL);
-    *FeaturesBitMask = CpuFeaturesBitMask;
-  }
-
-  CpuFeaturesBitMask  += (Feature / 8);
-  *CpuFeaturesBitMask |= (UINT8) (1 << (Feature % 8));
-}
-
-/**
-  Registers a CPU Feature.
-
-  @param[in]  FeatureName        A Null-terminated Ascii string indicates CPU feature
-                                 name.
-  @param[in]  GetConfigDataFunc  CPU feature get configuration data function.  This
-                                 is an optional parameter that may be NULL.  If NULL,
-                                 then the most recently registered function for the
-                                 CPU feature is used.  If no functions are registered
-                                 for a CPU feature, then the CPU configuration data
-                                 for the registered feature is NULL.
-  @param[in]  SupportFunc        CPU feature support function.  This is an optional
-                                 parameter that may be NULL.  If NULL, then the most
-                                 recently registered function for the CPU feature is
-                                 used. If no functions are registered for a CPU
-                                 feature, then the CPU feature is assumed to be
-                                 supported by all CPUs.
-  @param[in]  InitializeFunc     CPU feature initialize function.  This is an optional
-                                 parameter that may be NULL.  If NULL, then the most
-                                 recently registered function for the CPU feature is
-                                 used. If no functions are registered for a CPU
-                                 feature, then the CPU feature initialization is
-                                 skipped.
-  @param[in]  ...                Variable argument list of UINT32 CPU feature value.
-                                 Values with no modifiers are the features provided
-                                 by the registered functions.
-                                 Values with CPU_FEATURE_BEFORE modifier are features
-                                 that must be initialized after the features provided
-                                 by the registered functions are used.
-                                 Values with CPU_FEATURE_AFTER modifier are features
-                                 that must be initialized before the features provided
-                                 by the registered functions are used.
-                                 The last argument in this variable argument list must
-                                 always be CPU_FEATURE_END.
-
-  @retval  RETURN_SUCCESS           The CPU feature was successfully registered.
-  @retval  RETURN_OUT_OF_RESOURCES  There are not enough resources to register
-                                    the CPU feature.
-  @retval  RETURN_UNSUPPORTED       Registration of the CPU feature is not
-                                    supported due to a circular dependency between
-                                    BEFORE and AFTER features.
-
-  @note This service could be called by BSP only.
-**/
-RETURN_STATUS
-EFIAPI
-RegisterCpuFeature (
-  IN CHAR8                             *FeatureName,       OPTIONAL
-  IN CPU_FEATURE_GET_CONFIG_DATA       GetConfigDataFunc,  OPTIONAL
-  IN CPU_FEATURE_SUPPORT               SupportFunc,        OPTIONAL
-  IN CPU_FEATURE_INITIALIZE            InitializeFunc,     OPTIONAL
-  ...
-  )
-{
-  EFI_STATUS                 Status;
-  VA_LIST                    Marker;
-  UINT32                     Feature;
-  UINTN                      BitMaskSize;
-  CPU_FEATURES_ENTRY         *CpuFeature;
-  UINT8                      *FeatureMask;
-  UINT8                      *BeforeFeatureBitMask;
-  UINT8                      *AfterFeatureBitMask;
-  BOOLEAN                    BeforeAll;
-  BOOLEAN                    AfterAll;
-
-  FeatureMask          = NULL;
-  BeforeFeatureBitMask = NULL;
-  AfterFeatureBitMask  = NULL;
-  BeforeAll            = FALSE;
-  AfterAll             = FALSE;
-
-  BitMaskSize = PcdGetSize (PcdCpuFeaturesSupport);
-
-  VA_START (Marker, InitializeFunc);
-  Feature = VA_ARG (Marker, UINT32);
-  while (Feature != CPU_FEATURE_END) {
-    ASSERT ((Feature & (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER))
-                    != (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER));
-    ASSERT ((Feature & (CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL))
-                    != (CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL));
-    if (Feature < CPU_FEATURE_BEFORE) {
-      BeforeAll = ((Feature & CPU_FEATURE_BEFORE_ALL) != 0) ? TRUE : FALSE;
-      AfterAll  = ((Feature & CPU_FEATURE_AFTER_ALL) != 0) ? TRUE : FALSE;
-      Feature  &= ~(CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_ALL);
-      ASSERT (FeatureMask == NULL);
-      SetCpuFeaturesBitMask (&FeatureMask, Feature, BitMaskSize);
-    } else if ((Feature & CPU_FEATURE_BEFORE) != 0) {
-      SetCpuFeaturesBitMask (&BeforeFeatureBitMask, Feature & ~CPU_FEATURE_BEFORE, BitMaskSize);
-    } else if ((Feature & CPU_FEATURE_AFTER) != 0) {
-      SetCpuFeaturesBitMask (&AfterFeatureBitMask, Feature & ~CPU_FEATURE_AFTER, BitMaskSize);
-    }
-    Feature = VA_ARG (Marker, UINT32);
-  }
-  VA_END (Marker);
-
-  CpuFeature = AllocateZeroPool (sizeof (CPU_FEATURES_ENTRY));
-  ASSERT (CpuFeature != NULL);
-  CpuFeature->Signature            = CPU_FEATURE_ENTRY_SIGNATURE;
-  CpuFeature->FeatureMask          = FeatureMask;
-  CpuFeature->BeforeFeatureBitMask = BeforeFeatureBitMask;
-  CpuFeature->AfterFeatureBitMask  = AfterFeatureBitMask;
-  CpuFeature->BeforeAll            = BeforeAll;
-  CpuFeature->AfterAll             = AfterAll;
-  CpuFeature->GetConfigDataFunc    = GetConfigDataFunc;
-  CpuFeature->SupportFunc          = SupportFunc;
-  CpuFeature->InitializeFunc       = InitializeFunc;
-  if (FeatureName != NULL) {
-    CpuFeature->FeatureName          = AllocatePool (CPU_FEATURE_NAME_SIZE);
-    ASSERT (CpuFeature->FeatureName != NULL);
-    Status = AsciiStrCpyS (CpuFeature->FeatureName, CPU_FEATURE_NAME_SIZE, FeatureName);
-    ASSERT_EFI_ERROR (Status);
-  }
-
-  Status = RegisterCpuFeatureWorker (CpuFeature);
-  ASSERT_EFI_ERROR (Status);
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Add an entry in specified register table.
-
-  This function adds an entry in specified register table, with given register type,
-  register index, bit section and value.
-
-  @param[in]  PreSmmFlag       If TRUE, entry will be added into PreSmm register table
-                               If FALSE, entry will be added into register table
-  @param[in]  ProcessorNumber  The index of the CPU to add a register table entry
-  @param[in]  RegisterType     Type of the register to program
-  @param[in]  Index            Index of the register to program
-  @param[in]  ValidBitStart    Start of the bit section
-  @param[in]  ValidBitLength   Length of the bit section
-  @param[in]  Value            Value to write
-**/
-VOID
-CpuRegisterTableWriteWorker (
-  IN BOOLEAN                 PreSmmFlag,
-  IN UINTN                   ProcessorNumber,
-  IN REGISTER_TYPE           RegisterType,
-  IN UINT64                  Index,
-  IN UINT8                   ValidBitStart,
-  IN UINT8                   ValidBitLength,
-  IN UINT64                  Value
-  )
-{
-  EFI_STATUS               Status;
-  CPU_FEATURES_DATA        *CpuFeaturesData;
-  ACPI_CPU_DATA            *AcpiCpuData;
-  CPU_REGISTER_TABLE       *RegisterTable;
-  CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
-
-  CpuFeaturesData = GetCpuFeaturesData ();
-  if (CpuFeaturesData->RegisterTable == NULL) {
-    AcpiCpuData = (ACPI_CPU_DATA *) (UINTN) PcdGet64 (PcdCpuS3DataAddress);
-    if (AcpiCpuData == NULL) {
-      AcpiCpuData = AllocateAcpiCpuData ();
-      ASSERT (AcpiCpuData != NULL);
-      //
-      // Set PcdCpuS3DataAddress to the base address of the ACPI_CPU_DATA structure
-      //
-      Status = PcdSet64S (PcdCpuS3DataAddress, (UINT64)(UINTN)AcpiCpuData);
-      ASSERT_EFI_ERROR (Status);
-    }
-    ASSERT (AcpiCpuData->RegisterTable != 0);
-    CpuFeaturesData->RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->RegisterTable;
-    CpuFeaturesData->PreSmmRegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->PreSmmInitRegisterTable;
-  }
-
-  if (PreSmmFlag) {
-    RegisterTable = &CpuFeaturesData->PreSmmRegisterTable[ProcessorNumber];
-  } else {
-    RegisterTable = &CpuFeaturesData->RegisterTable[ProcessorNumber];
-  }
-
-  if (RegisterTable->TableLength == RegisterTable->AllocatedSize / sizeof (CPU_REGISTER_TABLE_ENTRY)) {
-    EnlargeRegisterTable (RegisterTable);
-  }
-
-  //
-  // Append entry in the register table.
-  //
-  RegisterTableEntry = (CPU_REGISTER_TABLE_ENTRY *) (UINTN) RegisterTable->RegisterTableEntry;
-  RegisterTableEntry[RegisterTable->TableLength].RegisterType   = RegisterType;
-  RegisterTableEntry[RegisterTable->TableLength].Index          = (UINT32) Index;
-  RegisterTableEntry[RegisterTable->TableLength].HighIndex      = (UINT32) RShiftU64 (Index, 32);
-  RegisterTableEntry[RegisterTable->TableLength].ValidBitStart  = ValidBitStart;
-  RegisterTableEntry[RegisterTable->TableLength].ValidBitLength = ValidBitLength;
-  RegisterTableEntry[RegisterTable->TableLength].Value          = Value;
-
-  RegisterTable->TableLength++;
-}
-
-/**
-  Adds an entry in specified register table.
-
-  This function adds an entry in specified register table, with given register type,
-  register index, bit section and value.
-
-  @param[in]  ProcessorNumber  The index of the CPU to add a register table entry
-  @param[in]  RegisterType     Type of the register to program
-  @param[in]  Index            Index of the register to program
-  @param[in]  ValueMask        Mask of bits in register to write
-  @param[in]  Value            Value to write
-
-  @note This service could be called by BSP only.
-**/
-VOID
-EFIAPI
-CpuRegisterTableWrite (
-  IN UINTN               ProcessorNumber,
-  IN REGISTER_TYPE       RegisterType,
-  IN UINT64              Index,
-  IN UINT64              ValueMask,
-  IN UINT64              Value
-  )
-{
-  UINT8                   Start;
-  UINT8                   End;
-  UINT8                   Length;
-
-  Start  = (UINT8)LowBitSet64  (ValueMask);
-  End    = (UINT8)HighBitSet64 (ValueMask);
-  Length = End - Start + 1;
-  CpuRegisterTableWriteWorker (FALSE, ProcessorNumber, RegisterType, Index, Start, Length, Value);
-}
-
-/**
-  Adds an entry in specified Pre-SMM register table.
-
-  This function adds an entry in specified register table, with given register type,
-  register index, bit section and value.
-
-  @param[in]  ProcessorNumber  The index of the CPU to add a register table entry.
-  @param[in]  RegisterType     Type of the register to program
-  @param[in]  Index            Index of the register to program
-  @param[in]  ValueMask        Mask of bits in register to write
-  @param[in]  Value            Value to write
-
-  @note This service could be called by BSP only.
-**/
-VOID
-EFIAPI
-PreSmmCpuRegisterTableWrite (
-  IN UINTN               ProcessorNumber,
-  IN REGISTER_TYPE       RegisterType,
-  IN UINT64              Index,
-  IN UINT64              ValueMask,
-  IN UINT64              Value
-  )
-{
-  UINT8  Start;
-  UINT8  End;
-  UINT8  Length;
-
-  Start  = (UINT8)LowBitSet64  (ValueMask);
-  End    = (UINT8)HighBitSet64 (ValueMask);
-  Length = End - Start + 1;
-  CpuRegisterTableWriteWorker (TRUE, ProcessorNumber, RegisterType, Index, Start, Length, Value);
-}
-
-/**
-  Worker function to determine if a CPU feature is set in input CPU feature bit mask buffer.
-
-  @param[in]  CpuBitMask      CPU feature bit mask buffer
-  @param[in]  CpuBitMaskSize  The size of CPU feature bit mask buffer
-  @param[in]  Feature         The bit number of the CPU feature
-
-  @retval  TRUE   The CPU feature is set in PcdCpuFeaturesSupport.
-  @retval  FALSE  The CPU feature is not set in PcdCpuFeaturesSupport.
-
-**/
-BOOLEAN
-IsCpuFeatureSetInCpuPcd (
-  IN UINT8               *CpuBitMask,
-  IN UINTN               CpuBitMaskSize,
-  IN UINT32              Feature
-  )
-{
-  if ((Feature >> 3) >= CpuBitMaskSize) {
-    return FALSE;
-  }
-  return ((*(CpuBitMask + (Feature >> 3)) & (1 << (Feature & 0x07))) != 0);
-}
-
-/**
-  Determines if a CPU feature is enabled in PcdCpuFeaturesSupport bit mask.
-  If a CPU feature is disabled in PcdCpuFeaturesSupport then all the code/data
-  associated with that feature should be optimized away if compiler
-  optimizations are enabled.
-
-  @param[in]  Feature  The bit number of the CPU feature to check in the PCD
-                       PcdCpuFeaturesSupport
-
-  @retval  TRUE   The CPU feature is set in PcdCpuFeaturesSupport.
-  @retval  FALSE  The CPU feature is not set in PcdCpuFeaturesSupport.
-
-  @note This service could be called by BSP only.
-**/
-BOOLEAN
-EFIAPI
-IsCpuFeatureSupported (
-  IN UINT32              Feature
-  )
-{
-  return IsCpuFeatureSetInCpuPcd (
-           (UINT8 *)PcdGetPtr (PcdCpuFeaturesSupport),
-           PcdGetSize (PcdCpuFeaturesSupport),
-           Feature
-           );
-}
-
-/**
-  Determines if a CPU feature is set in PcdCpuFeaturesSetting bit mask.
-
-  @param[in]  Feature  The bit number of the CPU feature to check in the PCD
-                       PcdCpuFeaturesSetting
-
-  @retval  TRUE   The CPU feature is set in PcdCpuFeaturesSetting.
-  @retval  FALSE  The CPU feature is not set in PcdCpuFeaturesSetting.
-
-  @note This service could be called by BSP only.
-**/
-BOOLEAN
-EFIAPI
-IsCpuFeatureInSetting (
-  IN UINT32              Feature
-  )
-{
-  return IsCpuFeatureSetInCpuPcd (
-           (UINT8 *)PcdGetPtr (PcdCpuFeaturesSetting),
-           PcdGetSize (PcdCpuFeaturesSetting),
-           Feature
-           );
-}
-
-/**
-  Determines if a CPU feature is set in PcdCpuFeaturesCapability bit mask.
-
-  @param[in]  Feature  The bit number of the CPU feature to check in the PCD
-                       PcdCpuFeaturesCapability
-
-  @retval  TRUE   The CPU feature is set in PcdCpuFeaturesCapability.
-  @retval  FALSE  The CPU feature is not set in PcdCpuFeaturesCapability.
-
-  @note This service could be called by BSP only.
-**/
-BOOLEAN
-EFIAPI
-IsCpuFeatureCapability (
-  IN UINT32              Feature
-  )
-{
-  return IsCpuFeatureSetInCpuPcd (
-           (UINT8 *)PcdGetPtr (PcdCpuFeaturesCapability),
-           PcdGetSize (PcdCpuFeaturesCapability),
-           Feature
-           );
-
-}
-
-/**
-  Determines if a CPU feature is set in PcdCpuFeaturesUserConfiguration bit mask.
-
-  @param[in]  Feature  The bit number of the CPU feature to check in the PCD
-                       PcdCpuFeaturesUserConfiguration
-
-  @retval  TRUE   The CPU feature is set in PcdCpuFeaturesUserConfiguration.
-  @retval  FALSE  The CPU feature is not set in PcdCpuFeaturesUserConfiguration.
-
-  @note This service could be called by BSP only.
-**/
-BOOLEAN
-EFIAPI
-IsCpuFeatureUserConfiguration (
-  IN UINT32              Feature
-  )
-{
-  return IsCpuFeatureSetInCpuPcd (
-           (UINT8 *)PcdGetPtr (PcdCpuFeaturesUserConfiguration),
-           PcdGetSize (PcdCpuFeaturesUserConfiguration),
-           Feature
-           );
-
-}
-
-/**
-  Switches to assigned BSP after CPU features initialization.
-
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.
-
-  @note This service could be called by BSP only.
-**/
-VOID
-EFIAPI
-SwitchBspAfterFeaturesInitialize (
-  IN UINTN               ProcessorNumber
-  )
-{
-  CPU_FEATURES_DATA      *CpuFeaturesData;
-
-  CpuFeaturesData = GetCpuFeaturesData ();
-  CpuFeaturesData->BspNumber = ProcessorNumber;
-}
-
diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/IpfTimerLib.c b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/IpfTimerLib.c
deleted file mode 100644
index 714b99eec4..0000000000
--- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/IpfTimerLib.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/** @file
-  Timer Library functions built upon ITC on IPF.
-
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/TimerLib.h>
-#include <Library/BaseLib.h>
-#include <Library/PalLib.h>
-
-
-/**
-  Performs a delay measured as number of ticks.
-
-  An internal function to perform a delay measured as number of ticks. It's
-  invoked by MicroSecondDelay() and NanoSecondDelay().
-
-  @param  Delay The number of ticks to delay.
-
-**/
-VOID
-EFIAPI
-InternalIpfDelay (
-  IN      INT64                     Delay
-  )
-{
-  INT64                             Ticks;
-
-  //
-  // The target timer count is calculated here
-  //
-  Ticks = (INT64)AsmReadItc () + Delay;
-
-  //
-  // Wait until time out
-  // Delay > 2^63 could not be handled by this function
-  // Timer wrap-arounds are handled correctly by this function
-  //
-  while (Ticks - (INT64)AsmReadItc() >= 0);
-}
-
-/**
-  Stalls the CPU for at least the given number of microseconds.
-
-  Stalls the CPU for the number of microseconds specified by MicroSeconds.
-
-  @param  MicroSeconds  The minimum number of microseconds to delay.
-
-  @return The value of MicroSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-MicroSecondDelay (
-  IN      UINTN                     MicroSeconds
-  )
-{
-  InternalIpfDelay (
-    GetPerformanceCounterProperties (NULL, NULL) *
-    MicroSeconds /
-    1000000
-    );
-  return MicroSeconds;
-}
-
-/**
-  Stalls the CPU for at least the given number of nanoseconds.
-
-  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
-
-  @param  NanoSeconds The minimum number of nanoseconds to delay.
-
-  @return The value of NanoSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-NanoSecondDelay (
-  IN      UINTN                     NanoSeconds
-  )
-{
-  InternalIpfDelay (
-    GetPerformanceCounterProperties (NULL, NULL) *
-    NanoSeconds /
-    1000000000
-    );
-  return NanoSeconds;
-}
-
-/**
-  Retrieves the current value of a 64-bit free running performance counter.
-
-  The counter can either count up by 1 or count down by 1. If the physical
-  performance counter counts by a larger increment, then the counter values
-  must be translated. The properties of the counter can be retrieved from
-  GetPerformanceCounterProperties().
-
-  @return The current value of the free running performance counter.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounter (
-  VOID
-  )
-{
-  return AsmReadItc ();
-}
-
-/**
-  Retrieves the 64-bit frequency in Hz and the range of performance counter
-  values.
-
-  If StartValue is not NULL, then the value that the performance counter starts
-  with immediately after is it rolls over is returned in StartValue. If
-  EndValue is not NULL, then the value that the performance counter end with
-  immediately before it rolls over is returned in EndValue. The 64-bit
-  frequency of the performance counter in Hz is always returned. If StartValue
-  is less than EndValue, then the performance counter counts up. If StartValue
-  is greater than EndValue, then the performance counter counts down. For
-  example, a 64-bit free running counter that counts up would have a StartValue
-  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
-  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
-
-  @param  StartValue  The value the performance counter starts with when it
-                      rolls over.
-  @param  EndValue    The value that the performance counter ends with before
-                      it rolls over.
-
-  @return The frequency in Hz.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounterProperties (
-  OUT      UINT64                    *StartValue,  OPTIONAL
-  OUT      UINT64                    *EndValue     OPTIONAL
-  )
-{
-  PAL_CALL_RETURN                   PalRet;
-  UINT64                            BaseFrequence;
-
-  if (StartValue != NULL) {
-    *StartValue = 0;
-  }
-
-  if (EndValue != NULL) {
-    *EndValue = (UINT64)(-1);
-  }
-
-  PalRet = PalCall (PAL_FREQ_BASE, 0, 0, 0);
-  if (PalRet.Status != 0) {
-    return 1000000;
-  }
-  BaseFrequence = PalRet.r9;
-
-  PalRet = PalCall (PAL_FREQ_RATIOS, 0, 0, 0);
-  if (PalRet.Status != 0) {
-    return 1000000;
-  }
-
-  return BaseFrequence * (PalRet.r11 >> 32) / (UINT32)PalRet.r11;
-}
-
-/**
-  Converts elapsed ticks of performance counter to time in nanoseconds.
-
-  This function converts the elapsed ticks of running performance counter to
-  time value in unit of nanoseconds.
-
-  @param  Ticks     The number of elapsed ticks of running performance counter.
-
-  @return The elapsed time in nanoseconds.
-
-**/
-UINT64
-EFIAPI
-GetTimeInNanoSecond (
-  IN      UINT64                     Ticks
-  )
-{
-  UINT64  Frequency;
-  UINT64  NanoSeconds;
-  UINT64  Remainder;
-  INTN    Shift;
-
-  Frequency = GetPerformanceCounterProperties (NULL, NULL);
-
-  //
-  //          Ticks
-  // Time = --------- x 1,000,000,000
-  //        Frequency
-  //
-  NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
-
-  //
-  // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
-  // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
-  // i.e. highest bit set in Remainder should <= 33.
-  //
-  Shift = MAX (0, HighBitSet64 (Remainder) - 33);
-  Remainder = RShiftU64 (Remainder, (UINTN) Shift);
-  Frequency = RShiftU64 (Frequency, (UINTN) Shift);
-  NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
-
-  return NanoSeconds;
-}
diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf
deleted file mode 100644
index a25e94a61a..0000000000
--- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf
+++ /dev/null
@@ -1,67 +0,0 @@
-## @file
-# Instance of Timer Library only using CPU resources.
-#
-# Timer Library that only uses CPU resources to provide calibrated delays
-#  on IA-32, x64, and IPF.
-# Note: A driver of type DXE_RUNTIME_DRIVER and DXE_SMM_DRIVER can use this TimerLib 
-#  in their initialization without any issues. They only have to be careful in 
-#  the implementation of runtime services and SMI handlers.  
-#  Because CPU Local APIC and ITC could be programmed by OS, it cannot be
-#  used by SMM drivers and runtime drivers, ACPI timer is recommended for SMM
-#  drivers and runtime drivers.
-#
-# This library differs with the SecPeiDxeTimerLibCpu library in the MdePkg in
-# that it uses the local APIC library so that it supports x2APIC mode.
-#
-# Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution. The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php.
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SecPeiDxeTimerLibUefiCpu
-  MODULE_UNI_FILE                = SecPeiDxeTimerLibUefiCpu.uni
-  FILE_GUID                      = 4FFF2014-2086-4ee6-9B58-886D1967861C
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = TimerLib
-
-
-#
-#  VALID_ARCHITECTURES           = IA32 X64 IPF
-#
-
-[Sources.Ia32, Sources.X64]
-  X86TimerLib.c
-
-[Sources.IPF]
-  IpfTimerLib.c
-
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-
-[LibraryClasses.IA32, LibraryClasses.X64]
-  PcdLib
-  DebugLib
-  LocalApicLib
-
-[LibraryClasses.IPF]
-  PalLib
-
-
-[Pcd.IA32, Pcd.X64]
-  gEfiMdePkgTokenSpaceGuid.PcdFSBClock  ## SOMETIMES_CONSUMES
-
diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.uni b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.uni
deleted file mode 100644
index da9e4d8191..0000000000
--- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.uni
+++ /dev/null
@@ -1,31 +0,0 @@
-// /** @file
-// Instance of Timer Library only using CPU resources.
-//
-// Timer Library that only uses CPU resources to provide calibrated delays
-// on IA-32, x64, and IPF.
-// Note: A driver of type DXE_RUNTIME_DRIVER and DXE_SMM_DRIVER can use this TimerLib
-// in their initialization without any issues. They only have to be careful in
-// the implementation of runtime services and SMI handlers.
-// Because CPU Local APIC and ITC could be programmed by OS, it cannot be
-// used by SMM drivers and runtime drivers, ACPI timer is recommended for SMM
-// drivers and runtime drivers.
-// 
-// This library differs with the SecPeiDxeTimerLibCpu library in the MdePkg in
-// that it uses the local APIC library so that it supports x2APIC mode.
-//
-// Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php.
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-
-#string STR_MODULE_ABSTRACT             #language en-US "Instance of Timer Library only using CPU resources"
-
-#string STR_MODULE_DESCRIPTION          #language en-US "Timer Library that only uses CPU resources to provide calibrated delays on IA-32, x64, and IPF. Note: A driver of type DXE_RUNTIME_DRIVER and DXE_SMM_DRIVER can use this TimerLib in their initialization without any issues. They only have to be careful in the implementation of runtime services and SMI handlers. Because CPU Local APIC and ITC could be programmed by OS, it cannot be used by SMM drivers and runtime drivers, ACPI timer is recommended for SMM drivers and runtime drivers. This library differs with the SecPeiDxeTimerLibCpu library in the MdePkg in that it uses the local APIC library so that it supports x2APIC mode."
-
diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/X86TimerLib.c b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/X86TimerLib.c
deleted file mode 100644
index f703d7e477..0000000000
--- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/X86TimerLib.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/** @file
-  Timer Library functions built upon local APIC on IA32/x64.
-
-  This library uses the local APIC library so that it supports x2APIC mode.
-  
-  Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/TimerLib.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LocalApicLib.h>
-
-/**
-  Internal function to return the frequency of the local APIC timer.
-
-  @return The frequency of the timer in Hz.
-
-**/
-UINT32
-EFIAPI
-InternalX86GetTimerFrequency (
-  VOID
-  )
-{
-  UINTN Divisor;
-
-  GetApicTimerState (&Divisor, NULL, NULL);
-  return PcdGet32(PcdFSBClock) / (UINT32)Divisor;
-}
-
-/**
-  Stalls the CPU for at least the given number of ticks.
-
-  Stalls the CPU for at least the given number of ticks. It's invoked by
-  MicroSecondDelay() and NanoSecondDelay().
-
-  This function will ASSERT if the APIC timer intial count returned from
-  GetApicTimerInitCount() is zero.
-
-  @param  Delay     A period of time to delay in ticks.
-
-**/
-VOID
-EFIAPI
-InternalX86Delay (
-  IN      UINT32                    Delay
-  )
-{
-  INT32                             Ticks;
-  UINT32                            Times;
-  UINT32                            InitCount;
-  UINT32                            StartTick;
-
-  //
-  // In case Delay is too larger, separate it into several small delay slot.
-  // Devided Delay by half value of Init Count is to avoid Delay close to
-  // the Init Count, timeout maybe missing if the time consuming between 2
-  // GetApicTimerCurrentCount() invoking is larger than the time gap between
-  // Delay and the Init Count.
-  //
-  InitCount = GetApicTimerInitCount ();
-  ASSERT (InitCount != 0);
-  Times     = Delay / (InitCount / 2);
-  Delay     = Delay % (InitCount / 2);
-
-  //
-  // Get Start Tick and do delay
-  //
-  StartTick  = GetApicTimerCurrentCount ();
-  do {
-    //
-    // Wait until time out by Delay value
-    //
-    do {
-      CpuPause ();
-      //
-      // Get Ticks from Start to Current.
-      //
-      Ticks = StartTick - GetApicTimerCurrentCount ();
-      //
-      // Ticks < 0 means Timer wrap-arounds happens.
-      //
-      if (Ticks < 0) {
-        Ticks += InitCount;
-      }
-    } while ((UINT32)Ticks < Delay);
-
-    //
-    // Update StartTick and Delay for next delay slot
-    //
-    StartTick -= (StartTick > Delay) ?  Delay : (Delay - InitCount);
-    Delay      = InitCount / 2;
-  } while (Times-- > 0);
-}
-
-/**
-  Stalls the CPU for at least the given number of microseconds.
-
-  Stalls the CPU for the number of microseconds specified by MicroSeconds.
-
-  @param  MicroSeconds  The minimum number of microseconds to delay.
-
-  @return The value of MicroSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-MicroSecondDelay (
-  IN      UINTN                     MicroSeconds
-  )
-{
-  InternalX86Delay (
-    (UINT32)DivU64x32 (
-              MultU64x64 (
-                InternalX86GetTimerFrequency (),
-                MicroSeconds
-                ),
-              1000000u
-              )
-    );
-  return MicroSeconds;
-}
-
-/**
-  Stalls the CPU for at least the given number of nanoseconds.
-
-  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
-
-  @param  NanoSeconds The minimum number of nanoseconds to delay.
-
-  @return The value of NanoSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-NanoSecondDelay (
-  IN      UINTN                     NanoSeconds
-  )
-{
-  InternalX86Delay (
-    (UINT32)DivU64x32 (
-              MultU64x64 (
-                InternalX86GetTimerFrequency (),
-                NanoSeconds
-                ),
-              1000000000u
-              )
-    );
-  return NanoSeconds;
-}
-
-/**
-  Retrieves the current value of a 64-bit free running performance counter.
-
-  The counter can either count up by 1 or count down by 1. If the physical
-  performance counter counts by a larger increment, then the counter values
-  must be translated. The properties of the counter can be retrieved from
-  GetPerformanceCounterProperties().
-
-  @return The current value of the free running performance counter.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounter (
-  VOID
-  )
-{
-  return (UINT64)GetApicTimerCurrentCount ();
-}
-
-/**
-  Retrieves the 64-bit frequency in Hz and the range of performance counter
-  values.
-
-  If StartValue is not NULL, then the value that the performance counter starts
-  with immediately after is it rolls over is returned in StartValue. If
-  EndValue is not NULL, then the value that the performance counter end with
-  immediately before it rolls over is returned in EndValue. The 64-bit
-  frequency of the performance counter in Hz is always returned. If StartValue
-  is less than EndValue, then the performance counter counts up. If StartValue
-  is greater than EndValue, then the performance counter counts down. For
-  example, a 64-bit free running counter that counts up would have a StartValue
-  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
-  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
-
-  @param  StartValue  The value the performance counter starts with when it
-                      rolls over.
-  @param  EndValue    The value that the performance counter ends with before
-                      it rolls over.
-
-  @return The frequency in Hz.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounterProperties (
-  OUT      UINT64                    *StartValue,  OPTIONAL
-  OUT      UINT64                    *EndValue     OPTIONAL
-  )
-{
-  if (StartValue != NULL) {
-    *StartValue = (UINT64)GetApicTimerInitCount ();
-  }
-
-  if (EndValue != NULL) {
-    *EndValue = 0;
-  }
-
-  return (UINT64) InternalX86GetTimerFrequency ();
-}
-
-/**
-  Converts elapsed ticks of performance counter to time in nanoseconds.
-
-  This function converts the elapsed ticks of running performance counter to
-  time value in unit of nanoseconds.
-
-  @param  Ticks     The number of elapsed ticks of running performance counter.
-
-  @return The elapsed time in nanoseconds.
-
-**/
-UINT64
-EFIAPI
-GetTimeInNanoSecond (
-  IN      UINT64                     Ticks
-  )
-{
-  UINT64  Frequency;
-  UINT64  NanoSeconds;
-  UINT64  Remainder;
-  INTN    Shift;
-
-  Frequency = GetPerformanceCounterProperties (NULL, NULL);
-
-  //
-  //          Ticks
-  // Time = --------- x 1,000,000,000
-  //        Frequency
-  //
-  NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
-
-  //
-  // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
-  // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
-  // i.e. highest bit set in Remainder should <= 33.
-  //
-  Shift = MAX (0, HighBitSet64 (Remainder) - 33);
-  Remainder = RShiftU64 (Remainder, (UINTN) Shift);
-  Frequency = RShiftU64 (Frequency, (UINTN) Shift);
-  NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
-
-  return NanoSeconds;
-}
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S
deleted file mode 100644
index 4c0f8c8933..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S
+++ /dev/null
@@ -1,278 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   SmiEntry.S
-#
-# Abstract:
-#
-#   Code template of the SMI handler for a particular processor
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL  ASM_PFX(gcStmSmiHandlerTemplate)
-ASM_GLOBAL  ASM_PFX(gcStmSmiHandlerSize)
-ASM_GLOBAL  ASM_PFX(gcStmSmiHandlerOffset)
-ASM_GLOBAL  ASM_PFX(gStmSmiCr3)
-ASM_GLOBAL  ASM_PFX(gStmSmiStack)
-ASM_GLOBAL  ASM_PFX(gStmSmbase)
-ASM_GLOBAL  ASM_PFX(gStmXdSupported)
-ASM_GLOBAL  ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))
-ASM_GLOBAL  ASM_PFX(gStmSmiHandlerIdtr)
-
-.equ            MSR_IA32_MISC_ENABLE, 0x1A0
-.equ            MSR_EFER, 0xc0000080
-.equ            MSR_EFER_XD, 0x800
-
-#
-# Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR
-#
-.equ            DSC_OFFSET, 0xfb00
-.equ            DSC_GDTPTR, 0x48
-.equ            DSC_GDTSIZ, 0x50
-.equ            DSC_CS, 0x14
-.equ            DSC_DS, 0x16
-.equ            DSC_SS, 0x18
-.equ            DSC_OTHERSEG, 0x1A
-
-.equ            PROTECT_MODE_CS, 0x08
-.equ            PROTECT_MODE_DS, 0x20
-.equ            TSS_SEGMENT,     0x40
-
-    .text
-ASM_PFX(gcStmSmiHandlerTemplate):
-
-_StmSmiEntryPoint:
-    .byte 0xbb                          # mov bx, imm16
-    .word _StmGdtDesc - _StmSmiEntryPoint + 0x8000
-    .byte 0x2e,0xa1                     # mov ax, cs:[offset16]
-    .word DSC_OFFSET + DSC_GDTSIZ
-    decl    %eax
-    movl    %eax, %cs:(%edi)            # mov cs:[bx], ax
-    .byte 0x66,0x2e,0xa1                # mov eax, cs:[offset16]
-    .word   DSC_OFFSET + DSC_GDTPTR
-    movw    %ax, %cs:2(%edi)
-    movw    %ax, %bp                    # ebp = GDT base
-    .byte 0x66
-    lgdt    %cs:(%edi)
-# Patch ProtectedMode Segment
-    .byte   0xb8                        # mov ax, imm16
-    .word   PROTECT_MODE_CS             # set AX for segment directly
-    movl    %eax, %cs:-2(%edi)          # mov cs:[bx - 2], ax
-# Patch ProtectedMode entry
-    .byte 0x66, 0xbf                    # mov edi, SMBASE
-ASM_PFX(gStmSmbase): .space 4
-    .byte 0x67
-    lea     ((Start32bit - _StmSmiEntryPoint) + 0x8000)(%edi), %ax
-    movw     %ax, %cs:-6(%edi)
-    movl    %cr0, %ebx
-    .byte 0x66
-    andl    $0x9ffafff3, %ebx
-    .byte 0x66
-    orl     $0x23, %ebx
-    movl    %ebx, %cr0
-    .byte 0x66,0xea
-    .space  4
-    .space  2
-_StmGdtDesc:   .space 4
-            .space 2
-
-Start32bit:
-    movw    $PROTECT_MODE_DS, %ax
-    movl    %eax,%ds
-    movl    %eax,%es
-    movl    %eax,%fs
-    movl    %eax,%gs
-    movl    %eax,%ss
-    .byte   0xbc                          # mov esp, imm32
-ASM_PFX(gStmSmiStack): .space 4
-    movl    $ASM_PFX(gStmSmiHandlerIdtr), %eax
-    lidt    (%eax)
-    jmp     ProtFlatMode
-
-ProtFlatMode:
-    .byte   0xb8                           # mov eax, imm32
-ASM_PFX(gStmSmiCr3): .space 4
-    movl    %eax, %cr3
-#
-# Need to test for CR4 specific bit support
-#
-    movl    $1, %eax
-    cpuid                                  # use CPUID to determine if specific CR4 bits are supported
-    xorl    %eax, %eax                     # Clear EAX
-    testl   $BIT2, %edx                    # Check for DE capabilities
-    jz      L8
-    orl     $BIT3, %eax
-L8:
-    testl   $BIT6, %edx                    # Check for PAE capabilities
-    jz      L9
-    orl     $BIT5, %eax
-L9:
-    testl   $BIT7, %edx                    # Check for MCE capabilities
-    jz      L10
-    orl     $BIT6, %eax
-L10:
-    testl   $BIT24, %edx                   # Check for FXSR capabilities
-    jz      L11
-    orl     $BIT9, %eax
-L11:
-    testl   $BIT25, %edx                   # Check for SSE capabilities
-    jz      L12
-    orl     $BIT10, %eax
-L12:                                       # as cr4.PGE is not set here, refresh cr3
-    movl    %eax, %cr4                     # in PreModifyMtrrs() to flush TLB.
-
-    cmpb    $0, ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))
-    jz      L5
-# Load TSS
-    movb    $0x89, (TSS_SEGMENT + 5)(%ebp) # clear busy flag
-    movl    $TSS_SEGMENT, %eax
-    ltrw    %ax
-L5:
-
-# enable NXE if supported
-    .byte   0xb0                           # mov al, imm8
-ASM_PFX(gStmXdSupported): .byte 1
-    cmpb    $0, %al
-    jz      SkipXd
-#
-# Check XD disable bit
-#
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    pushl   %edx                           # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                    # MSR_IA32_MISC_ENABLE[34]
-    jz      L13
-    andw    $0x0FFFB, %dx                  # clear XD Disable bit if it is set
-    wrmsr
-L13:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax               # enable NXE
-    wrmsr
-    jmp     XdDone
-SkipXd:
-    subl    $4, %esp
-XdDone:
-
-    movl    %cr0, %ebx
-    orl     $0x080010023, %ebx             # enable paging + WP + NE + MP + PE
-    movl    %ebx, %cr0
-    leal    DSC_OFFSET(%edi),%ebx
-    movw    DSC_DS(%ebx),%ax
-    movl    %eax, %ds
-    movw    DSC_OTHERSEG(%ebx),%ax
-    movl    %eax, %es
-    movl    %eax, %fs
-    movl    %eax, %gs
-    movw    DSC_SS(%ebx),%ax
-    movl    %eax, %ss
-
-CommonHandler:
-    movl    4(%esp), %ebx
-
-    pushl   %ebx
-    movl    $ASM_PFX(CpuSmmDebugEntry), %eax
-    call    *%eax
-    addl    $4, %esp
-
-    pushl   %ebx
-    movl    $ASM_PFX(SmiRendezvous), %eax
-    call    *%eax
-    addl    $4, %esp
-
-    pushl   %ebx
-    movl    $ASM_PFX(CpuSmmDebugExit), %eax
-    call    *%eax
-    addl    $4, %esp
-
-    movl    $ASM_PFX(gStmXdSupported), %eax
-    movb    (%eax), %al
-    cmpb    $0, %al
-    jz      L16
-    popl    %edx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx
-    jz      L16
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-L16:
-    rsm
-
-_StmSmiHandler:
-#
-# Check XD disable bit
-#
-    xorl    %esi, %esi
-    movl    $ASM_PFX(gStmXdSupported), %eax
-    movb    (%eax), %al
-    cmpb    $0, %al
-    jz      StmXdDone
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    movl    %edx, %esi                     # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                    # MSR_IA32_MISC_ENABLE[34]
-    jz      L14
-    andw    $0x0FFFB, %dx                  # clear XD Disable bit if it is set
-    wrmsr
-L14:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax               # enable NXE
-    wrmsr
-StmXdDone:
-    push    %esi
-
-    # below step is needed, because STM does not run above code.
-    # we have to run below code to set IDT/CR0/CR4
-    movl    $ASM_PFX(gStmSmiHandlerIdtr), %eax
-    lidt    (%eax)
-
-    movl    %cr0, %eax
-    orl     $0x80010023, %eax           # enable paging + WP + NE + MP + PE
-    movl    %eax, %cr0
-#
-# Need to test for CR4 specific bit support
-#
-    movl    $1, %eax
-    cpuid                               # use CPUID to determine if specific CR4 bits are supported
-    movl    %cr4, %eax                  # init EAX
-    testl   $BIT2, %edx                 # Check for DE capabilities
-    jz      L28
-    orl     $BIT3, %eax
-L28:
-    testl   $BIT6, %edx                 # Check for PAE capabilities
-    jz      L29
-    orl     $BIT5, %eax
-L29:
-    testl   $BIT7, %edx                 # Check for MCE capabilities
-    jz      L30
-    orl     $BIT6, %eax
-L30:
-    testl   $BIT24, %edx                # Check for FXSR capabilities
-    jz      L31
-    orl     $BIT9, %eax
-L31:
-    testl   $BIT25, %edx                # Check for SSE capabilities
-    jz      L32
-    orl     $BIT10, %eax
-L32:                                    # as cr4.PGE is not set here, refresh cr3
-    movl    %eax, %cr4                  # in PreModifyMtrrs() to flush TLB.
-    # STM init finish
-    jmp     CommonHandler
-
-
-ASM_PFX(gcStmSmiHandlerSize)  :  .word      . - _StmSmiEntryPoint
-ASM_PFX(gcStmSmiHandlerOffset):  .word      _StmSmiHandler - _StmSmiEntryPoint
-
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm
deleted file mode 100644
index 94888d5aec..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.asm
+++ /dev/null
@@ -1,285 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiEntry.asm
-;
-; Abstract:
-;
-;   Code template of the SMI handler for a particular processor
-;
-;-------------------------------------------------------------------------------
-
-    .686p
-    .model  flat,C
-    .xmm
-
-MSR_IA32_MISC_ENABLE  EQU     1A0h
-MSR_EFER      EQU     0c0000080h
-MSR_EFER_XD   EQU     0800h
-
-;
-; Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR
-;
-DSC_OFFSET    EQU     0fb00h
-DSC_GDTPTR    EQU     48h
-DSC_GDTSIZ    EQU     50h
-DSC_CS        EQU     14h
-DSC_DS        EQU     16h
-DSC_SS        EQU     18h
-DSC_OTHERSEG  EQU     1Ah
-
-PROTECT_MODE_CS EQU   08h
-PROTECT_MODE_DS EQU   20h
-TSS_SEGMENT     EQU   40h
-
-SmiRendezvous      PROTO   C
-CpuSmmDebugEntry   PROTO   C
-CpuSmmDebugExit    PROTO   C
-
-EXTERNDEF   gcStmSmiHandlerTemplate:BYTE
-EXTERNDEF   gcStmSmiHandlerSize:WORD
-EXTERNDEF   gcStmSmiHandlerOffset:WORD
-EXTERNDEF   gStmSmiCr3:DWORD
-EXTERNDEF   gStmSmiStack:DWORD
-EXTERNDEF   gStmSmbase:DWORD
-EXTERNDEF   gStmXdSupported:BYTE
-EXTERNDEF   FeaturePcdGet (PcdCpuSmmStackGuard):BYTE
-EXTERNDEF   gStmSmiHandlerIdtr:FWORD
-
-    .code
-
-gcStmSmiHandlerTemplate    LABEL   BYTE
-
-_StmSmiEntryPoint:
-    DB      0bbh                        ; mov bx, imm16
-    DW      offset _StmGdtDesc - _StmSmiEntryPoint + 8000h
-    DB      2eh, 0a1h                   ; mov ax, cs:[offset16]
-    DW      DSC_OFFSET + DSC_GDTSIZ
-    dec     eax
-    mov     cs:[edi], eax               ; mov cs:[bx], ax
-    DB      66h, 2eh, 0a1h              ; mov eax, cs:[offset16]
-    DW      DSC_OFFSET + DSC_GDTPTR
-    mov     cs:[edi + 2], ax            ; mov cs:[bx + 2], eax
-    mov     bp, ax                      ; ebp = GDT base
-    DB      66h
-    lgdt    fword ptr cs:[edi]          ; lgdt fword ptr cs:[bx]
-; Patch ProtectedMode Segment
-    DB      0b8h                        ; mov ax, imm16
-    DW      PROTECT_MODE_CS             ; set AX for segment directly
-    mov     cs:[edi - 2], eax           ; mov cs:[bx - 2], ax
-; Patch ProtectedMode entry
-    DB      66h, 0bfh                   ; mov edi, SMBASE
-gStmSmbase    DD    ?
-    DB      67h
-    lea     ax, [edi + (@32bit - _StmSmiEntryPoint) + 8000h]
-    mov     cs:[edi - 6], ax            ; mov cs:[bx - 6], eax
-    mov     ebx, cr0
-    DB      66h
-    and     ebx, 9ffafff3h
-    DB      66h
-    or      ebx, 23h
-    mov     cr0, ebx
-    DB      66h, 0eah
-    DD      ?
-    DW      ?
-_StmGdtDesc    FWORD   ?
-
-@32bit:
-    mov     ax, PROTECT_MODE_DS
-    mov     ds, ax
-    mov     es, ax
-    mov     fs, ax
-    mov     gs, ax
-    mov     ss, ax
-    DB      0bch                   ; mov esp, imm32
-gStmSmiStack   DD      ?
-    mov     eax, offset gStmSmiHandlerIdtr
-    lidt    fword ptr [eax]
-    jmp     ProtFlatMode
-
-ProtFlatMode:
-    DB      0b8h                        ; mov eax, imm32
-gStmSmiCr3     DD      ?
-    mov     cr3, eax
-;
-; Need to test for CR4 specific bit support
-;
-    mov     eax, 1
-    cpuid                               ; use CPUID to determine if specific CR4 bits are supported
-    xor     eax, eax                    ; Clear EAX
-    test    edx, BIT2                   ; Check for DE capabilities
-    jz      @f
-    or      eax, BIT3
-@@:
-    test    edx, BIT6                   ; Check for PAE capabilities
-    jz      @f
-    or      eax, BIT5
-@@:
-    test    edx, BIT7                   ; Check for MCE capabilities
-    jz      @f
-    or      eax, BIT6
-@@:
-    test    edx, BIT24                  ; Check for FXSR capabilities
-    jz      @f
-    or      eax, BIT9
-@@:
-    test    edx, BIT25                  ; Check for SSE capabilities
-    jz      @f
-    or      eax, BIT10
-@@:                                     ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, eax                    ; in PreModifyMtrrs() to flush TLB.
-
-    cmp     FeaturePcdGet (PcdCpuSmmStackGuard), 0
-    jz      @F
-; Load TSS
-    mov     byte ptr [ebp + TSS_SEGMENT + 5], 89h ; clear busy flag
-    mov     eax, TSS_SEGMENT
-    ltr     ax
-@@:
-
-; enable NXE if supported
-    DB      0b0h                        ; mov al, imm8
-gStmXdSupported     DB      1
-    cmp     al, 0
-    jz      @SkipXd
-;
-; Check XD disable bit
-;
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    push    edx                        ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-    jmp     @XdDone
-@SkipXd:
-    sub     esp, 4
-@XdDone:
-
-    mov     ebx, cr0
-    or      ebx, 080010023h             ; enable paging + WP + NE + MP + PE
-    mov     cr0, ebx
-    lea     ebx, [edi + DSC_OFFSET]
-    mov     ax, [ebx + DSC_DS]
-    mov     ds, eax
-    mov     ax, [ebx + DSC_OTHERSEG]
-    mov     es, eax
-    mov     fs, eax
-    mov     gs, eax
-    mov     ax, [ebx + DSC_SS]
-    mov     ss, eax
-
-CommonHandler:
-    mov     ebx, [esp + 4]                  ; CPU Index
-    push    ebx
-    mov     eax, CpuSmmDebugEntry
-    call    eax
-    add     esp, 4
-
-    push    ebx
-    mov     eax, SmiRendezvous
-    call    eax
-    add     esp, 4
-
-    push    ebx
-    mov     eax, CpuSmmDebugExit
-    call    eax
-    add     esp, 4
-
-    mov     eax, gStmXdSupported
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @f
-    pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      @f
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-@@:
-    rsm
-
-_StmSmiHandler:
-;
-; Check XD disable bit
-;
-    xor     esi, esi
-    mov     eax, gStmXdSupported
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @StmXdDone
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-@StmXdDone:
-    push    esi
-
-    ; below step is needed, because STM does not run above code.
-    ; we have to run below code to set IDT/CR0/CR4
-    mov     eax, offset gStmSmiHandlerIdtr
-    lidt    fword ptr [eax]
-
-
-    mov     eax, cr0
-    or      eax, 80010023h              ; enable paging + WP + NE + MP + PE
-    mov     cr0, eax
-;
-; Need to test for CR4 specific bit support
-;
-    mov     eax, 1
-    cpuid                               ; use CPUID to determine if specific CR4 bits are supported
-    mov     eax, cr4                    ; init EAX
-    test    edx, BIT2                   ; Check for DE capabilities
-    jz      @f
-    or      eax, BIT3
-@@:
-    test    edx, BIT6                   ; Check for PAE capabilities
-    jz      @f
-    or      eax, BIT5
-@@:
-    test    edx, BIT7                   ; Check for MCE capabilities
-    jz      @f
-    or      eax, BIT6
-@@:
-    test    edx, BIT24                  ; Check for FXSR capabilities
-    jz      @f
-    or      eax, BIT9
-@@:
-    test    edx, BIT25                  ; Check for SSE capabilities
-    jz      @f
-    or      eax, BIT10
-@@:                                     ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, eax                    ; in PreModifyMtrrs() to flush TLB.
-    ; STM init finish
-    jmp     CommonHandler
-
-gcStmSmiHandlerSize    DW      $ - _StmSmiEntryPoint
-gcStmSmiHandlerOffset  DW      _StmSmiHandler - _StmSmiEntryPoint
-
-    END
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
deleted file mode 100644
index b1c84a494f..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
+++ /dev/null
@@ -1,271 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiEntry.nasm
-;
-; Abstract:
-;
-;   Code template of the SMI handler for a particular processor
-;
-;-------------------------------------------------------------------------------
-
-%define MSR_IA32_MISC_ENABLE 0x1A0
-%define MSR_EFER      0xc0000080
-%define MSR_EFER_XD   0x800
-
-;
-; Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR
-;
-%define DSC_OFFSET 0xfb00
-%define DSC_GDTPTR 0x48
-%define DSC_GDTSIZ 0x50
-%define DSC_CS 0x14
-%define DSC_DS 0x16
-%define DSC_SS 0x18
-%define DSC_OTHERSEG 0x1a
-
-%define PROTECT_MODE_CS 0x8
-%define PROTECT_MODE_DS 0x20
-%define TSS_SEGMENT 0x40
-
-extern ASM_PFX(SmiRendezvous)
-extern ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))
-extern ASM_PFX(CpuSmmDebugEntry)
-extern ASM_PFX(CpuSmmDebugExit)
-
-global ASM_PFX(gcStmSmiHandlerTemplate)
-global ASM_PFX(gcStmSmiHandlerSize)
-global ASM_PFX(gcStmSmiHandlerOffset)
-global ASM_PFX(gStmSmiCr3)
-global ASM_PFX(gStmSmiStack)
-global ASM_PFX(gStmSmbase)
-global ASM_PFX(gStmXdSupported)
-extern ASM_PFX(gStmSmiHandlerIdtr)
-
-    SECTION .text
-
-BITS 16
-ASM_PFX(gcStmSmiHandlerTemplate):
-_StmSmiEntryPoint:
-    mov     bx, _StmGdtDesc - _StmSmiEntryPoint + 0x8000
-    mov     ax,[cs:DSC_OFFSET + DSC_GDTSIZ]
-    dec     ax
-    mov     [cs:bx], ax
-    mov     eax, [cs:DSC_OFFSET + DSC_GDTPTR]
-    mov     [cs:bx + 2], eax
-    mov     ebp, eax                      ; ebp = GDT base
-o32 lgdt    [cs:bx]                       ; lgdt fword ptr cs:[bx]
-    mov     ax, PROTECT_MODE_CS
-    mov     [cs:bx-0x2],ax
-    DB      0x66, 0xbf                   ; mov edi, SMBASE
-ASM_PFX(gStmSmbase): DD 0
-    lea     eax, [edi + (@32bit - _StmSmiEntryPoint) + 0x8000]
-    mov     [cs:bx-0x6],eax
-    mov     ebx, cr0
-    and     ebx, 0x9ffafff3
-    or      ebx, 0x23
-    mov     cr0, ebx
-    jmp     dword 0x0:0x0
-_StmGdtDesc:
-    DW 0
-    DD 0
-
-BITS 32
-@32bit:
-    mov     ax, PROTECT_MODE_DS
-o16 mov     ds, ax
-o16 mov     es, ax
-o16 mov     fs, ax
-o16 mov     gs, ax
-o16 mov     ss, ax
-    DB      0xbc                   ; mov esp, imm32
-ASM_PFX(gStmSmiStack): DD 0
-    mov     eax, ASM_PFX(gStmSmiHandlerIdtr)
-    lidt    [eax]
-    jmp     ProtFlatMode
-
-ProtFlatMode:
-    DB      0xb8                        ; mov eax, imm32
-ASM_PFX(gStmSmiCr3): DD 0
-    mov     cr3, eax
-;
-; Need to test for CR4 specific bit support
-;
-    mov     eax, 1
-    cpuid                               ; use CPUID to determine if specific CR4 bits are supported
-    xor     eax, eax                    ; Clear EAX
-    test    edx, BIT2                   ; Check for DE capabilities
-    jz      .0
-    or      eax, BIT3
-.0:
-    test    edx, BIT6                   ; Check for PAE capabilities
-    jz      .1
-    or      eax, BIT5
-.1:
-    test    edx, BIT7                   ; Check for MCE capabilities
-    jz      .2
-    or      eax, BIT6
-.2:
-    test    edx, BIT24                  ; Check for FXSR capabilities
-    jz      .3
-    or      eax, BIT9
-.3:
-    test    edx, BIT25                  ; Check for SSE capabilities
-    jz      .4
-    or      eax, BIT10
-.4:                                     ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, eax                    ; in PreModifyMtrrs() to flush TLB.
-
-    cmp     byte [dword ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))], 0
-    jz      .6
-; Load TSS
-    mov     byte [ebp + TSS_SEGMENT + 5], 0x89 ; clear busy flag
-    mov     eax, TSS_SEGMENT
-    ltr     ax
-.6:
-
-; enable NXE if supported
-    DB      0b0h                        ; mov al, imm8
-ASM_PFX(gStmXdSupported):     DB      1
-    cmp     al, 0
-    jz      @SkipXd
-;
-; Check XD disable bit
-;
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    push    edx                        ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .5
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.5:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-    jmp     @XdDone
-@SkipXd:
-    sub     esp, 4
-@XdDone:
-
-    mov     ebx, cr0
-    or      ebx, 0x80010023             ; enable paging + WP + NE + MP + PE
-    mov     cr0, ebx
-    lea     ebx, [edi + DSC_OFFSET]
-    mov     ax, [ebx + DSC_DS]
-    mov     ds, eax
-    mov     ax, [ebx + DSC_OTHERSEG]
-    mov     es, eax
-    mov     fs, eax
-    mov     gs, eax
-    mov     ax, [ebx + DSC_SS]
-    mov     ss, eax
-
-CommonHandler:
-    mov     ebx, [esp + 4]                  ; CPU Index
-    push    ebx
-    mov     eax, ASM_PFX(CpuSmmDebugEntry)
-    call    eax
-    add     esp, 4
-
-    push    ebx
-    mov     eax, ASM_PFX(SmiRendezvous)
-    call    eax
-    add     esp, 4
-
-    push    ebx
-    mov     eax, ASM_PFX(CpuSmmDebugExit)
-    call    eax
-    add     esp, 4
-
-    mov     eax, ASM_PFX(gStmXdSupported)
-    mov     al, [eax]
-    cmp     al, 0
-    jz      .7
-    pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      .7
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-.7:
-    rsm
-
-
-_StmSmiHandler:
-;
-; Check XD disable bit
-;
-    xor     esi, esi
-    mov     eax, ASM_PFX(gStmXdSupported)
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @StmXdDone
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .5
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.5:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-@StmXdDone:
-    push    esi
-
-    ; below step is needed, because STM does not run above code.
-    ; we have to run below code to set IDT/CR0/CR4
-    mov     eax, ASM_PFX(gStmSmiHandlerIdtr)
-    lidt    [eax]
-
-    mov     eax, cr0
-    or      eax, 0x80010023             ; enable paging + WP + NE + MP + PE
-    mov     cr0, eax
-;
-; Need to test for CR4 specific bit support
-;
-    mov     eax, 1
-    cpuid                               ; use CPUID to determine if specific CR4 bits are supported
-    mov     eax, cr4                    ; init EAX
-    test    edx, BIT2                   ; Check for DE capabilities
-    jz      .0
-    or      eax, BIT3
-.0:
-    test    edx, BIT6                   ; Check for PAE capabilities
-    jz      .1
-    or      eax, BIT5
-.1:
-    test    edx, BIT7                   ; Check for MCE capabilities
-    jz      .2
-    or      eax, BIT6
-.2:
-    test    edx, BIT24                  ; Check for FXSR capabilities
-    jz      .3
-    or      eax, BIT9
-.3:
-    test    edx, BIT25                  ; Check for SSE capabilities
-    jz      .4
-    or      eax, BIT10
-.4:                                     ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, eax                    ; in PreModifyMtrrs() to flush TLB.
-    ; STM init finish
-    jmp     CommonHandler
-
-ASM_PFX(gcStmSmiHandlerSize)   : DW        $ - _StmSmiEntryPoint
-ASM_PFX(gcStmSmiHandlerOffset) : DW        _StmSmiHandler - _StmSmiEntryPoint
-
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.S b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.S
deleted file mode 100644
index 7d0057af80..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.S
+++ /dev/null
@@ -1,174 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   SmiException.S
-#
-# Abstract:
-#
-#   Exception handlers used in SM mode
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL  ASM_PFX(gcStmPsd)
-
-ASM_GLOBAL  ASM_PFX(SmmStmExceptionHandler)
-ASM_GLOBAL  ASM_PFX(SmmStmSetup)
-ASM_GLOBAL  ASM_PFX(SmmStmTeardown)
-
-.equ  MSR_IA32_MISC_ENABLE, 0x1A0
-.equ  MSR_EFER,             0xc0000080
-.equ  MSR_EFER_XD,          0x800
-
-.equ  CODE_SEL,          0x08
-.equ  DATA_SEL,          0x20
-.equ  TSS_SEL,           0x40
-
-    .data
-
-ASM_PFX(gcStmPsd):
-            .ascii  "TXTPSSIG"
-            .word      PSD_SIZE
-            .word      1              # Version
-            .long      0              # LocalApicId
-            .byte      0x5            # Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
-            .byte      0              # BIOS to STM
-            .byte      0              # STM to BIOS
-            .byte      0
-            .word      CODE_SEL
-            .word      DATA_SEL
-            .word      DATA_SEL
-            .word      DATA_SEL
-            .word      TSS_SEL
-            .word      0
-            .quad      0              # SmmCr3
-            .long      ASM_PFX(_OnStmSetup)
-            .long      0
-            .long      ASM_PFX(_OnStmTeardown)
-            .long      0
-            .quad      0              # SmmSmiHandlerRip - SMM guest entrypoint
-            .quad      0              # SmmSmiHandlerRsp
-            .quad      0
-            .long      0
-            .long      0x80010100     # RequiredStmSmmRevId
-            .long      ASM_PFX(_OnException)
-            .long      0
-            .quad      0              # ExceptionStack
-            .word      DATA_SEL
-            .word      0x1F           # ExceptionFilter
-            .long      0
-            .quad      0
-            .quad      0              # BiosHwResourceRequirementsPtr
-            .quad      0              # AcpiRsdp
-            .byte      0              # PhysicalAddressBits
-.equ  PSD_SIZE,  . - ASM_PFX(gcStmPsd)
-
-    .text
-
-#------------------------------------------------------------------------------
-# SMM Exception handlers
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(_OnException)
-ASM_PFX(_OnException):
-    movl  %esp, %ecx
-    pushl %ecx
-    call  ASM_PFX(SmmStmExceptionHandler)
-    addl  $4, %esp
-
-    movl  %eax, %ebx
-    movl  $4, %eax
-    .byte 0xf, 0x1, 0xc1 # VMCALL
-    jmp .
-
-ASM_GLOBAL ASM_PFX(_OnStmSetup)
-ASM_PFX(_OnStmSetup):
-#
-# Check XD disable bit
-#
-    xorl    %esi, %esi
-    movl    $ASM_PFX(gStmXdSupported), %eax
-    movb    (%eax), %al
-    cmpb    $0, %al
-    jz      StmXdDone1
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    movl    %edx, %esi                     # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                    # MSR_IA32_MISC_ENABLE[34]
-    jz      L13
-    andw    $0x0FFFB, %dx                  # clear XD Disable bit if it is set
-    wrmsr
-L13:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax               # enable NXE
-    wrmsr
-StmXdDone1:
-    push    %esi
-
-  call ASM_PFX(SmmStmSetup)
-
-    movl    $ASM_PFX(gStmXdSupported), %eax
-    movb    (%eax), %al
-    cmpb    $0, %al
-    jz      L14
-    popl    %edx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx
-    jz      L14
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
-    wrmsr
-L14:
-
-  rsm
-
-ASM_GLOBAL ASM_PFX(_OnStmTeardown)
-ASM_PFX(_OnStmTeardown):
-#
-# Check XD disable bit
-#
-    xorl    %esi, %esi
-    movl    $ASM_PFX(gStmXdSupported), %eax
-    movb    (%eax), %al
-    cmpb    $0, %al
-    jz      StmXdDone2
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    movl    %edx, %esi                     # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                    # MSR_IA32_MISC_ENABLE[34]
-    jz      L15
-    andw    $0x0FFFB, %dx                  # clear XD Disable bit if it is set
-    wrmsr
-L15:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax               # enable NXE
-    wrmsr
-StmXdDone2:
-    push    %esi
-
-  call ASM_PFX(SmmStmTeardown)
-
-    movl    $ASM_PFX(gStmXdSupported), %eax
-    movb    (%eax), %al
-    cmpb    $0, %al
-    jz      L16
-    popl    %edx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx
-    jz      L16
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
-    wrmsr
-L16:
-
-  rsm
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm
deleted file mode 100644
index 7c04ad91f2..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.asm
+++ /dev/null
@@ -1,170 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiException.asm
-;
-; Abstract:
-;
-;   Exception handlers used in SM mode
-;
-;-------------------------------------------------------------------------------
-
-    .686p
-    .model  flat,C
-
-EXTERNDEF   gcStmPsd:BYTE
-
-EXTERNDEF   SmmStmExceptionHandler:PROC
-EXTERNDEF   SmmStmSetup:PROC
-EXTERNDEF   SmmStmTeardown:PROC
-
-CODE_SEL    = 08h
-DATA_SEL    = 20h
-TSS_SEL     = 40h
-
-    .data
-
-gcStmPsd     LABEL   BYTE
-            DB      'TXTPSSIG'
-            DW      PSD_SIZE
-            DW      1              ; Version
-            DD      0              ; LocalApicId
-            DB      05h            ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
-            DB      0              ; BIOS to STM
-            DB      0              ; STM to BIOS
-            DB      0
-            DW      CODE_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      TSS_SEL
-            DW      0
-            DQ      0              ; SmmCr3
-            DQ      _OnStmSetup
-            DQ      _OnStmTeardown
-            DQ      0              ; SmmSmiHandlerRip - SMM guest entrypoint
-            DQ      0              ; SmmSmiHandlerRsp
-            DQ      0
-            DD      0
-            DD      80010100h      ; RequiredStmSmmRevId
-            DQ      _OnException
-            DQ      0              ; ExceptionStack
-            DW      DATA_SEL
-            DW      01Fh           ; ExceptionFilter
-            DD      0
-            DQ      0
-            DQ      0              ; BiosHwResourceRequirementsPtr
-            DQ      0              ; AcpiRsdp
-            DB      0              ; PhysicalAddressBits
-PSD_SIZE  = $ - offset gcStmPsd
-
-    .code
-;------------------------------------------------------------------------------
-; SMM Exception handlers
-;------------------------------------------------------------------------------
-_OnException       PROC
-    mov  ecx, esp
-    push ecx
-    call SmmStmExceptionHandler
-    add  esp, 4
-
-    mov  ebx, eax
-    mov  eax, 4
-    DB  0fh, 01h, 0c1h ; VMCALL
-    jmp $
-_OnException       ENDP
-
-_OnStmSetup PROC
-;
-; Check XD disable bit
-;
-    xor     esi, esi
-    mov     eax, gStmXdSupported
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @StmXdDone1
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-@StmXdDone1:
-    push    esi
-
-  call SmmStmSetup
-
-    mov     eax, gStmXdSupported
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @f
-    pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      @f
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-@@:
-
-  rsm
-_OnStmSetup ENDP
-
-_OnStmTeardown PROC
-;
-; Check XD disable bit
-;
-    xor     esi, esi
-    mov     eax, gStmXdSupported
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @StmXdDone2
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-@StmXdDone2:
-    push    esi
-
-  call SmmStmTeardown
-
-    mov     eax, gStmXdSupported
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @f
-    pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      @f
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-@@:
-
-  rsm
-_OnStmTeardown ENDP
-
-    END
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.nasm
deleted file mode 100644
index 0ce8501ba9..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.nasm
+++ /dev/null
@@ -1,176 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiException.nasm
-;
-; Abstract:
-;
-;   Exception handlers used in SM mode
-;
-;-------------------------------------------------------------------------------
-
-global  ASM_PFX(gcStmPsd)
-
-extern  ASM_PFX(SmmStmExceptionHandler)
-extern  ASM_PFX(SmmStmSetup)
-extern  ASM_PFX(SmmStmTeardown)
-extern  ASM_PFX(gStmXdSupported)
-extern  ASM_PFX(gStmSmiHandlerIdtr)
-
-%define MSR_IA32_MISC_ENABLE 0x1A0
-%define MSR_EFER      0xc0000080
-%define MSR_EFER_XD   0x800
-
-CODE_SEL          equ 0x08
-DATA_SEL          equ 0x20
-TSS_SEL           equ 0x40
-
-    SECTION .data
-
-ASM_PFX(gcStmPsd):
-            DB      'TXTPSSIG'
-            DW      PSD_SIZE
-            DW      1              ; Version
-            DD      0              ; LocalApicId
-            DB      0x05           ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
-            DB      0              ; BIOS to STM
-            DB      0              ; STM to BIOS
-            DB      0
-            DW      CODE_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      TSS_SEL
-            DW      0
-            DQ      0              ; SmmCr3
-            DD      ASM_PFX(OnStmSetup)
-            DD      0
-            DD      ASM_PFX(OnStmTeardown)
-            DD      0
-            DQ      0              ; SmmSmiHandlerRip - SMM guest entrypoint
-            DQ      0              ; SmmSmiHandlerRsp
-            DQ      0
-            DD      0
-            DD      0x80010100     ; RequiredStmSmmRevId
-            DD      ASM_PFX(OnException)
-            DD      0
-            DQ      0              ; ExceptionStack
-            DW      DATA_SEL
-            DW      0x01F          ; ExceptionFilter
-            DD      0
-            DD      0
-            DD      0
-            DQ      0              ; BiosHwResourceRequirementsPtr
-            DQ      0              ; AcpiRsdp
-            DB      0              ; PhysicalAddressBits
-PSD_SIZE  equ $ - ASM_PFX(gcStmPsd)
-
-    SECTION .text
-;------------------------------------------------------------------------------
-; SMM Exception handlers
-;------------------------------------------------------------------------------
-global ASM_PFX(OnException)
-ASM_PFX(OnException):
-    mov  ecx, esp
-    push ecx
-    call ASM_PFX(SmmStmExceptionHandler)
-    add  esp, 4
-
-    mov  ebx, eax
-    mov  eax, 4
-    DB  0x0f, 0x01, 0x0c1 ; VMCALL
-    jmp $
-
-global ASM_PFX(OnStmSetup)
-ASM_PFX(OnStmSetup):
-;
-; Check XD disable bit
-;
-    xor     esi, esi
-    mov     eax, ASM_PFX(gStmXdSupported)
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @StmXdDone1
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .51
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.51:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-@StmXdDone1:
-    push    esi
-
-  call ASM_PFX(SmmStmSetup)
-
-    mov     eax, ASM_PFX(gStmXdSupported)
-    mov     al, [eax]
-    cmp     al, 0
-    jz      .71
-    pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      .71
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-.71:
-  rsm
-
-global  ASM_PFX(OnStmTeardown)
-ASM_PFX(OnStmTeardown):
-;
-; Check XD disable bit
-;
-    xor     esi, esi
-    mov     eax, ASM_PFX(gStmXdSupported)
-    mov     al, [eax]
-    cmp     al, 0
-    jz      @StmXdDone2
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     esi, edx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .52
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.52:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD             ; enable NXE
-    wrmsr
-@StmXdDone2:
-    push    esi
-
-  call ASM_PFX(SmmStmTeardown)
-
-    mov     eax, ASM_PFX(gStmXdSupported)
-    mov     al, [eax]
-    cmp     al, 0
-    jz      .72
-    pop     edx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      .72
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-.72:
-  rsm
-
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmmStmSupport.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmmStmSupport.c
deleted file mode 100644
index 0154c7c0f8..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmmStmSupport.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/** @file
-  SMM STM support functions
-
-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiSmm.h>
-#include <Library/DebugLib.h>
-
-#include "SmmStm.h"
-
-///
-/// Page Table Entry
-///
-#define IA32_PG_P                   BIT0
-#define IA32_PG_RW                  BIT1
-#define IA32_PG_PS                  BIT7
-
-/**
-
-  Create 4G page table for STM.
-  4M Non-PAE page table in IA32 version.
-
-  @param PageTableBase        The page table base in MSEG
-
-**/
-VOID
-StmGen4GPageTable (
-  IN UINTN              PageTableBase
-  )
-{
-  UINTN                             Index;
-  UINT32                            *Pte;
-  UINT32                            Address;
-
-  Pte = (UINT32*)(UINTN)PageTableBase;
-
-  Address = 0;
-  for (Index = 0; Index < SIZE_4KB / sizeof (*Pte); Index++) {
-    *Pte = Address | IA32_PG_PS | IA32_PG_RW | IA32_PG_P;
-    Pte++;
-    Address += SIZE_4MB;
-  }
-}
-
-/**
-  This is SMM exception handle.
-  Consumed by STM when exception happen.
-
-  @param Context  STM protection exception stack frame
-
-  @return the EBX value for STM reference.
-          EBX = 0: resume SMM guest using register state found on exception stack.
-          EBX = 1 to 0x0F: EBX contains a BIOS error code which the STM must record in the
-                           TXT.ERRORCODE register and subsequently reset the system via
-                           TXT.CMD.SYS_RESET. The value of the TXT.ERRORCODE register is calculated as
-                           follows: TXT.ERRORCODE = (EBX & 0x0F) | STM_CRASH_BIOS_PANIC
-          EBX = 0x10 to 0xFFFFFFFF - reserved, do not use.
-
-**/
-UINT32
-EFIAPI
-SmmStmExceptionHandler (
-  IN OUT STM_PROTECTION_EXCEPTION_STACK_FRAME Context
-  )
-{
-  // TBD - SmmStmExceptionHandler, record information
-  DEBUG ((DEBUG_ERROR, "SmmStmExceptionHandler ...\n"));
-  //
-  // Skip this instruction and continue;
-  //
-  Context.Ia32StackFrame->Rip += Context.Ia32StackFrame->VmcsExitInstructionLength;
-
-  return 0;
-}
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
deleted file mode 100644
index 079baa4ae1..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
+++ /dev/null
@@ -1,630 +0,0 @@
-/** @file
-The CPU specific programming for PiSmmCpuDxeSmm module.
-
-Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution.  The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiSmm.h>
-#include <Library/SmmCpuFeaturesLib.h>
-#include <Library/BaseLib.h>
-#include <Library/MtrrLib.h>
-#include <Library/PcdLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/DebugLib.h>
-#include <Register/Cpuid.h>
-#include <Register/SmramSaveStateMap.h>
-
-//
-// Machine Specific Registers (MSRs)
-//
-#define  SMM_FEATURES_LIB_IA32_MTRR_CAP            0x0FE
-#define  SMM_FEATURES_LIB_IA32_FEATURE_CONTROL     0x03A
-#define  SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE       0x1F2
-#define  SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK       0x1F3
-#define  SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE  0x0A0
-#define  SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK  0x0A1
-#define    EFI_MSR_SMRR_MASK                       0xFFFFF000
-#define    EFI_MSR_SMRR_PHYS_MASK_VALID            BIT11
-#define  SMM_FEATURES_LIB_SMM_FEATURE_CONTROL      0x4E0
-
-//
-// MSRs required for configuration of SMM Code Access Check
-//
-#define SMM_FEATURES_LIB_IA32_MCA_CAP              0x17D
-#define   SMM_CODE_ACCESS_CHK_BIT                  BIT58
-
-/**
-  Internal worker function that is called to complete CPU initialization at the
-  end of SmmCpuFeaturesInitializeProcessor().
-
-**/
-VOID
-FinishSmmCpuFeaturesInitializeProcessor (
-  VOID
-  );
-
-//
-// Set default value to assume SMRR is not supported
-//
-BOOLEAN  mSmrrSupported = FALSE;
-
-//
-// Set default value to assume MSR_SMM_FEATURE_CONTROL is not supported
-//
-BOOLEAN  mSmmFeatureControlSupported = FALSE;
-
-//
-// Set default value to assume IA-32 Architectural MSRs are used
-//
-UINT32  mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE;
-UINT32  mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK;
-
-//
-// Set default value to assume MTRRs need to be configured on each SMI
-//
-BOOLEAN  mNeedConfigureMtrrs = TRUE;
-
-//
-// Array for state of SMRR enable on all CPUs
-//
-BOOLEAN  *mSmrrEnabled;
-
-/**
-  The constructor function
-
-  @param[in]  ImageHandle  The firmware allocated handle for the EFI image.
-  @param[in]  SystemTable  A pointer to the EFI System Table.
-
-  @retval EFI_SUCCESS      The constructor always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-SmmCpuFeaturesLibConstructor (
-  IN EFI_HANDLE        ImageHandle,
-  IN EFI_SYSTEM_TABLE  *SystemTable
-  )
-{
-  UINT32  RegEax;
-  UINT32  RegEdx;
-  UINTN   FamilyId;
-  UINTN   ModelId;
-
-  //
-  // Retrieve CPU Family and Model
-  //
-  AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);
-  FamilyId = (RegEax >> 8) & 0xf;
-  ModelId  = (RegEax >> 4) & 0xf;
-  if (FamilyId == 0x06 || FamilyId == 0x0f) {
-    ModelId = ModelId | ((RegEax >> 12) & 0xf0);
-  }
-
-  //
-  // Check CPUID(CPUID_VERSION_INFO).EDX[12] for MTRR capability
-  //
-  if ((RegEdx & BIT12) != 0) {
-    //
-    // Check MTRR_CAP MSR bit 11 for SMRR support
-    //
-    if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MTRR_CAP) & BIT11) != 0) {
-      mSmrrSupported = TRUE;
-    }
-  }
-
-  //
-  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
-  // Volume 3C, Section 35.3 MSRs in the Intel(R) Atom(TM) Processor Family
-  //
-  // If CPU Family/Model is 06_1CH, 06_26H, 06_27H, 06_35H or 06_36H, then
-  // SMRR Physical Base and SMM Physical Mask MSRs are not available.
-  //
-  if (FamilyId == 0x06) {
-    if (ModelId == 0x1C || ModelId == 0x26 || ModelId == 0x27 || ModelId == 0x35 || ModelId == 0x36) {
-      mSmrrSupported = FALSE;
-    }
-  }
-
-  //
-  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
-  // Volume 3C, Section 35.2 MSRs in the Intel(R) Core(TM) 2 Processor Family
-  //
-  // If CPU Family/Model is 06_0F or 06_17, then use Intel(R) Core(TM) 2
-  // Processor Family MSRs
-  //
-  if (FamilyId == 0x06) {
-    if (ModelId == 0x17 || ModelId == 0x0f) {
-      mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE;
-      mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK;
-    }
-  }
-
-  //
-  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
-  // Volume 3C, Section 34.4.2 SMRAM Caching
-  //   An IA-32 processor does not automatically write back and invalidate its
-  //   caches before entering SMM or before exiting SMM. Because of this behavior,
-  //   care must be taken in the placement of the SMRAM in system memory and in
-  //   the caching of the SMRAM to prevent cache incoherence when switching back
-  //   and forth between SMM and protected mode operation.
-  //
-  // An IA-32 processor is a processor that does not support the Intel 64
-  // Architecture.  Support for the Intel 64 Architecture can be detected from
-  // CPUID(CPUID_EXTENDED_CPU_SIG).EDX[29]
-  //
-  // If an IA-32 processor is detected, then set mNeedConfigureMtrrs to TRUE,
-  // so caches are flushed on SMI entry and SMI exit, the interrupted code
-  // MTRRs are saved/restored, and MTRRs for SMM are loaded.
-  //
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
-  if (RegEax >= CPUID_EXTENDED_CPU_SIG) {
-    AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx);
-    if ((RegEdx & BIT29) != 0) {
-      mNeedConfigureMtrrs = FALSE;
-    }
-  }
-
-  //
-  // Allocate array for state of SMRR enable on all CPUs
-  //
-  mSmrrEnabled = (BOOLEAN *)AllocatePool (sizeof (BOOLEAN) * PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
-  ASSERT (mSmrrEnabled != NULL);
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Called during the very first SMI into System Management Mode to initialize
-  CPU features, including SMBASE, for the currently executing CPU.  Since this
-  is the first SMI, the SMRAM Save State Map is at the default address of
-  SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET.  The currently executing
-  CPU is specified by CpuIndex and CpuIndex can be used to access information
-  about the currently executing CPU in the ProcessorInfo array and the
-  HotPlugCpuData data structure.
-
-  @param[in] CpuIndex        The index of the CPU to initialize.  The value
-                             must be between 0 and the NumberOfCpus field in
-                             the System Management System Table (SMST).
-  @param[in] IsMonarch       TRUE if the CpuIndex is the index of the CPU that
-                             was elected as monarch during System Management
-                             Mode initialization.
-                             FALSE if the CpuIndex is not the index of the CPU
-                             that was elected as monarch during System
-                             Management Mode initialization.
-  @param[in] ProcessorInfo   Pointer to an array of EFI_PROCESSOR_INFORMATION
-                             structures.  ProcessorInfo[CpuIndex] contains the
-                             information for the currently executing CPU.
-  @param[in] CpuHotPlugData  Pointer to the CPU_HOT_PLUG_DATA structure that
-                             contains the ApidId and SmBase arrays.
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesInitializeProcessor (
-  IN UINTN                      CpuIndex,
-  IN BOOLEAN                    IsMonarch,
-  IN EFI_PROCESSOR_INFORMATION  *ProcessorInfo,
-  IN CPU_HOT_PLUG_DATA          *CpuHotPlugData
-  )
-{
-  SMRAM_SAVE_STATE_MAP  *CpuState;
-  UINT64                FeatureControl;
-  UINT32                RegEax;
-  UINT32                RegEdx;
-  UINTN                 FamilyId;
-  UINTN                 ModelId;
-
-  //
-  // Configure SMBASE.
-  //
-  CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
-  CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
-
-  //
-  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
-  // Volume 3C, Section 35.2 MSRs in the Intel(R) Core(TM) 2 Processor Family
-  //
-  // If Intel(R) Core(TM) Core(TM) 2 Processor Family MSRs are being used, then
-  // make sure SMRR Enable(BIT3) of MSR_FEATURE_CONTROL MSR(0x3A) is set before
-  // accessing SMRR base/mask MSRs.  If Lock(BIT0) of MSR_FEATURE_CONTROL MSR(0x3A)
-  // is set, then the MSR is locked and can not be modified.
-  //
-  if (mSmrrSupported && mSmrrPhysBaseMsr == SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE) {
-    FeatureControl = AsmReadMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL);
-    if ((FeatureControl & BIT3) == 0) {
-      if ((FeatureControl & BIT0) == 0) {
-        AsmWriteMsr64 (SMM_FEATURES_LIB_IA32_FEATURE_CONTROL, FeatureControl | BIT3);
-      } else {
-        mSmrrSupported = FALSE;
-      }
-    }
-  }
-
-  //
-  // If SMRR is supported, then program SMRR base/mask MSRs.
-  // The EFI_MSR_SMRR_PHYS_MASK_VALID bit is not set until the first normal SMI.
-  // The code that initializes SMM environment is running in normal mode
-  // from SMRAM region.  If SMRR is enabled here, then the SMRAM region
-  // is protected and the normal mode code execution will fail.
-  //
-  if (mSmrrSupported) {
-    //
-    // SMRR size cannot be less than 4-KBytes
-    // SMRR size must be of length 2^n
-    // SMRR base alignment cannot be less than SMRR length
-    //
-    if ((CpuHotPlugData->SmrrSize < SIZE_4KB) ||
-        (CpuHotPlugData->SmrrSize != GetPowerOfTwo32 (CpuHotPlugData->SmrrSize)) ||
-        ((CpuHotPlugData->SmrrBase & ~(CpuHotPlugData->SmrrSize - 1)) != CpuHotPlugData->SmrrBase)) {
-      //
-      // Print message and halt if CPU is Monarch
-      //
-      if (IsMonarch) {
-        DEBUG ((DEBUG_ERROR, "SMM Base/Size does not meet alignment/size requirement!\n"));
-        CpuDeadLoop ();
-      }
-    } else {
-      AsmWriteMsr64 (mSmrrPhysBaseMsr, CpuHotPlugData->SmrrBase | MTRR_CACHE_WRITE_BACK);
-      AsmWriteMsr64 (mSmrrPhysMaskMsr, (~(CpuHotPlugData->SmrrSize - 1) & EFI_MSR_SMRR_MASK));
-      mSmrrEnabled[CpuIndex] = FALSE;
-    }
-  }
-
-  //
-  // Retrieve CPU Family and Model
-  //
-  AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);
-  FamilyId = (RegEax >> 8) & 0xf;
-  ModelId  = (RegEax >> 4) & 0xf;
-  if (FamilyId == 0x06 || FamilyId == 0x0f) {
-    ModelId = ModelId | ((RegEax >> 12) & 0xf0);
-  }
-
-  //
-  // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
-  // Volume 3C, Section 35.10.1 MSRs in 4th Generation Intel(R) Core(TM)
-  // Processor Family.
-  //
-  // If CPU Family/Model is 06_3C, 06_45, or 06_46 then use 4th Generation
-  // Intel(R) Core(TM) Processor Family MSRs.
-  //
-  if (FamilyId == 0x06) {
-    if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46) {
-      //
-      // Check to see if the CPU supports the SMM Code Access Check feature
-      // Do not access this MSR unless the CPU supports the SmmRegFeatureControl
-      //
-      if ((AsmReadMsr64 (SMM_FEATURES_LIB_IA32_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) != 0) {
-        mSmmFeatureControlSupported = TRUE;
-      }
-    }
-  }
-
-  //
-  //  Call internal worker function that completes the CPU initialization
-  //
-  FinishSmmCpuFeaturesInitializeProcessor ();
-}
-
-/**
-  This function updates the SMRAM save state on the currently executing CPU
-  to resume execution at a specific address after an RSM instruction.  This
-  function must evaluate the SMRAM save state to determine the execution mode
-  the RSM instruction resumes and update the resume execution address with
-  either NewInstructionPointer32 or NewInstructionPoint.  The auto HALT restart
-  flag in the SMRAM save state must always be cleared.  This function returns
-  the value of the instruction pointer from the SMRAM save state that was
-  replaced.  If this function returns 0, then the SMRAM save state was not
-  modified.
-
-  This function is called during the very first SMI on each CPU after
-  SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode
-  to signal that the SMBASE of each CPU has been updated before the default
-  SMBASE address is used for the first SMI to the next CPU.
-
-  @param[in] CpuIndex                 The index of the CPU to hook.  The value
-                                      must be between 0 and the NumberOfCpus
-                                      field in the System Management System Table
-                                      (SMST).
-  @param[in] CpuState                 Pointer to SMRAM Save State Map for the
-                                      currently executing CPU.
-  @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to
-                                      32-bit execution mode from 64-bit SMM.
-  @param[in] NewInstructionPointer    Instruction pointer to use if resuming to
-                                      same execution mode as SMM.
-
-  @retval 0    This function did modify the SMRAM save state.
-  @retval > 0  The original instruction pointer value from the SMRAM save state
-               before it was replaced.
-**/
-UINT64
-EFIAPI
-SmmCpuFeaturesHookReturnFromSmm (
-  IN UINTN                 CpuIndex,
-  IN SMRAM_SAVE_STATE_MAP  *CpuState,
-  IN UINT64                NewInstructionPointer32,
-  IN UINT64                NewInstructionPointer
-  )
-{
-  return 0;
-}
-
-/**
-  Hook point in normal execution mode that allows the one CPU that was elected
-  as monarch during System Management Mode initialization to perform additional
-  initialization actions immediately after all of the CPUs have processed their
-  first SMI and called SmmCpuFeaturesInitializeProcessor() relocating SMBASE
-  into a buffer in SMRAM and called SmmCpuFeaturesHookReturnFromSmm().
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesSmmRelocationComplete (
-  VOID
-  )
-{
-}
-
-/**
-  Determines if MTRR registers must be configured to set SMRAM cache-ability
-  when executing in System Management Mode.
-
-  @retval TRUE   MTRR registers must be configured to set SMRAM cache-ability.
-  @retval FALSE  MTRR registers do not need to be configured to set SMRAM
-                 cache-ability.
-**/
-BOOLEAN
-EFIAPI
-SmmCpuFeaturesNeedConfigureMtrrs (
-  VOID
-  )
-{
-  return mNeedConfigureMtrrs;
-}
-
-/**
-  Disable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()
-  returns TRUE.
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesDisableSmrr (
-  VOID
-  )
-{
-  if (mSmrrSupported && mNeedConfigureMtrrs) {
-    AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64(mSmrrPhysMaskMsr) & ~EFI_MSR_SMRR_PHYS_MASK_VALID);
-  }
-}
-
-/**
-  Enable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()
-  returns TRUE.
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesReenableSmrr (
-  VOID
-  )
-{
-  if (mSmrrSupported && mNeedConfigureMtrrs) {
-    AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64(mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
-  }
-}
-
-/**
-  Processor specific hook point each time a CPU enters System Management Mode.
-
-  @param[in] CpuIndex  The index of the CPU that has entered SMM.  The value
-                       must be between 0 and the NumberOfCpus field in the
-                       System Management System Table (SMST).
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesRendezvousEntry (
-  IN UINTN  CpuIndex
-  )
-{
-  //
-  // If SMRR is supported and this is the first normal SMI, then enable SMRR
-  //
-  if (mSmrrSupported && !mSmrrEnabled[CpuIndex]) {
-    AsmWriteMsr64 (mSmrrPhysMaskMsr, AsmReadMsr64 (mSmrrPhysMaskMsr) | EFI_MSR_SMRR_PHYS_MASK_VALID);
-    mSmrrEnabled[CpuIndex] = TRUE;
-  }
-}
-
-/**
-  Processor specific hook point each time a CPU exits System Management Mode.
-
-  @param[in] CpuIndex  The index of the CPU that is exiting SMM.  The value must
-                       be between 0 and the NumberOfCpus field in the System
-                       Management System Table (SMST).
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesRendezvousExit (
-  IN UINTN  CpuIndex
-  )
-{
-}
-
-/**
-  Check to see if an SMM register is supported by a specified CPU.
-
-  @param[in] CpuIndex  The index of the CPU to check for SMM register support.
-                       The value must be between 0 and the NumberOfCpus field
-                       in the System Management System Table (SMST).
-  @param[in] RegName   Identifies the SMM register to check for support.
-
-  @retval TRUE   The SMM register specified by RegName is supported by the CPU
-                 specified by CpuIndex.
-  @retval FALSE  The SMM register specified by RegName is not supported by the
-                 CPU specified by CpuIndex.
-**/
-BOOLEAN
-EFIAPI
-SmmCpuFeaturesIsSmmRegisterSupported (
-  IN UINTN         CpuIndex,
-  IN SMM_REG_NAME  RegName
-  )
-{
-  if (mSmmFeatureControlSupported && RegName == SmmRegFeatureControl) {
-    return TRUE;
-  }
-  return FALSE;
-}
-
-/**
-  Returns the current value of the SMM register for the specified CPU.
-  If the SMM register is not supported, then 0 is returned.
-
-  @param[in] CpuIndex  The index of the CPU to read the SMM register.  The
-                       value must be between 0 and the NumberOfCpus field in
-                       the System Management System Table (SMST).
-  @param[in] RegName   Identifies the SMM register to read.
-
-  @return  The value of the SMM register specified by RegName from the CPU
-           specified by CpuIndex.
-**/
-UINT64
-EFIAPI
-SmmCpuFeaturesGetSmmRegister (
-  IN UINTN         CpuIndex,
-  IN SMM_REG_NAME  RegName
-  )
-{
-  if (mSmmFeatureControlSupported && RegName == SmmRegFeatureControl) {
-    return AsmReadMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL);
-  }
-  return 0;
-}
-
-/**
-  Sets the value of an SMM register on a specified CPU.
-  If the SMM register is not supported, then no action is performed.
-
-  @param[in] CpuIndex  The index of the CPU to write the SMM register.  The
-                       value must be between 0 and the NumberOfCpus field in
-                       the System Management System Table (SMST).
-  @param[in] RegName   Identifies the SMM register to write.
-                       registers are read-only.
-  @param[in] Value     The value to write to the SMM register.
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesSetSmmRegister (
-  IN UINTN         CpuIndex,
-  IN SMM_REG_NAME  RegName,
-  IN UINT64        Value
-  )
-{
-  if (mSmmFeatureControlSupported && RegName == SmmRegFeatureControl) {
-    AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value);
-  }
-}
-
-/**
-  Read an SMM Save State register on the target processor.  If this function
-  returns EFI_UNSUPPORTED, then the caller is responsible for reading the
-  SMM Save Sate register.
-
-  @param[in]  CpuIndex  The index of the CPU to read the SMM Save State.  The
-                        value must be between 0 and the NumberOfCpus field in
-                        the System Management System Table (SMST).
-  @param[in]  Register  The SMM Save State register to read.
-  @param[in]  Width     The number of bytes to read from the CPU save state.
-  @param[out] Buffer    Upon return, this holds the CPU register value read
-                        from the save state.
-
-  @retval EFI_SUCCESS           The register was read from Save State.
-  @retval EFI_INVALID_PARAMTER  Buffer is NULL.
-  @retval EFI_UNSUPPORTED       This function does not support reading Register.
-
-**/
-EFI_STATUS
-EFIAPI
-SmmCpuFeaturesReadSaveStateRegister (
-  IN  UINTN                        CpuIndex,
-  IN  EFI_SMM_SAVE_STATE_REGISTER  Register,
-  IN  UINTN                        Width,
-  OUT VOID                         *Buffer
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  Writes an SMM Save State register on the target processor.  If this function
-  returns EFI_UNSUPPORTED, then the caller is responsible for writing the
-  SMM Save Sate register.
-
-  @param[in] CpuIndex  The index of the CPU to write the SMM Save State.  The
-                       value must be between 0 and the NumberOfCpus field in
-                       the System Management System Table (SMST).
-  @param[in] Register  The SMM Save State register to write.
-  @param[in] Width     The number of bytes to write to the CPU save state.
-  @param[in] Buffer    Upon entry, this holds the new CPU register value.
-
-  @retval EFI_SUCCESS           The register was written to Save State.
-  @retval EFI_INVALID_PARAMTER  Buffer is NULL.
-  @retval EFI_UNSUPPORTED       This function does not support writing Register.
-**/
-EFI_STATUS
-EFIAPI
-SmmCpuFeaturesWriteSaveStateRegister (
-  IN UINTN                        CpuIndex,
-  IN EFI_SMM_SAVE_STATE_REGISTER  Register,
-  IN UINTN                        Width,
-  IN CONST VOID                   *Buffer
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  This function is hook point called after the gEfiSmmReadyToLockProtocolGuid
-  notification is completely processed.
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesCompleteSmmReadyToLock (
-  VOID
-  )
-{
-}
-
-/**
-  This API provides a method for a CPU to allocate a specific region for storing page tables.
-
-  This API can be called more once to allocate memory for page tables.
-
-  Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
-  allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL
-  is returned.  If there is not enough memory remaining to satisfy the request, then NULL is
-  returned.
-
-  This function can also return NULL if there is no preference on where the page tables are allocated in SMRAM.
-
-  @param  Pages                 The number of 4 KB pages to allocate.
-
-  @return A pointer to the allocated buffer for page tables.
-  @retval NULL      Fail to allocate a specific region for storing page tables,
-                    Or there is no preference on where the page tables are allocated in SMRAM.
-
-**/
-VOID *
-EFIAPI
-SmmCpuFeaturesAllocatePageTableMemory (
-  IN UINTN           Pages
-  )
-{
-  return NULL;
-}
-
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
deleted file mode 100644
index 77908b0366..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
+++ /dev/null
@@ -1,40 +0,0 @@
-## @file
-#  The CPU specific programming for PiSmmCpuDxeSmm module.
-#
-#  Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SmmCpuFeaturesLib
-  MODULE_UNI_FILE                = SmmCpuFeaturesLib.uni
-  FILE_GUID                      = FC3DC10D-D271-422a-AFF3-CBCF70344431
-  MODULE_TYPE                    = DXE_SMM_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = SmmCpuFeaturesLib
-  CONSTRUCTOR                    = SmmCpuFeaturesLibConstructor
-
-[Sources]
-  SmmCpuFeaturesLib.c
-  SmmCpuFeaturesLibNoStm.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  PcdLib
-  MemoryAllocationLib
-  DebugLib
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber        ## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.uni b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.uni
deleted file mode 100644
index 322aa8bb5a..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.uni
+++ /dev/null
@@ -1,18 +0,0 @@
-// /** @file
-// The CPU specific programming for PiSmmCpuDxeSmm module.
-//
-// Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-#string STR_MODULE_ABSTRACT             #language en-US "The CPU specific programming for PiSmmCpuDxeSmm module."
-
-#string STR_MODULE_DESCRIPTION          #language en-US "The CPU specific programming for PiSmmCpuDxeSmm module."
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibNoStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibNoStm.c
deleted file mode 100644
index 5276856797..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibNoStm.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/** @file
-The CPU specific programming for PiSmmCpuDxeSmm module when STM support
-is not included.
-
-Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution.  The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiSmm.h>
-#include <Library/SmmCpuFeaturesLib.h>
-
-/**
-  Internal worker function that is called to complete CPU initialization at the
-  end of SmmCpuFeaturesInitializeProcessor().
-
-**/
-VOID
-FinishSmmCpuFeaturesInitializeProcessor (
-  VOID
-  )
-{
-}
-
-/**
-  Return the size, in bytes, of a custom SMI Handler in bytes.  If 0 is
-  returned, then a custom SMI handler is not provided by this library,
-  and the default SMI handler must be used.
-
-  @retval 0    Use the default SMI handler.
-  @retval > 0  Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler()
-               The caller is required to allocate enough SMRAM for each CPU to
-               support the size of the custom SMI handler.
-**/
-UINTN
-EFIAPI
-SmmCpuFeaturesGetSmiHandlerSize (
-  VOID
-  )
-{
-  return 0;
-}
-
-/**
-  Install a custom SMI handler for the CPU specified by CpuIndex.  This function
-  is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater
-  than zero and is called by the CPU that was elected as monarch during System
-  Management Mode initialization.
-
-  @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
-                        The value must be between 0 and the NumberOfCpus field
-                        in the System Management System Table (SMST).
-  @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
-  @param[in] SmiStack   The stack to use when an SMI is processed by the
-                        the CPU specified by CpuIndex.
-  @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] GdtBase    The base address of the GDT to use when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] IdtBase    The base address of the IDT to use when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] Cr3        The base address of the page tables to use when an SMI
-                        is processed by the CPU specified by CpuIndex.
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesInstallSmiHandler (
-  IN UINTN   CpuIndex,
-  IN UINT32  SmBase,
-  IN VOID    *SmiStack,
-  IN UINTN   StackSize,
-  IN UINTN   GdtBase,
-  IN UINTN   GdtSize,
-  IN UINTN   IdtBase,
-  IN UINTN   IdtSize,
-  IN UINT32  Cr3
-  )
-{
-}
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf
deleted file mode 100644
index db8dcdcff4..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf
+++ /dev/null
@@ -1,88 +0,0 @@
-## @file
-#  The CPU specific programming for PiSmmCpuDxeSmm module when STM support
-#  is included.
-#
-#  Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SmmCpuFeaturesLibStm
-  MODULE_UNI_FILE                = SmmCpuFeaturesLib.uni
-  FILE_GUID                      = 374DE830-81C5-4CC8-B2AB-28F0AB73710B
-  MODULE_TYPE                    = DXE_SMM_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = SmmCpuFeaturesLib
-  CONSTRUCTOR                    = SmmCpuFeaturesLibStmConstructor
-
-[Sources]
-  SmmCpuFeaturesLib.c
-  SmmStm.c
-  SmmStm.h
-
-[Sources.Ia32]
-  Ia32/SmmStmSupport.c
-
-  Ia32/SmiEntry.asm
-  Ia32/SmiException.asm
-
-  Ia32/SmiEntry.nasm
-  Ia32/SmiException.nasm
-
-  Ia32/SmiEntry.S
-  Ia32/SmiException.S
-
-[Sources.X64]
-  X64/SmmStmSupport.c
-
-  X64/SmiEntry.asm
-  X64/SmiException.asm
-
-  X64/SmiEntry.nasm
-  X64/SmiException.nasm
-
-  X64/SmiEntry.S
-  X64/SmiException.S
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  PcdLib
-  HobLib
-  MemoryAllocationLib
-  DebugLib
-  UefiBootServicesTableLib
-  SmmServicesTableLib
-  TpmMeasurementLib
-
-[Protocols]
-  gEfiMpServiceProtocolGuid                ## CONSUMES
-  gEfiSmmEndOfDxeProtocolGuid              ## CONSUMES
-  gEfiSmMonitorInitProtocolGuid            ## PRODUCES
-
-[Guids]
-  gMsegSmramGuid                           ## SOMETIMES_CONSUMES ## HOB
-  gEfiAcpi20TableGuid                      ## SOMETIMES_CONSUMES ## SystemTable
-  gEfiAcpi10TableGuid                      ## SOMETIMES_CONSUMES ## SystemTable
-
-[Pcd]
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber        ## SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuMsegSize                         ## SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStmExceptionStackSize         ## SOMETIMES_CONSUMES
-  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard                    ## CONSUMES
-
-[Depex]
-  gEfiMpServiceProtocolGuid
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
deleted file mode 100644
index 03937dcbe2..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ /dev/null
@@ -1,1299 +0,0 @@
-/** @file
-  SMM STM support functions
-
-  Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiSmm.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/HobLib.h>
-#include <Library/DebugLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/SmmServicesTableLib.h>
-#include <Library/TpmMeasurementLib.h>
-#include <Register/Cpuid.h>
-#include <Register/ArchitecturalMsr.h>
-#include <Register/SmramSaveStateMap.h>
-
-#include <Protocol/MpService.h>
-
-#include "SmmStm.h"
-
-#define TXT_EVTYPE_BASE                  0x400
-#define TXT_EVTYPE_STM_HASH              (TXT_EVTYPE_BASE + 14)
-
-#define RDWR_ACCS             3
-#define FULL_ACCS             7
-
-/**
-  The constructor function
-
-  @param[in]  ImageHandle  The firmware allocated handle for the EFI image.
-  @param[in]  SystemTable  A pointer to the EFI System Table.
-
-  @retval EFI_SUCCESS      The constructor always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-SmmCpuFeaturesLibConstructor (
-  IN EFI_HANDLE        ImageHandle,
-  IN EFI_SYSTEM_TABLE  *SystemTable
-  );
-
-EFI_HANDLE  mStmSmmCpuHandle = NULL;
-
-BOOLEAN mLockLoadMonitor = FALSE;
-
-//
-// Template of STM_RSC_END structure for copying.
-//
-GLOBAL_REMOVE_IF_UNREFERENCED STM_RSC_END mRscEndNode = {
-  {END_OF_RESOURCES, sizeof (STM_RSC_END)},
-};
-
-GLOBAL_REMOVE_IF_UNREFERENCED UINT8  *mStmResourcesPtr         = NULL;
-GLOBAL_REMOVE_IF_UNREFERENCED UINTN  mStmResourceTotalSize     = 0x0;
-GLOBAL_REMOVE_IF_UNREFERENCED UINTN  mStmResourceSizeUsed      = 0x0;
-GLOBAL_REMOVE_IF_UNREFERENCED UINTN  mStmResourceSizeAvailable = 0x0;
-
-GLOBAL_REMOVE_IF_UNREFERENCED UINT32  mStmState = 0;
-
-//
-// System Configuration Table pointing to STM Configuration Table
-//
-GLOBAL_REMOVE_IF_UNREFERENCED
-EFI_SM_MONITOR_INIT_PROTOCOL mSmMonitorInitProtocol = {
-  LoadMonitor,
-  AddPiResource,
-  DeletePiResource,
-  GetPiResource,
-  GetMonitorState,
-};
-
-
-
-
-#define   CPUID1_EDX_XD_SUPPORT      0x100000
-
-//
-// External global variables associated with SMI Handler Template
-//
-extern CONST TXT_PROCESSOR_SMM_DESCRIPTOR  gcStmPsd;
-extern UINT32                              gStmSmbase;
-extern volatile UINT32                     gStmSmiStack;
-extern UINT32                              gStmSmiCr3;
-extern volatile UINT8                      gcStmSmiHandlerTemplate[];
-extern CONST UINT16                        gcStmSmiHandlerSize;
-extern UINT16                              gcStmSmiHandlerOffset;
-extern BOOLEAN                             gStmXdSupported;
-
-//
-// Variables used by SMI Handler
-//
-IA32_DESCRIPTOR  gStmSmiHandlerIdtr;
-
-//
-// MP Services Protocol
-//
-EFI_MP_SERVICES_PROTOCOL  *mSmmCpuFeaturesLibMpService = NULL;
-
-//
-// MSEG Base and Length in SMRAM
-//
-UINTN  mMsegBase = 0;
-UINTN  mMsegSize = 0;
-
-BOOLEAN  mStmConfigurationTableInitialized = FALSE;
-
-
-/**
-  The constructor function
-
-  @param[in]  ImageHandle  The firmware allocated handle for the EFI image.
-  @param[in]  SystemTable  A pointer to the EFI System Table.
-
-  @retval EFI_SUCCESS      The constructor always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-SmmCpuFeaturesLibStmConstructor (
-  IN EFI_HANDLE        ImageHandle,
-  IN EFI_SYSTEM_TABLE  *SystemTable
-  )
-{
-  EFI_STATUS              Status;
-  CPUID_VERSION_INFO_ECX  RegEcx;
-  EFI_HOB_GUID_TYPE       *GuidHob;
-  EFI_SMRAM_DESCRIPTOR    *SmramDescriptor;
-
-  //
-  // Call the common constructor function
-  //
-  Status = SmmCpuFeaturesLibConstructor (ImageHandle, SystemTable);
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // Lookup the MP Services Protocol
-  //
-  Status = gBS->LocateProtocol (
-                  &gEfiMpServiceProtocolGuid,
-                  NULL,
-                  (VOID **)&mSmmCpuFeaturesLibMpService
-                  );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  // If CPU supports VMX, then determine SMRAM range for MSEG.
-  //
-  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx.Uint32, NULL);
-  if (RegEcx.Bits.VMX == 1) {
-    GuidHob = GetFirstGuidHob (&gMsegSmramGuid);
-    if (GuidHob != NULL) {
-      //
-      // Retrieve MSEG location from MSEG SRAM HOB
-      //
-      SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);
-      if (SmramDescriptor->PhysicalSize > 0) {
-        mMsegBase       = (UINTN)SmramDescriptor->CpuStart;
-        mMsegSize       = (UINTN)SmramDescriptor->PhysicalSize;
-      }
-    } else if (PcdGet32 (PcdCpuMsegSize) > 0) {
-      //
-      // Allocate MSEG from SMRAM memory
-      //
-      mMsegBase = (UINTN)AllocatePages (EFI_SIZE_TO_PAGES (PcdGet32 (PcdCpuMsegSize)));
-      if (mMsegBase > 0) {
-        mMsegSize = ALIGN_VALUE (PcdGet32 (PcdCpuMsegSize), EFI_PAGE_SIZE);
-      } else {
-        DEBUG ((DEBUG_ERROR, "Not enough SMRAM resource to allocate MSEG size %08x\n", PcdGet32 (PcdCpuMsegSize)));
-      }
-    }
-    if (mMsegBase > 0) {
-      DEBUG ((DEBUG_INFO, "MsegBase: 0x%08x, MsegSize: 0x%08x\n", mMsegBase, mMsegSize));
-    }
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
-  Internal worker function that is called to complete CPU initialization at the
-  end of SmmCpuFeaturesInitializeProcessor().
-
-**/
-VOID
-FinishSmmCpuFeaturesInitializeProcessor (
-  VOID
-  )
-{
-  MSR_IA32_SMM_MONITOR_CTL_REGISTER  SmmMonitorCtl;
-
-  //
-  // Set MSEG Base Address in SMM Monitor Control MSR.
-  //
-  if (mMsegBase > 0) {
-    SmmMonitorCtl.Uint64        = 0;
-    SmmMonitorCtl.Bits.MsegBase = (UINT32)mMsegBase >> 12;
-    SmmMonitorCtl.Bits.Valid    = 1;
-    AsmWriteMsr64 (MSR_IA32_SMM_MONITOR_CTL, SmmMonitorCtl.Uint64);
-  }
-}
-
-/**
-  Return the size, in bytes, of a custom SMI Handler in bytes.  If 0 is
-  returned, then a custom SMI handler is not provided by this library,
-  and the default SMI handler must be used.
-
-  @retval 0    Use the default SMI handler.
-  @retval > 0  Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler()
-               The caller is required to allocate enough SMRAM for each CPU to
-               support the size of the custom SMI handler.
-**/
-UINTN
-EFIAPI
-SmmCpuFeaturesGetSmiHandlerSize (
-  VOID
-  )
-{
-  return gcStmSmiHandlerSize;
-}
-
-/**
-  Install a custom SMI handler for the CPU specified by CpuIndex.  This function
-  is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater
-  than zero and is called by the CPU that was elected as monarch during System
-  Management Mode initialization.
-
-  @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.
-                        The value must be between 0 and the NumberOfCpus field
-                        in the System Management System Table (SMST).
-  @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.
-  @param[in] SmiStack   The stack to use when an SMI is processed by the
-                        the CPU specified by CpuIndex.
-  @param[in] StackSize  The size, in bytes, if the stack used when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] GdtBase    The base address of the GDT to use when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] IdtBase    The base address of the IDT to use when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is
-                        processed by the CPU specified by CpuIndex.
-  @param[in] Cr3        The base address of the page tables to use when an SMI
-                        is processed by the CPU specified by CpuIndex.
-**/
-VOID
-EFIAPI
-SmmCpuFeaturesInstallSmiHandler (
-  IN UINTN   CpuIndex,
-  IN UINT32  SmBase,
-  IN VOID    *SmiStack,
-  IN UINTN   StackSize,
-  IN UINTN   GdtBase,
-  IN UINTN   GdtSize,
-  IN UINTN   IdtBase,
-  IN UINTN   IdtSize,
-  IN UINT32  Cr3
-  )
-{
-  EFI_STATUS                     Status;
-  TXT_PROCESSOR_SMM_DESCRIPTOR   *Psd;
-  VOID                           *Hob;
-  UINT32                         RegEax;
-  UINT32                         RegEdx;
-  EFI_PROCESSOR_INFORMATION      ProcessorInfo;
-
-  CopyMem ((VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));
-  Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET);
-  Psd->SmmGdtPtr = GdtBase;
-  Psd->SmmGdtSize = (UINT32)GdtSize;
-
-  //
-  // Initialize values in template before copy
-  //
-  gStmSmiStack             = (UINT32)((UINTN)SmiStack + StackSize - sizeof (UINTN));
-  gStmSmiCr3               = Cr3;
-  gStmSmbase               = SmBase;
-  gStmSmiHandlerIdtr.Base  = IdtBase;
-  gStmSmiHandlerIdtr.Limit = (UINT16)(IdtSize - 1);
-
-  if (gStmXdSupported) {
-    AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
-    if (RegEax <= CPUID_EXTENDED_FUNCTION) {
-      //
-      // Extended CPUID functions are not supported on this processor.
-      //
-      gStmXdSupported = FALSE;
-    }
-
-    AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx);
-    if ((RegEdx & CPUID1_EDX_XD_SUPPORT) == 0) {
-      //
-      // Execute Disable Bit feature is not supported on this processor.
-      //
-      gStmXdSupported = FALSE;
-    }
-  }
-
-  //
-  // Set the value at the top of the CPU stack to the CPU Index
-  //
-  *(UINTN*)(UINTN)gStmSmiStack = CpuIndex;
-
-  //
-  // Copy template to CPU specific SMI handler location
-  //
-  CopyMem (
-    (VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),
-    (VOID*)gcStmSmiHandlerTemplate,
-    gcStmSmiHandlerSize
-    );
-
-  Psd->SmmSmiHandlerRip = SmBase + SMM_HANDLER_OFFSET + gcStmSmiHandlerOffset;
-  Psd->SmmSmiHandlerRsp = (UINTN)SmiStack + StackSize - sizeof(UINTN);
-  Psd->SmmCr3           = Cr3;
-
-  DEBUG((DEBUG_ERROR, "CpuSmmStmExceptionStackSize - %x\n", PcdGet32(PcdCpuSmmStmExceptionStackSize)));
-  DEBUG((DEBUG_ERROR, "Pages - %x\n", EFI_SIZE_TO_PAGES(PcdGet32(PcdCpuSmmStmExceptionStackSize))));
-  Psd->StmProtectionExceptionHandler.SpeRsp = (UINT64)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (PcdGet32 (PcdCpuSmmStmExceptionStackSize)));
-  Psd->StmProtectionExceptionHandler.SpeRsp += EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (PcdGet32 (PcdCpuSmmStmExceptionStackSize)));
-
-  Psd->BiosHwResourceRequirementsPtr        = (UINT64)(UINTN)GetStmResource ();
-
-  //
-  // Get the APIC ID for the CPU specified by CpuIndex
-  //
-  Status = mSmmCpuFeaturesLibMpService->GetProcessorInfo (
-             mSmmCpuFeaturesLibMpService,
-             CpuIndex,
-             &ProcessorInfo
-             );
-  ASSERT_EFI_ERROR (Status);
-
-  Psd->LocalApicId = (UINT32)ProcessorInfo.ProcessorId;
-  Psd->AcpiRsdp = 0;
-
-  Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
-  if (Hob != NULL) {
-    Psd->PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
-  } else {
-    AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
-    if (RegEax >= 0x80000008) {
-      AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-      Psd->PhysicalAddressBits = (UINT8) RegEax;
-    } else {
-      Psd->PhysicalAddressBits = 36;
-    }
-  }
-
-  if (!mStmConfigurationTableInitialized) {
-    StmSmmConfigurationTableInit ();
-    mStmConfigurationTableInitialized = TRUE;
-  }
-}
-
-/**
-  SMM End Of Dxe event notification handler.
-
-  STM support need patch AcpiRsdp in TXT_PROCESSOR_SMM_DESCRIPTOR.
-
-  @param[in] Protocol   Points to the protocol's unique identifier.
-  @param[in] Interface  Points to the interface instance.
-  @param[in] Handle     The handle on which the interface was installed.
-
-  @retval EFI_SUCCESS   Notification handler runs successfully.
-**/
-EFI_STATUS
-EFIAPI
-SmmEndOfDxeEventNotify (
-  IN CONST EFI_GUID  *Protocol,
-  IN VOID            *Interface,
-  IN EFI_HANDLE      Handle
-  )
-{
-  VOID                          *Rsdp;
-  UINTN                         Index;
-  TXT_PROCESSOR_SMM_DESCRIPTOR  *Psd;
-
-  DEBUG ((DEBUG_INFO, "SmmEndOfDxeEventNotify\n"));
-
-  //
-  // found ACPI table RSD_PTR from system table
-  //
-  Rsdp = NULL;
-  for (Index = 0; Index < gST->NumberOfTableEntries; Index++) {
-    if (CompareGuid (&(gST->ConfigurationTable[Index].VendorGuid), &gEfiAcpi20TableGuid)) {
-      //
-      // A match was found.
-      //
-      Rsdp = gST->ConfigurationTable[Index].VendorTable;
-      break;
-    }
-  }
-  if (Rsdp == NULL) {
-    for (Index = 0; Index < gST->NumberOfTableEntries; Index++) {
-      if (CompareGuid (&(gST->ConfigurationTable[Index].VendorGuid), &gEfiAcpi10TableGuid)) {
-        //
-        // A match was found.
-        //
-        Rsdp = gST->ConfigurationTable[Index].VendorTable;
-        break;
-      }
-    }
-  }
-
-  for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
-    Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)((UINTN)gSmst->CpuSaveState[Index] - SMRAM_SAVE_STATE_MAP_OFFSET + TXT_SMM_PSD_OFFSET);
-    DEBUG ((DEBUG_INFO, "Index=%d  Psd=%p  Rsdp=%p\n", Index, Psd, Rsdp));
-    Psd->AcpiRsdp = (UINT64)(UINTN)Rsdp;
-  }
-
-  mLockLoadMonitor = TRUE;
-
-  return EFI_SUCCESS;
-}
-
-/**
-  This function initializes the STM configuration table.
-**/
-VOID
-StmSmmConfigurationTableInit (
-  VOID
-  )
-{
-  EFI_STATUS    Status;
-    VOID        *Registration;
-
-  Status = gSmst->SmmInstallProtocolInterface (
-                    &mStmSmmCpuHandle,
-                    &gEfiSmMonitorInitProtocolGuid,
-                    EFI_NATIVE_INTERFACE,
-                    &mSmMonitorInitProtocol
-                    );
-  ASSERT_EFI_ERROR (Status);
-
-  //
-  //
-  // Register SMM End of DXE Event
-  //
-  Status = gSmst->SmmRegisterProtocolNotify (
-                    &gEfiSmmEndOfDxeProtocolGuid,
-                    SmmEndOfDxeEventNotify,
-                    &Registration
-                    );
-  ASSERT_EFI_ERROR (Status);
-}
-
-/**
-
-  Get STM state.
-
-  @return STM state
-
-**/
-EFI_SM_MONITOR_STATE
-EFIAPI
-GetMonitorState (
-  VOID
-  )
-{
-  return mStmState;
-}
-
-/**
-
-  Handle single Resource to see if it can be merged into Record.
-
-  @param Resource  A pointer to resource node to be added
-  @param Record    A pointer to record node to be merged
-
-  @retval TRUE  resource handled
-  @retval FALSE resource is not handled
-
-**/
-BOOLEAN
-HandleSingleResource (
-  IN  STM_RSC      *Resource,
-  IN  STM_RSC      *Record
-  )
-{
-  UINT64      ResourceLo;
-  UINT64      ResourceHi;
-  UINT64      RecordLo;
-  UINT64      RecordHi;
-
-  ResourceLo = 0;
-  ResourceHi = 0;
-  RecordLo = 0;
-  RecordHi = 0;
-
-  //
-  // Calling code is responsible for making sure that
-  // Resource->Header.RscType == (*Record)->Header.RscType
-  // thus we use just one of them as switch variable.
-  //
-  switch (Resource->Header.RscType) {
-  case MEM_RANGE:
-  case MMIO_RANGE:
-    ResourceLo = Resource->Mem.Base;
-    ResourceHi = Resource->Mem.Base + Resource->Mem.Length;
-    RecordLo = Record->Mem.Base;
-    RecordHi = Record->Mem.Base + Record->Mem.Length;
-    if (Resource->Mem.RWXAttributes != Record->Mem.RWXAttributes) {
-      if ((ResourceLo == RecordLo) && (ResourceHi == RecordHi)) {
-        Record->Mem.RWXAttributes = Resource->Mem.RWXAttributes | Record->Mem.RWXAttributes;
-        return TRUE;
-      } else {
-        return FALSE;
-      }
-    }
-    break;
-  case IO_RANGE:
-  case TRAPPED_IO_RANGE:
-    ResourceLo = (UINT64) Resource->Io.Base;
-    ResourceHi = (UINT64) Resource->Io.Base + (UINT64) Resource->Io.Length;
-    RecordLo = (UINT64) Record->Io.Base;
-    RecordHi = (UINT64) Record->Io.Base + (UINT64) Record->Io.Length;
-    break;
-  case PCI_CFG_RANGE:
-    if ((Resource->PciCfg.OriginatingBusNumber != Record->PciCfg.OriginatingBusNumber) ||
-        (Resource->PciCfg.LastNodeIndex != Record->PciCfg.LastNodeIndex)) {
-      return FALSE;
-    }
-    if (CompareMem (Resource->PciCfg.PciDevicePath, Record->PciCfg.PciDevicePath, sizeof(STM_PCI_DEVICE_PATH_NODE) * (Resource->PciCfg.LastNodeIndex + 1)) != 0) {
-      return FALSE;
-    }
-    ResourceLo = (UINT64) Resource->PciCfg.Base;
-    ResourceHi = (UINT64) Resource->PciCfg.Base + (UINT64) Resource->PciCfg.Length;
-    RecordLo = (UINT64) Record->PciCfg.Base;
-    RecordHi = (UINT64) Record->PciCfg.Base + (UINT64) Record->PciCfg.Length;
-    if (Resource->PciCfg.RWAttributes != Record->PciCfg.RWAttributes) {
-      if ((ResourceLo == RecordLo) && (ResourceHi == RecordHi)) {
-        Record->PciCfg.RWAttributes = Resource->PciCfg.RWAttributes | Record->PciCfg.RWAttributes;
-        return TRUE;
-      } else {
-        return FALSE;
-      }
-    }
-    break;
-  case MACHINE_SPECIFIC_REG:
-    //
-    // Special case - merge MSR masks in place.
-    //
-    if (Resource->Msr.MsrIndex != Record->Msr.MsrIndex) {
-      return FALSE;
-    }
-    Record->Msr.ReadMask |= Resource->Msr.ReadMask;
-    Record->Msr.WriteMask |= Resource->Msr.WriteMask;
-    return TRUE;
-  default:
-    return FALSE;
-  }
-  //
-  // If resources are disjoint
-  //
-  if ((ResourceHi < RecordLo) || (ResourceLo > RecordHi)) {
-    return FALSE;
-  }
-
-  //
-  // If resource is consumed by record.
-  //
-  if ((ResourceLo >= RecordLo) && (ResourceHi <= RecordHi)) {
-    return TRUE;
-  }
-  //
-  // Resources are overlapping.
-  // Resource and record are merged.
-  //
-  ResourceLo = (ResourceLo < RecordLo) ? ResourceLo : RecordLo;
-  ResourceHi = (ResourceHi > RecordHi) ? ResourceHi : RecordHi;
-
-  switch (Resource->Header.RscType) {
-  case MEM_RANGE:
-  case MMIO_RANGE:
-    Record->Mem.Base = ResourceLo;
-    Record->Mem.Length = ResourceHi - ResourceLo;
-    break;
-  case IO_RANGE:
-  case TRAPPED_IO_RANGE:
-    Record->Io.Base = (UINT16) ResourceLo;
-    Record->Io.Length = (UINT16) (ResourceHi - ResourceLo);
-    break;
-  case PCI_CFG_RANGE:
-    Record->PciCfg.Base = (UINT16) ResourceLo;
-    Record->PciCfg.Length = (UINT16) (ResourceHi - ResourceLo);
-    break;
-  default:
-    return FALSE;
-  }
-
-  return TRUE;
-}
-
-/**
-
-  Add resource node.
-
-  @param Resource  A pointer to resource node to be added
-
-**/
-VOID
-AddSingleResource (
-  IN  STM_RSC    *Resource
-  )
-{
-  STM_RSC    *Record;
-
-  Record = (STM_RSC *)mStmResourcesPtr;
-
-  while (TRUE) {
-    if (Record->Header.RscType == END_OF_RESOURCES) {
-      break;
-    }
-    //
-    // Go to next record if resource and record types don't match.
-    //
-    if (Resource->Header.RscType != Record->Header.RscType) {
-      Record = (STM_RSC *)((UINTN)Record + Record->Header.Length);
-      continue;
-    }
-    //
-    // Record is handled inside of procedure - don't adjust.
-    //
-    if (HandleSingleResource (Resource, Record)) {
-      return ;
-    }
-    Record = (STM_RSC *)((UINTN)Record + Record->Header.Length);
-  }
-
-  //
-  // Add resource to the end of area.
-  //
-  CopyMem (
-    mStmResourcesPtr + mStmResourceSizeUsed - sizeof(mRscEndNode),
-    Resource,
-    Resource->Header.Length
-    );
-  CopyMem (
-    mStmResourcesPtr + mStmResourceSizeUsed - sizeof(mRscEndNode) + Resource->Header.Length,
-    &mRscEndNode,
-    sizeof(mRscEndNode)
-    );
-  mStmResourceSizeUsed += Resource->Header.Length;
-  mStmResourceSizeAvailable = mStmResourceTotalSize - mStmResourceSizeUsed;
-
-  return ;
-}
-
-/**
-
-  Add resource list.
-
-  @param ResourceList  A pointer to resource list to be added
-  @param NumEntries    Optional number of entries.
-                       If 0, list must be terminated by END_OF_RESOURCES.
-
-**/
-VOID
-AddResource (
-  IN  STM_RSC    *ResourceList,
-  IN  UINT32      NumEntries OPTIONAL
-  )
-{
-  UINT32      Count;
-  UINTN       Index;
-  STM_RSC    *Resource;
-
-  if (NumEntries == 0) {
-    Count = 0xFFFFFFFF;
-  } else {
-    Count = NumEntries;
-  }
-
-  Resource = ResourceList;
-
-  for (Index = 0; Index < Count; Index++) {
-    if (Resource->Header.RscType == END_OF_RESOURCES) {
-      return ;
-    }
-    AddSingleResource (Resource);
-    Resource = (STM_RSC *)((UINTN)Resource + Resource->Header.Length);
-  }
-  return ;
-}
-
-/**
-
-  Validate resource list.
-
-  @param ResourceList  A pointer to resource list to be added
-  @param NumEntries    Optional number of entries.
-                       If 0, list must be terminated by END_OF_RESOURCES.
-
-  @retval TRUE  resource valid
-  @retval FALSE resource invalid
-
-**/
-BOOLEAN
-ValidateResource (
-  IN  STM_RSC    *ResourceList,
-  IN  UINT32      NumEntries OPTIONAL
-  )
-{
-  UINT32      Count;
-  UINTN       Index;
-  STM_RSC    *Resource;
-  UINTN       SubIndex;
-
-  //
-  // If NumEntries == 0 make it very big. Scan will be terminated by
-  // END_OF_RESOURCES.
-  //
-  if (NumEntries == 0) {
-    Count = 0xFFFFFFFF;
-  } else {
-    Count = NumEntries;
-  }
-
-  //
-  // Start from beginning of resource list.
-  //
-  Resource = ResourceList;
-
-  for (Index = 0; Index < Count; Index++) {
-    DEBUG ((DEBUG_ERROR, "ValidateResource (%d) - RscType(%x)\n", Index, Resource->Header.RscType));
-    //
-    // Validate resource.
-    //
-    switch (Resource->Header.RscType) {
-      case END_OF_RESOURCES:
-        if (Resource->Header.Length != sizeof (STM_RSC_END)) {
-          return  FALSE;
-        }
-        //
-        // If we are passed actual number of resources to add,
-        // END_OF_RESOURCES structure between them is considered an
-        // error. If NumEntries == 0 END_OF_RESOURCES is a termination.
-        //
-        if (NumEntries != 0) {
-          return  FALSE;
-        } else {
-          //
-          // If NumEntries == 0 and list reached end - return success.
-          //
-          return TRUE;
-        }
-        break;
-
-      case MEM_RANGE:
-      case MMIO_RANGE:
-        if (Resource->Header.Length != sizeof (STM_RSC_MEM_DESC)) {
-          return FALSE;
-        }
-
-        if (Resource->Mem.RWXAttributes > FULL_ACCS) {
-          return FALSE;
-        }
-        break;
-
-      case IO_RANGE:
-      case TRAPPED_IO_RANGE:
-        if (Resource->Header.Length != sizeof (STM_RSC_IO_DESC)) {
-          return FALSE;
-        }
-
-        if ((Resource->Io.Base + Resource->Io.Length) > 0xFFFF) {
-          return FALSE;
-        }
-        break;
-
-      case PCI_CFG_RANGE:
-        DEBUG ((DEBUG_ERROR, "ValidateResource - PCI (0x%02x, 0x%08x, 0x%02x, 0x%02x)\n", Resource->PciCfg.OriginatingBusNumber, Resource->PciCfg.LastNodeIndex, Resource->PciCfg.PciDevicePath[0].PciDevice, Resource->PciCfg.PciDevicePath[0].PciFunction));
-        if (Resource->Header.Length != sizeof (STM_RSC_PCI_CFG_DESC) + (sizeof(STM_PCI_DEVICE_PATH_NODE) * Resource->PciCfg.LastNodeIndex)) {
-          return FALSE;
-        }
-        for (SubIndex = 0; SubIndex <= Resource->PciCfg.LastNodeIndex; SubIndex++) {
-          if ((Resource->PciCfg.PciDevicePath[SubIndex].PciDevice > 0x1F) || (Resource->PciCfg.PciDevicePath[SubIndex].PciFunction > 7)) {
-            return FALSE;
-          }
-        }
-        if ((Resource->PciCfg.Base + Resource->PciCfg.Length) > 0x1000) {
-          return FALSE;
-        }
-        break;
-
-      case MACHINE_SPECIFIC_REG:
-        if (Resource->Header.Length != sizeof (STM_RSC_MSR_DESC)) {
-          return FALSE;
-        }
-        break;
-
-      default :
-        DEBUG ((DEBUG_ERROR, "ValidateResource - Unknown RscType(%x)\n", Resource->Header.RscType));
-        return FALSE;
-    }
-    Resource = (STM_RSC *)((UINTN)Resource + Resource->Header.Length);
-  }
-  return TRUE;
-}
-
-/**
-
-  Get resource list.
-  EndResource is excluded.
-
-  @param ResourceList  A pointer to resource list to be added
-  @param NumEntries    Optional number of entries.
-                       If 0, list must be terminated by END_OF_RESOURCES.
-
-  @retval TRUE  resource valid
-  @retval FALSE resource invalid
-
-**/
-UINTN
-GetResourceSize (
-  IN  STM_RSC    *ResourceList,
-  IN  UINT32      NumEntries OPTIONAL
-  )
-{
-  UINT32      Count;
-  UINTN       Index;
-  STM_RSC    *Resource;
-
-  Resource = ResourceList;
-
-  //
-  // If NumEntries == 0 make it very big. Scan will be terminated by
-  // END_OF_RESOURCES.
-  //
-  if (NumEntries == 0) {
-    Count = 0xFFFFFFFF;
-  } else {
-    Count = NumEntries;
-  }
-
-  //
-  // Start from beginning of resource list.
-  //
-  Resource = ResourceList;
-
-  for (Index = 0; Index < Count; Index++) {
-    if (Resource->Header.RscType == END_OF_RESOURCES) {
-      break;
-    }
-    Resource = (STM_RSC *)((UINTN)Resource + Resource->Header.Length);
-  }
-
-  return (UINTN)Resource - (UINTN)ResourceList;
-}
-
-/**
-
-  Add resources in list to database. Allocate new memory areas as needed.
-
-  @param ResourceList  A pointer to resource list to be added
-  @param NumEntries    Optional number of entries.
-                       If 0, list must be terminated by END_OF_RESOURCES.
-
-  @retval EFI_SUCCESS            If resources are added
-  @retval EFI_INVALID_PARAMETER  If nested procedure detected resource failer
-  @retval EFI_OUT_OF_RESOURCES   If nested procedure returned it and we cannot allocate more areas.
-
-**/
-EFI_STATUS
-EFIAPI
-AddPiResource (
-  IN  STM_RSC    *ResourceList,
-  IN  UINT32      NumEntries OPTIONAL
-  )
-{
-  EFI_STATUS            Status;
-  UINTN                 ResourceSize;
-  EFI_PHYSICAL_ADDRESS  NewResource;
-  UINTN                 NewResourceSize;
-
-  DEBUG ((DEBUG_INFO, "AddPiResource - Enter\n"));
-
-  if (!ValidateResource (ResourceList, NumEntries)) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  ResourceSize = GetResourceSize (ResourceList, NumEntries);
-  DEBUG ((DEBUG_INFO, "ResourceSize - 0x%08x\n", ResourceSize));
-  if (ResourceSize == 0) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if (mStmResourcesPtr == NULL) {
-    //
-    // First time allocation
-    //
-    NewResourceSize = EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (ResourceSize + sizeof(mRscEndNode)));
-    DEBUG ((DEBUG_INFO, "Allocate - 0x%08x\n", NewResourceSize));
-    Status = gSmst->SmmAllocatePages (
-                      AllocateAnyPages,
-                      EfiRuntimeServicesData,
-                      EFI_SIZE_TO_PAGES (NewResourceSize),
-                      &NewResource
-                      );
-    if (EFI_ERROR (Status)) {
-      return Status;
-    }
-
-    //
-    // Copy EndResource for intialization
-    //
-    mStmResourcesPtr = (UINT8 *)(UINTN)NewResource;
-    mStmResourceTotalSize = NewResourceSize;
-    CopyMem (mStmResourcesPtr, &mRscEndNode, sizeof(mRscEndNode));
-    mStmResourceSizeUsed      = sizeof(mRscEndNode);
-    mStmResourceSizeAvailable = mStmResourceTotalSize - sizeof(mRscEndNode);
-
-    //
-    // Let SmmCore change resource ptr
-    //
-    NotifyStmResourceChange (mStmResourcesPtr);
-  } else if (mStmResourceSizeAvailable < ResourceSize) {
-    //
-    // Need enlarge
-    //
-    NewResourceSize = mStmResourceTotalSize + (ResourceSize - mStmResourceSizeAvailable);
-    NewResourceSize = EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (NewResourceSize));
-    DEBUG ((DEBUG_INFO, "ReAllocate - 0x%08x\n", NewResourceSize));
-    Status = gSmst->SmmAllocatePages (
-                      AllocateAnyPages,
-                      EfiRuntimeServicesData,
-                      EFI_SIZE_TO_PAGES (NewResourceSize),
-                      &NewResource
-                      );
-    if (EFI_ERROR (Status)) {
-      return Status;
-    }
-    CopyMem ((VOID *)(UINTN)NewResource, mStmResourcesPtr, mStmResourceSizeUsed);
-    mStmResourceSizeAvailable = NewResourceSize - mStmResourceSizeUsed;
-
-    gSmst->SmmFreePages (
-             (EFI_PHYSICAL_ADDRESS)(UINTN)mStmResourcesPtr,
-             EFI_SIZE_TO_PAGES (mStmResourceTotalSize)
-             );
-
-    mStmResourceTotalSize = NewResourceSize;
-    mStmResourcesPtr = (UINT8 *)(UINTN)NewResource;
-
-    //
-    // Let SmmCore change resource ptr
-    //
-    NotifyStmResourceChange (mStmResourcesPtr);
-  }
-
-  //
-  // Check duplication
-  //
-  AddResource (ResourceList, NumEntries);
-
-  return EFI_SUCCESS;
-}
-
-/**
-
-  Delete resources in list to database.
-
-  @param ResourceList  A pointer to resource list to be deleted
-                       NULL means delete all resources.
-  @param NumEntries    Optional number of entries.
-                       If 0, list must be terminated by END_OF_RESOURCES.
-
-  @retval EFI_SUCCESS            If resources are deleted
-  @retval EFI_INVALID_PARAMETER  If nested procedure detected resource failer
-
-**/
-EFI_STATUS
-EFIAPI
-DeletePiResource (
-  IN  STM_RSC    *ResourceList,
-  IN  UINT32      NumEntries OPTIONAL
-  )
-{
-  if (ResourceList != NULL) {
-    // TBD
-    ASSERT (FALSE);
-    return EFI_UNSUPPORTED;
-  }
-  //
-  // Delete all
-  //
-  CopyMem (mStmResourcesPtr, &mRscEndNode, sizeof(mRscEndNode));
-  mStmResourceSizeUsed      = sizeof(mRscEndNode);
-  mStmResourceSizeAvailable = mStmResourceTotalSize - sizeof(mRscEndNode);
-  return EFI_SUCCESS;
-}
-
-/**
-
-  Get BIOS resources.
-
-  @param ResourceList  A pointer to resource list to be filled
-  @param ResourceSize  On input it means size of resource list input.
-                       On output it means size of resource list filled,
-                       or the size of resource list to be filled if size of too small.
-
-  @retval EFI_SUCCESS            If resources are returned.
-  @retval EFI_BUFFER_TOO_SMALL   If resource list buffer is too small to hold the whole resources.
-
-**/
-EFI_STATUS
-EFIAPI
-GetPiResource (
-  OUT    STM_RSC *ResourceList,
-  IN OUT UINT32  *ResourceSize
-  )
-{
-  if (*ResourceSize < mStmResourceSizeUsed) {
-    *ResourceSize = (UINT32)mStmResourceSizeUsed;
-    return EFI_BUFFER_TOO_SMALL;
-  }
-
-  CopyMem (ResourceList, mStmResourcesPtr, mStmResourceSizeUsed);
-  *ResourceSize = (UINT32)mStmResourceSizeUsed;
-  return EFI_SUCCESS;
-}
-
-/**
-
-  Set valid bit for MSEG MSR.
-
-  @param Buffer Ap function buffer. (not used)
-
-**/
-VOID
-EFIAPI
-EnableMsegMsr (
-  IN VOID  *Buffer
-  )
-{
-  MSR_IA32_SMM_MONITOR_CTL_REGISTER  SmmMonitorCtl;
-
-  SmmMonitorCtl.Uint64 = AsmReadMsr64 (MSR_IA32_SMM_MONITOR_CTL);
-  SmmMonitorCtl.Bits.Valid = 1;
-  AsmWriteMsr64 (MSR_IA32_SMM_MONITOR_CTL, SmmMonitorCtl.Uint64);
-}
-
-/**
-
-  Get 4K page aligned VMCS size.
-
-  @return 4K page aligned VMCS size
-
-**/
-UINT32
-GetVmcsSize (
-  VOID
-  )
-{
-  MSR_IA32_VMX_BASIC_REGISTER  VmxBasic;
-
-  //
-  // Read VMCS size and and align to 4KB
-  //
-  VmxBasic.Uint64 = AsmReadMsr64 (MSR_IA32_VMX_BASIC);
-  return ALIGN_VALUE (VmxBasic.Bits.VmcsSize, SIZE_4KB);
-}
-
-/**
-
-  Check STM image size.
-
-  @param StmImage      STM image
-  @param StmImageSize  STM image size
-
-  @retval TRUE  check pass
-  @retval FALSE check fail
-**/
-BOOLEAN
-StmCheckStmImage (
-  IN EFI_PHYSICAL_ADDRESS StmImage,
-  IN UINTN                StmImageSize
-  )
-{
-  UINTN                     MinMsegSize;
-  STM_HEADER                *StmHeader;
-  IA32_VMX_MISC_REGISTER    VmxMiscMsr;
-
-  //
-  // Check to see if STM image is compatible with CPU
-  //
-  StmHeader = (STM_HEADER *)(UINTN)StmImage;
-  VmxMiscMsr.Uint64 = AsmReadMsr64 (MSR_IA32_VMX_MISC);
-  if (StmHeader->HwStmHdr.MsegHeaderRevision != VmxMiscMsr.Bits.MsegRevisionIdentifier) {
-    DEBUG ((DEBUG_ERROR, "STM Image not compatible with CPU\n"));
-    DEBUG ((DEBUG_ERROR, "  StmHeader->HwStmHdr.MsegHeaderRevision = %08x\n", StmHeader->HwStmHdr.MsegHeaderRevision));
-    DEBUG ((DEBUG_ERROR, "  VmxMiscMsr.Bits.MsegRevisionIdentifier = %08x\n", VmxMiscMsr.Bits.MsegRevisionIdentifier));
-    return FALSE;
-  }
-
-  //
-  // Get Minimal required Mseg size
-  //
-  MinMsegSize = (EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
-                 StmHeader->SwStmHdr.AdditionalDynamicMemorySize +
-                 (StmHeader->SwStmHdr.PerProcDynamicMemorySize + GetVmcsSize () * 2) * gSmst->NumberOfCpus);
-  if (MinMsegSize < StmImageSize) {
-    MinMsegSize = StmImageSize;
-  }
-
-  if (StmHeader->HwStmHdr.Cr3Offset >= StmHeader->SwStmHdr.StaticImageSize) {
-    //
-    // We will create page table, just in case that SINIT does not create it.
-    //
-    if (MinMsegSize < StmHeader->HwStmHdr.Cr3Offset + EFI_PAGES_TO_SIZE(6)) {
-      MinMsegSize = StmHeader->HwStmHdr.Cr3Offset + EFI_PAGES_TO_SIZE(6);
-    }
-  }
-
-  //
-  // Check if it exceeds MSEG size
-  //
-  if (MinMsegSize > mMsegSize) {
-    DEBUG ((DEBUG_ERROR, "MSEG too small.  Min MSEG Size = %08x  Current MSEG Size = %08x\n", MinMsegSize, mMsegSize));
-    DEBUG ((DEBUG_ERROR, "  StmHeader->SwStmHdr.StaticImageSize             = %08x\n", StmHeader->SwStmHdr.StaticImageSize));
-    DEBUG ((DEBUG_ERROR, "  StmHeader->SwStmHdr.AdditionalDynamicMemorySize = %08x\n", StmHeader->SwStmHdr.AdditionalDynamicMemorySize));
-    DEBUG ((DEBUG_ERROR, "  StmHeader->SwStmHdr.PerProcDynamicMemorySize    = %08x\n", StmHeader->SwStmHdr.PerProcDynamicMemorySize));
-    DEBUG ((DEBUG_ERROR, "  VMCS Size                                       = %08x\n", GetVmcsSize ()));
-    DEBUG ((DEBUG_ERROR, "  Max CPUs                                        = %08x\n", gSmst->NumberOfCpus));
-    DEBUG ((DEBUG_ERROR, "  StmHeader->HwStmHdr.Cr3Offset                   = %08x\n", StmHeader->HwStmHdr.Cr3Offset));
-    return FALSE;
-  }
-
-  return TRUE;
-}
-
-/**
-
-  Load STM image to MSEG.
-
-  @param StmImage      STM image
-  @param StmImageSize  STM image size
-
-**/
-VOID
-StmLoadStmImage (
-  IN EFI_PHYSICAL_ADDRESS StmImage,
-  IN UINTN                StmImageSize
-  )
-{
-  MSR_IA32_SMM_MONITOR_CTL_REGISTER  SmmMonitorCtl;
-  UINT32                             MsegBase;
-  STM_HEADER                         *StmHeader;
-
-  //
-  // Get MSEG base address from MSR_IA32_SMM_MONITOR_CTL
-  //
-  SmmMonitorCtl.Uint64 = AsmReadMsr64 (MSR_IA32_SMM_MONITOR_CTL);
-  MsegBase = SmmMonitorCtl.Bits.MsegBase << 12;
-
-  //
-  // Zero all of MSEG base address
-  //
-  ZeroMem ((VOID *)(UINTN)MsegBase, mMsegSize);
-
-  //
-  // Copy STM Image into MSEG
-  //
-  CopyMem ((VOID *)(UINTN)MsegBase, (VOID *)(UINTN)StmImage, StmImageSize);
-
-  //
-  // STM Header is at the beginning of the STM Image
-  //
-  StmHeader = (STM_HEADER *)(UINTN)StmImage;
-
-  StmGen4GPageTable ((UINTN)MsegBase + StmHeader->HwStmHdr.Cr3Offset);
-}
-
-/**
-
-  Load STM image to MSEG.
-
-  @param StmImage      STM image
-  @param StmImageSize  STM image size
-
-  @retval EFI_SUCCESS            Load STM to MSEG successfully
-  @retval EFI_ALREADY_STARTED    STM image is already loaded to MSEG
-  @retval EFI_BUFFER_TOO_SMALL   MSEG is smaller than minimal requirement of STM image
-  @retval EFI_UNSUPPORTED        MSEG is not enabled
-
-**/
-EFI_STATUS
-EFIAPI
-LoadMonitor (
-  IN EFI_PHYSICAL_ADDRESS StmImage,
-  IN UINTN                StmImageSize
-  )
-{
-  MSR_IA32_SMM_MONITOR_CTL_REGISTER  SmmMonitorCtl;
-
-  if (mLockLoadMonitor) {
-    return EFI_ACCESS_DENIED;
-  }
-
-  SmmMonitorCtl.Uint64 = AsmReadMsr64 (MSR_IA32_SMM_MONITOR_CTL);
-  if (SmmMonitorCtl.Bits.MsegBase == 0) {
-    return EFI_UNSUPPORTED;
-  }
-
-  if (!StmCheckStmImage (StmImage, StmImageSize)) {
-    return EFI_BUFFER_TOO_SMALL;
-  }
-
-  // Record STM_HASH to PCR 0, just in case it is NOT TXT launch, we still need provide the evidence.
-  TpmMeasureAndLogData(
-    0,                        // PcrIndex
-    TXT_EVTYPE_STM_HASH,      // EventType
-    NULL,                     // EventLog
-    0,                        // LogLen
-    (VOID *)(UINTN)StmImage,  // HashData
-    StmImageSize              // HashDataLen
-    );
-
-  StmLoadStmImage (StmImage, StmImageSize);
-
-  mStmState |= EFI_SM_MONITOR_STATE_ENABLED;
-
-  return EFI_SUCCESS;
-}
-
-/**
-  This function return BIOS STM resource.
-  Produced by SmmStm.
-  Comsumed by SmmMpService when Init.
-
-  @return BIOS STM resource
-
-**/
-VOID *
-GetStmResource(
-  VOID
-  )
-{
-  return mStmResourcesPtr;
-}
-
-/**
-  This function notify STM resource change.
-
-  @param StmResource BIOS STM resource
-
-**/
-VOID
-NotifyStmResourceChange (
-  VOID *StmResource
-  )
-{
-  UINTN                         Index;
-  TXT_PROCESSOR_SMM_DESCRIPTOR  *Psd;
-
-  for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
-    Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)((UINTN)gSmst->CpuSaveState[Index] - SMRAM_SAVE_STATE_MAP_OFFSET + TXT_SMM_PSD_OFFSET);
-    Psd->BiosHwResourceRequirementsPtr = (UINT64)(UINTN)StmResource;
-  }
-  return ;
-}
-
-
-/**
-  This is STM setup BIOS callback.
-**/
-VOID
-EFIAPI
-SmmStmSetup (
-  VOID
-  )
-{
-  mStmState |= EFI_SM_MONITOR_STATE_ACTIVATED;
-}
-
-/**
-  This is STM teardown BIOS callback.
-**/
-VOID
-EFIAPI
-SmmStmTeardown (
-  VOID
-  )
-{
-  mStmState &= ~EFI_SM_MONITOR_STATE_ACTIVATED;
-}
-
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
deleted file mode 100644
index 92a4dc00eb..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/** @file
-  SMM STM support
-
-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _SMM_STM_H_
-#define _SMM_STM_H_
-
-#include <Protocol/SmMonitorInit.h>
-
-/**
-
-  Create 4G page table for STM.
-  2M PAE page table in X64 version.
-
-  @param PageTableBase        The page table base in MSEG
-
-**/
-VOID
-StmGen4GPageTable (
-  IN UINTN              PageTableBase
-  );
-
-/**
-  This is SMM exception handle.
-  Consumed by STM when exception happen.
-
-  @param Context  STM protection exception stack frame
-
-  @return the EBX value for STM reference.
-          EBX = 0: resume SMM guest using register state found on exception stack.
-          EBX = 1 to 0x0F: EBX contains a BIOS error code which the STM must record in the
-                           TXT.ERRORCODE register and subsequently reset the system via
-                           TXT.CMD.SYS_RESET. The value of the TXT.ERRORCODE register is calculated as
-                           follows: TXT.ERRORCODE = (EBX & 0x0F) | STM_CRASH_BIOS_PANIC
-          EBX = 0x10 to 0xFFFFFFFF - reserved, do not use.
-
-**/
-UINT32
-EFIAPI
-SmmStmExceptionHandler (
-  IN OUT STM_PROTECTION_EXCEPTION_STACK_FRAME Context
-  );
-
-
-/**
-
-  Get STM state.
-
-  @return STM state
-
-**/
-EFI_SM_MONITOR_STATE
-EFIAPI
-GetMonitorState (
-  VOID
-  );
-
-/**
-
-  Load STM image to MSEG.
-
-  @param StmImage      STM image
-  @param StmImageSize  STM image size
-
-  @retval EFI_SUCCESS            Load STM to MSEG successfully
-  @retval EFI_BUFFER_TOO_SMALL   MSEG is smaller than minimal requirement of STM image
-
-**/
-EFI_STATUS
-EFIAPI
-LoadMonitor (
-  IN EFI_PHYSICAL_ADDRESS StmImage,
-  IN UINTN                StmImageSize
-  );
-
-/**
-
-  Add resources in list to database. Allocate new memory areas as needed.
-
-  @param ResourceList  A pointer to resource list to be added
-  @param NumEntries    Optional number of entries.
-                       If 0, list must be terminated by END_OF_RESOURCES.
-
-  @retval EFI_SUCCESS            If resources are added
-  @retval EFI_INVALID_PARAMETER  If nested procedure detected resource failer
-  @retval EFI_OUT_OF_RESOURCES   If nested procedure returned it and we cannot allocate more areas.
-
-**/
-EFI_STATUS
-EFIAPI
-AddPiResource (
-  IN  STM_RSC  *ResourceList,
-  IN  UINT32    NumEntries OPTIONAL
-  );
-
-/**
-
-  Delete resources in list to database.
-
-  @param ResourceList  A pointer to resource list to be deleted
-                       NULL means delete all resources.
-  @param NumEntries    Optional number of entries.
-                       If 0, list must be terminated by END_OF_RESOURCES.
-
-  @retval EFI_SUCCESS            If resources are deleted
-  @retval EFI_INVALID_PARAMETER  If nested procedure detected resource failer
-
-**/
-EFI_STATUS
-EFIAPI
-DeletePiResource (
-  IN  STM_RSC    *ResourceList,
-  IN  UINT32      NumEntries OPTIONAL
-  );
-
-/**
-
-  Get BIOS resources.
-
-  @param ResourceList  A pointer to resource list to be filled
-  @param ResourceSize  On input it means size of resource list input.
-                       On output it means size of resource list filled,
-                       or the size of resource list to be filled if size of too small.
-
-  @retval EFI_SUCCESS            If resources are returned.
-  @retval EFI_BUFFER_TOO_SMALL   If resource list buffer is too small to hold the whole resources.
-
-**/
-EFI_STATUS
-EFIAPI
-GetPiResource (
-  OUT    STM_RSC *ResourceList,
-  IN OUT UINT32  *ResourceSize
-  );
-
-/**
-  This functin initialize STM configuration table.
-**/
-VOID
-StmSmmConfigurationTableInit (
-  VOID
-  );
-
-/**
-  This function notify STM resource change.
-
-  @param StmResource BIOS STM resource
-
-**/
-VOID
-NotifyStmResourceChange (
-  IN VOID *StmResource
-  );
-
-/**
-  This function return BIOS STM resource.
-
-  @return BIOS STM resource
-
-**/
-VOID *
-GetStmResource (
-  VOID
-  );
-
-#endif
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.S b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.S
deleted file mode 100644
index 1f9f91ce10..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.S
+++ /dev/null
@@ -1,282 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   SmiEntry.S
-#
-# Abstract:
-#
-#   Code template of the SMI handler for a particular processor
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL  ASM_PFX(gcStmSmiHandlerTemplate)
-ASM_GLOBAL  ASM_PFX(gcStmSmiHandlerSize)
-ASM_GLOBAL  ASM_PFX(gcStmSmiHandlerOffset)
-ASM_GLOBAL  ASM_PFX(gStmSmiCr3)
-ASM_GLOBAL  ASM_PFX(gStmSmiStack)
-ASM_GLOBAL  ASM_PFX(gStmSmbase)
-ASM_GLOBAL  ASM_PFX(gStmXdSupported)
-ASM_GLOBAL  ASM_PFX(gStmSmiHandlerIdtr)
-
-.equ            MSR_IA32_MISC_ENABLE, 0x1A0
-.equ            MSR_EFER, 0xc0000080
-.equ            MSR_EFER_XD, 0x800
-
-#
-# Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR
-#
-.equ            DSC_OFFSET, 0xfb00
-.equ            DSC_GDTPTR, 0x48
-.equ            DSC_GDTSIZ, 0x50
-.equ            DSC_CS, 0x14
-.equ            DSC_DS, 0x16
-.equ            DSC_SS, 0x18
-.equ            DSC_OTHERSEG, 0x1a
-#
-# Constants relating to CPU State Save Area
-#
-.equ            SSM_DR6,   0xffd0
-.equ            SSM_DR7,   0xffc8
-
-.equ            PROTECT_MODE_CS, 0x08
-.equ            PROTECT_MODE_DS, 0x20
-.equ            LONG_MODE_CS, 0x38
-.equ            TSS_SEGMENT, 0x40
-.equ            GDT_SIZE, 0x50
-
-    .text
-
-ASM_PFX(gcStmSmiHandlerTemplate):
-
-_StmSmiEntryPoint:
-    #
-    # The encoding of BX in 16-bit addressing mode is the same as of RDI in 64-
-    # bit addressing mode. And that coincidence has been used in the following
-    # "64-bit like" 16-bit code. Be aware that once RDI is referenced as a
-    # base address register, it is actually BX that is referenced.
-    #
-    .byte 0xbb                          # mov bx, imm16
-    .word _StmGdtDesc - _StmSmiEntryPoint + 0x8000
-    #
-    # fix GDT descriptor
-    #
-    .byte 0x2e,0xa1                     # mov ax, cs:[offset16]
-    .word      DSC_OFFSET + DSC_GDTSIZ
-    .byte 0x48                          # dec ax
-    .byte 0x2e
-    movl    %eax, (%rdi)                # mov cs:[bx], ax
-    .byte 0x66,0x2e,0xa1                # mov eax, cs:[offset16]
-    .word      DSC_OFFSET + DSC_GDTPTR
-    .byte 0x2e
-    movw    %ax, 2(%rdi)
-    .byte 0x66,0x2e
-    lgdt    (%rdi)
-    #
-    # Patch ProtectedMode Segment
-    #
-    .byte 0xb8
-    .word PROTECT_MODE_CS
-    .byte 0x2e
-    movl    %eax, -2(%rdi)
-    #
-    # Patch ProtectedMode entry
-    #
-    .byte 0x66, 0xbf                    # mov edi, SMBASE
-ASM_PFX(gStmSmbase): .space 4
-    lea     ((ProtectedMode - _StmSmiEntryPoint) + 0x8000)(%edi), %ax
-    .byte 0x2e
-    movw    %ax, -6(%rdi)
-    #
-    # Switch into ProtectedMode
-    #
-    movq    %cr0, %rbx
-    .byte 0x66
-    andl    $0x9ffafff3, %ebx
-    .byte 0x66
-    orl     $0x00000023, %ebx
-
-    movq    %rbx, %cr0
-    .byte 0x66, 0xea
-    .space 6
-
-_StmGdtDesc:    .space  6
-
-ProtectedMode:
-    movw    $PROTECT_MODE_DS, %ax
-    movl    %eax, %ds
-    movl    %eax, %es
-    movl    %eax, %fs
-    movl    %eax, %gs
-    movl    %eax, %ss
-    .byte   0xbc                       # mov esp, imm32
-ASM_PFX(gStmSmiStack):   .space  4
-    jmp     ProtFlatMode
-
-ProtFlatMode:
-    .byte   0xb8
-ASM_PFX(gStmSmiCr3):    .space  4
-    movq    %rax, %cr3
-    movl    $0x668,%eax                 # as cr4.PGE is not set here, refresh cr3
-    movq    %rax, %cr4                  # in PreModifyMtrrs() to flush TLB.
-# Load TSS
-    subl    $8, %esp                    # reserve room in stack
-    sgdt    (%rsp)
-    movl    2(%rsp), %eax               # eax = GDT base
-    addl    $8, %esp
-    movb    $0x89, %dl
-    movb    %dl, (TSS_SEGMENT + 5)(%rax) # clear busy flag
-    movl    $TSS_SEGMENT, %eax
-    ltr     %ax
-
-# enable NXE if supported
-    .byte   0xb0                        # mov al, imm8
-ASM_PFX(gStmXdSupported): .byte 1
-    cmpb    $0, %al
-    jz      SkipXd
-#
-# Check XD disable bit
-#
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    subl    $4, %esp
-    pushq   %rdx                       # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                # MSR_IA32_MISC_ENABLE[34]
-    jz      L13
-    andw    $0x0FFFB, %dx              # clear XD Disable bit if it is set
-    wrmsr
-L13:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax            # enable NXE
-    wrmsr
-    jmp     XdDone
-SkipXd:
-    subl    $8, %esp
-XdDone:
-
-    #
-    # Switch to LongMode
-    #
-    pushq    $LONG_MODE_CS                # push cs hardcore here
-    call     Base                         # push return address for retf later
-Base:
-    addl    $(LongMode - Base), (%rsp)  # offset for far retf, seg is the 1st arg
-
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orb     $1,%ah                      # enable LME
-    wrmsr
-    movq    %cr0, %rbx
-    orl     $0x080010023, %ebx          # enable paging + WP + NE + MP + PE
-    movq    %rbx, %cr0
-    retf
-LongMode:                               # long mode (64-bit code) starts here
-    movabsq $ASM_PFX(gStmSmiHandlerIdtr), %rax
-    lidt    (%rax)
-    lea     (DSC_OFFSET)(%rdi), %ebx
-    movw    DSC_DS(%rbx), %ax
-    movl    %eax,%ds
-    movw    DSC_OTHERSEG(%rbx), %ax
-    movl    %eax,%es
-    movl    %eax,%fs
-    movl    %eax,%gs
-    movw    DSC_SS(%rbx), %ax
-    movl    %eax,%ss
-
-CommonHandler:
-    movq    8(%rsp), %rbx
-    # Save FP registers
-
-    subq    $0x200, %rsp
-    .byte   0x48                        # FXSAVE64
-    fxsave  (%rsp)
-
-    addq    $-0x20, %rsp
-
-    movq    %rbx, %rcx
-    movabsq $ASM_PFX(CpuSmmDebugEntry), %rax
-    call    *%rax
-
-    movq    %rbx, %rcx
-    movabsq $ASM_PFX(SmiRendezvous), %rax
-    call    *%rax
-
-    movq    %rbx, %rcx
-    movabsq $ASM_PFX(CpuSmmDebugExit), %rax
-    call    *%rax
-
-    addq    $0x20, %rsp
-
-    #
-    # Restore FP registers
-    #
-    .byte   0x48                        # FXRSTOR64
-    fxrstor (%rsp)
-
-    addq    $0x200, %rsp
-
-    movabsq $ASM_PFX(gStmXdSupported), %rax
-    movb    (%rax), %al
-    cmpb    $0, %al
-    jz      L16
-    popq    %rdx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx
-    jz      L16
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-L16:
-    rsm
-
-_StmSmiHandler:
-#
-# Check XD disable bit
-#
-    xorq    %r8, %r8
-    movabsq $ASM_PFX(gStmXdSupported), %rax
-    movb    (%rax), %al
-    cmpb    $0, %al
-    jz      StmXdDone
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    movq    %rdx, %r8                  # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                # MSR_IA32_MISC_ENABLE[34]
-    jz      L14
-    andw    $0x0FFFB, %dx              # clear XD Disable bit if it is set
-    wrmsr
-L14:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax            # enable NXE
-    wrmsr
-StmXdDone:
-    pushq   %r8
-
-    # below step is needed, because STM does not run above code.
-    # we have to run below code to set IDT/CR0/CR4
-    movabsq $ASM_PFX(gStmSmiHandlerIdtr), %rax
-    lidt    (%rax)
-
-    movq    %cr0, %rax
-    orl     $0x80010023, %eax
-    movq    %rax, %cr0
-    movq    %cr4, %rax
-    movl    $0x668, %eax                # as cr4.PGE is not set here, refresh cr3
-    movq    %rax, %cr4                  # in PreModifyMtrrs() to flush TLB.
-    # STM init finish
-    jmp     CommonHandler
-
-ASM_PFX(gcStmSmiHandlerSize)  :  .word      . - _StmSmiEntryPoint
-ASM_PFX(gcStmSmiHandlerOffset):  .word      _StmSmiHandler - _StmSmiEntryPoint
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm
deleted file mode 100644
index ad51e07079..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.asm
+++ /dev/null
@@ -1,281 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiEntry.asm
-;
-; Abstract:
-;
-;   Code template of the SMI handler for a particular processor
-;
-;-------------------------------------------------------------------------------
-
-;
-; Variables referenced by C code
-;
-EXTERNDEF   SmiRendezvous:PROC
-EXTERNDEF   CpuSmmDebugEntry:PROC
-EXTERNDEF   CpuSmmDebugExit:PROC
-EXTERNDEF   gcStmSmiHandlerTemplate:BYTE
-EXTERNDEF   gcStmSmiHandlerSize:WORD
-EXTERNDEF   gcStmSmiHandlerOffset:WORD
-EXTERNDEF   gStmSmiCr3:DWORD
-EXTERNDEF   gStmSmiStack:DWORD
-EXTERNDEF   gStmSmbase:DWORD
-EXTERNDEF   gStmXdSupported:BYTE
-EXTERNDEF   gStmSmiHandlerIdtr:FWORD
-
-MSR_IA32_MISC_ENABLE  EQU     1A0h
-MSR_EFER      EQU     0c0000080h
-MSR_EFER_XD   EQU     0800h
-
-;
-; Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR
-;
-DSC_OFFSET    EQU     0fb00h
-DSC_GDTPTR    EQU     48h
-DSC_GDTSIZ    EQU     50h
-DSC_CS        EQU     14h
-DSC_DS        EQU     16h
-DSC_SS        EQU     18h
-DSC_OTHERSEG  EQU     1ah
-;
-; Constants relating to CPU State Save Area
-;
-SSM_DR6         EQU     0ffd0h
-SSM_DR7         EQU     0ffc8h
-
-PROTECT_MODE_CS EQU     08h
-PROTECT_MODE_DS EQU     20h
-LONG_MODE_CS    EQU     38h
-TSS_SEGMENT     EQU     40h
-GDT_SIZE        EQU     50h
-
-    .code
-
-gcStmSmiHandlerTemplate    LABEL   BYTE
-
-_StmSmiEntryPoint:
-    ;
-    ; The encoding of BX in 16-bit addressing mode is the same as of RDI in 64-
-    ; bit addressing mode. And that coincidence has been used in the following
-    ; "64-bit like" 16-bit code. Be aware that once RDI is referenced as a
-    ; base address register, it is actually BX that is referenced.
-    ;
-    DB      0bbh                        ; mov bx, imm16
-    DW      offset _StmGdtDesc - _StmSmiEntryPoint + 8000h  ; bx = GdtDesc offset
-; fix GDT descriptor
-    DB      2eh, 0a1h                   ; mov ax, cs:[offset16]
-    DW      DSC_OFFSET + DSC_GDTSIZ
-    DB      48h                         ; dec ax
-    DB      2eh
-    mov     [rdi], eax                  ; mov cs:[bx], ax
-    DB      66h, 2eh, 0a1h              ; mov eax, cs:[offset16]
-    DW      DSC_OFFSET + DSC_GDTPTR
-    DB      2eh
-    mov     [rdi + 2], ax               ; mov cs:[bx + 2], eax
-    DB      66h, 2eh
-    lgdt    fword ptr [rdi]             ; lgdt fword ptr cs:[bx]
-; Patch ProtectedMode Segment
-    DB      0b8h                        ; mov ax, imm16
-    DW      PROTECT_MODE_CS             ; set AX for segment directly
-    DB      2eh
-    mov     [rdi - 2], eax              ; mov cs:[bx - 2], ax
-; Patch ProtectedMode entry
-    DB      66h, 0bfh                   ; mov edi, SMBASE
-gStmSmbase    DD    ?
-    lea     ax, [edi + (@ProtectedMode - _StmSmiEntryPoint) + 8000h]
-    DB      2eh
-    mov     [rdi - 6], ax               ; mov cs:[bx - 6], eax
-; Switch into @ProtectedMode
-    mov     rbx, cr0
-    DB      66h
-    and     ebx, 9ffafff3h
-    DB      66h
-    or      ebx, 00000023h
-
-    mov     cr0, rbx
-    DB      66h, 0eah
-    DD      ?
-    DW      ?
-
-_StmGdtDesc    FWORD   ?
-@ProtectedMode:
-    mov     ax, PROTECT_MODE_DS
-    mov     ds, ax
-    mov     es, ax
-    mov     fs, ax
-    mov     gs, ax
-    mov     ss, ax
-    DB      0bch                   ; mov esp, imm32
-gStmSmiStack   DD      ?
-    jmp     ProtFlatMode
-
-ProtFlatMode:
-    DB      0b8h                        ; mov eax, offset gStmSmiCr3
-gStmSmiCr3     DD      ?
-    mov     cr3, rax
-    mov     eax, 668h                   ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, rax                    ; in PreModifyMtrrs() to flush TLB.
-; Load TSS
-    sub     esp, 8                      ; reserve room in stack
-    sgdt    fword ptr [rsp]
-    mov     eax, [rsp + 2]              ; eax = GDT base
-    add     esp, 8
-    mov     dl, 89h
-    mov     [rax + TSS_SEGMENT + 5], dl ; clear busy flag
-    mov     eax, TSS_SEGMENT
-    ltr     ax
-
-; enable NXE if supported
-    DB      0b0h                        ; mov al, imm8
-gStmXdSupported     DB      1
-    cmp     al, 0
-    jz      @SkipXd
-;
-; Check XD disable bit
-;
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    sub     esp, 4
-    push    rdx                        ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-    jmp     @XdDone
-@SkipXd:
-    sub     esp, 8
-@XdDone:
-
-; Switch into @LongMode
-    push    LONG_MODE_CS                ; push cs hardcore here
-    call    Base                       ; push return address for retf later
-Base:
-    add     dword ptr [rsp], @LongMode - Base; offset for far retf, seg is the 1st arg
-
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ah, 1                      ; enable LME
-    wrmsr
-    mov     rbx, cr0
-    or      ebx, 080010023h            ; enable paging + WP + NE + MP + PE
-    mov     cr0, rbx
-    retf
-@LongMode:                              ; long mode (64-bit code) starts here
-    mov     rax, offset gStmSmiHandlerIdtr
-    lidt    fword ptr [rax]
-    lea     ebx, [rdi + DSC_OFFSET]
-    mov     ax, [rbx + DSC_DS]
-    mov     ds, eax
-    mov     ax, [rbx + DSC_OTHERSEG]
-    mov     es, eax
-    mov     fs, eax
-    mov     gs, eax
-    mov     ax, [rbx + DSC_SS]
-    mov     ss, eax
-
-CommonHandler:
-    mov     rbx, [rsp + 0x08]           ; rbx <- CpuIndex
-
-    ;
-    ; Save FP registers
-    ;
-    sub     rsp, 200h
-    DB      48h                         ; FXSAVE64
-    fxsave  [rsp]
-
-    add     rsp, -20h
-
-    mov     rcx, rbx
-    mov     rax, CpuSmmDebugEntry
-    call    rax
-
-    mov     rcx, rbx
-    mov     rax, SmiRendezvous          ; rax <- absolute addr of SmiRedezvous
-    call    rax
-
-    mov     rcx, rbx
-    mov     rax, CpuSmmDebugExit
-    call    rax
-
-    add     rsp, 20h
-
-    ;
-    ; Restore FP registers
-    ;
-    DB      48h                         ; FXRSTOR64
-    fxrstor [rsp]
-
-    add     rsp, 200h
-
-    mov     rax, offset ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @f
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      @f
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-@@:
-    rsm
-
-_StmSmiHandler:
-;
-; Check XD disable bit
-;
-    xor     r8, r8
-    mov     rax, offset ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @StmXdDone
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     r8, rdx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-@StmXdDone:
-    push    r8
-
-    ; below step is needed, because STM does not run above code.
-    ; we have to run below code to set IDT/CR0/CR4
-    mov     rax, offset gStmSmiHandlerIdtr
-    lidt    fword ptr [rax]
-
-    mov     rax, cr0
-    or      eax, 80010023h              ; enable paging + WP + NE + MP + PE
-    mov     cr0, rax
-    mov     rax, cr4
-    mov     eax, 668h                   ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, rax                    ; in PreModifyMtrrs() to flush TLB.
-    ; STM init finish
-    jmp     CommonHandler
-
-gcStmSmiHandlerSize    DW      $ - _StmSmiEntryPoint
-gcStmSmiHandlerOffset  DW      _StmSmiHandler - _StmSmiEntryPoint
-
-    END
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
deleted file mode 100644
index c801591fc7..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
+++ /dev/null
@@ -1,263 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiEntry.nasm
-;
-; Abstract:
-;
-;   Code template of the SMI handler for a particular processor
-;
-;-------------------------------------------------------------------------------
-
-;
-; Variables referrenced by C code
-;
-
-%define MSR_IA32_MISC_ENABLE 0x1A0
-%define MSR_EFER      0xc0000080
-%define MSR_EFER_XD   0x800
-
-;
-; Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR
-;
-%define DSC_OFFSET 0xfb00
-%define DSC_GDTPTR 0x48
-%define DSC_GDTSIZ 0x50
-%define DSC_CS 0x14
-%define DSC_DS 0x16
-%define DSC_SS 0x18
-%define DSC_OTHERSEG 0x1a
-;
-; Constants relating to CPU State Save Area
-;
-%define SSM_DR6 0xffd0
-%define SSM_DR7 0xffc8
-
-%define PROTECT_MODE_CS 0x8
-%define PROTECT_MODE_DS 0x20
-%define LONG_MODE_CS 0x38
-%define TSS_SEGMENT 0x40
-%define GDT_SIZE 0x50
-
-extern ASM_PFX(SmiRendezvous)
-extern ASM_PFX(gStmSmiHandlerIdtr)
-extern ASM_PFX(CpuSmmDebugEntry)
-extern ASM_PFX(CpuSmmDebugExit)
-
-global ASM_PFX(gStmSmbase)
-global ASM_PFX(gStmXdSupported)
-global ASM_PFX(gStmSmiStack)
-global ASM_PFX(gStmSmiCr3)
-global ASM_PFX(gcStmSmiHandlerTemplate)
-global ASM_PFX(gcStmSmiHandlerSize)
-global ASM_PFX(gcStmSmiHandlerOffset)
-
-    DEFAULT REL
-    SECTION .text
-
-BITS 16
-ASM_PFX(gcStmSmiHandlerTemplate):
-_StmSmiEntryPoint:
-    mov     bx, _StmGdtDesc - _StmSmiEntryPoint + 0x8000
-    mov     ax,[cs:DSC_OFFSET + DSC_GDTSIZ]
-    dec     ax
-    mov     [cs:bx], ax
-    mov     eax, [cs:DSC_OFFSET + DSC_GDTPTR]
-    mov     [cs:bx + 2], eax
-o32 lgdt    [cs:bx]                       ; lgdt fword ptr cs:[bx]
-    mov     ax, PROTECT_MODE_CS
-    mov     [cs:bx-0x2],ax
-    DB      0x66, 0xbf                   ; mov edi, SMBASE
-ASM_PFX(gStmSmbase): DD 0
-    lea     eax, [edi + (@ProtectedMode - _StmSmiEntryPoint) + 0x8000]
-    mov     [cs:bx-0x6],eax
-    mov     ebx, cr0
-    and     ebx, 0x9ffafff3
-    or      ebx, 0x23
-    mov     cr0, ebx
-    jmp     dword 0x0:0x0
-_StmGdtDesc:
-    DW 0
-    DD 0
-
-BITS 32
-@ProtectedMode:
-    mov     ax, PROTECT_MODE_DS
-o16 mov     ds, ax
-o16 mov     es, ax
-o16 mov     fs, ax
-o16 mov     gs, ax
-o16 mov     ss, ax
-    DB      0xbc                   ; mov esp, imm32
-ASM_PFX(gStmSmiStack): DD 0
-    jmp     ProtFlatMode
-
-BITS 64
-ProtFlatMode:
-    DB      0xb8                        ; mov eax, offset gStmSmiCr3
-ASM_PFX(gStmSmiCr3): DD 0
-    mov     cr3, rax
-    mov     eax, 0x668                   ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, rax                    ; in PreModifyMtrrs() to flush TLB.
-; Load TSS
-    sub     esp, 8                      ; reserve room in stack
-    sgdt    [rsp]
-    mov     eax, [rsp + 2]              ; eax = GDT base
-    add     esp, 8
-    mov     dl, 0x89
-    mov     [rax + TSS_SEGMENT + 5], dl ; clear busy flag
-    mov     eax, TSS_SEGMENT
-    ltr     ax
-
-; enable NXE if supported
-    DB      0xb0                        ; mov al, imm8
-ASM_PFX(gStmXdSupported):     DB      1
-    cmp     al, 0
-    jz      @SkipXd
-;
-; Check XD disable bit
-;
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    sub     esp, 4
-    push    rdx                        ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .0
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.0:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-    jmp     @XdDone
-@SkipXd:
-    sub     esp, 8
-@XdDone:
-
-; Switch into @LongMode
-    push    LONG_MODE_CS                ; push cs hardcore here
-    call    Base                       ; push return address for retf later
-Base:
-    add     dword [rsp], @LongMode - Base; offset for far retf, seg is the 1st arg
-
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ah, 1                      ; enable LME
-    wrmsr
-    mov     rbx, cr0
-    or      ebx, 0x80010023            ; enable paging + WP + NE + MP + PE
-    mov     cr0, rbx
-    retf
-@LongMode:                              ; long mode (64-bit code) starts here
-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)
-    lidt    [rax]
-    lea     ebx, [rdi + DSC_OFFSET]
-    mov     ax, [rbx + DSC_DS]
-    mov     ds, eax
-    mov     ax, [rbx + DSC_OTHERSEG]
-    mov     es, eax
-    mov     fs, eax
-    mov     gs, eax
-    mov     ax, [rbx + DSC_SS]
-    mov     ss, eax
-
-CommonHandler:
-    mov     rbx, [rsp + 0x08]             ; rbx <- CpuIndex
-
-    ;
-    ; Save FP registers
-    ;
-    sub     rsp, 0x200
-    DB      0x48                         ; FXSAVE64
-    fxsave  [rsp]
-
-    add     rsp, -0x20
-
-    mov     rcx, rbx
-    mov     rax, CpuSmmDebugEntry
-    call    rax
-
-    mov     rcx, rbx
-    mov     rax, SmiRendezvous          ; rax <- absolute addr of SmiRedezvous
-    call    rax
-
-    mov     rcx, rbx
-    mov     rax, CpuSmmDebugExit
-    call    rax
-
-    add     rsp, 0x20
-
-    ;
-    ; Restore FP registers
-    ;
-    DB      0x48                         ; FXRSTOR64
-    fxrstor [rsp]
-
-    add     rsp, 0x200
-
-    mov     rax, ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      .1
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      .1
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-.1:
-    rsm
-
-_StmSmiHandler:
-;
-; Check XD disable bit
-;
-    xor     r8, r8
-    mov     rax, ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @StmXdDone
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     r8, rdx                    ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .0
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.0:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-@StmXdDone:
-    push    r8
-
-    ; below step is needed, because STM does not run above code.
-    ; we have to run below code to set IDT/CR0/CR4
-
-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)
-    lidt    [rax]
-
-    mov     rax, cr0
-    or      eax, 0x80010023            ; enable paging + WP + NE + MP + PE
-    mov     cr0, rax
-    mov     rax, cr4
-    mov     eax, 0x668                 ; as cr4.PGE is not set here, refresh cr3
-    mov     cr4, rax                   ; in PreModifyMtrrs() to flush TLB.
-    ; STM init finish
-    jmp     CommonHandler
-
-ASM_PFX(gcStmSmiHandlerSize)   : DW      $ - _StmSmiEntryPoint
-ASM_PFX(gcStmSmiHandlerOffset) : DW      _StmSmiHandler - _StmSmiEntryPoint
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.S b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.S
deleted file mode 100644
index 4d0cd9ac6f..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.S
+++ /dev/null
@@ -1,178 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution.  The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-#   SmiException.S
-#
-# Abstract:
-#
-#   Exception handlers used in SM mode
-#
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL  ASM_PFX(gcStmPsd)
-
-ASM_GLOBAL  ASM_PFX(SmmStmExceptionHandler)
-ASM_GLOBAL  ASM_PFX(SmmStmSetup)
-ASM_GLOBAL  ASM_PFX(SmmStmTeardown)
-
-.equ  CODE_SEL,             0x38
-.equ  DATA_SEL,             0x20
-.equ  TR_SEL,               0x40
-
-.equ  MSR_IA32_MISC_ENABLE, 0x1A0
-.equ  MSR_EFER,             0x0c0000080
-.equ  MSR_EFER_XD,          0x0800
-
-    .data
-
-#
-# This structure serves as a template for all processors.
-#
-ASM_PFX(gcStmPsd):
-            .ascii     "TXTPSSIG"
-            .word      PSD_SIZE
-            .word      1              # Version
-            .long      0              # LocalApicId
-            .byte      0xF            # Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
-            .byte      0              # BIOS to STM
-            .byte      0              # STM to BIOS
-            .byte      0
-            .word      CODE_SEL
-            .word      DATA_SEL
-            .word      DATA_SEL
-            .word      DATA_SEL
-            .word      TR_SEL
-            .word      0
-            .quad      0              # SmmCr3
-            .quad      ASM_PFX(_OnStmSetup)
-            .quad      ASM_PFX(_OnStmTeardown)
-            .quad      0              # SmmSmiHandlerRip - SMM guest entrypoint
-            .quad      0              # SmmSmiHandlerRsp
-            .quad      0
-            .long      0
-            .long      0x80010100     # RequiredStmSmmRevId
-            .quad      ASM_PFX(_OnException)
-            .quad      0              # ExceptionStack
-            .word      DATA_SEL
-            .word      0x1F           # ExceptionFilter
-            .long      0
-            .quad      0
-            .quad      0              # BiosHwResourceRequirementsPtr
-            .quad      0              # AcpiRsdp
-            .byte      0              # PhysicalAddressBits
-.equ  PSD_SIZE,  . - ASM_PFX(gcStmPsd)
-
-    .text
-#------------------------------------------------------------------------------
-# SMM Exception handlers
-#------------------------------------------------------------------------------
-
-ASM_GLOBAL ASM_PFX(_OnException)
-ASM_PFX(_OnException):
-    movq %rsp, %rcx
-    subq $0x28, %rsp
-    call ASM_PFX(SmmStmExceptionHandler)
-    addq $0x28, %rsp
-    movl %eax, %ebx
-    movl $4, %eax
-    .byte  0xf, 0x1, 0xc1 # VMCALL
-    jmp .
-
-ASM_GLOBAL ASM_PFX(_OnStmSetup)
-ASM_PFX(_OnStmSetup):
-#
-# Check XD disable bit
-#
-    xorq    %r8, %r8
-    movabsq $ASM_PFX(gStmXdSupported), %rax
-    movb    (%rax), %al
-    cmpb    $0, %al
-    jz      StmXdDone1
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    movq    %rdx, %r8                  # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                # MSR_IA32_MISC_ENABLE[34]
-    jz      L13
-    andw    $0x0FFFB, %dx              # clear XD Disable bit if it is set
-    wrmsr
-L13:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax            # enable NXE
-    wrmsr
-StmXdDone1:
-    pushq   %r8
-
-  subq $0x20, %rsp
-  call ASM_PFX(SmmStmSetup)
-  addq 0x20, %rsp
-
-    movabsq $ASM_PFX(gStmXdSupported), %rax
-    movb    (%rax), %al
-    cmpb    $0, %al
-    jz      L14
-    popq    %rdx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx
-    jz      L14
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
-    wrmsr
-L14:
-
-  rsm
-
-ASM_GLOBAL ASM_PFX(_OnStmTeardown)
-ASM_PFX(_OnStmTeardown):
-#
-# Check XD disable bit
-#
-    xorq    %r8, %r8
-    movabsq $ASM_PFX(gStmXdSupported), %rax
-    movb    (%rax), %al
-    cmpb    $0, %al
-    jz      StmXdDone2
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    movq    %rdx, %r8                  # save MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx                # MSR_IA32_MISC_ENABLE[34]
-    jz      L15
-    andw    $0x0FFFB, %dx              # clear XD Disable bit if it is set
-    wrmsr
-L15:
-    movl    $MSR_EFER, %ecx
-    rdmsr
-    orw     $MSR_EFER_XD,%ax            # enable NXE
-    wrmsr
-StmXdDone2:
-    pushq   %r8
-
-  subq $0x20, %rsp
-  call ASM_PFX(SmmStmTeardown)
-  addq $0x20, %rsp
-
-    movabsq $ASM_PFX(gStmXdSupported), %rax
-    movb    (%rax), %al
-    cmpb    $0, %al
-    jz      L16
-    popq    %rdx                        # get saved MSR_IA32_MISC_ENABLE[63-32]
-    testl   $BIT2, %edx
-    jz      L16
-    movl    $MSR_IA32_MISC_ENABLE, %ecx
-    rdmsr
-    orw     $BIT2, %dx                  # set XD Disable bit if it was set before entering into SMM
-    wrmsr
-L16:
-
-  rsm
-
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm
deleted file mode 100644
index 33e9860160..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.asm
+++ /dev/null
@@ -1,178 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiException.asm
-;
-; Abstract:
-;
-;   Exception handlers used in SM mode
-;
-;-------------------------------------------------------------------------------
-
-EXTERNDEF   gcStmPsd:BYTE
-
-EXTERNDEF   SmmStmExceptionHandler:PROC
-EXTERNDEF   SmmStmSetup:PROC
-EXTERNDEF   SmmStmTeardown:PROC
-EXTERNDEF   gStmXdSupported:BYTE
-
-CODE_SEL    EQU 38h
-DATA_SEL    EQU 20h
-TR_SEL      EQU 40h
-
-MSR_IA32_MISC_ENABLE  EQU     1A0h
-MSR_EFER              EQU     0c0000080h
-MSR_EFER_XD           EQU     0800h
-
-    .data
-
-;
-; This structure serves as a template for all processors.
-;
-gcStmPsd     LABEL   BYTE
-            DB      'TXTPSSIG'
-            DW      PSD_SIZE
-            DW      1              ; Version
-            DD      0              ; LocalApicId
-            DB      0Fh            ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
-            DB      0              ; BIOS to STM
-            DB      0              ; STM to BIOS
-            DB      0
-            DW      CODE_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      TR_SEL
-            DW      0
-            DQ      0              ; SmmCr3
-            DQ      _OnStmSetup
-            DQ      _OnStmTeardown
-            DQ      0              ; SmmSmiHandlerRip - SMM guest entrypoint
-            DQ      0              ; SmmSmiHandlerRsp
-            DQ      0
-            DD      0
-            DD      80010100h      ; RequiredStmSmmRevId
-            DQ      _OnException
-            DQ      0              ; ExceptionStack
-            DW      DATA_SEL
-            DW      01Fh           ; ExceptionFilter
-            DD      0
-            DQ      0
-            DQ      0              ; BiosHwResourceRequirementsPtr
-            DQ      0              ; AcpiRsdp
-            DB      0              ; PhysicalAddressBits
-PSD_SIZE  = $ - offset gcStmPsd
-
-    .code
-;------------------------------------------------------------------------------
-; SMM Exception handlers
-;------------------------------------------------------------------------------
-_OnException       PROC
-    mov  rcx, rsp
-    add  rsp, -28h
-    call SmmStmExceptionHandler
-    add  rsp, 28h
-    mov  ebx, eax
-    mov  eax, 4
-    DB  0fh, 01h, 0c1h ; VMCALL
-    jmp $
-_OnException       ENDP
-
-_OnStmSetup PROC
-;
-; Check XD disable bit
-;
-    xor     r8, r8
-    mov     rax, offset ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @StmXdDone1
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     r8, rdx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-@StmXdDone1:
-    push    r8
-
-  add  rsp, -20h
-  call SmmStmSetup
-  add  rsp, 20h
-
-    mov     rax, offset ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @f
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      @f
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-@@:
-
-  rsm
-_OnStmSetup ENDP
-
-_OnStmTeardown PROC
-;
-; Check XD disable bit
-;
-    xor     r8, r8
-    mov     rax, offset ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @StmXdDone2
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     r8, rdx                   ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      @f
-    and     dx, 0FFFBh                 ; clear XD Disable bit if it is set
-    wrmsr
-@@:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-@StmXdDone2:
-    push    r8
-
-  add  rsp, -20h
-  call SmmStmTeardown
-  add  rsp, 20h
-
-    mov     rax, offset ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @f
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      @f
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-@@:
-
-  rsm
-_OnStmTeardown ENDP
-
-    END
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
deleted file mode 100644
index fe1bf3f165..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
+++ /dev/null
@@ -1,179 +0,0 @@
-;------------------------------------------------------------------------------ ;
-; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-;   SmiException.nasm
-;
-; Abstract:
-;
-;   Exception handlers used in SM mode
-;
-;-------------------------------------------------------------------------------
-
-global  ASM_PFX(gcStmPsd)
-
-extern  ASM_PFX(SmmStmExceptionHandler)
-extern  ASM_PFX(SmmStmSetup)
-extern  ASM_PFX(SmmStmTeardown)
-extern  ASM_PFX(gStmXdSupported)
-extern  ASM_PFX(gStmSmiHandlerIdtr)
-
-%define MSR_IA32_MISC_ENABLE 0x1A0
-%define MSR_EFER      0xc0000080
-%define MSR_EFER_XD   0x800
-
-CODE_SEL          equ 0x38
-DATA_SEL          equ 0x20
-TR_SEL            equ 0x40
-
-    SECTION .data
-
-;
-; This structure serves as a template for all processors.
-;
-ASM_PFX(gcStmPsd):
-            DB      'TXTPSSIG'
-            DW      PSD_SIZE
-            DW      1              ; Version
-            DD      0              ; LocalApicId
-            DB      0x0F           ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
-            DB      0              ; BIOS to STM
-            DB      0              ; STM to BIOS
-            DB      0
-            DW      CODE_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      DATA_SEL
-            DW      TR_SEL
-            DW      0
-            DQ      0              ; SmmCr3
-            DQ      ASM_PFX(OnStmSetup)
-            DQ      ASM_PFX(OnStmTeardown)
-            DQ      0              ; SmmSmiHandlerRip - SMM guest entrypoint
-            DQ      0              ; SmmSmiHandlerRsp
-            DQ      0
-            DD      0
-            DD      0x80010100     ; RequiredStmSmmRevId
-            DQ      ASM_PFX(OnException)
-            DQ      0              ; ExceptionStack
-            DW      DATA_SEL
-            DW      0x01F          ; ExceptionFilter
-            DD      0
-            DQ      0
-            DQ      0              ; BiosHwResourceRequirementsPtr
-            DQ      0              ; AcpiRsdp
-            DB      0              ; PhysicalAddressBits
-PSD_SIZE  equ $ -   ASM_PFX(gcStmPsd)
-
-    DEFAULT REL
-    SECTION .text
-;------------------------------------------------------------------------------
-; SMM Exception handlers
-;------------------------------------------------------------------------------
-global ASM_PFX(OnException)
-ASM_PFX(OnException):
-    mov  rcx, rsp
-    add  rsp, -0x28
-    call ASM_PFX(SmmStmExceptionHandler)
-    add  rsp, 0x28
-    mov  ebx, eax
-    mov  eax, 4
-    DB  0x0f, 0x01, 0x0c1 ; VMCALL
-    jmp $
-
-global ASM_PFX(OnStmSetup)
-ASM_PFX(OnStmSetup):
-;
-; Check XD disable bit
-;
-    xor     r8, r8
-    mov     rax, ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @StmXdDone1
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     r8, rdx                    ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .01
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.01:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-@StmXdDone1:
-    push    r8
-
-  add  rsp, -0x20
-  call ASM_PFX(SmmStmSetup)
-  add  rsp, 0x20
-
-    mov     rax, ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      .11
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      .11
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-.11:
-  rsm
-
-global ASM_PFX(OnStmTeardown)
-ASM_PFX(OnStmTeardown):
-;
-; Check XD disable bit
-;
-    xor     r8, r8
-    mov     rax, ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      @StmXdDone2
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    mov     r8, rdx                    ; save MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2                  ; MSR_IA32_MISC_ENABLE[34]
-    jz      .02
-    and     dx, 0xFFFB                 ; clear XD Disable bit if it is set
-    wrmsr
-.02:
-    mov     ecx, MSR_EFER
-    rdmsr
-    or      ax, MSR_EFER_XD            ; enable NXE
-    wrmsr
-@StmXdDone2:
-    push    r8
-
-  add  rsp, -0x20
-  call ASM_PFX(SmmStmTeardown)
-  add  rsp, 0x20
-
-    mov     rax, ASM_PFX(gStmXdSupported)
-    mov     al, [rax]
-    cmp     al, 0
-    jz      .12
-    pop     rdx                       ; get saved MSR_IA32_MISC_ENABLE[63-32]
-    test    edx, BIT2
-    jz      .12
-    mov     ecx, MSR_IA32_MISC_ENABLE
-    rdmsr
-    or      dx, BIT2                  ; set XD Disable bit if it was set before entering into SMM
-    wrmsr
-
-.12:
-  rsm
-
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmmStmSupport.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmmStmSupport.c
deleted file mode 100644
index 6681234783..0000000000
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmmStmSupport.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/** @file
-  SMM STM support functions
-
-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php.
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiSmm.h>
-#include <Library/DebugLib.h>
-
-#include "SmmStm.h"
-
-///
-/// Page Table Entry
-///
-#define IA32_PG_P                   BIT0
-#define IA32_PG_RW                  BIT1
-#define IA32_PG_PS                  BIT7
-
-/**
-
-  Create 4G page table for STM.
-  2M PAE page table in X64 version.
-
-  @param PageTableBase        The page table base in MSEG
-
-**/
-VOID
-StmGen4GPageTable (
-  IN UINTN              PageTableBase
-  )
-{
-  UINTN                             Index;
-  UINTN                             SubIndex;
-  UINT64                            *Pde;
-  UINT64                            *Pte;
-  UINT64                            *Pml4;
-
-  Pml4 = (UINT64*)(UINTN)PageTableBase;
-  PageTableBase += SIZE_4KB;
-  *Pml4 = PageTableBase | IA32_PG_RW | IA32_PG_P;
-
-  Pde = (UINT64*)(UINTN)PageTableBase;
-  PageTableBase += SIZE_4KB;
-  Pte = (UINT64 *)(UINTN)PageTableBase;
-
-  for (Index = 0; Index < 4; Index++) {
-    *Pde = PageTableBase | IA32_PG_RW | IA32_PG_P;
-    Pde++;
-    PageTableBase += SIZE_4KB;
-
-    for (SubIndex = 0; SubIndex < SIZE_4KB / sizeof (*Pte); SubIndex++) {
-      *Pte = (((Index << 9) + SubIndex) << 21) | IA32_PG_PS | IA32_PG_RW | IA32_PG_P;
-      Pte++;
-    }
-  }
-}
-
-/**
-  This is SMM exception handle.
-  Consumed by STM when exception happen.
-
-  @param Context  STM protection exception stack frame
-
-  @return the EBX value for STM reference.
-          EBX = 0: resume SMM guest using register state found on exception stack.
-          EBX = 1 to 0x0F: EBX contains a BIOS error code which the STM must record in the
-                           TXT.ERRORCODE register and subsequently reset the system via
-                           TXT.CMD.SYS_RESET. The value of the TXT.ERRORCODE register is calculated as
-                           follows: TXT.ERRORCODE = (EBX & 0x0F) | STM_CRASH_BIOS_PANIC
-          EBX = 0x10 to 0xFFFFFFFF - reserved, do not use.
-
-**/
-UINT32
-EFIAPI
-SmmStmExceptionHandler (
-  IN OUT STM_PROTECTION_EXCEPTION_STACK_FRAME Context
-  )
-{
-  // TBD - SmmStmExceptionHandler, record information
-  DEBUG ((DEBUG_ERROR, "SmmStmExceptionHandler ...\n"));
-  //
-  // Skip this instruction and continue;
-  //
-  Context.X64StackFrame->Rip += Context.X64StackFrame->VmcsExitInstructionLength;
-
-  return 0;
-}
diff --git a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.c b/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.c
deleted file mode 100644
index efb61fa6f8..0000000000
--- a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/** @file
-SMM CPU Platform Hook NULL library instance.
-
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution.  The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-#include <PiSmm.h>
-#include <Library/SmmCpuPlatformHookLib.h>
-
-/**
-  Checks if platform produces a valid SMI.
-
-  This function checks if platform produces a valid SMI. This function is
-  called at SMM entry to detect if this is a spurious SMI. This function
-  must be implemented in an MP safe way because it is called by multiple CPU
-  threads.
-
-  @retval TRUE              There is a valid SMI
-  @retval FALSE             There is no valid SMI
-
-**/
-BOOLEAN
-EFIAPI
-PlatformValidSmi (
-  VOID
-  )
-{
-  return TRUE;
-}
-
-/**
-  Clears platform top level SMI status bit.
-
-  This function clears platform top level SMI status bit.
-
-  @retval TRUE              The platform top level SMI status is cleared.
-  @retval FALSE             The platform top level SMI status cannot be cleared.
-
-**/
-BOOLEAN
-EFIAPI
-ClearTopLevelSmiStatus (
-  VOID
-  )
-{
-  return TRUE;
-}
-
-/**
-  Performs platform specific way of SMM BSP election.
-
-  This function performs platform specific way of SMM BSP election.
-
-  @param  IsBsp             Output parameter. TRUE: the CPU this function executes
-                            on is elected to be the SMM BSP. FALSE: the CPU this
-                            function executes on is to be SMM AP.
-
-  @retval EFI_SUCCESS       The function executes successfully.
-  @retval EFI_NOT_READY     The function does not determine whether this CPU should be
-                            BSP or AP. This may occur if hardware init sequence to
-                            enable the determination is yet to be done, or the function
-                            chooses not to do BSP election and will let SMM CPU driver to
-                            use its default BSP election process.
-  @retval EFI_DEVICE_ERROR  The function cannot determine whether this CPU should be
-                            BSP or AP due to hardware error.
-
-**/
-EFI_STATUS
-EFIAPI
-PlatformSmmBspElection (
-  OUT BOOLEAN     *IsBsp
-  )
-{
-  return EFI_NOT_READY;
-}
-
-/**
-  Get platform page table attribute.
-
-  This function gets page table attribute of platform.
-
-  @param  Address        Input parameter. Obtain the page table entries attribute on this address.
-  @param  PageSize       Output parameter. The size of the page.
-  @param  NumOfPages     Output parameter. Number of page.
-  @param  PageAttribute  Output parameter. Paging Attributes (WB, UC, etc).
-
-  @retval EFI_SUCCESS      The platform page table attribute from the address is determined.
-  @retval EFI_UNSUPPORTED  The platform does not support getting page table attribute for the address.
-
-**/
-EFI_STATUS
-EFIAPI
-GetPlatformPageTableAttribute (
-  IN  UINT64                Address,
-  IN OUT SMM_PAGE_SIZE_TYPE *PageSize,
-  IN OUT UINTN              *NumOfPages,
-  IN OUT UINTN              *PageAttribute
-  )
-{
-  return EFI_UNSUPPORTED;
-}
diff --git a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf b/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
deleted file mode 100644
index 4dea5fb4e1..0000000000
--- a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
+++ /dev/null
@@ -1,40 +0,0 @@
-## @file
-#  SMM CPU Platform Hook NULL library instance.
-#
-#  Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SmmCpuPlatformHookLibNull
-  MODULE_UNI_FILE                = SmmCpuPlatformHookLibNull.uni
-  FILE_GUID                      = D6494E1B-E06F-4ab5-B64D-48B25AA9EB33
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = SmmCpuPlatformHookLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = IA32 X64
-#
-
-[Sources]
-  SmmCpuPlatformHookLibNull.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  UefiCpuPkg/UefiCpuPkg.dec
diff --git a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.uni b/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.uni
deleted file mode 100644
index 46de9f3494..0000000000
--- a/UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.uni
+++ /dev/null
@@ -1,18 +0,0 @@
-// /** @file
-// SMM CPU Platform Hook NULL library instance.
-//
-// Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution.  The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-// **/
-
-#string STR_MODULE_ABSTRACT             #language en-US "SMM CPU Platform Hook NULL library instance"
-
-#string STR_MODULE_DESCRIPTION          #language en-US "SMM CPU Platform Hook NULL library instance."
author	Guo Mang <mang.guo@intel.com>	2017-04-27 11:22:26 +0800
committer	Guo Mang <mang.guo@intel.com>	2017-04-27 11:22:26 +0800
commit	38c2cbb9354d7f58e48f9f649f23eb9bd0d3cfca (patch)
tree	1d4540cd9c19c47d10a161184c8f1a12f8ffc455 /UefiCpuPkg/Library
parent	c6ff7c547bfc71da9d5e71a73984b9d3a4ea0809 (diff)
download	edk2-platforms-38c2cbb9354d7f58e48f9f649f23eb9bd0d3cfca.tar.xz