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authorLeo Duran <leo.duran@amd.com>2017-02-27 01:43:07 +0800
committerStar Zeng <star.zeng@intel.com>2017-03-01 12:53:03 +0800
commit241f914975d50e34f6da57d1e5ac60eedb5d52de (patch)
tree1d619fc53b2170008dd92f7eef0ddbf8ffe071a7 /UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
parentab1a5a58c95937998f3ecf384a8940130511e234 (diff)
downloadedk2-platforms-241f914975d50e34f6da57d1e5ac60eedb5d52de.tar.xz
UefiCpuPkg/PiSmmCpuDxeSmm: Add support for PCD PcdPteMemoryEncryptionAddressOrMask
This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. The mask is applied when page tables entriees are created or modified. CC: Jeff Fan <jeff.fan@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 69c54fbee6..71af2f1775 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -2,6 +2,8 @@
Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -184,7 +186,6 @@ extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
///
extern UINT8 mSmmSaveStateRegisterLma;
-
//
// SMM CPU Protocol function prototypes.
//
@@ -415,6 +416,11 @@ extern SPIN_LOCK *mPFLock;
extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
extern SPIN_LOCK *mMemoryMappedLock;
+//
+// Copy of the PcdPteMemoryEncryptionAddressOrMask
+//
+extern UINT64 mAddressEncMask;
+
/**
Create 4G PageTable in SMRAM.