diff options
| author | Liming Gao <liming.gao@intel.com> | 2016-06-14 16:26:46 +0800 |
|---|---|---|
| committer | Liming Gao <liming.gao@intel.com> | 2016-06-28 09:52:13 +0800 |
| commit | 55c6d5467ec99653d08c01ede8412cfe7ea0d4e7 (patch) | |
| tree | ba49796be51bb036d756173cabb19d15f09c3f2f /UefiCpuPkg/PiSmmCpuDxeSmm | |
| parent | 6997711e7fd6733363bae21c4398fcc239f7aa41 (diff) | |
| download | edk2-platforms-55c6d5467ec99653d08c01ede8412cfe7ea0d4e7.tar.xz | |
UefiCpuPkg PiSmmCpuDxeSmm: Update Ia32/MpFuncs.nasm
Use 16bit assembly code to replace hard code db.
In V2:
Add 0x67 prefix to far jump
When we enter protected mode, with the far jump still in big real mode,
the JMP instruction not only needs the 0x66 prefix (for 32-bit operand
size), but also the 0x67 prefix (for 32-bit address size). Use the a32
nasm modifier to enforce this.
This bug breaks S3 resume in the Ia32 + SMM_REQUIRE build of OVMF.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm | 47 |
1 files changed, 21 insertions, 26 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm index fceaaf2689..f7cdcce9a7 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm @@ -42,49 +42,44 @@ extern ASM_PFX(InitializeFloatingPointUnits) ;-------------------------------------------------------------------------------------
;RendezvousFunnelProc (&WakeUpBuffer,MemAddress);
+BITS 16
global ASM_PFX(RendezvousFunnelProc)
ASM_PFX(RendezvousFunnelProc):
RendezvousFunnelProcStart:
; At this point CS = 0x(vv00) and ip= 0x0.
- db 0x8c, 0xc8 ; mov ax, cs
- db 0x8e, 0xd8 ; mov ds, ax
- db 0x8e, 0xc0 ; mov es, ax
- db 0x8e, 0xd0 ; mov ss, ax
- db 0x33, 0xc0 ; xor ax, ax
- db 0x8e, 0xe0 ; mov fs, ax
- db 0x8e, 0xe8 ; mov gs, ax
+ mov ax, cs
+ mov ds, ax
+ mov es, ax
+ mov ss, ax
+ xor ax, ax
+ mov fs, ax
+ mov gs, ax
flat32Start:
- db 0xBE
- dw BufferStart ; mov si, BufferStart
- db 0x66, 0x8B, 0x14 ; mov edx,dword ptr [si] ; EDX is keeping the start address of wakeup buffer
+ mov si, BufferStart
+ mov edx,dword [si] ; EDX is keeping the start address of wakeup buffer
- db 0xBE
- dw GdtrProfile ; mov si, GdtrProfile
- db 0x66 ; db 66h
- db 0x2E, 0xF, 0x1, 0x14 ; lgdt fword ptr cs:[si]
+ mov si, GdtrProfile
+o32 lgdt [cs:si]
- db 0xBE
- dw IdtrProfile ; mov si, IdtrProfile
- db 0x66 ; db 66h
- db 0x2E, 0xF, 0x1, 0x1C ; lidt fword ptr cs:[si]
+ mov si, IdtrProfile
+o32 lidt [cs:si]
- db 0x33, 0xC0 ; xor ax, ax
- db 0x8E, 0xD8 ; mov ds, ax
+ xor ax, ax
+ mov ds, ax
- db 0xF, 0x20, 0xC0 ; mov eax, cr0 ; Get control register 0
- db 0x66, 0x83, 0xC8, 0x1 ; or eax, 000000001h ; Set PE bit (bit #0)
- db 0xF, 0x22, 0xC0 ; mov cr0, eax
+ mov eax, cr0 ; Get control register 0
+ or eax, 0x000000001 ; Set PE bit (bit #0)
+ mov cr0, eax
FLAT32_JUMP:
- db 0x66, 0x67, 0xEA ; far jump
- dd 0x0 ; 32-bit offset
- dw 0x20 ; 16-bit selector
+a32 jmp dword 0x20:0x0
+BITS 32
PMODE_ENTRY: ; protected mode entry point
mov ax, 0x8
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