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authorJeff Fan <jeff.fan@intel.com>2016-04-05 14:33:45 +0800
committerMichael Kinney <michael.d.kinney@intel.com>2016-05-16 10:40:18 -0700
commit846704334c4083b8e86e921d3ffcbf7d886fe5b9 (patch)
tree2f208f590d6f56083bbd28e714bc83cca7d2ea11 /UefiCpuPkg/PiSmmCpuDxeSmm
parent4b1f9ac19de8775b484c2b16d3050cd279249477 (diff)
downloadedk2-platforms-846704334c4083b8e86e921d3ffcbf7d886fe5b9.tar.xz
UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile: Remove unnecessary BTS MSRs
BTS used DS save area by IA32_DS_AREA MSR to get invoker IP instead of the Last Branch Record Stack. So, removed the unnecessary BTS MSRs. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c2
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h5
2 files changed, 1 insertions, 6 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
index 0b75020425..8ecc5415a3 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
@@ -1071,8 +1071,6 @@ ActivateLBR (
if ((DebugCtl & MSR_DEBUG_CTL_LBR) != 0) {
return ;
}
- AsmWriteMsr64 (MSR_LER_FROM_LIP, 0);
- AsmWriteMsr64 (MSR_LER_TO_LIP, 0);
DebugCtl |= MSR_DEBUG_CTL_LBR;
AsmWriteMsr64 (MSR_DEBUG_CTL, DebugCtl);
}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
index de6eb0aceb..5aaf945cfd 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfileInternal.h
@@ -1,7 +1,7 @@
/** @file
SMM profile internal header file.
-Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -66,9 +66,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#define MSR_DEBUG_CTL_TR 0x40
#define MSR_DEBUG_CTL_BTS 0x80
#define MSR_DEBUG_CTL_BTINT 0x100
-#define MSR_LASTBRANCH_TOS 0x1C9
-#define MSR_LER_FROM_LIP 0x1DD
-#define MSR_LER_TO_LIP 0x1DE
#define MSR_DS_AREA 0x600
typedef struct {