diff options
| author | Yao, Jiewen <jiewen.yao@intel.com> | 2015-11-25 04:28:46 +0000 |
|---|---|---|
| committer | jyao1 <jyao1@Edk2> | 2015-11-25 04:28:46 +0000 |
| commit | 9f419739d1ae849e0c4d75a131502f9367ca4a7d (patch) | |
| tree | 1cfdbe1dd88d83fbb5afe53248a51123077fe138 /UefiCpuPkg/PiSmmCpuDxeSmm | |
| parent | fe5f19494353421d3382f32f31a627e09724bbb2 (diff) | |
| download | edk2-platforms-9f419739d1ae849e0c4d75a131502f9367ca4a7d.tar.xz | |
Move RestoreSmmConfigurationInS3 function to PerformPreTasks().
In this way, we can centralize the silicon configuration in
PerformRemainingTasks()/PerformPreTasks() function.
If there are more features need to be configured, they can put in
PerformRemainingTasks()/PerformPreTasks() only.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>
Reviewed-by: "Laszlo Ersek" <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18938 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 10 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 22 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 9 |
3 files changed, 33 insertions, 8 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 80378a3faf..3e8b0936aa 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -412,15 +412,9 @@ BSPHandler ( AcquireSpinLockOrFail (&mSmmMpSyncData->CpuData[CpuIndex].Busy);
//
- // Restore SMM Configuration in S3 boot path.
+ // Perform the pre tasks
//
- if (mRestoreSmmConfigurationInS3) {
- //
- // Configure SMM Code Access Check feature if available.
- //
- ConfigSmmCodeAccessCheck ();
- mRestoreSmmConfigurationInS3 = FALSE;
- }
+ PerformPreTasks ();
//
// Invoke SMM Foundation EntryPoint with the processor information context.
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index 532ac0974b..2489848c79 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -1437,3 +1437,25 @@ PerformRemainingTasks ( mSmmReadyToLock = FALSE;
}
}
+
+/**
+ Perform the pre tasks.
+
+**/
+VOID
+PerformPreTasks (
+ VOID
+ )
+{
+ //
+ // Restore SMM Configuration in S3 boot path.
+ //
+ if (mRestoreSmmConfigurationInS3) {
+ //
+ // Configure SMM Code Access Check feature if available.
+ //
+ ConfigSmmCodeAccessCheck ();
+
+ mRestoreSmmConfigurationInS3 = FALSE;
+ }
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 106e67465c..66d85d80e1 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -587,6 +587,15 @@ PerformRemainingTasks ( );
/**
+ Perform the pre tasks.
+
+**/
+VOID
+PerformPreTasks (
+ VOID
+ );
+
+/**
Initialize MSR spin lock by MSR index.
@param MsrIndex MSR index value.
|