Adding files from OvmfPkg to common location. This is so multiple packages can use pre-built reset vector code.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9911 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 238 insertions, 0 deletions

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/16RealTo32Flat.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/16RealTo32Flat.asm
new file mode 100644
index 0000000000..3139ff50cb
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/16RealTo32Flat.asm
@@ -0,0 +1,133 @@
+;------------------------------------------------------------------------------

+; @file

+; Transition from 16 bit real mode into 32 bit flat protected mode

+;

+; Copyright (c) 2008 - 2010, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+;------------------------------------------------------------------------------

+

+%define SEC_DEFAULT_CR0  0x40000023

+%define SEC_DEFAULT_CR4  0x640

+

+BITS    16

+

+;

+; Modified:  EAX, EBX

+;

+TransitionFromReal16To32BitFlat:

+

+    debugShowPostCode POSTCODE_16BIT_MODE

+

+    cli

+

+    mov     bx, 0xf000

+    mov     ds, bx

+

+    mov     bx, ADDR16_OF(gdtr)

+

+o32 lgdt    [cs:bx]

+

+    mov     eax, SEC_DEFAULT_CR0

+    mov     cr0, eax

+

+    jmp     LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)

+BITS    32

+jumpTo32BitAndLandHere:

+

+    mov     eax, SEC_DEFAULT_CR4

+    mov     cr4, eax

+

+    debugShowPostCode POSTCODE_32BIT_MODE

+

+    mov     ax, LINEAR_SEL

+    mov     ds, ax

+    mov     es, ax

+    mov     fs, ax

+    mov     gs, ax

+    mov     ss, ax

+

+    OneTimeCallRet TransitionFromReal16To32BitFlat

+

+ALIGN   2

+

+gdtr:

+    dw      GDT_END - GDT_BASE - 1   ; GDT limit

+    dd      ADDR_OF(GDT_BASE)

+

+ALIGN   16

+

+;

+; Macros for GDT entries

+;

+

+%define  PRESENT_FLAG(p) (p << 7)

+%define  DPL(dpl) (dpl << 5)

+%define  SYSTEM_FLAG(s) (s << 4)

+%define  DESC_TYPE(t) (t)

+

+; Type: data, expand-up, writable, accessed

+%define  DATA32_TYPE 3

+

+; Type: execute, readable, expand-up, accessed

+%define  CODE32_TYPE 0xb

+

+; Type: execute, readable, expand-up, accessed

+%define  CODE64_TYPE 0xb

+

+%define  GRANULARITY_FLAG(g) (g << 7)

+%define  DEFAULT_SIZE32(d) (d << 6)

+%define  CODE64_FLAG(l) (l << 5)

+%define  UPPER_LIMIT(l) (l)

+

+;

+; The Global Descriptor Table (GDT)

+;

+

+GDT_BASE:

+; null descriptor

+NULL_SEL            equ $-GDT_BASE

+    DW      0            ; limit 15:0

+    DW      0            ; base 15:0

+    DB      0            ; base 23:16

+    DB      0            ; sys flag, dpl, type

+    DB      0            ; limit 19:16, flags

+    DB      0            ; base 31:24

+

+; linear data segment descriptor

+LINEAR_SEL          equ $-GDT_BASE

+    DW      0xffff       ; limit 15:0

+    DW      0            ; base 15:0

+    DB      0            ; base 23:16

+    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)

+    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)

+    DB      0            ; base 31:24

+

+; linear code segment descriptor

+LINEAR_CODE_SEL     equ $-GDT_BASE

+    DW      0xffff       ; limit 15:0

+    DW      0            ; base 15:0

+    DB      0            ; base 23:16

+    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)

+    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)

+    DB      0            ; base 31:24

+

+%ifdef ARCH_X64

+; linear code (64-bit) segment descriptor

+LINEAR_CODE64_SEL   equ $-GDT_BASE

+    DW      0xffff       ; limit 15:0

+    DW      0            ; base 15:0

+    DB      0            ; base 23:16

+    DB      PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)

+    DB      GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)

+    DB      0            ; base 31:24

+%endif

+

+GDT_END:

+

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm
new file mode 100644
index 0000000000..3d3d8b0267
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------

+; @file

+; 16-bit initialization code

+;

+; Copyright (c) 2008 - 2009, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+;------------------------------------------------------------------------------

+

+

+BITS    16

+

+;

+; @param[out] DI    'BP' to indicate boot-strap processor

+;

+EarlyBspInitReal16:

+    mov     di, 'BP'

+    jmp     short Main16

+

+;

+; @param[out] DI    'AP' to indicate application processor

+;

+EarlyApInitReal16:

+    mov     di, 'AP'

+    jmp     short Main16

+

+;

+; Modified:  EAX

+;

+; @param[in]  EAX   Initial value of the EAX register (BIST: Built-in Self Test)

+; @param[out] ESP   Initial value of the EAX register (BIST: Built-in Self Test)

+;

+EarlyInit16:

+    ;

+    ; ESP -  Initial value of the EAX register (BIST: Built-in Self Test)

+    ;

+    mov     esp, eax

+

+    debugInitialize

+

+    OneTimeCallRet EarlyInit16

+

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
new file mode 100644
index 0000000000..0eff743183
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm
@@ -0,0 +1,57 @@
+;------------------------------------------------------------------------------

+; @file

+; First code exectuted by processor after resetting.

+;

+; Copyright (c) 2008 - 2009, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+;------------------------------------------------------------------------------

+

+BITS    16

+

+ALIGN   16

+

+applicationProcessorEntryPoint:

+;

+; Application Processors entry point

+;

+; GenFv generates code aligned on a 4k boundary which will jump to this

+; location.  (0xffffffe0)  This allows the Local APIC Startup IPI to be

+; used to wake up the application processors.

+;

+    jmp     short EarlyApInitReal16

+

+ALIGN   8

+

+    DD      0

+

+;

+; The VTF signature

+;

+; VTF-0 means that the VTF (Volume Top File) code does not require

+; any fixups.

+;

+vtfSignature:

+    DB      'V', 'T', 'F', 0

+

+ALIGN   16

+

+resetVector:

+;

+; Reset Vector

+;

+; This is where the processor will begin execution

+;

+    wbinvd

+    jmp     short EarlyBspInitReal16

+

+ALIGN   16

+

+fourGigabytes:

+