diff options
author | Jeff Fan <jeff.fan@intel.com> | 2016-03-22 10:36:28 +0800 |
---|---|---|
committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-05-24 15:20:17 -0700 |
commit | 695e62d1419cf3a8ab65a96c86c9cf58d4206d61 (patch) | |
tree | a8e3c5cce7e6a0cca345976b9e219e5afa74de66 /UefiCpuPkg | |
parent | ed3d5ecb342dd6cca299ac72b30d4855a8b804a4 (diff) | |
download | edk2-platforms-695e62d1419cf3a8ab65a96c86c9cf58d4206d61.tar.xz |
UefiCpuPkg/PiSmmCpuDxeSmm: Allocate buffer for MSRs semaphores
Allocate MSRs semaphores in allocated aligned semaphores buffer.
And add it into semaphores structure.
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 3 | ||||
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 10 | ||||
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 10 |
3 files changed, 20 insertions, 3 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index bbff6e18b4..22c133202c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -1,7 +1,7 @@ /** @file
Code for Processor S3 restoration
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -48,7 +48,6 @@ AsmGetAddressMap ( #define LEGACY_REGION_SIZE (2 * 0x1000)
#define LEGACY_REGION_BASE (0xA0000 - LEGACY_REGION_SIZE)
-#define MSR_SPIN_LOCK_INIT_NUM 15
ACPI_CPU_DATA mAcpiCpuData;
UINT32 mNumberToFinish;
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 399315bad8..add770ff3c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -1210,6 +1210,7 @@ InitializeSmmCpuSemaphores ( UINTN TotalSize;
UINTN GlobalSemaphoresSize;
UINTN CpuSemaphoresSize;
+ UINTN MsrSemahporeSize;
UINTN SemaphoreSize;
UINTN Pages;
UINTN *SemaphoreBlock;
@@ -1219,7 +1220,8 @@ InitializeSmmCpuSemaphores ( ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;
CpuSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;
- TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize;
+ MsrSemahporeSize = MSR_SPIN_LOCK_INIT_NUM * SemaphoreSize;
+ TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize + MsrSemahporeSize;
DEBUG((EFI_D_INFO, "One Semaphore Size = 0x%x\n", SemaphoreSize));
DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));
Pages = EFI_SIZE_TO_PAGES (TotalSize);
@@ -1246,6 +1248,12 @@ InitializeSmmCpuSemaphores ( SemaphoreAddr += ProcessorCount * SemaphoreSize;
mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;
+ SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize + CpuSemaphoresSize;
+ mSmmCpuSemaphores.SemaphoreMsr.Msr = (SPIN_LOCK *)SemaphoreAddr;
+ mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter =
+ ((UINTN)SemaphoreBlock + Pages * SIZE_4KB - SemaphoreAddr) / SemaphoreSize;
+ ASSERT (mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter >= MSR_SPIN_LOCK_INIT_NUM);
+
mSmmMpSyncData->Counter = mSmmCpuSemaphores.SemaphoreGlobal.Counter;
mSmmMpSyncData->InsideSmm = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;
mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index df5980cd42..ad2109fde8 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -323,6 +323,8 @@ typedef struct { volatile BOOLEAN *CandidateBsp;
} SMM_DISPATCHER_MP_SYNC_DATA;
+#define MSR_SPIN_LOCK_INIT_NUM 15
+
typedef struct {
SPIN_LOCK SpinLock;
UINT32 MsrIndex;
@@ -375,6 +377,13 @@ typedef struct { volatile BOOLEAN *Present;
} SMM_CPU_SEMAPHORE_CPU;
+///
+/// All MSRs semaphores' pointer and counter
+///
+typedef struct {
+ SPIN_LOCK *Msr;
+ UINTN AvailableCounter;
+} SMM_CPU_SEMAPHORE_MSR;
///
/// All semaphores' information
@@ -382,6 +391,7 @@ typedef struct { typedef struct {
SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
+ SMM_CPU_SEMAPHORE_MSR SemaphoreMsr;
} SMM_CPU_SEMAPHORES;
extern IA32_DESCRIPTOR gcSmiGdtr;
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