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authorjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2011-09-15 17:25:17 +0000
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2011-09-15 17:25:17 +0000
commita0248b09366c096be88a2fbaaff071b28b5d4ca5 (patch)
tree623bc7cf0d2da99e88bf9fc82c2f5b134fa318fb /UefiCpuPkg
parent424b7c9f8f0b1587210de67baaee235288380c6a (diff)
downloadedk2-platforms-a0248b09366c096be88a2fbaaff071b28b5d4ca5.tar.xz
UefiCpuPkg VTF0: Add README, remove Makefile
* Add README * Remove Makefile which is no longer used to build VTF0 Signed-off-by: jljusten Reviewed-by: geekboy15a git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12355 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/ResetVector/Vtf0/Makefile42
-rw-r--r--UefiCpuPkg/ResetVector/Vtf0/README41
2 files changed, 41 insertions, 42 deletions
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Makefile b/UefiCpuPkg/ResetVector/Vtf0/Makefile
deleted file mode 100644
index 3882da40cd..0000000000
--- a/UefiCpuPkg/ResetVector/Vtf0/Makefile
+++ /dev/null
@@ -1,42 +0,0 @@
-## @file
-# Makefile to create FFS Raw sections for VTF images.
-#
-# Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-TARGETS = Bin/ResetVector.ia32.raw Bin/ResetVector.x64.raw
-ASM = nasm
-
-COMMON_DEPS = \
- Ia16/Real16ToFlat32.asm \
- Ia32/Flat32ToFlat64.asm \
- JumpToSec.asm \
- Ia16/ResetVectorVtf0.asm \
- Ia32/SearchForBfvBase.asm \
- Ia32/SearchForSecAndPeiEntries.asm \
- SerialDebug.asm \
- Makefile \
- Tools/FixupForRawSection.py
-
-.PHONY: all
-all: $(TARGETS)
-
-Bin/ResetVector.ia32.raw: $(COMMON_DEPS) ResetVectorCode.asm
- nasm -D ARCH_IA32 -o $@ ResetVectorCode.asm
- python Tools/FixupForRawSection.py $@
-
-Bin/ResetVector.x64.raw: $(COMMON_DEPS) ResetVectorCode.asm
- nasm -D ARCH_X64 -o $@ ResetVectorCode.asm
- python Tools/FixupForRawSection.py $@
-
-clean:
- -rm $(TARGETS)
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/README b/UefiCpuPkg/ResetVector/Vtf0/README
new file mode 100644
index 0000000000..22fb0f08e6
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/README
@@ -0,0 +1,41 @@
+
+=== HOW TO USE VTF0 ===
+
+Add this line to your FDF FV section:
+INF RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+(For X64 SEC/PEI change IA32 to X64 => 'USE = X64')
+
+In your FDF FFS file rules sections add:
+[Rule.Common.SEC.RESET_VECTOR]
+ FILE RAW = $(NAMED_GUID) {
+ RAW RAW |.raw
+ }
+
+=== VTF0 Boot Flow ===
+
+1. Transition to IA32 flat mode
+2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary
+3. Locate SEC image
+4. X64 VTF0 transitions to X64 mode
+5. Call SEC image entry point
+
+== VTF0 SEC input parameters ==
+
+All inputs to SEC image are register based:
+EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)
+DI - 'BP': boot-strap processor, or 'AP': application processor
+EBP/RBP - Pointer to the start of the Boot Firmware Volume
+
+=== HOW TO BUILD VTF0 ===
+
+Dependencies:
+* Python 2.5~2.7
+* Nasm with x86-64 support
+
+To rebuild the VTF0 binaries:
+1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0
+2. nasm and python should be in executable path
+3. Run this command:
+ python Build.py
+4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin
+