diff options
| author | Guo Mang <mang.guo@intel.com> | 2017-08-02 09:54:47 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-09-05 19:45:08 +0800 |
| commit | 6c128c65b5ec0e5b8b5a0ccb165f3afd29e485f8 (patch) | |
| tree | 444372d92a0ae8991fe4d15eb3937df43690dfda /UefiCpuPkg | |
| parent | b207c6434d7a5a4502975d322312e07017e8a8cb (diff) | |
| download | edk2-platforms-6c128c65b5ec0e5b8b5a0ccb165f3afd29e485f8.tar.xz | |
Remove core packages since we can get them from edk2 repository
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'UefiCpuPkg')
140 files changed, 0 insertions, 24463 deletions
diff --git a/UefiCpuPkg/Contributions.txt b/UefiCpuPkg/Contributions.txt deleted file mode 100644 index f87cbd73c6..0000000000 --- a/UefiCpuPkg/Contributions.txt +++ /dev/null @@ -1,218 +0,0 @@ -
-======================
-= Code Contributions =
-======================
-
-To make a contribution to a TianoCore project, follow these steps.
-1. Create a change description in the format specified below to
- use in the source control commit log.
-2. Your commit message must include your "Signed-off-by" signature,
- and "Contributed-under" message.
-3. Your "Contributed-under" message explicitly states that the
- contribution is made under the terms of the specified
- contribution agreement. Your "Contributed-under" message
- must include the name of contribution agreement and version.
- For example: Contributed-under: TianoCore Contribution Agreement 1.0
- The "TianoCore Contribution Agreement" is included below in
- this document.
-4. Submit your code to the TianoCore project using the process
- that the project documents on its web page. If the process is
- not documented, then submit the code on development email list
- for the project.
-5. It is preferred that contributions are submitted using the same
- copyright license as the base project. When that is not possible,
- then contributions using the following licenses can be accepted:
- * BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
- * BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
- * MIT: http://opensource.org/licenses/MIT
- * Python-2.0: http://opensource.org/licenses/Python-2.0
- * Zlib: http://opensource.org/licenses/Zlib
-
- Contributions of code put into the public domain can also be
- accepted.
-
- Contributions using other licenses might be accepted, but further
- review will be required.
-
-=====================================================
-= Change Description / Commit Message / Patch Email =
-=====================================================
-
-Your change description should use the standard format for a
-commit message, and must include your "Signed-off-by" signature
-and the "Contributed-under" message.
-
-== Sample Change Description / Commit Message =
-
-=== Start of sample patch email message ===
-
-From: Contributor Name <contributor@example.com>
-Subject: [PATCH] CodeModule: Brief-single-line-summary
-
-Full-commit-message
-
-Contributed-under: TianoCore Contribution Agreement 1.0
-Signed-off-by: Contributor Name <contributor@example.com>
----
-
-An extra message for the patch email which will not be considered part
-of the commit message can be added here.
-
-Patch content inline or attached
-
-=== End of sample patch email message ===
-
-=== Notes for sample patch email ===
-
-* The first line of commit message is taken from the email's subject
- line following [PATCH]. The remaining portion of the commit message
- is the email's content until the '---' line.
-* git format-patch is one way to create this format
-
-=== Definitions for sample patch email ===
-
-* "CodeModule" is a short idenfier for the affected code. For
- example MdePkg, or MdeModulePkg UsbBusDxe.
-* "Brief-single-line-summary" is a short summary of the change.
-* The entire first line should be less than ~70 characters.
-* "Full-commit-message" a verbose multiple line comment describing
- the change. Each line should be less than ~70 characters.
-* "Contributed-under" explicitely states that the contribution is
- made under the terms of the contribtion agreement. This
- agreement is included below in this document.
-* "Signed-off-by" is the contributor's signature identifying them
- by their real/legal name and their email address.
-
-========================================
-= TianoCore Contribution Agreement 1.0 =
-========================================
-
-INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
-INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
-PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
-TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
-TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
-REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
-CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
-OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
-BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
-AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
-AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
-USE THE CONTENT.
-
-Unless otherwise indicated, all Content made available on the TianoCore
-site is provided to you under the terms and conditions of the BSD
-License ("BSD"). A copy of the BSD License is available at
-http://opensource.org/licenses/bsd-license.php
-or when applicable, in the associated License.txt file.
-
-Certain other content may be made available under other licenses as
-indicated in or with such Content. (For example, in a License.txt file.)
-
-You accept and agree to the following terms and conditions for Your
-present and future Contributions submitted to TianoCore site. Except
-for the license granted to Intel hereunder, You reserve all right,
-title, and interest in and to Your Contributions.
-
-== SECTION 1: Definitions ==
-* "You" or "Contributor" shall mean the copyright owner or legal
- entity authorized by the copyright owner that is making a
- Contribution hereunder. All other entities that control, are
- controlled by, or are under common control with that entity are
- considered to be a single Contributor. For the purposes of this
- definition, "control" means (i) the power, direct or indirect, to
- cause the direction or management of such entity, whether by
- contract or otherwise, or (ii) ownership of fifty percent (50%)
- or more of the outstanding shares, or (iii) beneficial ownership
- of such entity.
-* "Contribution" shall mean any original work of authorship,
- including any modifications or additions to an existing work,
- that is intentionally submitted by You to the TinaoCore site for
- inclusion in, or documentation of, any of the Content. For the
- purposes of this definition, "submitted" means any form of
- electronic, verbal, or written communication sent to the
- TianoCore site or its representatives, including but not limited
- to communication on electronic mailing lists, source code
- control systems, and issue tracking systems that are managed by,
- or on behalf of, the TianoCore site for the purpose of
- discussing and improving the Content, but excluding
- communication that is conspicuously marked or otherwise
- designated in writing by You as "Not a Contribution."
-
-== SECTION 2: License for Contributions ==
-* Contributor hereby agrees that redistribution and use of the
- Contribution in source and binary forms, with or without
- modification, are permitted provided that the following
- conditions are met:
-** Redistributions of source code must retain the Contributor's
- copyright notice, this list of conditions and the following
- disclaimer.
-** Redistributions in binary form must reproduce the Contributor's
- copyright notice, this list of conditions and the following
- disclaimer in the documentation and/or other materials provided
- with the distribution.
-* Disclaimer. None of the names of Contributor, Intel, or the names
- of their respective contributors may be used to endorse or
- promote products derived from this software without specific
- prior written permission.
-* Contributor grants a license (with the right to sublicense) under
- claims of Contributor's patents that Contributor can license that
- are infringed by the Contribution (as delivered by Contributor) to
- make, use, distribute, sell, offer for sale, and import the
- Contribution and derivative works thereof solely to the minimum
- extent necessary for licensee to exercise the granted copyright
- license; this patent license applies solely to those portions of
- the Contribution that are unmodified. No hardware per se is
- licensed.
-* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
- CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
- CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
- DAMAGE.
-
-== SECTION 3: Representations ==
-* You represent that You are legally entitled to grant the above
- license. If your employer(s) has rights to intellectual property
- that You create that includes Your Contributions, You represent
- that You have received permission to make Contributions on behalf
- of that employer, that Your employer has waived such rights for
- Your Contributions.
-* You represent that each of Your Contributions is Your original
- creation (see Section 4 for submissions on behalf of others).
- You represent that Your Contribution submissions include complete
- details of any third-party license or other restriction
- (including, but not limited to, related patents and trademarks)
- of which You are personally aware and which are associated with
- any part of Your Contributions.
-
-== SECTION 4: Third Party Contributions ==
-* Should You wish to submit work that is not Your original creation,
- You may submit it to TianoCore site separately from any
- Contribution, identifying the complete details of its source
- and of any license or other restriction (including, but not
- limited to, related patents, trademarks, and license agreements)
- of which You are personally aware, and conspicuously marking the
- work as "Submitted on behalf of a third-party: [named here]".
-
-== SECTION 5: Miscellaneous ==
-* Applicable Laws. Any claims arising under or relating to this
- Agreement shall be governed by the internal substantive laws of
- the State of Delaware or federal courts located in Delaware,
- without regard to principles of conflict of laws.
-* Language. This Agreement is in the English language only, which
- language shall be controlling in all respects, and all versions
- of this Agreement in any other language shall be for accommodation
- only and shall not be binding. All communications and notices made
- or given pursuant to this Agreement, and all documentation and
- support to be provided, unless otherwise noted, shall be in the
- English language.
-
diff --git a/UefiCpuPkg/CpuDxe/ApStartup.c b/UefiCpuPkg/CpuDxe/ApStartup.c deleted file mode 100644 index 38a9c0e6ea..0000000000 --- a/UefiCpuPkg/CpuDxe/ApStartup.c +++ /dev/null @@ -1,478 +0,0 @@ -/** @file
- CPU DXE AP Startup
-
- Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuDxe.h"
-#include "CpuGdt.h"
-#include "CpuMp.h"
-
-#pragma pack(1)
-
-typedef struct {
- UINT8 MoveIa32EferMsrToEcx[5];
- UINT8 ReadIa32EferMsr[2];
- UINT8 SetExecuteDisableBitEnableBit[4];
- UINT8 WriteIa32EferMsr[2];
-
-#if defined (MDE_CPU_IA32)
- UINT8 MovEaxCr3;
- UINT32 Cr3Value;
- UINT8 MovCr3Eax[3];
-
- UINT8 MoveCr4ToEax[3];
- UINT8 SetCr4Bit5[4];
- UINT8 MoveEaxToCr4[3];
-
- UINT8 MoveCr0ToEax[3];
- UINT8 SetCr0PagingBit[4];
- UINT8 MoveEaxToCr0[3];
-#endif
-} ENABLE_EXECUTE_DISABLE_CODE;
-
-ENABLE_EXECUTE_DISABLE_CODE mEnableExecuteDisableCodeTemplate = {
- { 0xB9, 0x80, 0x00, 0x00, 0xC0 }, // mov ecx, 0xc0000080
- { 0x0F, 0x32 }, // rdmsr
- { 0x0F, 0xBA, 0xE8, 0x0B }, // bts eax, 11
- { 0x0F, 0x30 }, // wrmsr
-
-#if defined (MDE_CPU_IA32)
- 0xB8, 0x00000000, // mov eax, cr3 value
- { 0x0F, 0x22, 0xd8 }, // mov cr3, eax
-
- { 0x0F, 0x20, 0xE0 }, // mov eax, cr4
- { 0x0F, 0xBA, 0xE8, 0x05 }, // bts eax, 5
- { 0x0F, 0x22, 0xE0 }, // mov cr4, eax
-
- { 0x0F, 0x20, 0xC0 }, // mov eax, cr0
- { 0x0F, 0xBA, 0xE8, 0x1F }, // bts eax, 31
- { 0x0F, 0x22, 0xC0 }, // mov cr0, eax
-#endif
-};
-
-typedef struct {
- UINT8 JmpToCli[2];
-
- UINT16 GdtLimit;
- UINT32 GdtBase;
-
- UINT8 Cli;
-
- UINT8 MovAxRealSegment; UINT16 RealSegment;
- UINT8 MovDsAx[2];
-
- UINT8 MovBxGdtr[3];
- UINT8 LoadGdt[5];
-
- UINT8 MovEaxCr0[2];
- UINT32 MovEaxCr0Value;
- UINT8 MovCr0Eax[3];
-
- UINT8 FarJmp32Flat[2]; UINT32 FlatJmpOffset; UINT16 FlatJmpSelector;
-
- //
- // Now in IA32
- //
- UINT8 MovEaxCr4;
- UINT32 MovEaxCr4Value;
- UINT8 MovCr4Eax[3];
-
- UINT8 MoveDataSelectorIntoAx[2]; UINT16 FlatDataSelector;
- UINT8 MoveFlatDataSelectorFromAxToDs[2];
- UINT8 MoveFlatDataSelectorFromAxToEs[2];
- UINT8 MoveFlatDataSelectorFromAxToFs[2];
- UINT8 MoveFlatDataSelectorFromAxToGs[2];
- UINT8 MoveFlatDataSelectorFromAxToSs[2];
-
- //
- // Code placeholder to enable PAE Execute Disable for IA32
- // and enable Execute Disable Bit for X64
- //
- ENABLE_EXECUTE_DISABLE_CODE EnableExecuteDisable;
-
-#if defined (MDE_CPU_X64)
- //
- // Transition to X64
- //
- UINT8 MovEaxCr3;
- UINT32 Cr3Value;
- UINT8 MovCr3Eax[3];
-
- UINT8 MoveCr4ToEax[3];
- UINT8 SetCr4Bit5[4];
- UINT8 MoveEaxToCr4[3];
-
- UINT8 MoveLongModeEnableMsrToEcx[5];
- UINT8 ReadLmeMsr[2];
- UINT8 SetLongModeEnableBit[4];
- UINT8 WriteLmeMsr[2];
-
- UINT8 MoveCr0ToEax[3];
- UINT8 SetCr0PagingBit[4];
- UINT8 MoveEaxToCr0[3];
- //UINT8 DeadLoop[2];
-
- UINT8 FarJmp32LongMode; UINT32 LongJmpOffset; UINT16 LongJmpSelector;
-#endif // defined (MDE_CPU_X64)
-
-#if defined (MDE_CPU_X64)
- UINT8 MovEaxOrRaxCpuDxeEntry[2]; UINTN CpuDxeEntryValue;
-#else
- UINT8 MovEaxOrRaxCpuDxeEntry; UINTN CpuDxeEntryValue;
-#endif
- UINT8 JmpToCpuDxeEntry[2];
-
-} STARTUP_CODE;
-
-#pragma pack()
-
-/**
- This .asm code used for translating processor from 16 bit real mode into
- 64 bit long mode. which help to create the mStartupCodeTemplate value.
-
- To assemble:
- * nasm -o ApStartup ApStartup.asm
- Then disassemble:
- * ndisasm -b 16 ApStartup
- * ndisasm -b 16 -e 6 ApStartup
- * ndisasm -b 32 -e 32 ApStartup (This -e offset may need adjustment)
- * ndisasm -b 64 -e 0x83 ApStartup (This -e offset may need adjustment)
-
- %define DEFAULT_CR0 0x00000023
- %define DEFAULT_CR4 0x640
-
- BITS 16
-
- jmp short TransitionFromReal16To32BitFlat
-
- ALIGN 2
-
- Gdtr:
- dw 0x5a5a
- dd 0x5a5a5a5a
-
- ;
- ; Modified: EAX, EBX
- ;
- TransitionFromReal16To32BitFlat:
-
- cli
- mov ax, 0x5a5a
- mov ds, ax
-
- mov bx, Gdtr
- o32 lgdt [ds:bx]
-
- mov eax, cr4
- btc eax, 5
- mov cr4, eax
-
- mov eax, DEFAULT_CR0
- mov cr0, eax
-
- jmp 0x5a5a:dword jumpTo32BitAndLandHere
- BITS 32
- jumpTo32BitAndLandHere:
-
- mov eax, DEFAULT_CR4
- mov cr4, eax
-
- mov ax, 0x5a5a
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- ;
- ; Jump to CpuDxe for IA32
- ;
- mov eax, 0x5a5a5a5a
- or eax, eax
- jz Transition32FlatTo64Flat
- jmp eax
-
- ;
- ; Transition to X64
- ;
- Transition32FlatTo64Flat:
- mov eax, 0x5a5a5a5a
- mov cr3, eax
-
- mov eax, cr4
- bts eax, 5 ; enable PAE
- mov cr4, eax
-
- mov ecx, 0xc0000080
- rdmsr
- bts eax, 8 ; set LME
- wrmsr
-
- mov eax, cr0
- bts eax, 31 ; set PG
- mov cr0, eax ; enable paging
-
- ;
- ; Jump to CpuDxe for X64
- ;
- jmp 0x5a5a:jumpTo64BitAndLandHere
- BITS 64
- jumpTo64BitAndLandHere:
- mov rax, 0xcdcdcdcdcdcdcdcd
- jmp rax
-**/
-STARTUP_CODE mStartupCodeTemplate = {
- { 0xeb, 0x06 }, // Jump to cli
- 0, // GDT Limit
- 0, // GDT Base
- 0xfa, // cli (Clear Interrupts)
- 0xb8, 0x0000, // mov ax, RealSegment
- { 0x8e, 0xd8 }, // mov ds, ax
- { 0xBB, 0x02, 0x00 }, // mov bx, Gdtr
- { 0x3e, 0x66, 0x0f, 0x01, 0x17 }, // lgdt [ds:bx]
- { 0x66, 0xB8 }, 0x00000023, // mov eax, cr0 value
- { 0x0F, 0x22, 0xC0 }, // mov cr0, eax
- { 0x66, 0xEA }, // far jmp to 32-bit flat
- OFFSET_OF(STARTUP_CODE, MovEaxCr4),
- LINEAR_CODE_SEL,
- 0xB8, 0x00000640, // mov eax, cr4 value
- { 0x0F, 0x22, 0xe0 }, // mov cr4, eax
- { 0x66, 0xb8 }, CPU_DATA_SEL, // mov ax, FlatDataSelector
- { 0x8e, 0xd8 }, // mov ds, ax
- { 0x8e, 0xc0 }, // mov es, ax
- { 0x8e, 0xe0 }, // mov fs, ax
- { 0x8e, 0xe8 }, // mov gs, ax
- { 0x8e, 0xd0 }, // mov ss, ax
-
-#if defined (MDE_CPU_X64)
- //
- // Code placeholder to enable Execute Disable Bit for X64
- // Default is all NOP - No Operation
- //
- {
- { 0x90, 0x90, 0x90, 0x90, 0x90 },
- { 0x90, 0x90 },
- { 0x90, 0x90, 0x90, 0x90 },
- { 0x90, 0x90 },
- },
-
- 0xB8, 0x00000000, // mov eax, cr3 value
- { 0x0F, 0x22, 0xd8 }, // mov cr3, eax
-
- { 0x0F, 0x20, 0xE0 }, // mov eax, cr4
- { 0x0F, 0xBA, 0xE8, 0x05 }, // bts eax, 5
- { 0x0F, 0x22, 0xE0 }, // mov cr4, eax
-
- { 0xB9, 0x80, 0x00, 0x00, 0xC0 }, // mov ecx, 0xc0000080
- { 0x0F, 0x32 }, // rdmsr
- { 0x0F, 0xBA, 0xE8, 0x08 }, // bts eax, 8
- { 0x0F, 0x30 }, // wrmsr
-
- { 0x0F, 0x20, 0xC0 }, // mov eax, cr0
- { 0x0F, 0xBA, 0xE8, 0x1F }, // bts eax, 31
- { 0x0F, 0x22, 0xC0 }, // mov cr0, eax
-
- 0xEA, // FarJmp32LongMode
- OFFSET_OF(STARTUP_CODE, MovEaxOrRaxCpuDxeEntry),
- LINEAR_CODE64_SEL,
-#else
- //
- // Code placeholder to enable PAE Execute Disable for IA32
- // Default is all NOP - No Operation
- //
- {
- { 0x90, 0x90, 0x90, 0x90, 0x90 },
- { 0x90, 0x90 },
- { 0x90, 0x90, 0x90, 0x90 },
- { 0x90, 0x90 },
-
- 0x90, 0x90909090,
- { 0x90, 0x90, 0x90 },
-
- { 0x90, 0x90, 0x90 },
- { 0x90, 0x90, 0x90, 0x90 },
- { 0x90, 0x90, 0x90 },
-
- { 0x90, 0x90, 0x90 },
- { 0x90, 0x90, 0x90, 0x90 },
- { 0x90, 0x90, 0x90 },
- },
-#endif
-
- //0xeb, 0xfe, // jmp $
-#if defined (MDE_CPU_X64)
- { 0x48, 0xb8 }, 0x0, // mov rax, X64 CpuDxe MP Entry Point
-#else
- 0xB8, 0x0, // mov eax, IA32 CpuDxe MP Entry Point
-#endif
- { 0xff, 0xe0 }, // jmp to eax/rax (CpuDxe MP Entry Point)
-
-};
-
-volatile STARTUP_CODE *StartupCode = NULL;
-
-/**
- The function will check if BSP Execute Disable is enabled.
- DxeIpl may have enabled Execute Disable for BSP,
- APs need to get the status and sync up the settings.
-
- @retval TRUE BSP Execute Disable is enabled.
- @retval FALSE BSP Execute Disable is not enabled.
-
-**/
-BOOLEAN
-IsBspExecuteDisableEnabled (
- VOID
- )
-{
- UINT32 RegEax;
- UINT32 RegEdx;
- UINT64 MsrRegisters;
- BOOLEAN Enabled;
-
- Enabled = FALSE;
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000001) {
- AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
- //
- // Cpuid 0x80000001
- // Bit 20: Execute Disable Bit available.
- //
- if ((RegEdx & BIT20) != 0) {
- MsrRegisters = AsmReadMsr64 (0xC0000080);
- //
- // Msr 0xC0000080
- // Bit 11: Execute Disable Bit enable.
- //
- if ((MsrRegisters & BIT11) != 0) {
- Enabled = TRUE;
- }
- }
- }
-
- return Enabled;
-}
-
-/**
- Prepares Startup Code for APs.
- This function prepares Startup Code for APs.
-
- @retval EFI_SUCCESS The APs were started
- @retval EFI_OUT_OF_RESOURCES Cannot allocate memory to start APs
-
-**/
-EFI_STATUS
-PrepareAPStartupCode (
- VOID
- )
-{
- EFI_STATUS Status;
- IA32_DESCRIPTOR Gdtr;
- EFI_PHYSICAL_ADDRESS StartAddress;
-
- StartAddress = BASE_1MB;
- Status = gBS->AllocatePages (
- AllocateMaxAddress,
- EfiACPIMemoryNVS,
- EFI_SIZE_TO_PAGES (sizeof (*StartupCode)),
- &StartAddress
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- StartupCode = (STARTUP_CODE*)(VOID*)(UINTN) StartAddress;
- CopyMem ((VOID*) StartupCode, &mStartupCodeTemplate, sizeof (*StartupCode));
- StartupCode->RealSegment = (UINT16) (((UINTN) StartAddress) >> 4);
-
- AsmReadGdtr (&Gdtr);
- StartupCode->GdtLimit = Gdtr.Limit;
- StartupCode->GdtBase = (UINT32) Gdtr.Base;
-
- StartupCode->CpuDxeEntryValue = (UINTN) AsmApEntryPoint;
-
- StartupCode->FlatJmpOffset += (UINT32) StartAddress;
-
- if (IsBspExecuteDisableEnabled ()) {
- CopyMem (
- (VOID*) &StartupCode->EnableExecuteDisable,
- &mEnableExecuteDisableCodeTemplate,
- sizeof (ENABLE_EXECUTE_DISABLE_CODE)
- );
- }
-#if defined (MDE_CPU_X64)
- StartupCode->Cr3Value = (UINT32) AsmReadCr3 ();
- StartupCode->LongJmpOffset += (UINT32) StartAddress;
-#else
- StartupCode->EnableExecuteDisable.Cr3Value = (UINT32) AsmReadCr3 ();
-#endif
-
- return EFI_SUCCESS;
-}
-
-/**
- Free the code buffer of startup AP.
-
-**/
-VOID
-FreeApStartupCode (
- VOID
- )
-{
- if (StartupCode != NULL) {
- gBS->FreePages ((EFI_PHYSICAL_ADDRESS)(UINTN)(VOID*) StartupCode,
- EFI_SIZE_TO_PAGES (sizeof (*StartupCode)));
- }
-}
-
-
-/**
- Starts the Application Processors and directs them to jump to the
- specified routine.
-
- The processor jumps to this code in flat mode, but the processor's
- stack is not initialized.
-
- @retval EFI_SUCCESS The APs were started
-
-**/
-EFI_STATUS
-StartApsStackless (
- VOID
- )
-{
- SendInitSipiSipiAllExcludingSelf ((UINT32)(UINTN)(VOID*) StartupCode);
- //
- // Wait 100 milliseconds for APs to arrive at the ApEntryPoint routine
- //
- MicroSecondDelay (100 * 1000);
-
- return EFI_SUCCESS;
-}
-
-/**
- Resets the Application Processor and directs it to jump to the
- specified routine.
-
- The processor jumps to this code in flat mode, but the processor's
- stack is not initialized.
-
- @param ProcessorId the AP of ProcessorId was reset
-**/
-VOID
-ResetApStackless (
- IN UINT32 ProcessorId
- )
-{
- SendInitSipiSipi (ProcessorId,
- (UINT32)(UINTN)(VOID*) StartupCode);
-}
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c deleted file mode 100644 index c9df4e146a..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ /dev/null @@ -1,905 +0,0 @@ -/** @file
- CPU DXE Module.
-
- Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuDxe.h"
-#include "CpuMp.h"
-
-//
-// Global Variables
-//
-BOOLEAN InterruptState = FALSE;
-EFI_HANDLE mCpuHandle = NULL;
-BOOLEAN mIsFlushingGCD;
-UINT64 mValidMtrrAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS;
-UINT64 mValidMtrrBitsMask = MTRR_LIB_MSR_VALID_MASK;
-
-FIXED_MTRR mFixedMtrrTable[] = {
- {
- MTRR_LIB_IA32_MTRR_FIX64K_00000,
- 0,
- 0x10000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX16K_80000,
- 0x80000,
- 0x4000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX16K_A0000,
- 0xA0000,
- 0x4000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_C0000,
- 0xC0000,
- 0x1000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_C8000,
- 0xC8000,
- 0x1000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_D0000,
- 0xD0000,
- 0x1000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_D8000,
- 0xD8000,
- 0x1000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_E0000,
- 0xE0000,
- 0x1000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_E8000,
- 0xE8000,
- 0x1000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_F0000,
- 0xF0000,
- 0x1000
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_F8000,
- 0xF8000,
- 0x1000
- },
-};
-
-
-EFI_CPU_ARCH_PROTOCOL gCpu = {
- CpuFlushCpuDataCache,
- CpuEnableInterrupt,
- CpuDisableInterrupt,
- CpuGetInterruptState,
- CpuInit,
- CpuRegisterInterruptHandler,
- CpuGetTimerValue,
- CpuSetMemoryAttributes,
- 1, // NumberOfTimers
- 4 // DmaBufferAlignment
-};
-
-//
-// CPU Arch Protocol Functions
-//
-
-/**
- Flush CPU data cache. If the instruction cache is fully coherent
- with all DMA operations then function can just return EFI_SUCCESS.
-
- @param This Protocol instance structure
- @param Start Physical address to start flushing from.
- @param Length Number of bytes to flush. Round up to chipset
- granularity.
- @param FlushType Specifies the type of flush operation to perform.
-
- @retval EFI_SUCCESS If cache was flushed
- @retval EFI_UNSUPPORTED If flush type is not supported.
- @retval EFI_DEVICE_ERROR If requested range could not be flushed.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuFlushCpuDataCache (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_PHYSICAL_ADDRESS Start,
- IN UINT64 Length,
- IN EFI_CPU_FLUSH_TYPE FlushType
- )
-{
- if (FlushType == EfiCpuFlushTypeWriteBackInvalidate) {
- AsmWbinvd ();
- return EFI_SUCCESS;
- } else if (FlushType == EfiCpuFlushTypeInvalidate) {
- AsmInvd ();
- return EFI_SUCCESS;
- } else {
- return EFI_UNSUPPORTED;
- }
-}
-
-
-/**
- Enables CPU interrupts.
-
- @param This Protocol instance structure
-
- @retval EFI_SUCCESS If interrupts were enabled in the CPU
- @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuEnableInterrupt (
- IN EFI_CPU_ARCH_PROTOCOL *This
- )
-{
- EnableInterrupts ();
-
- InterruptState = TRUE;
- return EFI_SUCCESS;
-}
-
-
-/**
- Disables CPU interrupts.
-
- @param This Protocol instance structure
-
- @retval EFI_SUCCESS If interrupts were disabled in the CPU.
- @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuDisableInterrupt (
- IN EFI_CPU_ARCH_PROTOCOL *This
- )
-{
- DisableInterrupts ();
-
- InterruptState = FALSE;
- return EFI_SUCCESS;
-}
-
-
-/**
- Return the state of interrupts.
-
- @param This Protocol instance structure
- @param State Pointer to the CPU's current interrupt state
-
- @retval EFI_SUCCESS If interrupts were disabled in the CPU.
- @retval EFI_INVALID_PARAMETER State is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuGetInterruptState (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- OUT BOOLEAN *State
- )
-{
- if (State == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- *State = InterruptState;
- return EFI_SUCCESS;
-}
-
-
-/**
- Generates an INIT to the CPU.
-
- @param This Protocol instance structure
- @param InitType Type of CPU INIT to perform
-
- @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
- seen.
- @retval EFI_DEVICE_ERROR If CPU INIT failed.
- @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuInit (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_CPU_INIT_TYPE InitType
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-
-/**
- Registers a function to be called from the CPU interrupt handler.
-
- @param This Protocol instance structure
- @param InterruptType Defines which interrupt to hook. IA-32
- valid range is 0x00 through 0xFF
- @param InterruptHandler A pointer to a function of type
- EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. A null
- pointer is an error condition.
-
- @retval EFI_SUCCESS If handler installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
- for InterruptType was previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
- InterruptType was not previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
- is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuRegisterInterruptHandler (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- )
-{
- return RegisterCpuInterruptHandler (InterruptType, InterruptHandler);
-}
-
-
-/**
- Returns a timer value from one of the CPU's internal timers. There is no
- inherent time interval between ticks but is a function of the CPU frequency.
-
- @param This - Protocol instance structure.
- @param TimerIndex - Specifies which CPU timer is requested.
- @param TimerValue - Pointer to the returned timer value.
- @param TimerPeriod - A pointer to the amount of time that passes
- in femtoseconds (10-15) for each increment
- of TimerValue. If TimerValue does not
- increment at a predictable rate, then 0 is
- returned. The amount of time that has
- passed between two calls to GetTimerValue()
- can be calculated with the formula
- (TimerValue2 - TimerValue1) * TimerPeriod.
- This parameter is optional and may be NULL.
-
- @retval EFI_SUCCESS - If the CPU timer count was returned.
- @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
- @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
- @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuGetTimerValue (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN UINT32 TimerIndex,
- OUT UINT64 *TimerValue,
- OUT UINT64 *TimerPeriod OPTIONAL
- )
-{
- if (TimerValue == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (TimerIndex != 0) {
- return EFI_INVALID_PARAMETER;
- }
-
- *TimerValue = AsmReadTsc ();
-
- if (TimerPeriod != NULL) {
- //
- // BugBug: Hard coded. Don't know how to do this generically
- //
- *TimerPeriod = 1000000000;
- }
-
- return EFI_SUCCESS;
-}
-
-
-/**
- Implementation of SetMemoryAttributes() service of CPU Architecture Protocol.
-
- This function modifies the attributes for the memory region specified by BaseAddress and
- Length from their current attributes to the attributes specified by Attributes.
-
- @param This The EFI_CPU_ARCH_PROTOCOL instance.
- @param BaseAddress The physical address that is the start address of a memory region.
- @param Length The size in bytes of the memory region.
- @param Attributes The bit mask of attributes to set for the memory region.
-
- @retval EFI_SUCCESS The attributes were set for the memory region.
- @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
- BaseAddress and Length cannot be modified.
- @retval EFI_INVALID_PARAMETER Length is zero.
- Attributes specified an illegal combination of attributes that
- cannot be set together.
- @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
- the memory resource range.
- @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
- resource range specified by BaseAddress and Length.
- The bit mask of attributes is not support for the memory resource
- range specified by BaseAddress and Length.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuSetMemoryAttributes (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- )
-{
- RETURN_STATUS Status;
- MTRR_MEMORY_CACHE_TYPE CacheType;
-
- if (!IsMtrrSupported ()) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // If this function is called because GCD SetMemorySpaceAttributes () is called
- // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory
- // map with MTRR values. So there is no need to modify MTRRs, just return immediately
- // to avoid unnecessary computing.
- //
- if (mIsFlushingGCD) {
- DEBUG((EFI_D_INFO, " Flushing GCD\n"));
- return EFI_SUCCESS;
- }
-
- switch (Attributes) {
- case EFI_MEMORY_UC:
- CacheType = CacheUncacheable;
- break;
-
- case EFI_MEMORY_WC:
- CacheType = CacheWriteCombining;
- break;
-
- case EFI_MEMORY_WT:
- CacheType = CacheWriteThrough;
- break;
-
- case EFI_MEMORY_WP:
- CacheType = CacheWriteProtected;
- break;
-
- case EFI_MEMORY_WB:
- CacheType = CacheWriteBack;
- break;
-
- case EFI_MEMORY_UCE:
- case EFI_MEMORY_RP:
- case EFI_MEMORY_XP:
- case EFI_MEMORY_RUNTIME:
- return EFI_UNSUPPORTED;
-
- default:
- return EFI_INVALID_PARAMETER;
- }
- //
- // call MTRR libary function
- //
- Status = MtrrSetMemoryAttribute (
- BaseAddress,
- Length,
- CacheType
- );
-
- return (EFI_STATUS) Status;
-}
-
-/**
- Initializes the valid bits mask and valid address mask for MTRRs.
-
- This function initializes the valid bits mask and valid address mask for MTRRs.
-
-**/
-VOID
-InitializeMtrrMask (
- VOID
- )
-{
- UINT32 RegEax;
- UINT8 PhysicalAddressBits;
-
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
-
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-
- PhysicalAddressBits = (UINT8) RegEax;
-
- mValidMtrrBitsMask = LShiftU64 (1, PhysicalAddressBits) - 1;
- mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;
- } else {
- mValidMtrrBitsMask = MTRR_LIB_MSR_VALID_MASK;
- mValidMtrrAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS;
- }
-}
-
-/**
- Gets GCD Mem Space type from MTRR Type.
-
- This function gets GCD Mem Space type from MTRR Type.
-
- @param MtrrAttributes MTRR memory type
-
- @return GCD Mem Space type
-
-**/
-UINT64
-GetMemorySpaceAttributeFromMtrrType (
- IN UINT8 MtrrAttributes
- )
-{
- switch (MtrrAttributes) {
- case MTRR_CACHE_UNCACHEABLE:
- return EFI_MEMORY_UC;
- case MTRR_CACHE_WRITE_COMBINING:
- return EFI_MEMORY_WC;
- case MTRR_CACHE_WRITE_THROUGH:
- return EFI_MEMORY_WT;
- case MTRR_CACHE_WRITE_PROTECTED:
- return EFI_MEMORY_WP;
- case MTRR_CACHE_WRITE_BACK:
- return EFI_MEMORY_WB;
- default:
- return 0;
- }
-}
-
-/**
- Searches memory descriptors covered by given memory range.
-
- This function searches into the Gcd Memory Space for descriptors
- (from StartIndex to EndIndex) that contains the memory range
- specified by BaseAddress and Length.
-
- @param MemorySpaceMap Gcd Memory Space Map as array.
- @param NumberOfDescriptors Number of descriptors in map.
- @param BaseAddress BaseAddress for the requested range.
- @param Length Length for the requested range.
- @param StartIndex Start index into the Gcd Memory Space Map.
- @param EndIndex End index into the Gcd Memory Space Map.
-
- @retval EFI_SUCCESS Search successfully.
- @retval EFI_NOT_FOUND The requested descriptors does not exist.
-
-**/
-EFI_STATUS
-SearchGcdMemorySpaces (
- IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
- IN UINTN NumberOfDescriptors,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- OUT UINTN *StartIndex,
- OUT UINTN *EndIndex
- )
-{
- UINTN Index;
-
- *StartIndex = 0;
- *EndIndex = 0;
- for (Index = 0; Index < NumberOfDescriptors; Index++) {
- if (BaseAddress >= MemorySpaceMap[Index].BaseAddress &&
- BaseAddress < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length) {
- *StartIndex = Index;
- }
- if (BaseAddress + Length - 1 >= MemorySpaceMap[Index].BaseAddress &&
- BaseAddress + Length - 1 < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length) {
- *EndIndex = Index;
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
-}
-
-/**
- Sets the attributes for a specified range in Gcd Memory Space Map.
-
- This function sets the attributes for a specified range in
- Gcd Memory Space Map.
-
- @param MemorySpaceMap Gcd Memory Space Map as array
- @param NumberOfDescriptors Number of descriptors in map
- @param BaseAddress BaseAddress for the range
- @param Length Length for the range
- @param Attributes Attributes to set
-
- @retval EFI_SUCCESS Memory attributes set successfully
- @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
-
-**/
-EFI_STATUS
-SetGcdMemorySpaceAttributes (
- IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap,
- IN UINTN NumberOfDescriptors,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINTN StartIndex;
- UINTN EndIndex;
- EFI_PHYSICAL_ADDRESS RegionStart;
- UINT64 RegionLength;
-
- //
- // Get all memory descriptors covered by the memory range
- //
- Status = SearchGcdMemorySpaces (
- MemorySpaceMap,
- NumberOfDescriptors,
- BaseAddress,
- Length,
- &StartIndex,
- &EndIndex
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Go through all related descriptors and set attributes accordingly
- //
- for (Index = StartIndex; Index <= EndIndex; Index++) {
- if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
- continue;
- }
- //
- // Calculate the start and end address of the overlapping range
- //
- if (BaseAddress >= MemorySpaceMap[Index].BaseAddress) {
- RegionStart = BaseAddress;
- } else {
- RegionStart = MemorySpaceMap[Index].BaseAddress;
- }
- if (BaseAddress + Length - 1 < MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length) {
- RegionLength = BaseAddress + Length - RegionStart;
- } else {
- RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
- }
- //
- // Set memory attributes according to MTRR attribute and the original attribute of descriptor
- //
- gDS->SetMemorySpaceAttributes (
- RegionStart,
- RegionLength,
- (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
- );
- }
-
- return EFI_SUCCESS;
-}
-
-
-/**
- Refreshes the GCD Memory Space attributes according to MTRRs.
-
- This function refreshes the GCD Memory Space attributes according to MTRRs.
-
-**/
-VOID
-RefreshGcdMemoryAttributes (
- VOID
- )
-{
- EFI_STATUS Status;
- UINTN Index;
- UINTN SubIndex;
- UINT64 RegValue;
- EFI_PHYSICAL_ADDRESS BaseAddress;
- UINT64 Length;
- UINT64 Attributes;
- UINT64 CurrentAttributes;
- UINT8 MtrrType;
- UINTN NumberOfDescriptors;
- EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
- UINT64 DefaultAttributes;
- VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
- MTRR_FIXED_SETTINGS MtrrFixedSettings;
- UINT32 FirmwareVariableMtrrCount;
- UINT8 DefaultMemoryType;
-
- if (!IsMtrrSupported ()) {
- return;
- }
-
- FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
- ASSERT (FirmwareVariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-
- mIsFlushingGCD = TRUE;
- MemorySpaceMap = NULL;
-
- //
- // Initialize the valid bits mask and valid address mask for MTRRs
- //
- InitializeMtrrMask ();
-
- //
- // Get the memory attribute of variable MTRRs
- //
- MtrrGetMemoryAttributeInVariableMtrr (
- mValidMtrrBitsMask,
- mValidMtrrAddressMask,
- VariableMtrr
- );
-
- //
- // Get the memory space map from GCD
- //
- Status = gDS->GetMemorySpaceMap (
- &NumberOfDescriptors,
- &MemorySpaceMap
- );
- ASSERT_EFI_ERROR (Status);
-
- DefaultMemoryType = (UINT8) MtrrGetDefaultMemoryType ();
- DefaultAttributes = GetMemorySpaceAttributeFromMtrrType (DefaultMemoryType);
-
- //
- // Set default attributes to all spaces.
- //
- for (Index = 0; Index < NumberOfDescriptors; Index++) {
- if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) {
- continue;
- }
- gDS->SetMemorySpaceAttributes (
- MemorySpaceMap[Index].BaseAddress,
- MemorySpaceMap[Index].Length,
- (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) |
- (MemorySpaceMap[Index].Capabilities & DefaultAttributes)
- );
- }
-
- //
- // Go for variable MTRRs with WB attribute
- //
- for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
- if (VariableMtrr[Index].Valid &&
- VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK) {
- SetGcdMemorySpaceAttributes (
- MemorySpaceMap,
- NumberOfDescriptors,
- VariableMtrr[Index].BaseAddress,
- VariableMtrr[Index].Length,
- EFI_MEMORY_WB
- );
- }
- }
-
- //
- // Go for variable MTRRs with the attribute except for WB and UC attributes
- //
- for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
- if (VariableMtrr[Index].Valid &&
- VariableMtrr[Index].Type != MTRR_CACHE_WRITE_BACK &&
- VariableMtrr[Index].Type != MTRR_CACHE_UNCACHEABLE) {
- Attributes = GetMemorySpaceAttributeFromMtrrType ((UINT8) VariableMtrr[Index].Type);
- SetGcdMemorySpaceAttributes (
- MemorySpaceMap,
- NumberOfDescriptors,
- VariableMtrr[Index].BaseAddress,
- VariableMtrr[Index].Length,
- Attributes
- );
- }
- }
-
- //
- // Go for variable MTRRs with UC attribute
- //
- for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
- if (VariableMtrr[Index].Valid &&
- VariableMtrr[Index].Type == MTRR_CACHE_UNCACHEABLE) {
- SetGcdMemorySpaceAttributes (
- MemorySpaceMap,
- NumberOfDescriptors,
- VariableMtrr[Index].BaseAddress,
- VariableMtrr[Index].Length,
- EFI_MEMORY_UC
- );
- }
- }
-
- //
- // Go for fixed MTRRs
- //
- Attributes = 0;
- BaseAddress = 0;
- Length = 0;
- MtrrGetFixedMtrr (&MtrrFixedSettings);
- for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
- RegValue = MtrrFixedSettings.Mtrr[Index];
- //
- // Check for continuous fixed MTRR sections
- //
- for (SubIndex = 0; SubIndex < 8; SubIndex++) {
- MtrrType = (UINT8) RShiftU64 (RegValue, SubIndex * 8);
- CurrentAttributes = GetMemorySpaceAttributeFromMtrrType (MtrrType);
- if (Length == 0) {
- //
- // A new MTRR attribute begins
- //
- Attributes = CurrentAttributes;
- } else {
- //
- // If fixed MTRR attribute changed, then set memory attribute for previous atrribute
- //
- if (CurrentAttributes != Attributes) {
- SetGcdMemorySpaceAttributes (
- MemorySpaceMap,
- NumberOfDescriptors,
- BaseAddress,
- Length,
- Attributes
- );
- BaseAddress = mFixedMtrrTable[Index].BaseAddress + mFixedMtrrTable[Index].Length * SubIndex;
- Length = 0;
- Attributes = CurrentAttributes;
- }
- }
- Length += mFixedMtrrTable[Index].Length;
- }
- }
- //
- // Handle the last fixed MTRR region
- //
- SetGcdMemorySpaceAttributes (
- MemorySpaceMap,
- NumberOfDescriptors,
- BaseAddress,
- Length,
- Attributes
- );
-
- //
- // Free memory space map allocated by GCD service GetMemorySpaceMap ()
- //
- if (MemorySpaceMap != NULL) {
- FreePool (MemorySpaceMap);
- }
-
- mIsFlushingGCD = FALSE;
-}
-
-/**
- Initialize Interrupt Descriptor Table for interrupt handling.
-
-**/
-VOID
-InitInterruptDescriptorTable (
- VOID
- )
-{
- EFI_STATUS Status;
- EFI_VECTOR_HANDOFF_INFO *VectorInfoList;
- EFI_VECTOR_HANDOFF_INFO *VectorInfo;
-
- VectorInfo = NULL;
- Status = EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid, (VOID **) &VectorInfoList);
- if (Status == EFI_SUCCESS && VectorInfoList != NULL) {
- VectorInfo = VectorInfoList;
- }
- Status = InitializeCpuInterruptHandlers (VectorInfo);
- ASSERT_EFI_ERROR (Status);
-}
-
-
-/**
- Callback function for idle events.
-
- @param Event Event whose notification function is being invoked.
- @param Context The pointer to the notification function's context,
- which is implementation-dependent.
-
-**/
-VOID
-EFIAPI
-IdleLoopEventCallback (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- CpuSleep ();
-}
-
-
-/**
- Initialize the state information for the CPU Architectural Protocol.
-
- @param ImageHandle Image handle this driver.
- @param SystemTable Pointer to the System Table.
-
- @retval EFI_SUCCESS Thread can be successfully created
- @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
- @retval EFI_DEVICE_ERROR Cannot create the thread
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpu (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
- EFI_EVENT IdleLoopEvent;
-
- InitializeFloatingPointUnits ();
-
- //
- // Make sure interrupts are disabled
- //
- DisableInterrupts ();
-
- //
- // Init GDT for DXE
- //
- InitGlobalDescriptorTable ();
-
- //
- // Setup IDT pointer, IDT and interrupt entry points
- //
- InitInterruptDescriptorTable ();
-
- //
- // Enable the local APIC for Virtual Wire Mode.
- //
- ProgramVirtualWireMode ();
-
- //
- // Install CPU Architectural Protocol
- //
- Status = gBS->InstallMultipleProtocolInterfaces (
- &mCpuHandle,
- &gEfiCpuArchProtocolGuid, &gCpu,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
-
- //
- // Refresh GCD memory space map according to MTRR value.
- //
- RefreshGcdMemoryAttributes ();
-
- //
- // Setup a callback for idle events
- //
- Status = gBS->CreateEventEx (
- EVT_NOTIFY_SIGNAL,
- TPL_NOTIFY,
- IdleLoopEventCallback,
- NULL,
- &gIdleLoopEventGuid,
- &IdleLoopEvent
- );
- ASSERT_EFI_ERROR (Status);
-
- InitializeMpSupport ();
-
- return Status;
-}
-
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h deleted file mode 100644 index 2aef626cd5..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuDxe.h +++ /dev/null @@ -1,256 +0,0 @@ -/** @file
- CPU DXE Module.
-
- Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_DXE_H_
-#define _CPU_DXE_H_
-
-#include <PiDxe.h>
-
-#include <Protocol/Cpu.h>
-
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/DxeServicesTableLib.h>
-#include <Library/BaseLib.h>
-#include <Library/CpuLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/DebugLib.h>
-#include <Library/MtrrLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/UefiCpuLib.h>
-#include <Library/UefiLib.h>
-#include <Library/CpuExceptionHandlerLib.h>
-#include <Library/TimerLib.h>
-#include <Guid/IdleLoopEvent.h>
-#include <Guid/VectorHandoffTable.h>
-
-#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \
- EFI_MEMORY_WC | \
- EFI_MEMORY_WT | \
- EFI_MEMORY_WB | \
- EFI_MEMORY_UCE \
- )
-
-
-/**
- Flush CPU data cache. If the instruction cache is fully coherent
- with all DMA operations then function can just return EFI_SUCCESS.
-
- @param This Protocol instance structure
- @param Start Physical address to start flushing from.
- @param Length Number of bytes to flush. Round up to chipset
- granularity.
- @param FlushType Specifies the type of flush operation to perform.
-
- @retval EFI_SUCCESS If cache was flushed
- @retval EFI_UNSUPPORTED If flush type is not supported.
- @retval EFI_DEVICE_ERROR If requested range could not be flushed.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuFlushCpuDataCache (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_PHYSICAL_ADDRESS Start,
- IN UINT64 Length,
- IN EFI_CPU_FLUSH_TYPE FlushType
- );
-
-/**
- Enables CPU interrupts.
-
- @param This Protocol instance structure
-
- @retval EFI_SUCCESS If interrupts were enabled in the CPU
- @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuEnableInterrupt (
- IN EFI_CPU_ARCH_PROTOCOL *This
- );
-
-/**
- Disables CPU interrupts.
-
- @param This Protocol instance structure
-
- @retval EFI_SUCCESS If interrupts were disabled in the CPU.
- @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuDisableInterrupt (
- IN EFI_CPU_ARCH_PROTOCOL *This
- );
-
-/**
- Return the state of interrupts.
-
- @param This Protocol instance structure
- @param State Pointer to the CPU's current interrupt state
-
- @retval EFI_SUCCESS If interrupts were disabled in the CPU.
- @retval EFI_INVALID_PARAMETER State is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuGetInterruptState (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- OUT BOOLEAN *State
- );
-
-/**
- Generates an INIT to the CPU.
-
- @param This Protocol instance structure
- @param InitType Type of CPU INIT to perform
-
- @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
- seen.
- @retval EFI_DEVICE_ERROR If CPU INIT failed.
- @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuInit (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_CPU_INIT_TYPE InitType
- );
-
-/**
- Registers a function to be called from the CPU interrupt handler.
-
- @param This Protocol instance structure
- @param InterruptType Defines which interrupt to hook. IA-32
- valid range is 0x00 through 0xFF
- @param InterruptHandler A pointer to a function of type
- EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. A null
- pointer is an error condition.
-
- @retval EFI_SUCCESS If handler installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
- for InterruptType was previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
- InterruptType was not previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
- is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuRegisterInterruptHandler (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- );
-
-/**
- Returns a timer value from one of the CPU's internal timers. There is no
- inherent time interval between ticks but is a function of the CPU frequency.
-
- @param This - Protocol instance structure.
- @param TimerIndex - Specifies which CPU timer is requested.
- @param TimerValue - Pointer to the returned timer value.
- @param TimerPeriod - A pointer to the amount of time that passes
- in femtoseconds (10-15) for each increment
- of TimerValue. If TimerValue does not
- increment at a predictable rate, then 0 is
- returned. The amount of time that has
- passed between two calls to GetTimerValue()
- can be calculated with the formula
- (TimerValue2 - TimerValue1) * TimerPeriod.
- This parameter is optional and may be NULL.
-
- @retval EFI_SUCCESS - If the CPU timer count was returned.
- @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
- @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
- @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuGetTimerValue (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN UINT32 TimerIndex,
- OUT UINT64 *TimerValue,
- OUT UINT64 *TimerPeriod OPTIONAL
- );
-
-/**
- Set memory cacheability attributes for given range of memeory.
-
- @param This Protocol instance structure
- @param BaseAddress Specifies the start address of the
- memory range
- @param Length Specifies the length of the memory range
- @param Attributes The memory cacheability for the memory range
-
- @retval EFI_SUCCESS If the cacheability of that memory range is
- set successfully
- @retval EFI_UNSUPPORTED If the desired operation cannot be done
- @retval EFI_INVALID_PARAMETER The input parameter is not correct,
- such as Length = 0
-
-**/
-EFI_STATUS
-EFIAPI
-CpuSetMemoryAttributes (
- IN EFI_CPU_ARCH_PROTOCOL *This,
- IN EFI_PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 Attributes
- );
-
-/**
- Initialize Global Descriptor Table.
-
-**/
-VOID
-InitGlobalDescriptorTable (
- VOID
- );
-
-/**
- Sets the code selector (CS).
-
- @param Selector Value of code selector.
-
-**/
-VOID
-EFIAPI
-SetCodeSelector (
- UINT16 Selector
- );
-
-/**
- Sets the data selector (DS).
-
- @param Selector Value of data selector.
-
-**/
-VOID
-EFIAPI
-SetDataSelectors (
- UINT16 Selector
- );
-
-#endif
-
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf b/UefiCpuPkg/CpuDxe/CpuDxe.inf deleted file mode 100644 index a251922226..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf +++ /dev/null @@ -1,94 +0,0 @@ -## @file
-# Simple CPU driver installs CPU Architecture Protocol.
-#
-# Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CpuDxe
- MODULE_UNI_FILE = CpuDxe.uni
- FILE_GUID = 1A1E4886-9517-440e-9FDE-3BE44CEE2136
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = InitializeCpu
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- CpuLib
- DebugLib
- DxeServicesTableLib
- MemoryAllocationLib
- MtrrLib
- UefiBootServicesTableLib
- UefiDriverEntryPoint
- LocalApicLib
- UefiCpuLib
- UefiLib
- CpuExceptionHandlerLib
- TimerLib
- SynchronizationLib
- HobLib
- ReportStatusCodeLib
-
-[Sources]
- ApStartup.c
- CpuDxe.c
- CpuDxe.h
- CpuGdt.c
- CpuGdt.h
- CpuMp.c
- CpuMp.h
-
-[Sources.IA32]
- Ia32/CpuAsm.asm | MSFT
- Ia32/CpuAsm.asm | INTEL
- Ia32/CpuAsm.S | GCC
- Ia32/MpAsm.asm | MSFT
- Ia32/MpAsm.asm | INTEL
- Ia32/MpAsm.nasm | GCC
-
-[Sources.X64]
- X64/CpuAsm.asm | MSFT
- X64/CpuAsm.asm | INTEL
- X64/CpuAsm.S | GCC
- X64/MpAsm.asm | MSFT
- X64/MpAsm.asm | INTEL
- X64/MpAsm.nasm | GCC
-
-[Protocols]
- gEfiCpuArchProtocolGuid ## PRODUCES
- gEfiMpServiceProtocolGuid ## SOMETIMES_PRODUCES
-
-[Guids]
- gIdleLoopEventGuid ## CONSUMES ## Event
- gEfiVectorHandoffTableGuid ## SOMETIMES_CONSUMES ## SystemTable
-
-[Ppis]
- gEfiSecPlatformInformation2PpiGuid ## UNDEFINED # HOB
- gEfiSecPlatformInformationPpiGuid ## UNDEFINED # HOB
-
-[Pcd]
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
-
-[Depex]
- TRUE
-
-[UserExtensions.TianoCore."ExtraFiles"]
- CpuDxeExtra.uni
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.uni b/UefiCpuPkg/CpuDxe/CpuDxe.uni Binary files differdeleted file mode 100644 index 715766dd36..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuDxe.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuDxe/CpuDxeExtra.uni b/UefiCpuPkg/CpuDxe/CpuDxeExtra.uni Binary files differdeleted file mode 100644 index 0ba595eeb8..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuDxeExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.c b/UefiCpuPkg/CpuDxe/CpuGdt.c deleted file mode 100644 index 35a87a6e45..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuGdt.c +++ /dev/null @@ -1,150 +0,0 @@ -/** @file
- C based implemention of IA32 interrupt handling only
- requiring a minimal assembly interrupt entry point.
-
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuDxe.h"
-#include "CpuGdt.h"
-
-//
-// Global descriptor table (GDT) Template
-//
-STATIC GDT_ENTRIES GdtTemplate = {
- //
- // NULL_SEL
- //
- {
- 0x0, // limit 15:0
- 0x0, // base 15:0
- 0x0, // base 23:16
- 0x0, // type
- 0x0, // limit 19:16, flags
- 0x0, // base 31:24
- },
- //
- // LINEAR_SEL
- //
- {
- 0x0FFFF, // limit 0xFFFFF
- 0x0, // base 0
- 0x0,
- 0x092, // present, ring 0, data, expand-up, writable
- 0x0CF, // page-granular, 32-bit
- 0x0,
- },
- //
- // LINEAR_CODE_SEL
- //
- {
- 0x0FFFF, // limit 0xFFFFF
- 0x0, // base 0
- 0x0,
- 0x09A, // present, ring 0, data, expand-up, writable
- 0x0CF, // page-granular, 32-bit
- 0x0,
- },
- //
- // SYS_DATA_SEL
- //
- {
- 0x0FFFF, // limit 0xFFFFF
- 0x0, // base 0
- 0x0,
- 0x092, // present, ring 0, data, expand-up, writable
- 0x0CF, // page-granular, 32-bit
- 0x0,
- },
- //
- // SYS_CODE_SEL
- //
- {
- 0x0FFFF, // limit 0xFFFFF
- 0x0, // base 0
- 0x0,
- 0x09A, // present, ring 0, data, expand-up, writable
- 0x0CF, // page-granular, 32-bit
- 0x0,
- },
- //
- // LINEAR_CODE64_SEL
- //
- {
- 0x0FFFF, // limit 0xFFFFF
- 0x0, // base 0
- 0x0,
- 0x09B, // present, ring 0, code, expand-up, writable
- 0x0AF, // LimitHigh (CS.L=1, CS.D=0)
- 0x0, // base (high)
- },
- //
- // SPARE4_SEL
- //
- {
- 0x0, // limit 0
- 0x0, // base 0
- 0x0,
- 0x0, // present, ring 0, data, expand-up, writable
- 0x0, // page-granular, 32-bit
- 0x0,
- },
- //
- // SPARE5_SEL
- //
- {
- 0x0, // limit 0
- 0x0, // base 0
- 0x0,
- 0x0, // present, ring 0, data, expand-up, writable
- 0x0, // page-granular, 32-bit
- 0x0,
- },
-};
-
-/**
- Initialize Global Descriptor Table.
-
-**/
-VOID
-InitGlobalDescriptorTable (
- VOID
- )
-{
- GDT_ENTRIES *gdt;
- IA32_DESCRIPTOR gdtPtr;
-
- //
- // Allocate Runtime Data for the GDT
- //
- gdt = AllocateRuntimePool (sizeof (GdtTemplate) + 8);
- ASSERT (gdt != NULL);
- gdt = ALIGN_POINTER (gdt, 8);
-
- //
- // Initialize all GDT entries
- //
- CopyMem (gdt, &GdtTemplate, sizeof (GdtTemplate));
-
- //
- // Write GDT register
- //
- gdtPtr.Base = (UINT32)(UINTN)(VOID*) gdt;
- gdtPtr.Limit = (UINT16) (sizeof (GdtTemplate) - 1);
- AsmWriteGdtr (&gdtPtr);
-
- //
- // Update selector (segment) registers base on new GDT
- //
- SetCodeSelector ((UINT16)CPU_CODE_SEL);
- SetDataSelectors ((UINT16)CPU_DATA_SEL);
-}
-
diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.h b/UefiCpuPkg/CpuDxe/CpuGdt.h deleted file mode 100644 index 7ecec5d5d9..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuGdt.h +++ /dev/null @@ -1,72 +0,0 @@ -/** @file
- C based implemention of IA32 interrupt handling only
- requiring a minimal assembly interrupt entry point.
-
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_GDT_H_
-#define _CPU_GDT_H_
-
-//
-// Local structure definitions
-//
-
-#pragma pack (1)
-
-//
-// Global Descriptor Entry structures
-//
-
-typedef struct _GDT_ENTRY {
- UINT16 Limit15_0;
- UINT16 Base15_0;
- UINT8 Base23_16;
- UINT8 Type;
- UINT8 Limit19_16_and_flags;
- UINT8 Base31_24;
-} GDT_ENTRY;
-
-typedef
-struct _GDT_ENTRIES {
- GDT_ENTRY Null;
- GDT_ENTRY Linear;
- GDT_ENTRY LinearCode;
- GDT_ENTRY SysData;
- GDT_ENTRY SysCode;
- GDT_ENTRY LinearCode64;
- GDT_ENTRY Spare4;
- GDT_ENTRY Spare5;
-} GDT_ENTRIES;
-
-#pragma pack ()
-
-#define NULL_SEL OFFSET_OF (GDT_ENTRIES, Null)
-#define LINEAR_SEL OFFSET_OF (GDT_ENTRIES, Linear)
-#define LINEAR_CODE_SEL OFFSET_OF (GDT_ENTRIES, LinearCode)
-#define SYS_DATA_SEL OFFSET_OF (GDT_ENTRIES, SysData)
-#define SYS_CODE_SEL OFFSET_OF (GDT_ENTRIES, SysCode)
-#define LINEAR_CODE64_SEL OFFSET_OF (GDT_ENTRIES, LinearCode64)
-#define SPARE4_SEL OFFSET_OF (GDT_ENTRIES, Spare4)
-#define SPARE5_SEL OFFSET_OF (GDT_ENTRIES, Spare5)
-
-#if defined (MDE_CPU_IA32)
-#define CPU_CODE_SEL LINEAR_CODE_SEL
-#define CPU_DATA_SEL LINEAR_SEL
-#elif defined (MDE_CPU_X64)
-#define CPU_CODE_SEL LINEAR_CODE64_SEL
-#define CPU_DATA_SEL LINEAR_SEL
-#else
-#error CPU type not supported for CPU GDT initialization!
-#endif
-
-#endif // _CPU_GDT_H_
-
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c deleted file mode 100644 index 4ddcca208a..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuMp.c +++ /dev/null @@ -1,1709 +0,0 @@ -/** @file
- CPU DXE Module.
-
- Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuDxe.h"
-#include "CpuMp.h"
-
-UINTN gMaxLogicalProcessorNumber;
-UINTN gApStackSize;
-UINTN gPollInterval = 100; // 100 microseconds
-
-MP_SYSTEM_DATA mMpSystemData;
-EFI_HANDLE mMpServiceHandle = NULL;
-EFI_EVENT mExitBootServicesEvent = (EFI_EVENT)NULL;
-
-VOID *mCommonStack = 0;
-VOID *mTopOfApCommonStack = 0;
-VOID *mApStackStart = 0;
-
-volatile BOOLEAN mAPsAlreadyInitFinished = FALSE;
-volatile BOOLEAN mStopCheckAllAPsStatus = TRUE;
-
-EFI_MP_SERVICES_PROTOCOL mMpServicesTemplate = {
- GetNumberOfProcessors,
- GetProcessorInfo,
- StartupAllAPs,
- StartupThisAP,
- SwitchBSP,
- EnableDisableAP,
- WhoAmI
-};
-
-/**
- Get Mp Service Lock.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified processor
-
-**/
-VOID
-GetMpSpinLock (
- IN CPU_DATA_BLOCK *CpuData
- )
-{
- while (!AcquireSpinLockOrFail (&CpuData->CpuDataLock)) {
- CpuPause ();
- }
- CpuData->LockSelf = GetApicId ();
-}
-
-/**
- Release Mp Service Lock.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified processor
-
-**/
-VOID
-ReleaseMpSpinLock (
- IN CPU_DATA_BLOCK *CpuData
- )
-{
- ReleaseSpinLock (&CpuData->CpuDataLock);
-}
-
-/**
- Check whether caller processor is BSP.
-
- @retval TRUE the caller is BSP
- @retval FALSE the caller is AP
-
-**/
-BOOLEAN
-IsBSP (
- VOID
- )
-{
- UINTN CpuIndex;
- CPU_DATA_BLOCK *CpuData;
-
- CpuData = NULL;
-
- WhoAmI (&mMpServicesTemplate, &CpuIndex);
- CpuData = &mMpSystemData.CpuDatas[CpuIndex];
-
- return CpuData->Info.StatusFlag & PROCESSOR_AS_BSP_BIT ? TRUE : FALSE;
-}
-
-/**
- Get the Application Processors state.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified AP
-
- @retval CPU_STATE the AP status
-
-**/
-CPU_STATE
-GetApState (
- IN CPU_DATA_BLOCK *CpuData
- )
-{
- CPU_STATE State;
-
- GetMpSpinLock (CpuData);
- State = CpuData->State;
- ReleaseMpSpinLock (CpuData);
-
- return State;
-}
-
-/**
- Set the Application Processors state.
-
- @param CpuData The pointer to CPU_DATA_BLOCK of specified AP
- @param State The AP status
-
-**/
-VOID
-SetApState (
- IN CPU_DATA_BLOCK *CpuData,
- IN CPU_STATE State
- )
-{
- GetMpSpinLock (CpuData);
- CpuData->State = State;
- ReleaseMpSpinLock (CpuData);
-}
-
-/**
- Set the Application Processor prepare to run a function specified
- by Params.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified AP
- @param Procedure A pointer to the function to be run on enabled APs of the system
- @param ProcedureArgument Pointer to the optional parameter of the assigned function
-
-**/
-VOID
-SetApProcedure (
- IN CPU_DATA_BLOCK *CpuData,
- IN EFI_AP_PROCEDURE Procedure,
- IN VOID *ProcedureArgument
- )
-{
- GetMpSpinLock (CpuData);
- CpuData->Parameter = ProcedureArgument;
- CpuData->Procedure = Procedure;
- ReleaseMpSpinLock (CpuData);
-}
-
-/**
- Check the Application Processors Status whether contains the Flags.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified AP
- @param Flags the StatusFlag describing in EFI_PROCESSOR_INFORMATION
-
- @retval TRUE the AP status includes the StatusFlag
- @retval FALSE the AP status excludes the StatusFlag
-
-**/
-BOOLEAN
-TestCpuStatusFlag (
- IN CPU_DATA_BLOCK *CpuData,
- IN UINT32 Flags
- )
-{
- UINT32 Ret;
-
- GetMpSpinLock (CpuData);
- Ret = CpuData->Info.StatusFlag & Flags;
- ReleaseMpSpinLock (CpuData);
-
- return (BOOLEAN) (Ret != 0);
-}
-
-/**
- Bitwise-Or of the Application Processors Status with the Flags.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified AP
- @param Flags the StatusFlag describing in EFI_PROCESSOR_INFORMATION
-
-**/
-VOID
-CpuStatusFlagOr (
- IN CPU_DATA_BLOCK *CpuData,
- IN UINT32 Flags
- )
-{
- GetMpSpinLock (CpuData);
- CpuData->Info.StatusFlag |= Flags;
- ReleaseMpSpinLock (CpuData);
-}
-
-/**
- Bitwise-AndNot of the Application Processors Status with the Flags.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified AP
- @param Flags the StatusFlag describing in EFI_PROCESSOR_INFORMATION
-
-**/
-VOID
-CpuStatusFlagAndNot (
- IN CPU_DATA_BLOCK *CpuData,
- IN UINT32 Flags
- )
-{
- GetMpSpinLock (CpuData);
- CpuData->Info.StatusFlag &= ~Flags;
- ReleaseMpSpinLock (CpuData);
-}
-
-/**
- Searches for the next blocking AP.
-
- Search for the next AP that is put in blocking state by single-threaded StartupAllAPs().
-
- @param NextNumber Pointer to the processor number of the next blocking AP.
-
- @retval EFI_SUCCESS The next blocking AP has been found.
- @retval EFI_NOT_FOUND No blocking AP exists.
-
-**/
-EFI_STATUS
-GetNextBlockedNumber (
- OUT UINTN *NextNumber
- )
-{
- UINTN Number;
- CPU_STATE CpuState;
- CPU_DATA_BLOCK *CpuData;
-
- for (Number = 0; Number < mMpSystemData.NumberOfProcessors; Number++) {
- CpuData = &mMpSystemData.CpuDatas[Number];
- if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
- //
- // Skip BSP
- //
- continue;
- }
-
- CpuState = GetApState (CpuData);
- if (CpuState == CpuStateBlocked) {
- *NextNumber = Number;
- return EFI_SUCCESS;
- }
- }
-
- return EFI_NOT_FOUND;
-}
-
-/**
- Check if the APs state are finished, and update them to idle state
- by StartupAllAPs().
-
-**/
-VOID
-CheckAndUpdateAllAPsToIdleState (
- VOID
- )
-{
- UINTN ProcessorNumber;
- UINTN NextNumber;
- CPU_DATA_BLOCK *CpuData;
- EFI_STATUS Status;
- CPU_STATE CpuState;
-
- for (ProcessorNumber = 0; ProcessorNumber < mMpSystemData.NumberOfProcessors; ProcessorNumber++) {
- CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
- if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
- //
- // Skip BSP
- //
- continue;
- }
-
- if (!TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
- //
- // Skip Disabled processors
- //
- continue;
- }
-
- CpuState = GetApState (CpuData);
- if (CpuState == CpuStateFinished) {
- mMpSystemData.FinishCount++;
- if (mMpSystemData.SingleThread) {
- Status = GetNextBlockedNumber (&NextNumber);
- if (!EFI_ERROR (Status)) {
- SetApState (&mMpSystemData.CpuDatas[NextNumber], CpuStateReady);
- SetApProcedure (&mMpSystemData.CpuDatas[NextNumber],
- mMpSystemData.Procedure,
- mMpSystemData.ProcedureArgument);
- //
- // If this AP previous state is blocked, we should
- // wake up this AP by sent a SIPI. and avoid
- // re-involve the sleeping state. we must call
- // SetApProcedure() first.
- //
- ResetProcessorToIdleState (&mMpSystemData.CpuDatas[NextNumber]);
- }
- }
- SetApState (CpuData, CpuStateIdle);
- }
- }
-}
-
-/**
- If the timeout expires before all APs returns from Procedure,
- we should forcibly terminate the executing AP and fill FailedList back
- by StartupAllAPs().
-
-**/
-VOID
-ResetAllFailedAPs (
- VOID
- )
-{
- CPU_DATA_BLOCK *CpuData;
- UINTN Number;
- CPU_STATE CpuState;
-
- if (mMpSystemData.FailedList != NULL) {
- *mMpSystemData.FailedList = AllocatePool ((mMpSystemData.StartCount - mMpSystemData.FinishCount + 1) * sizeof(UINTN));
- ASSERT (*mMpSystemData.FailedList != NULL);
- }
-
- for (Number = 0; Number < mMpSystemData.NumberOfProcessors; Number++) {
- CpuData = &mMpSystemData.CpuDatas[Number];
- if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
- //
- // Skip BSP
- //
- continue;
- }
-
- if (!TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
- //
- // Skip Disabled processors
- //
- continue;
- }
-
- CpuState = GetApState (CpuData);
- if (CpuState != CpuStateIdle &&
- CpuState != CpuStateSleeping) {
- if (mMpSystemData.FailedList != NULL) {
- (*mMpSystemData.FailedList)[mMpSystemData.FailedListIndex++] = Number;
- }
- ResetProcessorToIdleState (CpuData);
- }
- }
-
- if (mMpSystemData.FailedList != NULL) {
- (*mMpSystemData.FailedList)[mMpSystemData.FailedListIndex] = END_OF_CPU_LIST;
- }
-}
-
-/**
- This service retrieves the number of logical processor in the platform
- and the number of those logical processors that are enabled on this boot.
- This service may only be called from the BSP.
-
- This function is used to retrieve the following information:
- - The number of logical processors that are present in the system.
- - The number of enabled logical processors in the system at the instant
- this call is made.
-
- Because MP Service Protocol provides services to enable and disable processors
- dynamically, the number of enabled logical processors may vary during the
- course of a boot session.
-
- If this service is called from an AP, then EFI_DEVICE_ERROR is returned.
- If NumberOfProcessors or NumberOfEnabledProcessors is NULL, then
- EFI_INVALID_PARAMETER is returned. Otherwise, the total number of processors
- is returned in NumberOfProcessors, the number of currently enabled processor
- is returned in NumberOfEnabledProcessors, and EFI_SUCCESS is returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[out] NumberOfProcessors Pointer to the total number of logical
- processors in the system, including the BSP
- and disabled APs.
- @param[out] NumberOfEnabledProcessors Pointer to the number of enabled logical
- processors that exist in system, including
- the BSP.
-
- @retval EFI_SUCCESS The number of logical processors and enabled
- logical processors was retrieved.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL.
- @retval EFI_INVALID_PARAMETER NumberOfEnabledProcessors is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-GetNumberOfProcessors (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- OUT UINTN *NumberOfProcessors,
- OUT UINTN *NumberOfEnabledProcessors
- )
-{
- if ((NumberOfProcessors == NULL) || (NumberOfEnabledProcessors == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (!IsBSP ()) {
- return EFI_DEVICE_ERROR;
- }
-
- *NumberOfProcessors = mMpSystemData.NumberOfProcessors;
- *NumberOfEnabledProcessors = mMpSystemData.NumberOfEnabledProcessors;
- return EFI_SUCCESS;
-}
-
-/**
- Gets detailed MP-related information on the requested processor at the
- instant this call is made. This service may only be called from the BSP.
-
- This service retrieves detailed MP-related information about any processor
- on the platform. Note the following:
- - The processor information may change during the course of a boot session.
- - The information presented here is entirely MP related.
-
- Information regarding the number of caches and their sizes, frequency of operation,
- slot numbers is all considered platform-related information and is not provided
- by this service.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[in] ProcessorNumber The handle number of processor.
- @param[out] ProcessorInfoBuffer A pointer to the buffer where information for
- the requested processor is deposited.
-
- @retval EFI_SUCCESS Processor information was returned.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist in the platform.
-
-**/
-EFI_STATUS
-EFIAPI
-GetProcessorInfo (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN UINTN ProcessorNumber,
- OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer
- )
-{
- if (ProcessorInfoBuffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (!IsBSP ()) {
- return EFI_DEVICE_ERROR;
- }
-
- if (ProcessorNumber >= mMpSystemData.NumberOfProcessors) {
- return EFI_NOT_FOUND;
- }
-
- CopyMem (ProcessorInfoBuffer, &mMpSystemData.CpuDatas[ProcessorNumber], sizeof (EFI_PROCESSOR_INFORMATION));
- return EFI_SUCCESS;
-}
-
-/**
- This service executes a caller provided function on all enabled APs. APs can
- run either simultaneously or one at a time in sequence. This service supports
- both blocking and non-blocking requests. The non-blocking requests use EFI
- events so the BSP can detect when the APs have finished. This service may only
- be called from the BSP.
-
- This function is used to dispatch all the enabled APs to the function specified
- by Procedure. If any enabled AP is busy, then EFI_NOT_READY is returned
- immediately and Procedure is not started on any AP.
-
- If SingleThread is TRUE, all the enabled APs execute the function specified by
- Procedure one by one, in ascending order of processor handle number. Otherwise,
- all the enabled APs execute the function specified by Procedure simultaneously.
-
- If WaitEvent is NULL, execution is in blocking mode. The BSP waits until all
- APs finish or TimeoutInMicroseconds expires. Otherwise, execution is in non-blocking
- mode, and the BSP returns from this service without waiting for APs. If a
- non-blocking mode is requested after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT
- is signaled, then EFI_UNSUPPORTED must be returned.
-
- If the timeout specified by TimeoutInMicroseconds expires before all APs return
- from Procedure, then Procedure on the failed APs is terminated. All enabled APs
- are always available for further calls to EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- and EFI_MP_SERVICES_PROTOCOL.StartupThisAP(). If FailedCpuList is not NULL, its
- content points to the list of processor handle numbers in which Procedure was
- terminated.
-
- Note: It is the responsibility of the consumer of the EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- to make sure that the nature of the code that is executed on the BSP and the
- dispatched APs is well controlled. The MP Services Protocol does not guarantee
- that the Procedure function is MP-safe. Hence, the tasks that can be run in
- parallel are limited to certain independent tasks and well-controlled exclusive
- code. EFI services and protocols may not be called by APs unless otherwise
- specified.
-
- In blocking execution mode, BSP waits until all APs finish or
- TimeoutInMicroseconds expires.
-
- In non-blocking execution mode, BSP is freed to return to the caller and then
- proceed to the next task without having to wait for APs. The following
- sequence needs to occur in a non-blocking execution mode:
-
- -# The caller that intends to use this MP Services Protocol in non-blocking
- mode creates WaitEvent by calling the EFI CreateEvent() service. The caller
- invokes EFI_MP_SERVICES_PROTOCOL.StartupAllAPs(). If the parameter WaitEvent
- is not NULL, then StartupAllAPs() executes in non-blocking mode. It requests
- the function specified by Procedure to be started on all the enabled APs,
- and releases the BSP to continue with other tasks.
- -# The caller can use the CheckEvent() and WaitForEvent() services to check
- the state of the WaitEvent created in step 1.
- -# When the APs complete their task or TimeoutInMicroSecondss expires, the MP
- Service signals WaitEvent by calling the EFI SignalEvent() function. If
- FailedCpuList is not NULL, its content is available when WaitEvent is
- signaled. If all APs returned from Procedure prior to the timeout, then
- FailedCpuList is set to NULL. If not all APs return from Procedure before
- the timeout, then FailedCpuList is filled in with the list of the failed
- APs. The buffer is allocated by MP Service Protocol using AllocatePool().
- It is the caller's responsibility to free the buffer with FreePool() service.
- -# This invocation of SignalEvent() function informs the caller that invoked
- EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() that either all the APs completed
- the specified task or a timeout occurred. The contents of FailedCpuList
- can be examined to determine which APs did not complete the specified task
- prior to the timeout.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[in] Procedure A pointer to the function to be run on
- enabled APs of the system. See type
- EFI_AP_PROCEDURE.
- @param[in] SingleThread If TRUE, then all the enabled APs execute
- the function specified by Procedure one by
- one, in ascending order of processor handle
- number. If FALSE, then all the enabled APs
- execute the function specified by Procedure
- simultaneously.
- @param[in] WaitEvent The event created by the caller with CreateEvent()
- service. If it is NULL, then execute in
- blocking mode. BSP waits until all APs finish
- or TimeoutInMicroseconds expires. If it's
- not NULL, then execute in non-blocking mode.
- BSP requests the function specified by
- Procedure to be started on all the enabled
- APs, and go on executing immediately. If
- all return from Procedure, or TimeoutInMicroseconds
- expires, this event is signaled. The BSP
- can use the CheckEvent() or WaitForEvent()
- services to check the state of event. Type
- EFI_EVENT is defined in CreateEvent() in
- the Unified Extensible Firmware Interface
- Specification.
- @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
- APs to return from Procedure, either for
- blocking or non-blocking mode. Zero means
- infinity. If the timeout expires before
- all APs return from Procedure, then Procedure
- on the failed APs is terminated. All enabled
- APs are available for next function assigned
- by EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- or EFI_MP_SERVICES_PROTOCOL.StartupThisAP().
- If the timeout expires in blocking mode,
- BSP returns EFI_TIMEOUT. If the timeout
- expires in non-blocking mode, WaitEvent
- is signaled with SignalEvent().
- @param[in] ProcedureArgument The parameter passed into Procedure for
- all APs.
- @param[out] FailedCpuList If NULL, this parameter is ignored. Otherwise,
- if all APs finish successfully, then its
- content is set to NULL. If not all APs
- finish before timeout expires, then its
- content is set to address of the buffer
- holding handle numbers of the failed APs.
- The buffer is allocated by MP Service Protocol,
- and it's the caller's responsibility to
- free the buffer with FreePool() service.
- In blocking mode, it is ready for consumption
- when the call returns. In non-blocking mode,
- it is ready when WaitEvent is signaled. The
- list of failed CPU is terminated by
- END_OF_CPU_LIST.
-
- @retval EFI_SUCCESS In blocking mode, all APs have finished before
- the timeout expired.
- @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
- to all enabled APs.
- @retval EFI_UNSUPPORTED A non-blocking mode request was made after the
- UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
- signaled.
- @retval EFI_DEVICE_ERROR Caller processor is AP.
- @retval EFI_NOT_STARTED No enabled APs exist in the system.
- @retval EFI_NOT_READY Any enabled APs are busy.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before
- all enabled APs have finished.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-StartupAllAPs (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN BOOLEAN SingleThread,
- IN EFI_EVENT WaitEvent OPTIONAL,
- IN UINTN TimeoutInMicroseconds,
- IN VOID *ProcedureArgument OPTIONAL,
- OUT UINTN **FailedCpuList OPTIONAL
- )
-{
- EFI_STATUS Status;
- CPU_DATA_BLOCK *CpuData;
- UINTN Number;
- CPU_STATE APInitialState;
- CPU_STATE CpuState;
-
- CpuData = NULL;
-
- if (FailedCpuList != NULL) {
- *FailedCpuList = NULL;
- }
-
- if (!IsBSP ()) {
- return EFI_DEVICE_ERROR;
- }
-
- if (mMpSystemData.NumberOfProcessors == 1) {
- return EFI_NOT_STARTED;
- }
-
- if (Procedure == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // temporarily stop checkAllAPsStatus for avoid resource dead-lock.
- //
- mStopCheckAllAPsStatus = TRUE;
-
- for (Number = 0; Number < mMpSystemData.NumberOfProcessors; Number++) {
- CpuData = &mMpSystemData.CpuDatas[Number];
- if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
- //
- // Skip BSP
- //
- continue;
- }
-
- if (!TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
- //
- // Skip Disabled processors
- //
- continue;
- }
-
- CpuState = GetApState (CpuData);
- if (CpuState != CpuStateIdle &&
- CpuState != CpuStateSleeping) {
- return EFI_NOT_READY;
- }
- }
-
- mMpSystemData.Procedure = Procedure;
- mMpSystemData.ProcedureArgument = ProcedureArgument;
- mMpSystemData.WaitEvent = WaitEvent;
- mMpSystemData.Timeout = TimeoutInMicroseconds;
- mMpSystemData.TimeoutActive = (BOOLEAN) (TimeoutInMicroseconds != 0);
- mMpSystemData.FinishCount = 0;
- mMpSystemData.StartCount = 0;
- mMpSystemData.SingleThread = SingleThread;
- mMpSystemData.FailedList = FailedCpuList;
- mMpSystemData.FailedListIndex = 0;
- APInitialState = CpuStateReady;
-
- for (Number = 0; Number < mMpSystemData.NumberOfProcessors; Number++) {
- CpuData = &mMpSystemData.CpuDatas[Number];
- if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
- //
- // Skip BSP
- //
- continue;
- }
-
- if (!TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
- //
- // Skip Disabled processors
- //
- continue;
- }
-
- //
- // Get APs prepared, and put failing APs into FailedCpuList
- // if "SingleThread", only 1 AP will put to ready state, other AP will be put to ready
- // state 1 by 1, until the previous 1 finished its task
- // if not "SingleThread", all APs are put to ready state from the beginning
- //
- CpuState = GetApState (CpuData);
- if (CpuState == CpuStateIdle ||
- CpuState == CpuStateSleeping) {
- mMpSystemData.StartCount++;
-
- SetApState (CpuData, APInitialState);
-
- if (APInitialState == CpuStateReady) {
- SetApProcedure (CpuData, Procedure, ProcedureArgument);
- //
- // If this AP previous state is Sleeping, we should
- // wake up this AP by sent a SIPI. and avoid
- // re-involve the sleeping state. we must call
- // SetApProcedure() first.
- //
- if (CpuState == CpuStateSleeping) {
- ResetProcessorToIdleState (CpuData);
- }
- }
-
- if (SingleThread) {
- APInitialState = CpuStateBlocked;
- }
- }
- }
-
- mStopCheckAllAPsStatus = FALSE;
-
- if (WaitEvent != NULL) {
- //
- // non blocking
- //
- return EFI_SUCCESS;
- }
-
- //
- // Blocking temporarily stop CheckAllAPsStatus()
- //
- mStopCheckAllAPsStatus = TRUE;
-
- while (TRUE) {
- CheckAndUpdateAllAPsToIdleState ();
- if (mMpSystemData.FinishCount == mMpSystemData.StartCount) {
- Status = EFI_SUCCESS;
- goto Done;
- }
-
- //
- // task timeout
- //
- if (mMpSystemData.TimeoutActive && mMpSystemData.Timeout < 0) {
- ResetAllFailedAPs();
- Status = EFI_TIMEOUT;
- goto Done;
- }
-
- gBS->Stall (gPollInterval);
- mMpSystemData.Timeout -= gPollInterval;
- }
-
-Done:
-
- return Status;
-}
-
-/**
- This service lets the caller get one enabled AP to execute a caller-provided
- function. The caller can request the BSP to either wait for the completion
- of the AP or just proceed with the next task by using the EFI event mechanism.
- See EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() for more details on non-blocking
- execution support. This service may only be called from the BSP.
-
- This function is used to dispatch one enabled AP to the function specified by
- Procedure passing in the argument specified by ProcedureArgument. If WaitEvent
- is NULL, execution is in blocking mode. The BSP waits until the AP finishes or
- TimeoutInMicroSecondss expires. Otherwise, execution is in non-blocking mode.
- BSP proceeds to the next task without waiting for the AP. If a non-blocking mode
- is requested after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT is signaled,
- then EFI_UNSUPPORTED must be returned.
-
- If the timeout specified by TimeoutInMicroseconds expires before the AP returns
- from Procedure, then execution of Procedure by the AP is terminated. The AP is
- available for subsequent calls to EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() and
- EFI_MP_SERVICES_PROTOCOL.StartupThisAP().
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[in] Procedure A pointer to the function to be run on
- enabled APs of the system. See type
- EFI_AP_PROCEDURE.
- @param[in] ProcessorNumber The handle number of the AP. The range is
- from 0 to the total number of logical
- processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
- @param[in] WaitEvent The event created by the caller with CreateEvent()
- service. If it is NULL, then execute in
- blocking mode. BSP waits until all APs finish
- or TimeoutInMicroseconds expires. If it's
- not NULL, then execute in non-blocking mode.
- BSP requests the function specified by
- Procedure to be started on all the enabled
- APs, and go on executing immediately. If
- all return from Procedure or TimeoutInMicroseconds
- expires, this event is signaled. The BSP
- can use the CheckEvent() or WaitForEvent()
- services to check the state of event. Type
- EFI_EVENT is defined in CreateEvent() in
- the Unified Extensible Firmware Interface
- Specification.
- @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
- APs to return from Procedure, either for
- blocking or non-blocking mode. Zero means
- infinity. If the timeout expires before
- all APs return from Procedure, then Procedure
- on the failed APs is terminated. All enabled
- APs are available for next function assigned
- by EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- or EFI_MP_SERVICES_PROTOCOL.StartupThisAP().
- If the timeout expires in blocking mode,
- BSP returns EFI_TIMEOUT. If the timeout
- expires in non-blocking mode, WaitEvent
- is signaled with SignalEvent().
- @param[in] ProcedureArgument The parameter passed into Procedure for
- all APs.
- @param[out] Finished If NULL, this parameter is ignored. In
- blocking mode, this parameter is ignored.
- In non-blocking mode, if AP returns from
- Procedure before the timeout expires, its
- content is set to TRUE. Otherwise, the
- value is set to FALSE. The caller can
- determine if the AP returned from Procedure
- by evaluating this value.
-
- @retval EFI_SUCCESS In blocking mode, specified AP finished before
- the timeout expires.
- @retval EFI_SUCCESS In non-blocking mode, the function has been
- dispatched to specified AP.
- @retval EFI_UNSUPPORTED A non-blocking mode request was made after the
- UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
- signaled.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before
- the specified AP has finished.
- @retval EFI_NOT_READY The specified AP is busy.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP or disabled AP.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-StartupThisAP (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN UINTN ProcessorNumber,
- IN EFI_EVENT WaitEvent OPTIONAL,
- IN UINTN TimeoutInMicroseconds,
- IN VOID *ProcedureArgument OPTIONAL,
- OUT BOOLEAN *Finished OPTIONAL
- )
-{
- CPU_DATA_BLOCK *CpuData;
- CPU_STATE CpuState;
-
- CpuData = NULL;
-
- if (Finished != NULL) {
- *Finished = FALSE;
- }
-
- if (!IsBSP ()) {
- return EFI_DEVICE_ERROR;
- }
-
- if (Procedure == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (ProcessorNumber >= mMpSystemData.NumberOfProcessors) {
- return EFI_NOT_FOUND;
- }
-
- //
- // temporarily stop checkAllAPsStatus for avoid resource dead-lock.
- //
- mStopCheckAllAPsStatus = TRUE;
-
- CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
- if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT) ||
- !TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
- return EFI_INVALID_PARAMETER;
- }
-
- CpuState = GetApState (CpuData);
- if (CpuState != CpuStateIdle &&
- CpuState != CpuStateSleeping) {
- return EFI_NOT_READY;
- }
-
- SetApState (CpuData, CpuStateReady);
-
- SetApProcedure (CpuData, Procedure, ProcedureArgument);
- //
- // If this AP previous state is Sleeping, we should
- // wake up this AP by sent a SIPI. and avoid
- // re-involve the sleeping state. we must call
- // SetApProcedure() first.
- //
- if (CpuState == CpuStateSleeping) {
- ResetProcessorToIdleState (CpuData);
- }
-
- CpuData->Timeout = TimeoutInMicroseconds;
- CpuData->WaitEvent = WaitEvent;
- CpuData->TimeoutActive = (BOOLEAN) (TimeoutInMicroseconds != 0);
- CpuData->Finished = Finished;
-
- mStopCheckAllAPsStatus = FALSE;
-
- if (WaitEvent != NULL) {
- //
- // Non Blocking
- //
- return EFI_SUCCESS;
- }
-
- //
- // Blocking
- //
- while (TRUE) {
- if (GetApState (CpuData) == CpuStateFinished) {
- SetApState (CpuData, CpuStateIdle);
- break;
- }
-
- if (CpuData->TimeoutActive && CpuData->Timeout < 0) {
- ResetProcessorToIdleState (CpuData);
- return EFI_TIMEOUT;
- }
-
- gBS->Stall (gPollInterval);
- CpuData->Timeout -= gPollInterval;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. This call can only be performed
- by the current BSP.
-
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. The new BSP can take over the
- execution of the old BSP and continue seamlessly from where the old one left
- off. This service may not be supported after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT
- is signaled.
-
- If the BSP cannot be switched prior to the return from this service, then
- EFI_UNSUPPORTED must be returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL instance.
- @param[in] ProcessorNumber The handle number of AP that is to become the new
- BSP. The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
- @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an
- enabled AP. Otherwise, it will be disabled.
-
- @retval EFI_SUCCESS BSP successfully switched.
- @retval EFI_UNSUPPORTED Switching the BSP cannot be completed prior to
- this service returning.
- @retval EFI_UNSUPPORTED Switching the BSP is not supported.
- @retval EFI_SUCCESS The calling processor is an AP.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the current BSP or
- a disabled AP.
- @retval EFI_NOT_READY The specified AP is busy.
-
-**/
-EFI_STATUS
-EFIAPI
-SwitchBSP (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableOldBSP
- )
-{
- //
- // Current always return unsupported.
- //
- return EFI_UNSUPPORTED;
-}
-
-/**
- This service lets the caller enable or disable an AP from this point onward.
- This service may only be called from the BSP.
-
- This service allows the caller enable or disable an AP from this point onward.
- The caller can optionally specify the health status of the AP by Health. If
- an AP is being disabled, then the state of the disabled AP is implementation
- dependent. If an AP is enabled, then the implementation must guarantee that a
- complete initialization sequence is performed on the AP, so the AP is in a state
- that is compatible with an MP operating system. This service may not be supported
- after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT is signaled.
-
- If the enable or disable AP operation cannot be completed prior to the return
- from this service, then EFI_UNSUPPORTED must be returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL instance.
- @param[in] ProcessorNumber The handle number of AP that is to become the new
- BSP. The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
- @param[in] EnableAP Specifies the new state for the processor for
- enabled, FALSE for disabled.
- @param[in] HealthFlag If not NULL, a pointer to a value that specifies
- the new health status of the AP. This flag
- corresponds to StatusFlag defined in
- EFI_MP_SERVICES_PROTOCOL.GetProcessorInfo(). Only
- the PROCESSOR_HEALTH_STATUS_BIT is used. All other
- bits are ignored. If it is NULL, this parameter
- is ignored.
-
- @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP cannot be completed
- prior to this service returning.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP is not supported.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber
- does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
-
-**/
-EFI_STATUS
-EFIAPI
-EnableDisableAP (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableAP,
- IN UINT32 *HealthFlag OPTIONAL
- )
-{
- CPU_DATA_BLOCK *CpuData;
- BOOLEAN TempStopCheckState;
- CPU_STATE CpuState;
-
- CpuData = NULL;
- TempStopCheckState = FALSE;
-
- if (!IsBSP ()) {
- return EFI_DEVICE_ERROR;
- }
-
- if (ProcessorNumber >= mMpSystemData.NumberOfProcessors) {
- return EFI_NOT_FOUND;
- }
-
- //
- // temporarily stop checkAllAPsStatus for initialize parameters.
- //
- if (!mStopCheckAllAPsStatus) {
- mStopCheckAllAPsStatus = TRUE;
- TempStopCheckState = TRUE;
- }
-
- CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
- if (TestCpuStatusFlag (CpuData, PROCESSOR_AS_BSP_BIT)) {
- return EFI_INVALID_PARAMETER;
- }
-
- CpuState = GetApState (CpuData);
- if (CpuState != CpuStateIdle &&
- CpuState != CpuStateSleeping) {
- return EFI_UNSUPPORTED;
- }
-
- if (EnableAP) {
- if (!(TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT))) {
- mMpSystemData.NumberOfEnabledProcessors++;
- }
- CpuStatusFlagOr (CpuData, PROCESSOR_ENABLED_BIT);
- } else {
- if (TestCpuStatusFlag (CpuData, PROCESSOR_ENABLED_BIT)) {
- mMpSystemData.NumberOfEnabledProcessors--;
- }
- CpuStatusFlagAndNot (CpuData, PROCESSOR_ENABLED_BIT);
- }
-
- if (HealthFlag != NULL) {
- CpuStatusFlagAndNot (CpuData, (UINT32)~PROCESSOR_HEALTH_STATUS_BIT);
- CpuStatusFlagOr (CpuData, (*HealthFlag & PROCESSOR_HEALTH_STATUS_BIT));
- }
-
- if (TempStopCheckState) {
- mStopCheckAllAPsStatus = FALSE;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- This return the handle number for the calling processor. This service may be
- called from the BSP and APs.
-
- This service returns the processor handle number for the calling processor.
- The returned value is in the range from 0 to the total number of logical
- processors minus 1. The total number of logical processors can be retrieved
- with EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors(). This service may be
- called from the BSP and APs. If ProcessorNumber is NULL, then EFI_INVALID_PARAMETER
- is returned. Otherwise, the current processors handle number is returned in
- ProcessorNumber, and EFI_SUCCESS is returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL instance.
- @param[out] ProcessorNumber The handle number of AP that is to become the new
- BSP. The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
-
- @retval EFI_SUCCESS The current processor handle number was returned
- in ProcessorNumber.
- @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-WhoAmI (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- OUT UINTN *ProcessorNumber
- )
-{
- UINTN Index;
- UINT32 ProcessorId;
-
- if (ProcessorNumber == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- ProcessorId = GetApicId ();
- for (Index = 0; Index < mMpSystemData.NumberOfProcessors; Index++) {
- if (mMpSystemData.CpuDatas[Index].Info.ProcessorId == ProcessorId) {
- break;
- }
- }
-
- *ProcessorNumber = Index;
- return EFI_SUCCESS;
-}
-
-/**
- Terminate AP's task and set it to idle state.
-
- This function terminates AP's task due to timeout by sending INIT-SIPI,
- and sends it to idle state.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified AP
-
-**/
-VOID
-ResetProcessorToIdleState (
- IN CPU_DATA_BLOCK *CpuData
- )
-{
- ResetApStackless ((UINT32)CpuData->Info.ProcessorId);
-}
-
-/**
- Application Processors do loop routine
- after switch to its own stack.
-
- @param Context1 A pointer to the context to pass into the function.
- @param Context2 A pointer to the context to pass into the function.
-
-**/
-VOID
-ProcessorToIdleState (
- IN VOID *Context1, OPTIONAL
- IN VOID *Context2 OPTIONAL
- )
-{
- UINTN ProcessorNumber;
- CPU_DATA_BLOCK *CpuData;
- EFI_AP_PROCEDURE Procedure;
- volatile VOID *ProcedureArgument;
-
- AsmApDoneWithCommonStack ();
-
- while (!mAPsAlreadyInitFinished) {
- CpuPause ();
- }
-
- WhoAmI (&mMpServicesTemplate, &ProcessorNumber);
- CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
-
- //
- // Avoid forcibly reset AP caused the AP got lock not release.
- //
- if (CpuData->LockSelf == (INTN) GetApicId ()) {
- ReleaseSpinLock (&CpuData->CpuDataLock);
- }
-
- //
- // Avoid forcibly reset AP caused the timeout AP State is not
- // updated.
- //
- GetMpSpinLock (CpuData);
- if (CpuData->State == CpuStateBusy) {
- CpuData->Procedure = NULL;
- }
- CpuData->State = CpuStateIdle;
- ReleaseMpSpinLock (CpuData);
-
- while (TRUE) {
- GetMpSpinLock (CpuData);
- ProcedureArgument = CpuData->Parameter;
- Procedure = CpuData->Procedure;
- ReleaseMpSpinLock (CpuData);
-
- if (Procedure != NULL) {
- SetApState (CpuData, CpuStateBusy);
-
- Procedure ((VOID*) ProcedureArgument);
-
- GetMpSpinLock (CpuData);
- CpuData->Procedure = NULL;
- CpuData->State = CpuStateFinished;
- ReleaseMpSpinLock (CpuData);
- } else {
- //
- // if no procedure to execution, we simply put AP
- // into sleeping state, and waiting BSP sent SIPI.
- //
- GetMpSpinLock (CpuData);
- if (CpuData->State == CpuStateIdle) {
- CpuData->State = CpuStateSleeping;
- }
- ReleaseMpSpinLock (CpuData);
- }
-
- if (GetApState (CpuData) == CpuStateSleeping) {
- CpuSleep ();
- }
-
- CpuPause ();
- }
-
- CpuSleep ();
- CpuDeadLoop ();
-}
-
-/**
- Checks AP' status periodically.
-
- This function is triggerred by timer perodically to check the
- state of AP forStartupThisAP() executed in non-blocking mode.
-
- @param Event Event triggered.
- @param Context Parameter passed with the event.
-
-**/
-VOID
-EFIAPI
-CheckThisAPStatus (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- CPU_DATA_BLOCK *CpuData;
- CPU_STATE CpuState;
-
- CpuData = (CPU_DATA_BLOCK *) Context;
- if (CpuData->TimeoutActive) {
- CpuData->Timeout -= gPollInterval;
- }
-
- CpuState = GetApState (CpuData);
-
- if (CpuState == CpuStateFinished) {
- if (CpuData->Finished) {
- *CpuData->Finished = TRUE;
- }
- SetApState (CpuData, CpuStateIdle);
- goto out;
- }
-
- if (CpuData->TimeoutActive && CpuData->Timeout < 0) {
- if (CpuState != CpuStateIdle &&
- CpuData->Finished) {
- *CpuData->Finished = FALSE;
- }
- ResetProcessorToIdleState (CpuData);
- goto out;
- }
-
- return;
-
-out:
- CpuData->TimeoutActive = FALSE;
- gBS->SignalEvent (CpuData->WaitEvent);
- CpuData->WaitEvent = NULL;
-}
-
-/**
- Checks APs' status periodically.
-
- This function is triggerred by timer perodically to check the
- state of APs for StartupAllAPs() executed in non-blocking mode.
-
- @param Event Event triggered.
- @param Context Parameter passed with the event.
-
-**/
-VOID
-EFIAPI
-CheckAllAPsStatus (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- CPU_DATA_BLOCK *CpuData;
- UINTN Number;
- EFI_STATUS Status;
-
- if (mMpSystemData.TimeoutActive) {
- mMpSystemData.Timeout -= gPollInterval;
- }
-
- if (mStopCheckAllAPsStatus) {
- return;
- }
-
- //
- // avoid next timer enter.
- //
- Status = gBS->SetTimer (
- mMpSystemData.CheckAllAPsEvent,
- TimerCancel,
- 0
- );
- ASSERT_EFI_ERROR (Status);
-
- if (mMpSystemData.WaitEvent != NULL) {
- CheckAndUpdateAllAPsToIdleState ();
- //
- // task timeout
- //
- if (mMpSystemData.TimeoutActive && mMpSystemData.Timeout < 0) {
- ResetAllFailedAPs();
- //
- // force exit
- //
- mMpSystemData.FinishCount = mMpSystemData.StartCount;
- }
-
- if (mMpSystemData.FinishCount != mMpSystemData.StartCount) {
- goto EXIT;
- }
-
- mMpSystemData.TimeoutActive = FALSE;
- gBS->SignalEvent (mMpSystemData.WaitEvent);
- mMpSystemData.WaitEvent = NULL;
- mStopCheckAllAPsStatus = TRUE;
-
- goto EXIT;
- }
-
- //
- // check each AP status for StartupThisAP
- //
- for (Number = 0; Number < mMpSystemData.NumberOfProcessors; Number++) {
- CpuData = &mMpSystemData.CpuDatas[Number];
- if (CpuData->WaitEvent) {
- CheckThisAPStatus (NULL, (VOID *)CpuData);
- }
- }
-
-EXIT:
- Status = gBS->SetTimer (
- mMpSystemData.CheckAllAPsEvent,
- TimerPeriodic,
- EFI_TIMER_PERIOD_MICROSECONDS (100)
- );
- ASSERT_EFI_ERROR (Status);
-}
-
-/**
- Application Processor C code entry point.
-
-**/
-VOID
-EFIAPI
-ApEntryPointInC (
- VOID
- )
-{
- VOID* TopOfApStack;
- UINTN ProcessorNumber;
-
- if (!mAPsAlreadyInitFinished) {
- FillInProcessorInformation (FALSE, mMpSystemData.NumberOfProcessors);
- TopOfApStack = (UINT8*)mApStackStart + gApStackSize;
- mApStackStart = TopOfApStack;
-
- //
- // Store the Stack address, when reset the AP, We can found the original address.
- //
- mMpSystemData.CpuDatas[mMpSystemData.NumberOfProcessors].TopOfStack = TopOfApStack;
- mMpSystemData.NumberOfProcessors++;
- mMpSystemData.NumberOfEnabledProcessors++;
- } else {
- WhoAmI (&mMpServicesTemplate, &ProcessorNumber);
- //
- // Get the original stack address.
- //
- TopOfApStack = mMpSystemData.CpuDatas[ProcessorNumber].TopOfStack;
- }
-
- SwitchStack (
- (SWITCH_STACK_ENTRY_POINT)(UINTN)ProcessorToIdleState,
- NULL,
- NULL,
- TopOfApStack);
-}
-
-/**
- This function is called by all processors (both BSP and AP) once and collects MP related data.
-
- @param Bsp TRUE if the CPU is BSP
- @param ProcessorNumber The specific processor number
-
- @retval EFI_SUCCESS Data for the processor collected and filled in
-
-**/
-EFI_STATUS
-FillInProcessorInformation (
- IN BOOLEAN Bsp,
- IN UINTN ProcessorNumber
- )
-{
- CPU_DATA_BLOCK *CpuData;
- UINT32 ProcessorId;
-
- CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
- ProcessorId = GetApicId ();
- CpuData->Info.ProcessorId = ProcessorId;
- CpuData->Info.StatusFlag = PROCESSOR_ENABLED_BIT | PROCESSOR_HEALTH_STATUS_BIT;
- if (Bsp) {
- CpuData->Info.StatusFlag |= PROCESSOR_AS_BSP_BIT;
- }
- CpuData->Info.Location.Package = ProcessorId;
- CpuData->Info.Location.Core = 0;
- CpuData->Info.Location.Thread = 0;
- CpuData->State = Bsp ? CpuStateBusy : CpuStateIdle;
-
- CpuData->Procedure = NULL;
- CpuData->Parameter = NULL;
- InitializeSpinLock (&CpuData->CpuDataLock);
- CpuData->LockSelf = -1;
-
- return EFI_SUCCESS;
-}
-
-/**
- Prepare the System Data.
-
- @retval EFI_SUCCESS the System Data finished initilization.
-
-**/
-EFI_STATUS
-InitMpSystemData (
- VOID
- )
-{
- EFI_STATUS Status;
-
- ZeroMem (&mMpSystemData, sizeof (MP_SYSTEM_DATA));
-
- mMpSystemData.NumberOfProcessors = 1;
- mMpSystemData.NumberOfEnabledProcessors = 1;
-
- mMpSystemData.CpuDatas = AllocateZeroPool (sizeof (CPU_DATA_BLOCK) * gMaxLogicalProcessorNumber);
- ASSERT(mMpSystemData.CpuDatas != NULL);
-
- Status = gBS->CreateEvent (
- EVT_TIMER | EVT_NOTIFY_SIGNAL,
- TPL_CALLBACK,
- CheckAllAPsStatus,
- NULL,
- &mMpSystemData.CheckAllAPsEvent
- );
- ASSERT_EFI_ERROR (Status);
-
- //
- // Set timer to check all APs status.
- //
- Status = gBS->SetTimer (
- mMpSystemData.CheckAllAPsEvent,
- TimerPeriodic,
- EFI_TIMER_PERIOD_MICROSECONDS (100)
- );
- ASSERT_EFI_ERROR (Status);
-
- //
- // BSP
- //
- FillInProcessorInformation (TRUE, 0);
-
- return EFI_SUCCESS;
-}
-
-/**
- Collects BIST data from HOB.
-
- This function collects BIST data from HOB built from Sec Platform Information
- PPI or SEC Platform Information2 PPI.
-
-**/
-VOID
-CollectBistDataFromHob (
- VOID
- )
-{
- EFI_HOB_GUID_TYPE *GuidHob;
- EFI_SEC_PLATFORM_INFORMATION_RECORD2 *SecPlatformInformation2;
- EFI_SEC_PLATFORM_INFORMATION_RECORD *SecPlatformInformation;
- UINTN NumberOfData;
- EFI_SEC_PLATFORM_INFORMATION_CPU *CpuInstance;
- EFI_SEC_PLATFORM_INFORMATION_CPU BspCpuInstance;
- UINTN ProcessorNumber;
- UINT32 InitialLocalApicId;
- CPU_DATA_BLOCK *CpuData;
-
- SecPlatformInformation2 = NULL;
- SecPlatformInformation = NULL;
-
- //
- // Get gEfiSecPlatformInformation2PpiGuid Guided HOB firstly
- //
- GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformation2PpiGuid);
- if (GuidHob != NULL) {
- //
- // Sec Platform Information2 PPI includes BSP/APs' BIST information
- //
- SecPlatformInformation2 = GET_GUID_HOB_DATA (GuidHob);
- NumberOfData = SecPlatformInformation2->NumberOfCpus;
- CpuInstance = SecPlatformInformation2->CpuInstance;
- } else {
- //
- // Otherwise, get gEfiSecPlatformInformationPpiGuid Guided HOB
- //
- GuidHob = GetFirstGuidHob (&gEfiSecPlatformInformationPpiGuid);
- if (GuidHob != NULL) {
- SecPlatformInformation = GET_GUID_HOB_DATA (GuidHob);
- NumberOfData = 1;
- //
- // SEC Platform Information only includes BSP's BIST information
- // does not have BSP's APIC ID
- //
- BspCpuInstance.CpuLocation = GetApicId ();
- BspCpuInstance.InfoRecord.IA32HealthFlags.Uint32 = SecPlatformInformation->IA32HealthFlags.Uint32;
- CpuInstance = &BspCpuInstance;
- } else {
- DEBUG ((EFI_D_INFO, "Does not find any HOB stored CPU BIST information!\n"));
- //
- // Does not find any HOB stored BIST information
- //
- return;
- }
- }
-
- while ((NumberOfData--) > 0) {
- for (ProcessorNumber = 0; ProcessorNumber < mMpSystemData.NumberOfProcessors; ProcessorNumber++) {
- CpuData = &mMpSystemData.CpuDatas[ProcessorNumber];
- InitialLocalApicId = (UINT32) CpuData->Info.ProcessorId;
- if (InitialLocalApicId == CpuInstance[NumberOfData].CpuLocation) {
- //
- // Update CPU health status for MP Services Protocol according to BIST data.
- //
- if (CpuInstance[NumberOfData].InfoRecord.IA32HealthFlags.Uint32 != 0) {
- CpuData->Info.StatusFlag &= ~PROCESSOR_HEALTH_STATUS_BIT;
- //
- // Report Status Code that self test is failed
- //
- REPORT_STATUS_CODE (
- EFI_ERROR_CODE | EFI_ERROR_MAJOR,
- (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
- );
- }
- }
- }
- }
-}
-
-/**
- Callback function for ExitBootServices.
-
- @param Event Event whose notification function is being invoked.
- @param Context The pointer to the notification function's context,
- which is implementation-dependent.
-
-**/
-VOID
-EFIAPI
-ExitBootServicesCallback (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- //
- // Avoid APs access invalid buff datas which allocated by BootServices,
- // so we send INIT IPI to APs to let them wait for SIPI state.
- //
- SendInitIpiAllExcludingSelf ();
-}
-
-/**
- Initialize Multi-processor support.
-
-**/
-VOID
-InitializeMpSupport (
- VOID
- )
-{
- EFI_STATUS Status;
-
- gMaxLogicalProcessorNumber = (UINTN) PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
- if (gMaxLogicalProcessorNumber < 1) {
- DEBUG ((DEBUG_ERROR, "Setting PcdCpuMaxLogicalProcessorNumber should be more than zero.\n"));
- return;
- }
-
- if (gMaxLogicalProcessorNumber == 1) {
- return;
- }
-
- gApStackSize = (UINTN) PcdGet32 (PcdCpuApStackSize);
- ASSERT ((gApStackSize & (SIZE_4KB - 1)) == 0);
-
- mApStackStart = AllocatePages (EFI_SIZE_TO_PAGES (gMaxLogicalProcessorNumber * gApStackSize));
- ASSERT (mApStackStart != NULL);
-
- //
- // the first buffer of stack size used for common stack, when the amount of AP
- // more than 1, we should never free the common stack which maybe used for AP reset.
- //
- mCommonStack = mApStackStart;
- mTopOfApCommonStack = (UINT8*) mApStackStart + gApStackSize;
- mApStackStart = mTopOfApCommonStack;
-
- InitMpSystemData ();
-
- PrepareAPStartupCode ();
-
- StartApsStackless ();
-
- DEBUG ((DEBUG_INFO, "Detect CPU count: %d\n", mMpSystemData.NumberOfProcessors));
- if (mMpSystemData.NumberOfProcessors == 1) {
- FreeApStartupCode ();
- FreePages (mCommonStack, EFI_SIZE_TO_PAGES (gMaxLogicalProcessorNumber * gApStackSize));
- return;
- }
-
- mMpSystemData.CpuDatas = ReallocatePool (
- sizeof (CPU_DATA_BLOCK) * gMaxLogicalProcessorNumber,
- sizeof (CPU_DATA_BLOCK) * mMpSystemData.NumberOfProcessors,
- mMpSystemData.CpuDatas);
-
- mAPsAlreadyInitFinished = TRUE;
-
- //
- // Update CPU healthy information from Guided HOB
- //
- CollectBistDataFromHob ();
-
- Status = gBS->InstallMultipleProtocolInterfaces (
- &mMpServiceHandle,
- &gEfiMpServiceProtocolGuid, &mMpServicesTemplate,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
-
- if (mMpSystemData.NumberOfProcessors < gMaxLogicalProcessorNumber) {
- FreePages (mApStackStart, EFI_SIZE_TO_PAGES (
- (gMaxLogicalProcessorNumber - mMpSystemData.NumberOfProcessors) *
- gApStackSize));
- }
-
- Status = gBS->CreateEvent (
- EVT_SIGNAL_EXIT_BOOT_SERVICES,
- TPL_CALLBACK,
- ExitBootServicesCallback,
- NULL,
- &mExitBootServicesEvent
- );
- ASSERT_EFI_ERROR (Status);
-}
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.h b/UefiCpuPkg/CpuDxe/CpuMp.h deleted file mode 100644 index d2866e463b..0000000000 --- a/UefiCpuPkg/CpuDxe/CpuMp.h +++ /dev/null @@ -1,647 +0,0 @@ -/** @file
- CPU DXE MP support
-
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_MP_H_
-#define _CPU_MP_H_
-
-#include <Ppi/SecPlatformInformation.h>
-#include <Ppi/SecPlatformInformation2.h>
-#include <Protocol/MpService.h>
-#include <Library/SynchronizationLib.h>
-#include <Library/HobLib.h>
-#include <Library/ReportStatusCodeLib.h>
-
-/**
- Initialize Multi-processor support.
-
-**/
-VOID
-InitializeMpSupport (
- VOID
- );
-
-typedef
-VOID
-(EFIAPI *STACKLESS_AP_ENTRY_POINT)(
- VOID
- );
-
-/**
- Starts the Application Processors and directs them to jump to the
- specified routine.
-
- The processor jumps to this code in flat mode, but the processor's
- stack is not initialized.
-
- @retval EFI_SUCCESS The APs were started
-
-**/
-EFI_STATUS
-StartApsStackless (
- VOID
- );
-
-/**
- The AP entry point that the Startup-IPI target code will jump to.
-
- The processor jumps to this code in flat mode, but the processor's
- stack is not initialized.
-
-**/
-VOID
-EFIAPI
-AsmApEntryPoint (
- VOID
- );
-
-/**
- Releases the lock preventing other APs from using the shared AP
- stack.
-
- Once the AP has transitioned to using a new stack, it can call this
- function to allow another AP to proceed with using the shared stack.
-
-**/
-VOID
-EFIAPI
-AsmApDoneWithCommonStack (
- VOID
- );
-
-typedef enum {
- CpuStateIdle,
- CpuStateBlocked,
- CpuStateReady,
- CpuStateBusy,
- CpuStateFinished,
- CpuStateSleeping
-} CPU_STATE;
-
-/**
- Define Individual Processor Data block.
-
-**/
-typedef struct {
- EFI_PROCESSOR_INFORMATION Info;
- SPIN_LOCK CpuDataLock;
- INTN LockSelf;
- volatile CPU_STATE State;
-
- volatile EFI_AP_PROCEDURE Procedure;
- volatile VOID* Parameter;
- BOOLEAN *Finished;
- INTN Timeout;
- EFI_EVENT WaitEvent;
- BOOLEAN TimeoutActive;
- EFI_EVENT CheckThisAPEvent;
- VOID *TopOfStack;
-} CPU_DATA_BLOCK;
-
-/**
- Define MP data block which consumes individual processor block.
-
-**/
-typedef struct {
- CPU_DATA_BLOCK *CpuDatas;
- UINTN NumberOfProcessors;
- UINTN NumberOfEnabledProcessors;
-
- EFI_AP_PROCEDURE Procedure;
- VOID *ProcedureArgument;
- UINTN StartCount;
- UINTN FinishCount;
- BOOLEAN SingleThread;
- UINTN **FailedList;
- UINTN FailedListIndex;
- INTN Timeout;
- EFI_EVENT WaitEvent;
- BOOLEAN TimeoutActive;
- EFI_EVENT CheckAllAPsEvent;
-} MP_SYSTEM_DATA;
-
-/**
- This function is called by all processors (both BSP and AP) once and collects MP related data.
-
- @param Bsp TRUE if the CPU is BSP
- @param ProcessorNumber The specific processor number
-
- @retval EFI_SUCCESS Data for the processor collected and filled in
-
-**/
-EFI_STATUS
-FillInProcessorInformation (
- IN BOOLEAN Bsp,
- IN UINTN ProcessorNumber
- );
-
-/**
- This service retrieves the number of logical processor in the platform
- and the number of those logical processors that are enabled on this boot.
- This service may only be called from the BSP.
-
- This function is used to retrieve the following information:
- - The number of logical processors that are present in the system.
- - The number of enabled logical processors in the system at the instant
- this call is made.
-
- Because MP Service Protocol provides services to enable and disable processors
- dynamically, the number of enabled logical processors may vary during the
- course of a boot session.
-
- If this service is called from an AP, then EFI_DEVICE_ERROR is returned.
- If NumberOfProcessors or NumberOfEnabledProcessors is NULL, then
- EFI_INVALID_PARAMETER is returned. Otherwise, the total number of processors
- is returned in NumberOfProcessors, the number of currently enabled processor
- is returned in NumberOfEnabledProcessors, and EFI_SUCCESS is returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[out] NumberOfProcessors Pointer to the total number of logical
- processors in the system, including the BSP
- and disabled APs.
- @param[out] NumberOfEnabledProcessors Pointer to the number of enabled logical
- processors that exist in system, including
- the BSP.
-
- @retval EFI_SUCCESS The number of logical processors and enabled
- logical processors was retrieved.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL.
- @retval EFI_INVALID_PARAMETER NumberOfEnabledProcessors is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-GetNumberOfProcessors (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- OUT UINTN *NumberOfProcessors,
- OUT UINTN *NumberOfEnabledProcessors
- );
-
-/**
- Gets detailed MP-related information on the requested processor at the
- instant this call is made. This service may only be called from the BSP.
-
- This service retrieves detailed MP-related information about any processor
- on the platform. Note the following:
- - The processor information may change during the course of a boot session.
- - The information presented here is entirely MP related.
-
- Information regarding the number of caches and their sizes, frequency of operation,
- slot numbers is all considered platform-related information and is not provided
- by this service.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[in] ProcessorNumber The handle number of processor.
- @param[out] ProcessorInfoBuffer A pointer to the buffer where information for
- the requested processor is deposited.
-
- @retval EFI_SUCCESS Processor information was returned.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist in the platform.
-
-**/
-EFI_STATUS
-EFIAPI
-GetProcessorInfo (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN UINTN ProcessorNumber,
- OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer
- );
-
-/**
- This service executes a caller provided function on all enabled APs. APs can
- run either simultaneously or one at a time in sequence. This service supports
- both blocking and non-blocking requests. The non-blocking requests use EFI
- events so the BSP can detect when the APs have finished. This service may only
- be called from the BSP.
-
- This function is used to dispatch all the enabled APs to the function specified
- by Procedure. If any enabled AP is busy, then EFI_NOT_READY is returned
- immediately and Procedure is not started on any AP.
-
- If SingleThread is TRUE, all the enabled APs execute the function specified by
- Procedure one by one, in ascending order of processor handle number. Otherwise,
- all the enabled APs execute the function specified by Procedure simultaneously.
-
- If WaitEvent is NULL, execution is in blocking mode. The BSP waits until all
- APs finish or TimeoutInMicroseconds expires. Otherwise, execution is in non-blocking
- mode, and the BSP returns from this service without waiting for APs. If a
- non-blocking mode is requested after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT
- is signaled, then EFI_UNSUPPORTED must be returned.
-
- If the timeout specified by TimeoutInMicroseconds expires before all APs return
- from Procedure, then Procedure on the failed APs is terminated. All enabled APs
- are always available for further calls to EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- and EFI_MP_SERVICES_PROTOCOL.StartupThisAP(). If FailedCpuList is not NULL, its
- content points to the list of processor handle numbers in which Procedure was
- terminated.
-
- Note: It is the responsibility of the consumer of the EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- to make sure that the nature of the code that is executed on the BSP and the
- dispatched APs is well controlled. The MP Services Protocol does not guarantee
- that the Procedure function is MP-safe. Hence, the tasks that can be run in
- parallel are limited to certain independent tasks and well-controlled exclusive
- code. EFI services and protocols may not be called by APs unless otherwise
- specified.
-
- In blocking execution mode, BSP waits until all APs finish or
- TimeoutInMicroseconds expires.
-
- In non-blocking execution mode, BSP is freed to return to the caller and then
- proceed to the next task without having to wait for APs. The following
- sequence needs to occur in a non-blocking execution mode:
-
- -# The caller that intends to use this MP Services Protocol in non-blocking
- mode creates WaitEvent by calling the EFI CreateEvent() service. The caller
- invokes EFI_MP_SERVICES_PROTOCOL.StartupAllAPs(). If the parameter WaitEvent
- is not NULL, then StartupAllAPs() executes in non-blocking mode. It requests
- the function specified by Procedure to be started on all the enabled APs,
- and releases the BSP to continue with other tasks.
- -# The caller can use the CheckEvent() and WaitForEvent() services to check
- the state of the WaitEvent created in step 1.
- -# When the APs complete their task or TimeoutInMicroSecondss expires, the MP
- Service signals WaitEvent by calling the EFI SignalEvent() function. If
- FailedCpuList is not NULL, its content is available when WaitEvent is
- signaled. If all APs returned from Procedure prior to the timeout, then
- FailedCpuList is set to NULL. If not all APs return from Procedure before
- the timeout, then FailedCpuList is filled in with the list of the failed
- APs. The buffer is allocated by MP Service Protocol using AllocatePool().
- It is the caller's responsibility to free the buffer with FreePool() service.
- -# This invocation of SignalEvent() function informs the caller that invoked
- EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() that either all the APs completed
- the specified task or a timeout occurred. The contents of FailedCpuList
- can be examined to determine which APs did not complete the specified task
- prior to the timeout.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[in] Procedure A pointer to the function to be run on
- enabled APs of the system. See type
- EFI_AP_PROCEDURE.
- @param[in] SingleThread If TRUE, then all the enabled APs execute
- the function specified by Procedure one by
- one, in ascending order of processor handle
- number. If FALSE, then all the enabled APs
- execute the function specified by Procedure
- simultaneously.
- @param[in] WaitEvent The event created by the caller with CreateEvent()
- service. If it is NULL, then execute in
- blocking mode. BSP waits until all APs finish
- or TimeoutInMicroseconds expires. If it's
- not NULL, then execute in non-blocking mode.
- BSP requests the function specified by
- Procedure to be started on all the enabled
- APs, and go on executing immediately. If
- all return from Procedure, or TimeoutInMicroseconds
- expires, this event is signaled. The BSP
- can use the CheckEvent() or WaitForEvent()
- services to check the state of event. Type
- EFI_EVENT is defined in CreateEvent() in
- the Unified Extensible Firmware Interface
- Specification.
- @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
- APs to return from Procedure, either for
- blocking or non-blocking mode. Zero means
- infinity. If the timeout expires before
- all APs return from Procedure, then Procedure
- on the failed APs is terminated. All enabled
- APs are available for next function assigned
- by EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- or EFI_MP_SERVICES_PROTOCOL.StartupThisAP().
- If the timeout expires in blocking mode,
- BSP returns EFI_TIMEOUT. If the timeout
- expires in non-blocking mode, WaitEvent
- is signaled with SignalEvent().
- @param[in] ProcedureArgument The parameter passed into Procedure for
- all APs.
- @param[out] FailedCpuList If NULL, this parameter is ignored. Otherwise,
- if all APs finish successfully, then its
- content is set to NULL. If not all APs
- finish before timeout expires, then its
- content is set to address of the buffer
- holding handle numbers of the failed APs.
- The buffer is allocated by MP Service Protocol,
- and it's the caller's responsibility to
- free the buffer with FreePool() service.
- In blocking mode, it is ready for consumption
- when the call returns. In non-blocking mode,
- it is ready when WaitEvent is signaled. The
- list of failed CPU is terminated by
- END_OF_CPU_LIST.
-
- @retval EFI_SUCCESS In blocking mode, all APs have finished before
- the timeout expired.
- @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
- to all enabled APs.
- @retval EFI_UNSUPPORTED A non-blocking mode request was made after the
- UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
- signaled.
- @retval EFI_DEVICE_ERROR Caller processor is AP.
- @retval EFI_NOT_STARTED No enabled APs exist in the system.
- @retval EFI_NOT_READY Any enabled APs are busy.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before
- all enabled APs have finished.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-StartupAllAPs (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN BOOLEAN SingleThread,
- IN EFI_EVENT WaitEvent OPTIONAL,
- IN UINTN TimeoutInMicroseconds,
- IN VOID *ProcedureArgument OPTIONAL,
- OUT UINTN **FailedCpuList OPTIONAL
- );
-
-/**
- This service lets the caller get one enabled AP to execute a caller-provided
- function. The caller can request the BSP to either wait for the completion
- of the AP or just proceed with the next task by using the EFI event mechanism.
- See EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() for more details on non-blocking
- execution support. This service may only be called from the BSP.
-
- This function is used to dispatch one enabled AP to the function specified by
- Procedure passing in the argument specified by ProcedureArgument. If WaitEvent
- is NULL, execution is in blocking mode. The BSP waits until the AP finishes or
- TimeoutInMicroSecondss expires. Otherwise, execution is in non-blocking mode.
- BSP proceeds to the next task without waiting for the AP. If a non-blocking mode
- is requested after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT is signaled,
- then EFI_UNSUPPORTED must be returned.
-
- If the timeout specified by TimeoutInMicroseconds expires before the AP returns
- from Procedure, then execution of Procedure by the AP is terminated. The AP is
- available for subsequent calls to EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() and
- EFI_MP_SERVICES_PROTOCOL.StartupThisAP().
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL
- instance.
- @param[in] Procedure A pointer to the function to be run on
- enabled APs of the system. See type
- EFI_AP_PROCEDURE.
- @param[in] ProcessorNumber The handle number of the AP. The range is
- from 0 to the total number of logical
- processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
- @param[in] WaitEvent The event created by the caller with CreateEvent()
- service. If it is NULL, then execute in
- blocking mode. BSP waits until all APs finish
- or TimeoutInMicroseconds expires. If it's
- not NULL, then execute in non-blocking mode.
- BSP requests the function specified by
- Procedure to be started on all the enabled
- APs, and go on executing immediately. If
- all return from Procedure or TimeoutInMicroseconds
- expires, this event is signaled. The BSP
- can use the CheckEvent() or WaitForEvent()
- services to check the state of event. Type
- EFI_EVENT is defined in CreateEvent() in
- the Unified Extensible Firmware Interface
- Specification.
- @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
- APs to return from Procedure, either for
- blocking or non-blocking mode. Zero means
- infinity. If the timeout expires before
- all APs return from Procedure, then Procedure
- on the failed APs is terminated. All enabled
- APs are available for next function assigned
- by EFI_MP_SERVICES_PROTOCOL.StartupAllAPs()
- or EFI_MP_SERVICES_PROTOCOL.StartupThisAP().
- If the timeout expires in blocking mode,
- BSP returns EFI_TIMEOUT. If the timeout
- expires in non-blocking mode, WaitEvent
- is signaled with SignalEvent().
- @param[in] ProcedureArgument The parameter passed into Procedure for
- all APs.
- @param[out] Finished If NULL, this parameter is ignored. In
- blocking mode, this parameter is ignored.
- In non-blocking mode, if AP returns from
- Procedure before the timeout expires, its
- content is set to TRUE. Otherwise, the
- value is set to FALSE. The caller can
- determine if the AP returned from Procedure
- by evaluating this value.
-
- @retval EFI_SUCCESS In blocking mode, specified AP finished before
- the timeout expires.
- @retval EFI_SUCCESS In non-blocking mode, the function has been
- dispatched to specified AP.
- @retval EFI_UNSUPPORTED A non-blocking mode request was made after the
- UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
- signaled.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before
- the specified AP has finished.
- @retval EFI_NOT_READY The specified AP is busy.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP or disabled AP.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-StartupThisAP (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN UINTN ProcessorNumber,
- IN EFI_EVENT WaitEvent OPTIONAL,
- IN UINTN TimeoutInMicroseconds,
- IN VOID *ProcedureArgument OPTIONAL,
- OUT BOOLEAN *Finished OPTIONAL
- );
-
-/**
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. This call can only be performed
- by the current BSP.
-
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. The new BSP can take over the
- execution of the old BSP and continue seamlessly from where the old one left
- off. This service may not be supported after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT
- is signaled.
-
- If the BSP cannot be switched prior to the return from this service, then
- EFI_UNSUPPORTED must be returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL instance.
- @param[in] ProcessorNumber The handle number of AP that is to become the new
- BSP. The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
- @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an
- enabled AP. Otherwise, it will be disabled.
-
- @retval EFI_SUCCESS BSP successfully switched.
- @retval EFI_UNSUPPORTED Switching the BSP cannot be completed prior to
- this service returning.
- @retval EFI_UNSUPPORTED Switching the BSP is not supported.
- @retval EFI_SUCCESS The calling processor is an AP.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the current BSP or
- a disabled AP.
- @retval EFI_NOT_READY The specified AP is busy.
-
-**/
-EFI_STATUS
-EFIAPI
-SwitchBSP (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableOldBSP
- );
-
-/**
- This service lets the caller enable or disable an AP from this point onward.
- This service may only be called from the BSP.
-
- This service allows the caller enable or disable an AP from this point onward.
- The caller can optionally specify the health status of the AP by Health. If
- an AP is being disabled, then the state of the disabled AP is implementation
- dependent. If an AP is enabled, then the implementation must guarantee that a
- complete initialization sequence is performed on the AP, so the AP is in a state
- that is compatible with an MP operating system. This service may not be supported
- after the UEFI Event EFI_EVENT_GROUP_READY_TO_BOOT is signaled.
-
- If the enable or disable AP operation cannot be completed prior to the return
- from this service, then EFI_UNSUPPORTED must be returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL instance.
- @param[in] ProcessorNumber The handle number of AP that is to become the new
- BSP. The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
- @param[in] EnableAP Specifies the new state for the processor for
- enabled, FALSE for disabled.
- @param[in] HealthFlag If not NULL, a pointer to a value that specifies
- the new health status of the AP. This flag
- corresponds to StatusFlag defined in
- EFI_MP_SERVICES_PROTOCOL.GetProcessorInfo(). Only
- the PROCESSOR_HEALTH_STATUS_BIT is used. All other
- bits are ignored. If it is NULL, this parameter
- is ignored.
-
- @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP cannot be completed
- prior to this service returning.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP is not supported.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber
- does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
-
-**/
-EFI_STATUS
-EFIAPI
-EnableDisableAP (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableAP,
- IN UINT32 *HealthFlag OPTIONAL
- );
-
-/**
- This return the handle number for the calling processor. This service may be
- called from the BSP and APs.
-
- This service returns the processor handle number for the calling processor.
- The returned value is in the range from 0 to the total number of logical
- processors minus 1. The total number of logical processors can be retrieved
- with EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors(). This service may be
- called from the BSP and APs. If ProcessorNumber is NULL, then EFI_INVALID_PARAMETER
- is returned. Otherwise, the current processors handle number is returned in
- ProcessorNumber, and EFI_SUCCESS is returned.
-
- @param[in] This A pointer to the EFI_MP_SERVICES_PROTOCOL instance.
- @param[out] ProcessorNumber The handle number of AP that is to become the new
- BSP. The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- EFI_MP_SERVICES_PROTOCOL.GetNumberOfProcessors().
-
- @retval EFI_SUCCESS The current processor handle number was returned
- in ProcessorNumber.
- @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-WhoAmI (
- IN EFI_MP_SERVICES_PROTOCOL *This,
- OUT UINTN *ProcessorNumber
- );
-
-/**
- Terminate AP's task and set it to idle state.
-
- This function terminates AP's task due to timeout by sending INIT-SIPI,
- and sends it to idle state.
-
- @param CpuData the pointer to CPU_DATA_BLOCK of specified AP
-
-**/
-VOID
-ResetProcessorToIdleState (
- IN CPU_DATA_BLOCK *CpuData
- );
-
-/**
- Prepares Startup Code for APs.
- This function prepares Startup Code for APs.
-
- @retval EFI_SUCCESS The APs were started
- @retval EFI_OUT_OF_RESOURCES Cannot allocate memory to start APs
-
-**/
-EFI_STATUS
-PrepareAPStartupCode (
- VOID
- );
-
-/**
- Free the code buffer of startup AP.
-
-**/
-VOID
-FreeApStartupCode (
- VOID
- );
-
-/**
- Resets the Application Processor and directs it to jump to the
- specified routine.
-
- The processor jumps to this code in flat mode, but the processor's
- stack is not initialized.
-
- @param ProcessorId the AP of ProcessorId was reset
-**/
-VOID
-ResetApStackless (
- IN UINT32 ProcessorId
- );
-
-#endif // _CPU_MP_H_
-
diff --git a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S b/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S deleted file mode 100644 index e034bc2e2e..0000000000 --- a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.S +++ /dev/null @@ -1,57 +0,0 @@ -#------------------------------------------------------------------------------
-#*
-#* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-#* This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* CpuAsm.S
-#*
-#* Abstract:
-#*
-#------------------------------------------------------------------------------
-
-
-#.MMX
-#.XMM
-
-#------------------------------------------------------------------------------
-# VOID
-# SetCodeSelector (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(SetCodeSelector)
-ASM_PFX(SetCodeSelector):
- movl 4(%esp), %ecx
- subl $0x10, %esp
- leal setCodeSelectorLongJump, %eax
- movl %eax, (%esp)
- movw %cx, 4(%esp)
- .byte 0xFF, 0x2C, 0x24 # jmp *(%esp) note:(FWORD jmp)
-setCodeSelectorLongJump:
- addl $0x10, %esp
- ret
-
-#------------------------------------------------------------------------------
-# VOID
-# SetDataSelectors (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(SetDataSelectors)
-ASM_PFX(SetDataSelectors):
- movl 4(%esp), %ecx
- movw %cx, %ss
- movw %cx, %ds
- movw %cx, %es
- movw %cx, %fs
- movw %cx, %gs
- ret
-
-#END
-
diff --git a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm b/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm deleted file mode 100644 index 7f8f0d6f3a..0000000000 --- a/UefiCpuPkg/CpuDxe/Ia32/CpuAsm.asm +++ /dev/null @@ -1,58 +0,0 @@ - TITLE CpuAsm.asm:
-;------------------------------------------------------------------------------
-;*
-;* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-;* This program and the accompanying materials
-;* are licensed and made available under the terms and conditions of the BSD License
-;* which accompanies this distribution. The full text of the license may be found at
-;* http://opensource.org/licenses/bsd-license.php
-;*
-;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;* CpuAsm.asm
-;*
-;* Abstract:
-;*
-;------------------------------------------------------------------------------
-
- .686
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; SetCodeSelector (
-; UINT16 Selector
-; );
-;------------------------------------------------------------------------------
-SetCodeSelector PROC PUBLIC
- mov ecx, [esp+4]
- sub esp, 0x10
- lea eax, setCodeSelectorLongJump
- mov [esp], eax
- mov [esp+4], cx
- jmp fword ptr [esp]
-setCodeSelectorLongJump:
- add esp, 0x10
- ret
-SetCodeSelector ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; SetDataSelectors (
-; UINT16 Selector
-; );
-;------------------------------------------------------------------------------
-SetDataSelectors PROC PUBLIC
- mov ecx, [esp+4]
- mov ss, cx
- mov ds, cx
- mov es, cx
- mov fs, cx
- mov gs, cx
- ret
-SetDataSelectors ENDP
-
-
-END
diff --git a/UefiCpuPkg/CpuDxe/Ia32/MpAsm.asm b/UefiCpuPkg/CpuDxe/Ia32/MpAsm.asm deleted file mode 100644 index 09579f251e..0000000000 --- a/UefiCpuPkg/CpuDxe/Ia32/MpAsm.asm +++ /dev/null @@ -1,76 +0,0 @@ -;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-.686
-.xmm
-.model flat, C
-
-extern mTopOfApCommonStack:DWORD
-extern ApEntryPointInC:PROC
-
-.code
-
-;
-; This lock only allows one AP to use the mTopOfApCommonStack stack at a time
-;
-ApStackLock dd 0
-
-;.code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApEntryPoint (
-; VOID
-; );
-;------------------------------------------------------------------------------
-AsmApEntryPoint PROC
-
- cli
-AsmApEntryPointAcquireLock:
-lock bts dword ptr [ApStackLock], 0
- pause
- jc AsmApEntryPointAcquireLock
-
- mov esp, [mTopOfApCommonStack]
- call ApEntryPointInC
-
- cli
-
-lock btc dword ptr [ApStackLock], 0
-
- mov eax, 100h
-AsmApEntryPointShareLock:
- pause
- dec eax
- jnz AsmApEntryPointShareLock
-
- jmp AsmApEntryPoint
-
-AsmApEntryPoint ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApDoneWithCommonStack (
-; VOID
-; );
-;------------------------------------------------------------------------------
-AsmApDoneWithCommonStack PROC PUBLIC
-
-lock btc dword ptr [ApStackLock], 0
- ret
-
-AsmApDoneWithCommonStack ENDP
-
-END
diff --git a/UefiCpuPkg/CpuDxe/Ia32/MpAsm.nasm b/UefiCpuPkg/CpuDxe/Ia32/MpAsm.nasm deleted file mode 100644 index c47cdcef54..0000000000 --- a/UefiCpuPkg/CpuDxe/Ia32/MpAsm.nasm +++ /dev/null @@ -1,68 +0,0 @@ -;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-extern ASM_PFX(mTopOfApCommonStack)
-extern ASM_PFX(ApEntryPointInC)
-
-SECTION .data
-
-;
-; This lock only allows one AP to use the mTopOfApCommonStack stack at a time
-;
-ApStackLock:
- dd 0
-
-SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApEntryPoint (
-; VOID
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(AsmApEntryPoint)
-ASM_PFX(AsmApEntryPoint):
- cli
-AsmApEntryPointAcquireLock:
-lock bts dword [ApStackLock], 0
- pause
- jc AsmApEntryPointAcquireLock
-
- mov esp, [ASM_PFX(mTopOfApCommonStack)]
- call ASM_PFX(ApEntryPointInC)
-
- cli
-
-lock btc dword [ApStackLock], 0
-
- mov eax, 0x100
-AsmApEntryPointShareLock:
- pause
- dec eax
- jnz AsmApEntryPointShareLock
-
- jmp ASM_PFX(AsmApEntryPoint)
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApDoneWithCommonStack (
-; VOID
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(AsmApDoneWithCommonStack)
-ASM_PFX(AsmApDoneWithCommonStack):
-lock btc dword [ApStackLock], 0
- ret
-
diff --git a/UefiCpuPkg/CpuDxe/X64/CpuAsm.S b/UefiCpuPkg/CpuDxe/X64/CpuAsm.S deleted file mode 100644 index e82cadf369..0000000000 --- a/UefiCpuPkg/CpuDxe/X64/CpuAsm.S +++ /dev/null @@ -1,60 +0,0 @@ -# TITLE CpuAsm.S:
-
-#------------------------------------------------------------------------------
-#*
-#* Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
-#* This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* CpuAsm.S
-#*
-#* Abstract:
-#*
-#------------------------------------------------------------------------------
-
-
-#text SEGMENT
-
-
-#------------------------------------------------------------------------------
-# VOID
-# SetCodeSelector (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(SetCodeSelector)
-ASM_PFX(SetCodeSelector):
- subq $0x10, %rsp
- leaq L_setCodeSelectorLongJump(%rip), %rax
- movq %rax, (%rsp)
- movw %cx, 4(%rsp)
- .byte 0xFF, 0x2C, 0x24 # jmp (%rsp) note:fword jmp
-L_setCodeSelectorLongJump:
- addq $0x10, %rsp
- ret
-
-#------------------------------------------------------------------------------
-# VOID
-# SetDataSelectors (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(SetDataSelectors)
-ASM_PFX(SetDataSelectors):
- movw %cx, %ss
- movw %cx, %ds
- movw %cx, %es
- movw %cx, %fs
- movw %cx, %gs
- ret
-
-#text ENDS
-
-#END
-
-
diff --git a/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm b/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm deleted file mode 100644 index c71b06a81e..0000000000 --- a/UefiCpuPkg/CpuDxe/X64/CpuAsm.asm +++ /dev/null @@ -1,54 +0,0 @@ - TITLE CpuAsm.asm:
-;------------------------------------------------------------------------------
-;*
-;* Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
-;* This program and the accompanying materials
-;* are licensed and made available under the terms and conditions of the BSD License
-;* which accompanies this distribution. The full text of the license may be found at
-;* http://opensource.org/licenses/bsd-license.php
-;*
-;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;* CpuAsm.asm
-;*
-;* Abstract:
-;*
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; SetCodeSelector (
-; UINT16 Selector
-; );
-;------------------------------------------------------------------------------
-SetCodeSelector PROC PUBLIC
- sub rsp, 0x10
- lea rax, setCodeSelectorLongJump
- mov [rsp], rax
- mov [rsp+4], cx
- jmp fword ptr [rsp]
-setCodeSelectorLongJump:
- add rsp, 0x10
- ret
-SetCodeSelector ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; SetDataSelectors (
-; UINT16 Selector
-; );
-;------------------------------------------------------------------------------
-SetDataSelectors PROC PUBLIC
- mov ss, cx
- mov ds, cx
- mov es, cx
- mov fs, cx
- mov gs, cx
- ret
-SetDataSelectors ENDP
-
-END
-
diff --git a/UefiCpuPkg/CpuDxe/X64/MpAsm.asm b/UefiCpuPkg/CpuDxe/X64/MpAsm.asm deleted file mode 100644 index 308de51330..0000000000 --- a/UefiCpuPkg/CpuDxe/X64/MpAsm.asm +++ /dev/null @@ -1,76 +0,0 @@ -;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-#include <Base.h>
-
-extern ASM_PFX(mTopOfApCommonStack):QWORD
-extern ASM_PFX(ApEntryPointInC):PROC
-
-.data
-
-;
-; This lock only allows one AP to use the mTopOfApCommonStack stack at a time
-;
-ApStackLock:
- dd 0
-
-.code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApEntryPoint (
-; VOID
-; );
-;------------------------------------------------------------------------------
-ASM_PFX(AsmApEntryPoint) PROC PUBLIC
-
- cli
-AsmApEntryPointAcquireLock:
-lock bts dword ptr [ApStackLock], 0
- pause
- jc AsmApEntryPointAcquireLock
-
- mov rsp, [ASM_PFX(mTopOfApCommonStack)]
- call ASM_PFX(ApEntryPointInC)
-
- cli
-
-lock btc dword ptr [ApStackLock], 0
-
- mov eax, 100h
-AsmApEntryPointShareLock:
- pause
- dec eax
- jnz AsmApEntryPointShareLock
-
- jmp ASM_PFX(AsmApEntryPoint)
-
-ASM_PFX(AsmApEntryPoint) ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApDoneWithCommonStack (
-; VOID
-; );
-;------------------------------------------------------------------------------
-ASM_PFX(AsmApDoneWithCommonStack) PROC PUBLIC
-
-lock btc dword ptr [ApStackLock], 0
- ret
-
-ASM_PFX(AsmApDoneWithCommonStack) ENDP
-
-END
-
diff --git a/UefiCpuPkg/CpuDxe/X64/MpAsm.nasm b/UefiCpuPkg/CpuDxe/X64/MpAsm.nasm deleted file mode 100644 index e3dc248002..0000000000 --- a/UefiCpuPkg/CpuDxe/X64/MpAsm.nasm +++ /dev/null @@ -1,70 +0,0 @@ -;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-extern ASM_PFX(mTopOfApCommonStack)
-extern ASM_PFX(ApEntryPointInC)
-
-DEFAULT REL
-
-SECTION .data
-
-;
-; This lock only allows one AP to use the mTopOfApCommonStack stack at a time
-;
-ApStackLock:
- dd 0
-
-SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApEntryPoint (
-; VOID
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(AsmApEntryPoint)
-ASM_PFX(AsmApEntryPoint):
- cli
-AsmApEntryPointAcquireLock:
-lock bts dword [ApStackLock], 0
- pause
- jc AsmApEntryPointAcquireLock
-
- mov rsp, [ASM_PFX(mTopOfApCommonStack)]
- call ASM_PFX(ApEntryPointInC)
-
- cli
-
-lock btc dword [ApStackLock], 0
-
- mov eax, 0x100
-AsmApEntryPointShareLock:
- pause
- dec eax
- jnz AsmApEntryPointShareLock
-
- jmp ASM_PFX(AsmApEntryPoint)
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmApDoneWithCommonStack (
-; VOID
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(AsmApDoneWithCommonStack)
-ASM_PFX(AsmApDoneWithCommonStack):
-lock btc dword [ApStackLock], 0
- ret
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c deleted file mode 100644 index 3d8a799230..0000000000 --- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c +++ /dev/null @@ -1,536 +0,0 @@ -/** @file
- Produces the CPU I/O 2 Protocol.
-
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuIo2Dxe.h"
-
-//
-// Handle for the CPU I/O 2 Protocol
-//
-EFI_HANDLE mHandle = NULL;
-
-//
-// CPU I/O 2 Protocol instance
-//
-EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
- {
- CpuMemoryServiceRead,
- CpuMemoryServiceWrite
- },
- {
- CpuIoServiceRead,
- CpuIoServiceWrite
- }
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-UINT8 mInStride[] = {
- 1, // EfiCpuIoWidthUint8
- 2, // EfiCpuIoWidthUint16
- 4, // EfiCpuIoWidthUint32
- 8, // EfiCpuIoWidthUint64
- 0, // EfiCpuIoWidthFifoUint8
- 0, // EfiCpuIoWidthFifoUint16
- 0, // EfiCpuIoWidthFifoUint32
- 0, // EfiCpuIoWidthFifoUint64
- 1, // EfiCpuIoWidthFillUint8
- 2, // EfiCpuIoWidthFillUint16
- 4, // EfiCpuIoWidthFillUint32
- 8 // EfiCpuIoWidthFillUint64
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-UINT8 mOutStride[] = {
- 1, // EfiCpuIoWidthUint8
- 2, // EfiCpuIoWidthUint16
- 4, // EfiCpuIoWidthUint32
- 8, // EfiCpuIoWidthUint64
- 1, // EfiCpuIoWidthFifoUint8
- 2, // EfiCpuIoWidthFifoUint16
- 4, // EfiCpuIoWidthFifoUint32
- 8, // EfiCpuIoWidthFifoUint64
- 0, // EfiCpuIoWidthFillUint8
- 0, // EfiCpuIoWidthFillUint16
- 0, // EfiCpuIoWidthFillUint32
- 0 // EfiCpuIoWidthFillUint64
-};
-
-/**
- Check parameters to a CPU I/O 2 Protocol service request.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The parameters for this request pass the checks.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-CpuIoCheckParameter (
- IN BOOLEAN MmioOperation,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- UINT64 MaxCount;
- UINT64 Limit;
-
- //
- // Check to see if Buffer is NULL
- //
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if Width is in the valid range
- //
- if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // For FIFO type, the target address won't increase during the access,
- // so treat Count as 1
- //
- if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
- Count = 1;
- }
-
- //
- // Check to see if Width is in the valid range for I/O Port operations
- //
- Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if Address is aligned
- //
- if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
- return EFI_UNSUPPORTED;
- }
-
- //
- // Check to see if any address associated with this transfer exceeds the maximum
- // allowed address. The maximum address implied by the parameters passed in is
- // Address + Size * Count. If the following condition is met, then the transfer
- // is not supported.
- //
- // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
- //
- // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
- // can also be the maximum integer value supported by the CPU, this range
- // check must be adjusted to avoid all oveflow conditions.
- //
- // The following form of the range check is equivalent but assumes that
- // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
- //
- Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
- if (Count == 0) {
- if (Address > Limit) {
- return EFI_UNSUPPORTED;
- }
- } else {
- MaxCount = RShiftU64 (Limit, Width);
- if (MaxCount < (Count - 1)) {
- return EFI_UNSUPPORTED;
- }
- if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
- return EFI_UNSUPPORTED;
- }
- }
-
- //
- // Check to see if Buffer is aligned
- // (IA-32 allows UINT64 and INT64 data types to be 32-bit aligned.)
- //
- if (((UINTN)Buffer & ((MIN (sizeof (UINTN), mInStride[Width]) - 1))) != 0) {
- return EFI_UNSUPPORTED;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Reads memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[out] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceRead (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- *Uint8Buffer = MmioRead8 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint64) {
- *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Writes memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceWrite (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- MmioWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- } else if (OperationWidth == EfiCpuIoWidthUint64) {
- MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Reads I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[out] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceRead (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- *Uint8Buffer = IoRead8 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Write I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceWrite (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
- UINT8 *Uint8Buffer;
-
- //
- // Make sure the parameters are valid
- //
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
- for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiCpuIoWidthUint8) {
- IoWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (OperationWidth == EfiCpuIoWidthUint16) {
- IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else if (OperationWidth == EfiCpuIoWidthUint32) {
- IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- The user Entry Point for module CpuIo2Dxe. The user code starts with this function.
-
- @param[in] ImageHandle The firmware allocated handle for the EFI image.
- @param[in] SystemTable A pointer to the EFI System Table.
-
- @retval EFI_SUCCESS The entry point is executed successfully.
- @retval other Some error occurs when executing this entry point.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIo2Initialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
- Status = gBS->InstallMultipleProtocolInterfaces (
- &mHandle,
- &gEfiCpuIo2ProtocolGuid, &mCpuIo2,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h deleted file mode 100644 index 7d00da16f4..0000000000 --- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h +++ /dev/null @@ -1,225 +0,0 @@ -/** @file
- Internal include file for the CPU I/O 2 Protocol.
-
-Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_IO2_DXE_H_
-#define _CPU_IO2_DXE_H_
-
-#include <PiDxe.h>
-
-#include <Protocol/CpuIo2.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define MAX_IO_PORT_ADDRESS 0xFFFF
-
-/**
- Reads memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[out] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceRead (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceWrite (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- );
-
-/**
- Reads I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[out] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceRead (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Write I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is responsible
- for satisfying any alignment and I/O width restrictions that a PI System on a
- platform might require. For example on some platforms, width requests of
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
- be handled by the driver.
-
- If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
- or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
- each of the Count operations that is performed.
-
- If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
- EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times on the same Address.
-
- If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
- EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
- incremented for each of the Count operations that is performed. The read or
- write operation is performed Count times from the first element of Buffer.
-
- @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O or Memory operation.
- @param[in] Address The base address of the I/O operation.
- @param[in] Count The number of I/O operations to perform. The number of
- bytes moved is Width size * Count, starting at Address.
- @param[in] Buffer For read operations, the destination buffer to store the results.
- For write operations, the source buffer from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the PI system.
- @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this PI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceWrite (
- IN EFI_CPU_IO2_PROTOCOL *This,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- );
-
-#endif
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf deleted file mode 100644 index 8ef8b3d31c..0000000000 --- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf +++ /dev/null @@ -1,51 +0,0 @@ -## @file
-# Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
-#
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CpuIo2Dxe
- MODULE_UNI_FILE = CpuIo2Dxe.uni
- FILE_GUID = A19B1FE7-C1BC-49F8-875F-54A5D542443F
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
- ENTRY_POINT = CpuIo2Initialize
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC
-#
-
-[Sources]
- CpuIo2Dxe.c
- CpuIo2Dxe.h
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- UefiDriverEntryPoint
- BaseLib
- DebugLib
- IoLib
- UefiBootServicesTableLib
-
-[Protocols]
- gEfiCpuIo2ProtocolGuid ## PRODUCES
-
-[Depex]
- TRUE
-
-[UserExtensions.TianoCore."ExtraFiles"]
- CpuIo2DxeExtra.uni
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.uni b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.uni Binary files differdeleted file mode 100644 index 3ce8ec04cf..0000000000 --- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2DxeExtra.uni b/UefiCpuPkg/CpuIo2Dxe/CpuIo2DxeExtra.uni Binary files differdeleted file mode 100644 index 512a2f65b2..0000000000 --- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2DxeExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c deleted file mode 100644 index 7b1ad37515..0000000000 --- a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c +++ /dev/null @@ -1,413 +0,0 @@ -/** @file
- Produces the SMM CPU I/O Protocol.
-
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuIo2Smm.h"
-
-//
-// Handle for the SMM CPU I/O Protocol
-//
-EFI_HANDLE mHandle = NULL;
-
-//
-// SMM CPU I/O Protocol instance
-//
-EFI_SMM_CPU_IO2_PROTOCOL mSmmCpuIo2 = {
- {
- CpuMemoryServiceRead,
- CpuMemoryServiceWrite
- },
- {
- CpuIoServiceRead,
- CpuIoServiceWrite
- }
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-UINT8 mStride[] = {
- 1, // SMM_IO_UINT8
- 2, // SMM_IO_UINT16
- 4, // SMM_IO_UINT32
- 8 // SMM_IO_UINT64
-};
-
-/**
- Check parameters to a SMM CPU I/O Protocol service request.
-
- @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[in] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
-
-**/
-EFI_STATUS
-CpuIoCheckParameter (
- IN BOOLEAN MmioOperation,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- UINT64 MaxCount;
- UINT64 Limit;
-
- //
- // Check to see if Buffer is NULL
- //
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if Width is in the valid range
- //
- if ((UINT32)Width > SMM_IO_UINT64) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if Width is in the valid range for I/O Port operations
- //
- if (!MmioOperation && (Width == SMM_IO_UINT64)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if any address associated with this transfer exceeds the maximum
- // allowed address. The maximum address implied by the parameters passed in is
- // Address + Size * Count. If the following condition is met, then the transfer
- // is not supported.
- //
- // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
- //
- // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
- // can also be the maximum integer value supported by the CPU, this range
- // check must be adjusted to avoid all overflow conditions.
- //
- // The following form of the range check is equivalent but assumes that
- // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
- //
- Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
- if (Count == 0) {
- if (Address > Limit) {
- return EFI_UNSUPPORTED;
- }
- } else {
- MaxCount = RShiftU64 (Limit, Width);
- if (MaxCount < (Count - 1)) {
- return EFI_UNSUPPORTED;
- }
- if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
- return EFI_UNSUPPORTED;
- }
- }
-
- //
- // Check to see if Address is aligned
- //
- if ((Address & (UINT64)(mStride[Width] - 1)) != 0) {
- return EFI_UNSUPPORTED;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Reads memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[out] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceRead (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 Stride;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- Stride = mStride[Width];
- for (Uint8Buffer = Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
- if (Width == SMM_IO_UINT8) {
- *Uint8Buffer = MmioRead8 ((UINTN)Address);
- } else if (Width == SMM_IO_UINT16) {
- *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
- } else if (Width == SMM_IO_UINT32) {
- *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
- } else if (Width == SMM_IO_UINT64) {
- *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Writes memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[in] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceWrite (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 Stride;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- Stride = mStride[Width];
- for (Uint8Buffer = Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
- if (Width == SMM_IO_UINT8) {
- MmioWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (Width == SMM_IO_UINT16) {
- MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else if (Width == SMM_IO_UINT32) {
- MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- } else if (Width == SMM_IO_UINT64) {
- MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Reads I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[out] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceRead (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 Stride;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- Stride = mStride[Width];
- for (Uint8Buffer = Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
- if (Width == SMM_IO_UINT8) {
- *Uint8Buffer = IoRead8 ((UINTN)Address);
- } else if (Width == SMM_IO_UINT16) {
- *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
- } else if (Width == SMM_IO_UINT32) {
- *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Write I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[in] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceWrite (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 Stride;
- UINT8 *Uint8Buffer;
-
- //
- // Make sure the parameters are valid
- //
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- Stride = mStride[Width];
- for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
- if (Width == SMM_IO_UINT8) {
- IoWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (Width == SMM_IO_UINT16) {
- IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else if (Width == SMM_IO_UINT32) {
- IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- The module Entry Point SmmCpuIoProtocol driver
-
- @param[in] ImageHandle The firmware allocated handle for the EFI image.
- @param[in] SystemTable A pointer to the EFI System Table.
-
- @retval EFI_SUCCESS The entry point is executed successfully.
- @retval Other Some error occurs when executing this entry point.
-
-**/
-EFI_STATUS
-EFIAPI
-SmmCpuIo2Initialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_STATUS Status;
-
- //
- // Copy the SMM CPU I/O Protocol instance into the System Management System Table
- //
- CopyMem (&gSmst->SmmIo, &mSmmCpuIo2, sizeof (mSmmCpuIo2));
-
- //
- // Install the SMM CPU I/O Protocol into the SMM protocol database
- //
- Status = gSmst->SmmInstallProtocolInterface (
- &mHandle,
- &gEfiSmmCpuIo2ProtocolGuid,
- EFI_NATIVE_INTERFACE,
- &mSmmCpuIo2
- );
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.h b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.h deleted file mode 100644 index 5a092594d7..0000000000 --- a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.h +++ /dev/null @@ -1,162 +0,0 @@ -/** @file
- Internal include file for the SMM CPU I/O Protocol.
-
-Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_IO2_SMM_H_
-#define _CPU_IO2_SMM_H_
-
-#include <PiSmm.h>
-
-#include <Protocol/SmmCpuIo2.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/SmmServicesTableLib.h>
-#include <Library/BaseMemoryLib.h>
-
-#define MAX_IO_PORT_ADDRESS 0xFFFF
-
-/**
- Reads memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[out] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceRead (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes memory-mapped registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[in] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceWrite (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- );
-
-/**
- Reads I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[out] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceRead (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Write I/O registers.
-
- The I/O operations are carried out exactly as requested. The caller is
- responsible for any alignment and I/O width issues that the bus, device,
- platform, or type of I/O might require.
-
- @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.
- @param[in] Width Signifies the width of the I/O operations.
- @param[in] Address The base address of the I/O operations. The caller is
- responsible for aligning the Address if required.
- @param[in] Count The number of I/O operations to perform.
- @param[in] Buffer For read operations, the destination buffer to store
- the results. For write operations, the source buffer
- from which to write data.
-
- @retval EFI_SUCCESS The data was read from or written to the device.
- @retval EFI_UNSUPPORTED The Address is not valid for this system.
- @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
- @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
- lack of resources
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceWrite (
- IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,
- IN EFI_SMM_IO_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- );
-
-#endif
diff --git a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf deleted file mode 100644 index d7c98f67c0..0000000000 --- a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf +++ /dev/null @@ -1,52 +0,0 @@ -## @file
-# Produces the SMM CPU I/O 2 Protocol by using the services of the I/O Library.
-#
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CpuIo2Smm
- MODULE_UNI_FILE = CpuIo2Smm.uni
- FILE_GUID = A47EE2D8-F60E-42fd-8E58-7BD65EE4C29B
- MODULE_TYPE = DXE_SMM_DRIVER
- VERSION_STRING = 1.0
- PI_SPECIFICATION_VERSION = 0x0001000A
- ENTRY_POINT = SmmCpuIo2Initialize
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- CpuIo2Smm.c
- CpuIo2Smm.h
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- UefiDriverEntryPoint
- BaseLib
- DebugLib
- IoLib
- SmmServicesTableLib
- BaseMemoryLib
-
-[Protocols]
- gEfiSmmCpuIo2ProtocolGuid ## PRODUCES
-
-[Depex]
- TRUE
-
-[UserExtensions.TianoCore."ExtraFiles"]
- CpuIo2SmmExtra.uni
diff --git a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.uni b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.uni Binary files differdeleted file mode 100644 index 89bac865d6..0000000000 --- a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuIo2Smm/CpuIo2SmmExtra.uni b/UefiCpuPkg/CpuIo2Smm/CpuIo2SmmExtra.uni Binary files differdeleted file mode 100644 index 84ba7210c3..0000000000 --- a/UefiCpuPkg/CpuIo2Smm/CpuIo2SmmExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.c b/UefiCpuPkg/CpuIoPei/CpuIoPei.c deleted file mode 100644 index 3c5c8a74b3..0000000000 --- a/UefiCpuPkg/CpuIoPei/CpuIoPei.c +++ /dev/null @@ -1,864 +0,0 @@ -/** @file
- Produces the CPU I/O PPI.
-
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuIoPei.h"
-
-//
-// Instance of CPU I/O PPI
-//
-EFI_PEI_CPU_IO_PPI gCpuIoPpi = {
- {
- CpuMemoryServiceRead,
- CpuMemoryServiceWrite
- },
- {
- CpuIoServiceRead,
- CpuIoServiceWrite
- },
- CpuIoRead8,
- CpuIoRead16,
- CpuIoRead32,
- CpuIoRead64,
- CpuIoWrite8,
- CpuIoWrite16,
- CpuIoWrite32,
- CpuIoWrite64,
- CpuMemRead8,
- CpuMemRead16,
- CpuMemRead32,
- CpuMemRead64,
- CpuMemWrite8,
- CpuMemWrite16,
- CpuMemWrite32,
- CpuMemWrite64
-};
-
-//
-// PPI Descriptor used to install the CPU I/O PPI
-//
-EFI_PEI_PPI_DESCRIPTOR gPpiList = {
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gEfiPeiCpuIoPpiInstalledGuid,
- NULL
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-UINT8 mInStride[] = {
- 1, // EfiPeiCpuIoWidthUint8
- 2, // EfiPeiCpuIoWidthUint16
- 4, // EfiPeiCpuIoWidthUint32
- 8, // EfiPeiCpuIoWidthUint64
- 0, // EfiPeiCpuIoWidthFifoUint8
- 0, // EfiPeiCpuIoWidthFifoUint16
- 0, // EfiPeiCpuIoWidthFifoUint32
- 0, // EfiPeiCpuIoWidthFifoUint64
- 1, // EfiPeiCpuIoWidthFillUint8
- 2, // EfiPeiCpuIoWidthFillUint16
- 4, // EfiPeiCpuIoWidthFillUint32
- 8 // EfiPeiCpuIoWidthFillUint64
-};
-
-//
-// Lookup table for increment values based on transfer widths
-//
-UINT8 mOutStride[] = {
- 1, // EfiPeiCpuIoWidthUint8
- 2, // EfiPeiCpuIoWidthUint16
- 4, // EfiPeiCpuIoWidthUint32
- 8, // EfiPeiCpuIoWidthUint64
- 1, // EfiPeiCpuIoWidthFifoUint8
- 2, // EfiPeiCpuIoWidthFifoUint16
- 4, // EfiPeiCpuIoWidthFifoUint32
- 8, // EfiPeiCpuIoWidthFifoUint64
- 0, // EfiPeiCpuIoWidthFillUint8
- 0, // EfiPeiCpuIoWidthFillUint16
- 0, // EfiPeiCpuIoWidthFillUint32
- 0 // EfiPeiCpuIoWidthFillUint64
-};
-
-/**
- Check parameters to a CPU I/O PPI service request.
-
- @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[in] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The parameters for this request pass the checks.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-CpuIoCheckParameter (
- IN BOOLEAN MmioOperation,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- UINT64 MaxCount;
- UINT64 Limit;
-
- //
- // Check to see if Buffer is NULL
- //
- if (Buffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if Width is in the valid range
- //
- if ((UINT32)Width >= EfiPeiCpuIoWidthMaximum) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // For FIFO type, the target address won't increase during the access,
- // so treat Count as 1
- //
- if (Width >= EfiPeiCpuIoWidthFifoUint8 && Width <= EfiPeiCpuIoWidthFifoUint64) {
- Count = 1;
- }
-
- //
- // Check to see if Width is in the valid range for I/O Port operations
- //
- Width = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
- if (!MmioOperation && (Width == EfiPeiCpuIoWidthUint64)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check to see if any address associated with this transfer exceeds the maximum
- // allowed address. The maximum address implied by the parameters passed in is
- // Address + Size * Count. If the following condition is met, then the transfer
- // is not supported.
- //
- // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
- //
- // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
- // can also be the maximum integer value supported by the CPU, this range
- // check must be adjusted to avoid all overflow conditions.
- //
- // The following form of the range check is equivalent but assumes that
- // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
- //
- Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
- if (Count == 0) {
- if (Address > Limit) {
- return EFI_UNSUPPORTED;
- }
- } else {
- MaxCount = RShiftU64 (Limit, Width);
- if (MaxCount < (Count - 1)) {
- return EFI_UNSUPPORTED;
- }
- if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
- return EFI_UNSUPPORTED;
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Reads memory-mapped registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[out] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceRead (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
- BOOLEAN Aligned;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
- Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiPeiCpuIoWidthUint8) {
- *Uint8Buffer = MmioRead8 ((UINTN)Address);
- } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
- if (Aligned) {
- *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
- } else {
- WriteUnaligned16 ((UINT16 *)Uint8Buffer, MmioRead16 ((UINTN)Address));
- }
- } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
- if (Aligned) {
- *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
- } else {
- WriteUnaligned32 ((UINT32 *)Uint8Buffer, MmioRead32 ((UINTN)Address));
- }
- } else if (OperationWidth == EfiPeiCpuIoWidthUint64) {
- if (Aligned) {
- *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
- } else {
- WriteUnaligned64 ((UINT64 *)Uint8Buffer, MmioRead64 ((UINTN)Address));
- }
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Writes memory-mapped registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[in] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceWrite (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
- BOOLEAN Aligned;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
- Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiPeiCpuIoWidthUint8) {
- MmioWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
- if (Aligned) {
- MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else {
- MmioWrite16 ((UINTN)Address, ReadUnaligned16 ((UINT16 *)Uint8Buffer));
- }
- } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
- if (Aligned) {
- MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- } else {
- MmioWrite32 ((UINTN)Address, ReadUnaligned32 ((UINT32 *)Uint8Buffer));
- }
- } else if (OperationWidth == EfiPeiCpuIoWidthUint64) {
- if (Aligned) {
- MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
- } else {
- MmioWrite64 ((UINTN)Address, ReadUnaligned64 ((UINT64 *)Uint8Buffer));
- }
- }
- }
- return EFI_SUCCESS;
-}
-
-/**
- Reads I/O registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[out] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceRead (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
- BOOLEAN Aligned;
- UINT8 *Uint8Buffer;
-
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
- Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
- for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiPeiCpuIoWidthUint8) {
- *Uint8Buffer = IoRead8 ((UINTN)Address);
- } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
- if (Aligned) {
- *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
- } else {
- WriteUnaligned16 ((UINT16 *)Uint8Buffer, IoRead16 ((UINTN)Address));
- }
- } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
- if (Aligned) {
- *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
- } else {
- WriteUnaligned32 ((UINT32 *)Uint8Buffer, IoRead32 ((UINTN)Address));
- }
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Write I/O registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[in] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceWrite (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- )
-{
- EFI_STATUS Status;
- UINT8 InStride;
- UINT8 OutStride;
- EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
- BOOLEAN Aligned;
- UINT8 *Uint8Buffer;
-
- //
- // Make sure the parameters are valid
- //
- Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- //
- // Select loop based on the width of the transfer
- //
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
- Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
- for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
- if (OperationWidth == EfiPeiCpuIoWidthUint8) {
- IoWrite8 ((UINTN)Address, *Uint8Buffer);
- } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
- if (Aligned) {
- IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
- } else {
- IoWrite16 ((UINTN)Address, ReadUnaligned16 ((UINT16 *)Uint8Buffer));
- }
- } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
- if (Aligned) {
- IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
- } else {
- IoWrite32 ((UINTN)Address, ReadUnaligned32 ((UINT32 *)Uint8Buffer));
- }
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- 8-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return An 8-bit value returned from the I/O space.
-**/
-UINT8
-EFIAPI
-CpuIoRead8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return IoRead8 ((UINTN)Address);
-}
-
-/**
- 16-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 16-bit value returned from the I/O space.
-
-**/
-UINT16
-EFIAPI
-CpuIoRead16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return IoRead16 ((UINTN)Address);
-}
-
-/**
- 32-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 32-bit value returned from the I/O space.
-
-**/
-UINT32
-EFIAPI
-CpuIoRead32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return IoRead32 ((UINTN)Address);
-}
-
-/**
- 64-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 64-bit value returned from the I/O space.
-
-**/
-UINT64
-EFIAPI
-CpuIoRead64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return IoRead64 ((UINTN)Address);
-}
-
-/**
- 8-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- IoWrite8 ((UINTN)Address, Data);
-}
-
-/**
- 16-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- IoWrite16 ((UINTN)Address, Data);
-}
-
-/**
- 32-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- IoWrite32 ((UINTN)Address, Data);
-}
-
-/**
- 64-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT64 Data
- )
-{
- IoWrite64 ((UINTN)Address, Data);
-}
-
-/**
- 8-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return An 8-bit value returned from the memory space.
-
-**/
-UINT8
-EFIAPI
-CpuMemRead8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return MmioRead8 ((UINTN)Address);
-}
-
-/**
- 16-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 16-bit value returned from the memory space.
-
-**/
-UINT16
-EFIAPI
-CpuMemRead16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return MmioRead16 ((UINTN)Address);
-}
-
-/**
- 32-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 32-bit value returned from the memory space.
-
-**/
-UINT32
-EFIAPI
-CpuMemRead32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return MmioRead32 ((UINTN)Address);
-}
-
-/**
- 64-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 64-bit value returned from the memory space.
-
-**/
-UINT64
-EFIAPI
-CpuMemRead64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- )
-{
- return MmioRead64 ((UINTN)Address);
-}
-
-/**
- 8-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT8 Data
- )
-{
- MmioWrite8 ((UINTN)Address, Data);
-}
-
-/**
- 16-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT16 Data
- )
-{
- MmioWrite16 ((UINTN)Address, Data);
-}
-
-/**
- 32-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT32 Data
- )
-{
- MmioWrite32 ((UINTN)Address, Data);
-}
-
-/**
- 64-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT64 Data
- )
-{
- MmioWrite64 ((UINTN)Address, Data);
-}
-
-/**
- The Entry point of the CPU I/O PEIM
-
- This function is the Entry point of the CPU I/O PEIM which installs CpuIoPpi.
-
- @param[in] FileHandle Pointer to image file handle.
- @param[in] PeiServices Pointer to PEI Services Table
-
- @retval EFI_SUCCESS CPU I/O PPI successfully installed
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoInitialize (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- EFI_STATUS Status;
-
- //
- // Register so it will be automatically shadowed to memory
- //
- Status = PeiServicesRegisterForShadow (FileHandle);
-
- //
- // Make CpuIo pointer in PeiService table point to gCpuIoPpi
- //
- (*((EFI_PEI_SERVICES **)PeiServices))->CpuIo = &gCpuIoPpi;
-
- if (Status == EFI_ALREADY_STARTED) {
- //
- // Shadow completed and running from memory
- //
- DEBUG ((EFI_D_INFO, "CpuIO PPI has been loaded into memory. Reinstalled PPI=0x%x\n", &gCpuIoPpi));
- } else {
- Status = PeiServicesInstallPpi (&gPpiList);
- ASSERT_EFI_ERROR (Status);
- }
-
- return EFI_SUCCESS;
-}
diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.h b/UefiCpuPkg/CpuIoPei/CpuIoPei.h deleted file mode 100644 index 052f0e3d0e..0000000000 --- a/UefiCpuPkg/CpuIoPei/CpuIoPei.h +++ /dev/null @@ -1,448 +0,0 @@ -/** @file
- Internal include file for the CPU I/O PPI.
-
-Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_IO2_PEI_H_
-#define _CPU_IO2_PEI_H_
-
-#include <PiDxe.h>
-
-#include <Ppi/CpuIo.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PeiServicesLib.h>
-
-#define MAX_IO_PORT_ADDRESS 0xFFFF
-
-/**
- Reads memory-mapped registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[out] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceRead (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes memory-mapped registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[in] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMemoryServiceWrite (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- );
-
-/**
- Reads I/O registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[out] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceRead (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Write I/O registers.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Width The width of the access. Enumerated in bytes.
- @param[in] Address The physical address of the access.
- @param[in] Count The number of accesses to perform.
- @param[in] Buffer A pointer to the buffer of data.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.
- @retval EFI_INVALID_PARAMETER Buffer is NULL.
- @retval EFI_UNSUPPORTED The address range specified by Address, Width,
- and Count is not valid for this EFI system.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuIoServiceWrite (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
- IN UINT64 Address,
- IN UINTN Count,
- IN VOID *Buffer
- );
-
-/**
- 8-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return An 8-bit value returned from the I/O space.
-**/
-UINT8
-EFIAPI
-CpuIoRead8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 16-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 16-bit value returned from the I/O space.
-
-**/
-UINT16
-EFIAPI
-CpuIoRead16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 32-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 32-bit value returned from the I/O space.
-
-**/
-UINT32
-EFIAPI
-CpuIoRead32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 64-bit I/O read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 64-bit value returned from the I/O space.
-
-**/
-UINT64
-EFIAPI
-CpuIoRead64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 8-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-/**
- 16-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-/**
- 32-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-/**
- 64-bit I/O write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuIoWrite64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT64 Data
- );
-
-/**
- 8-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return An 8-bit value returned from the memory space.
-
-**/
-UINT8
-EFIAPI
-CpuMemRead8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 16-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 16-bit value returned from the memory space.
-
-**/
-UINT16
-EFIAPI
-CpuMemRead16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 32-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 32-bit value returned from the memory space.
-
-**/
-UINT32
-EFIAPI
-CpuMemRead32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 64-bit memory read operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
-
- @return A 64-bit value returned from the memory space.
-
-**/
-UINT64
-EFIAPI
-CpuMemRead64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address
- );
-
-/**
- 8-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite8 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT8 Data
- );
-
-/**
- 16-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite16 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT16 Data
- );
-
-/**
- 32-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite32 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT32 Data
- );
-
-/**
- 64-bit memory write operations.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table published
- by the PEI Foundation.
- @param[in] This Pointer to local data for the interface.
- @param[in] Address The physical address of the access.
- @param[in] Data The data to write.
-
-**/
-VOID
-EFIAPI
-CpuMemWrite64 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_PEI_CPU_IO_PPI *This,
- IN UINT64 Address,
- IN UINT64 Data
- );
-
-#endif
diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.inf b/UefiCpuPkg/CpuIoPei/CpuIoPei.inf deleted file mode 100644 index b72ad6bfaf..0000000000 --- a/UefiCpuPkg/CpuIoPei/CpuIoPei.inf +++ /dev/null @@ -1,51 +0,0 @@ -## @file
-# Produces the CPU I/O PPI by using the services of the I/O Library.
-#
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CpuIoPei
- MODULE_UNI_FILE = CpuIoPei.uni
- FILE_GUID = AE265864-CF5D-41a8-913D-71C155E76442
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- ENTRY_POINT = CpuIoInitialize
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC
-#
-
-[Sources]
- CpuIoPei.c
- CpuIoPei.h
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[LibraryClasses]
- PeimEntryPoint
- BaseLib
- DebugLib
- IoLib
- PeiServicesLib
-
-[Ppis]
- gEfiPeiCpuIoPpiInstalledGuid ## PRODUCES
-
-[Depex]
- TRUE
-
-[UserExtensions.TianoCore."ExtraFiles"]
- CpuIoPeiExtra.uni
diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.uni b/UefiCpuPkg/CpuIoPei/CpuIoPei.uni Binary files differdeleted file mode 100644 index 366efe43d4..0000000000 --- a/UefiCpuPkg/CpuIoPei/CpuIoPei.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPeiExtra.uni b/UefiCpuPkg/CpuIoPei/CpuIoPeiExtra.uni Binary files differdeleted file mode 100644 index 7aa54a3306..0000000000 --- a/UefiCpuPkg/CpuIoPei/CpuIoPeiExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuMpPei/CpuBist.c b/UefiCpuPkg/CpuMpPei/CpuBist.c deleted file mode 100644 index 56292452a9..0000000000 --- a/UefiCpuPkg/CpuMpPei/CpuBist.c +++ /dev/null @@ -1,263 +0,0 @@ -/** @file
- Update and publish processors' BIST information.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuMpPei.h"
-
-EFI_SEC_PLATFORM_INFORMATION2_PPI mSecPlatformInformation2Ppi = {
- SecPlatformInformation2
-};
-
-EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformation2Ppi = {
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gEfiSecPlatformInformation2PpiGuid,
- &mSecPlatformInformation2Ppi
-};
-
-/**
- Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.
-
- @param PeiServices The pointer to the PEI Services Table.
- @param StructureSize The pointer to the variable describing size of the input buffer.
- @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
- hold the record is returned in StructureSize.
-
-**/
-EFI_STATUS
-EFIAPI
-SecPlatformInformation2 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN OUT UINT64 *StructureSize,
- OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN BistInformationSize;
- UINTN CpuIndex;
- EFI_SEC_PLATFORM_INFORMATION_CPU *CpuInstance;
-
- PeiCpuMpData = GetMpHobData ();
-
- BistInformationSize = sizeof (EFI_SEC_PLATFORM_INFORMATION_RECORD2) +
- sizeof (EFI_SEC_PLATFORM_INFORMATION_CPU) * PeiCpuMpData->CpuCount;
- //
- // return the information size if input buffer size is too small
- //
- if ((*StructureSize) < (UINT64) BistInformationSize) {
- *StructureSize = (UINT64) BistInformationSize;
- return EFI_BUFFER_TOO_SMALL;
- }
-
- PlatformInformationRecord2->NumberOfCpus = PeiCpuMpData->CpuCount;
- CpuInstance = PlatformInformationRecord2->CpuInstance;
- for (CpuIndex = 0; CpuIndex < PeiCpuMpData->CpuCount; CpuIndex ++) {
- CpuInstance[CpuIndex].CpuLocation = PeiCpuMpData->CpuData[CpuIndex].ApicId;
- CpuInstance[CpuIndex].InfoRecord.IA32HealthFlags = PeiCpuMpData->CpuData[CpuIndex].Health;
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Worker function to get CPUs' BIST by calling SecPlatformInformationPpi
- or SecPlatformInformation2Ppi.
-
- @param PeiServices Pointer to PEI Services Table
- @param Guid PPI Guid
- @param PpiDescriptor Return a pointer to instance of the
- EFI_PEI_PPI_DESCRIPTOR
- @param BistInformationData Pointer to BIST information data
-
- @retval EFI_SUCCESS Retrieve of the BIST data successfully
- @retval EFI_NOT_FOUND No sec platform information(2) ppi export
- @retval EFI_DEVICE_ERROR Failed to get CPU Information
-
-**/
-EFI_STATUS
-GetBistInfoFromPpi (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN CONST EFI_GUID *Guid,
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiDescriptor,
- OUT VOID **BistInformationData
- )
-{
- EFI_STATUS Status;
- EFI_SEC_PLATFORM_INFORMATION2_PPI *SecPlatformInformation2Ppi;
- EFI_SEC_PLATFORM_INFORMATION_RECORD2 *SecPlatformInformation2;
- UINT64 InformationSize;
-
- Status = PeiServicesLocatePpi (
- Guid, // GUID
- 0, // INSTANCE
- PpiDescriptor, // EFI_PEI_PPI_DESCRIPTOR
- (VOID **)&SecPlatformInformation2Ppi // PPI
- );
- if (Status == EFI_NOT_FOUND) {
- return EFI_NOT_FOUND;
- }
-
- if (Status == EFI_SUCCESS) {
- //
- // Get the size of the sec platform information2(BSP/APs' BIST data)
- //
- InformationSize = 0;
- SecPlatformInformation2 = NULL;
- Status = SecPlatformInformation2Ppi->PlatformInformation2 (
- PeiServices,
- &InformationSize,
- SecPlatformInformation2
- );
- if (Status == EFI_BUFFER_TOO_SMALL) {
- Status = PeiServicesAllocatePool (
- (UINTN) InformationSize,
- (VOID **) &SecPlatformInformation2
- );
- if (Status == EFI_SUCCESS) {
- //
- // Retrieve BIST data
- //
- Status = SecPlatformInformation2Ppi->PlatformInformation2 (
- PeiServices,
- &InformationSize,
- SecPlatformInformation2
- );
- if (Status == EFI_SUCCESS) {
- *BistInformationData = SecPlatformInformation2;
- return EFI_SUCCESS;
- }
- }
- }
- }
-
- return EFI_DEVICE_ERROR;
-}
-
-/**
- Collects BIST data from PPI.
-
- This function collects BIST data from Sec Platform Information2 PPI
- or SEC Platform Information PPI.
-
- @param PeiServices Pointer to PEI Services Table
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-
-**/
-VOID
-CollectBistDataFromPpi (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- )
-{
- EFI_STATUS Status;
- EFI_PEI_PPI_DESCRIPTOR *SecInformationDescriptor;
- EFI_SEC_PLATFORM_INFORMATION_RECORD2 *SecPlatformInformation2;
- EFI_SEC_PLATFORM_INFORMATION_RECORD *SecPlatformInformation;
- UINTN NumberOfData;
- EFI_SEC_PLATFORM_INFORMATION_CPU *CpuInstance;
- EFI_SEC_PLATFORM_INFORMATION_CPU BspCpuInstance;
- UINTN ProcessorNumber;
- UINTN CpuIndex;
- PEI_CPU_DATA *CpuData;
-
- SecPlatformInformation2 = NULL;
- SecPlatformInformation = NULL;
- NumberOfData = 0;
- CpuInstance = NULL;
-
- //
- // Get BIST information from Sec Platform Information2 Ppi firstly
- //
- Status = GetBistInfoFromPpi (
- PeiServices,
- &gEfiSecPlatformInformation2PpiGuid,
- &SecInformationDescriptor,
- (VOID *) &SecPlatformInformation2
- );
- if (Status == EFI_SUCCESS) {
- //
- // Sec Platform Information2 PPI includes BSP/APs' BIST information
- //
- NumberOfData = SecPlatformInformation2->NumberOfCpus;
- CpuInstance = SecPlatformInformation2->CpuInstance;
- } else {
- //
- // Otherwise, get BIST information from Sec Platform Information Ppi
- //
- Status = GetBistInfoFromPpi (
- PeiServices,
- &gEfiSecPlatformInformationPpiGuid,
- &SecInformationDescriptor,
- (VOID *) &SecPlatformInformation
- );
- if (Status == EFI_SUCCESS) {
- NumberOfData = 1;
- //
- // SEC Platform Information only includes BSP's BIST information
- // and does not have BSP's APIC ID
- //
- BspCpuInstance.CpuLocation = GetInitialApicId ();
- BspCpuInstance.InfoRecord.IA32HealthFlags.Uint32 = SecPlatformInformation->IA32HealthFlags.Uint32;
- CpuInstance = &BspCpuInstance;
- } else {
- DEBUG ((EFI_D_INFO, "Does not find any stored CPU BIST information from PPI!\n"));
- }
- }
- for (ProcessorNumber = 0; ProcessorNumber < PeiCpuMpData->CpuCount; ProcessorNumber ++) {
- CpuData = &PeiCpuMpData->CpuData[ProcessorNumber];
- for (CpuIndex = 0; CpuIndex < NumberOfData; CpuIndex ++) {
- ASSERT (CpuInstance != NULL);
- if (CpuData->ApicId == CpuInstance[CpuIndex].CpuLocation) {
- //
- // Update processor's BIST data if it is already stored before
- //
- CpuData->Health = CpuInstance[CpuIndex].InfoRecord.IA32HealthFlags;
- }
- }
- if (CpuData->Health.Uint32 == 0) {
- CpuData->CpuHealthy = TRUE;
- } else {
- CpuData->CpuHealthy = FALSE;
- //
- // Report Status Code that self test is failed
- //
- REPORT_STATUS_CODE (
- EFI_ERROR_CODE | EFI_ERROR_MAJOR,
- (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
- );
- }
- DEBUG ((EFI_D_INFO, " APICID - 0x%08x, BIST - 0x%08x\n",
- PeiCpuMpData->CpuData[ProcessorNumber].ApicId,
- PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32
- ));
- }
-
- if (SecPlatformInformation2 != NULL && NumberOfData < PeiCpuMpData->CpuCount) {
- //
- // Reinstall SecPlatformInformation2 PPI to include new BIST inforamtion
- //
- Status = PeiServicesReInstallPpi (
- SecInformationDescriptor,
- &mPeiSecPlatformInformation2Ppi
- );
- ASSERT_EFI_ERROR (Status);
- } else {
- //
- // Install SecPlatformInformation2 PPI to include new BIST inforamtion
- //
- Status = PeiServicesInstallPpi (&mPeiSecPlatformInformation2Ppi);
- ASSERT_EFI_ERROR(Status);
- }
-}
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c deleted file mode 100644 index d5bc0c9b80..0000000000 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c +++ /dev/null @@ -1,568 +0,0 @@ -/** @file
- CPU PEI Module installs CPU Multiple Processor PPI.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuMpPei.h"
-
-//
-// Global Descriptor Table (GDT)
-//
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
-/* selector { Global Segment Descriptor } */
-/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
-/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
-/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
-/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
-/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
-/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
-/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
-/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
-/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
-};
-
-//
-// IA32 Gdt register
-//
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
- sizeof (mGdtEntries) - 1,
- (UINTN) mGdtEntries
- };
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {
- (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gEfiEndOfPeiSignalPpiGuid,
- CpuMpEndOfPeiCallback
-};
-
-/**
- Sort the APIC ID of all processors.
-
- This function sorts the APIC ID of all processors so that processor number is
- assigned in the ascending order of APIC ID which eases MP debugging.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-**/
-VOID
-SortApicId (
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- )
-{
- UINTN Index1;
- UINTN Index2;
- UINTN Index3;
- UINT32 ApicId;
- EFI_HEALTH_FLAGS Health;
- UINT32 ApCount;
-
- ApCount = PeiCpuMpData->CpuCount - 1;
-
- if (ApCount != 0) {
- for (Index1 = 0; Index1 < ApCount; Index1++) {
- Index3 = Index1;
- //
- // Sort key is the hardware default APIC ID
- //
- ApicId = PeiCpuMpData->CpuData[Index1].ApicId;
- for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {
- if (ApicId > PeiCpuMpData->CpuData[Index2].ApicId) {
- Index3 = Index2;
- ApicId = PeiCpuMpData->CpuData[Index2].ApicId;
- }
- }
- if (Index3 != Index1) {
- PeiCpuMpData->CpuData[Index3].ApicId = PeiCpuMpData->CpuData[Index1].ApicId;
- PeiCpuMpData->CpuData[Index1].ApicId = ApicId;
- Health = PeiCpuMpData->CpuData[Index3].Health;
- PeiCpuMpData->CpuData[Index3].Health = PeiCpuMpData->CpuData[Index1].Health;
- PeiCpuMpData->CpuData[Index1].Health = Health;
- }
- }
-
- //
- // Get the processor number for the BSP
- //
- ApicId = GetInitialApicId ();
- for (Index1 = 0; Index1 < PeiCpuMpData->CpuCount; Index1++) {
- if (PeiCpuMpData->CpuData[Index1].ApicId == ApicId) {
- PeiCpuMpData->BspNumber = (UINT32) Index1;
- break;
- }
- }
- }
-}
-
-/**
- Get CPU MP Data pointer from the Guided HOB.
-
- @return Pointer to Pointer to PEI CPU MP Data
-**/
-PEI_CPU_MP_DATA *
-GetMpHobData (
- VOID
- )
-{
- EFI_HOB_GUID_TYPE *GuidHob;
- VOID *DataInHob;
- PEI_CPU_MP_DATA *CpuMpData;
-
- CpuMpData = NULL;
- GuidHob = GetFirstGuidHob (&gEfiCallerIdGuid);
- if (GuidHob != NULL) {
- DataInHob = GET_GUID_HOB_DATA (GuidHob);
- CpuMpData = (PEI_CPU_MP_DATA *)(*(UINTN *)DataInHob);
- }
- ASSERT (CpuMpData != NULL);
- return CpuMpData;
-}
-
-/**
- This function will be called from AP reset code if BSP uses WakeUpAP.
-
- @param ExchangeInfo Pointer to the MP exchange info buffer
- @param NumApsExecuting Number of curret executing AP
-**/
-VOID
-EFIAPI
-ApCFunction (
- IN MP_CPU_EXCHANGE_INFO *ExchangeInfo,
- IN UINTN NumApsExecuting
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN ProcessorNumber;
- EFI_AP_PROCEDURE Procedure;
- UINTN BistData;
-
- PeiCpuMpData = ExchangeInfo->PeiCpuMpData;
- if (PeiCpuMpData->InitFlag) {
- //
- // This is first time AP wakeup, get BIST inforamtion from AP stack
- //
- BistData = *(UINTN *) (PeiCpuMpData->Buffer + NumApsExecuting * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));
- PeiCpuMpData->CpuData[NumApsExecuting].ApicId = GetInitialApicId ();
- PeiCpuMpData->CpuData[NumApsExecuting].Health.Uint32 = (UINT32) BistData;
- //
- // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.
- //
- MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);
- MicrocodeDetect ();
- } else {
- //
- // Execute AP function if AP is not disabled
- //
- GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);
- if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&
- (PeiCpuMpData->ApFunction != 0)) {
- PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;
- Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;
- Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);
- PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;
- }
- }
-
- //
- // AP finished executing C code
- //
- InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);
-
- AsmCliHltLoop ();
-}
-
-/**
- This function will be called by BSP to wakeup AP.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
- @param Broadcast TRUE: Send broadcast IPI to all APs
- FALSE: Send IPI to AP by ApicId
- @param ApicId Apic ID for the processor to be waked
- @param Procedure The function to be invoked by AP
- @param ProcedureArgument The argument to be passed into AP function
-**/
-VOID
-WakeUpAP (
- IN PEI_CPU_MP_DATA *PeiCpuMpData,
- IN BOOLEAN Broadcast,
- IN UINT32 ApicId,
- IN EFI_AP_PROCEDURE Procedure, OPTIONAL
- IN VOID *ProcedureArgument OPTIONAL
- )
-{
- volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;
-
- PeiCpuMpData->ApFunction = (UINTN) Procedure;
- PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;
- PeiCpuMpData->FinishedCount = 0;
-
- ExchangeInfo = PeiCpuMpData->MpCpuExchangeInfo;
- ExchangeInfo->Lock = 0;
- ExchangeInfo->StackStart = PeiCpuMpData->Buffer;
- ExchangeInfo->StackSize = PeiCpuMpData->CpuApStackSize;
- ExchangeInfo->BufferStart = PeiCpuMpData->WakeupBuffer;
- ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;
- ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;
- ExchangeInfo->Cr3 = AsmReadCr3 ();
- ExchangeInfo->CFunction = (UINTN) ApCFunction;
- ExchangeInfo->NumApsExecuting = 0;
- ExchangeInfo->PeiCpuMpData = PeiCpuMpData;
-
- //
- // Get the BSP's data of GDT and IDT
- //
- CopyMem ((VOID *)&ExchangeInfo->GdtrProfile, &mGdt, sizeof(mGdt));
- AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);
-
- if (Broadcast) {
- SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);
- } else {
- SendInitSipiSipi (ApicId, (UINT32) ExchangeInfo->BufferStart);
- }
-
- return ;
-}
-
-/**
- Get available system memory below 1MB by specified size.
-
- @param WakeupBufferSize Wakeup buffer size required
-
- @retval other Return wakeup buffer address below 1MB.
- @retval -1 Cannot find free memory below 1MB.
-**/
-UINTN
-GetWakeupBuffer (
- IN UINTN WakeupBufferSize
- )
-{
- EFI_PEI_HOB_POINTERS Hob;
- UINTN WakeupBufferStart;
- UINTN WakeupBufferEnd;
-
- //
- // Get the HOB list for processing
- //
- Hob.Raw = GetHobList ();
-
- //
- // Collect memory ranges
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
- if ((Hob.ResourceDescriptor->PhysicalStart < BASE_1MB) &&
- (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
- ((Hob.ResourceDescriptor->ResourceAttribute &
- (EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED |
- EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED |
- EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED
- )) == 0)
- ) {
- //
- // Need memory under 1MB to be collected here
- //
- WakeupBufferEnd = (UINTN) (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength);
- if (WakeupBufferEnd > BASE_1MB) {
- //
- // Wakeup buffer should be under 1MB
- //
- WakeupBufferEnd = BASE_1MB;
- }
- //
- // Wakeup buffer should be aligned on 4KB
- //
- WakeupBufferStart = (WakeupBufferEnd - WakeupBufferSize) & ~(SIZE_4KB - 1);
- if (WakeupBufferStart < Hob.ResourceDescriptor->PhysicalStart) {
- continue;
- }
- //
- // Create a memory allocation HOB.
- //
- BuildMemoryAllocationHob (
- WakeupBufferStart,
- WakeupBufferSize,
- EfiBootServicesData
- );
- return WakeupBufferStart;
- }
- }
- //
- // Find the next HOB
- //
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
-
- return (UINTN) -1;
-}
-
-/**
- Get available system memory below 1MB by specified size.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-**/
-VOID
-BackupAndPrepareWakeupBuffer(
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- )
-{
- CopyMem (
- (VOID *) PeiCpuMpData->BackupBuffer,
- (VOID *) PeiCpuMpData->WakeupBuffer,
- PeiCpuMpData->BackupBufferSize
- );
- CopyMem (
- (VOID *) PeiCpuMpData->WakeupBuffer,
- (VOID *) PeiCpuMpData->AddressMap.RendezvousFunnelAddress,
- PeiCpuMpData->AddressMap.RendezvousFunnelSize
- );
-}
-
-/**
- Restore wakeup buffer data.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-**/
-VOID
-RestoreWakeupBuffer(
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- )
-{
- CopyMem ((VOID *) PeiCpuMpData->WakeupBuffer, (VOID *) PeiCpuMpData->BackupBuffer, PeiCpuMpData->BackupBufferSize);
-}
-
-/**
- This function will get CPU count in the system.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-
- @return AP processor count
-**/
-UINT32
-CountProcessorNumber (
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- )
-{
- //
- // Load Microcode on BSP
- //
- MicrocodeDetect ();
- //
- // Store BSP's MTRR setting
- //
- MtrrGetAllMtrrs (&PeiCpuMpData->MtrrTable);
- //
- // Send broadcast IPI to APs to wakeup APs
- //
- PeiCpuMpData->InitFlag = 1;
- WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);
- //
- // Wait for AP task to complete and then exit.
- //
- MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
- PeiCpuMpData->InitFlag = 0;
- PeiCpuMpData->CpuCount += (UINT32) PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;
- ASSERT (PeiCpuMpData->CpuCount <= PcdGet32(PcdCpuMaxLogicalProcessorNumber));
- //
- // Sort BSP/Aps by CPU APIC ID in ascending order
- //
- SortApicId (PeiCpuMpData);
-
- DEBUG ((EFI_D_INFO, "CpuMpPei: Find %d processors in system.\n", PeiCpuMpData->CpuCount));
- return PeiCpuMpData->CpuCount;
-}
-
-/**
- Prepare for AP wakeup buffer and copy AP reset code into it.
-
- Get wakeup buffer below 1MB. Allocate memory for CPU MP Data and APs Stack.
-
- @return Pointer to PEI CPU MP Data
-**/
-PEI_CPU_MP_DATA *
-PrepareAPStartupVector (
- VOID
- )
-{
- EFI_STATUS Status;
- UINT32 MaxCpuCount;
- PEI_CPU_MP_DATA *PeiCpuMpData;
- EFI_PHYSICAL_ADDRESS Buffer;
- UINTN BufferSize;
- UINTN WakeupBuffer;
- UINTN WakeupBufferSize;
- MP_ASSEMBLY_ADDRESS_MAP AddressMap;
-
- AsmGetAddressMap (&AddressMap);
- WakeupBufferSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);
- WakeupBuffer = GetWakeupBuffer ((WakeupBufferSize + SIZE_4KB - 1) & ~(SIZE_4KB - 1));
- ASSERT (WakeupBuffer != (UINTN) -1);
- DEBUG ((EFI_D_INFO, "CpuMpPei: WakeupBuffer = 0x%x\n", WakeupBuffer));
-
- //
- // Allocate Pages for APs stack, CPU MP Data and backup buffer for wakeup buffer
- //
- MaxCpuCount = PcdGet32(PcdCpuMaxLogicalProcessorNumber);
- BufferSize = PcdGet32 (PcdCpuApStackSize) * MaxCpuCount + sizeof (PEI_CPU_MP_DATA)
- + WakeupBufferSize + sizeof (PEI_CPU_DATA) * MaxCpuCount;
- Status = PeiServicesAllocatePages (
- EfiBootServicesData,
- EFI_SIZE_TO_PAGES (BufferSize),
- &Buffer
- );
- ASSERT_EFI_ERROR (Status);
-
- PeiCpuMpData = (PEI_CPU_MP_DATA *) (UINTN) (Buffer + PcdGet32 (PcdCpuApStackSize) * MaxCpuCount);
- PeiCpuMpData->Buffer = (UINTN) Buffer;
- PeiCpuMpData->CpuApStackSize = PcdGet32 (PcdCpuApStackSize);
- PeiCpuMpData->WakeupBuffer = WakeupBuffer;
- PeiCpuMpData->BackupBuffer = (UINTN)PeiCpuMpData + sizeof (PEI_CPU_MP_DATA);
- PeiCpuMpData->BackupBufferSize = WakeupBufferSize;
- PeiCpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN) (WakeupBuffer + AddressMap.RendezvousFunnelSize);
-
- PeiCpuMpData->CpuCount = 1;
- PeiCpuMpData->BspNumber = 0;
- PeiCpuMpData->CpuData = (PEI_CPU_DATA *) (PeiCpuMpData->BackupBuffer +
- PeiCpuMpData->BackupBufferSize);
- PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();
- PeiCpuMpData->CpuData[0].Health.Uint32 = 0;
- PeiCpuMpData->EndOfPeiFlag = FALSE;
- CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));
-
- //
- // Backup original data and copy AP reset code in it
- //
- BackupAndPrepareWakeupBuffer(PeiCpuMpData);
-
- return PeiCpuMpData;
-}
-
-/**
- Notify function on End Of Pei PPI.
-
- On S3 boot, this function will restore wakeup buffer data.
- On normal boot, this function will flag wakeup buffer to be un-used type.
-
- @param PeiServices The pointer to the PEI Services Table.
- @param NotifyDescriptor Address of the notification descriptor data structure.
- @param Ppi Address of the PPI that was installed.
-
- @retval EFI_SUCCESS When everything is OK.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMpEndOfPeiCallback (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
- IN VOID *Ppi
- )
-{
- EFI_STATUS Status;
- EFI_BOOT_MODE BootMode;
- PEI_CPU_MP_DATA *PeiCpuMpData;
- EFI_PEI_HOB_POINTERS Hob;
- EFI_HOB_MEMORY_ALLOCATION *MemoryHob;
-
- DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invokded\n"));
-
- Status = PeiServicesGetBootMode (&BootMode);
- ASSERT_EFI_ERROR (Status);
-
- PeiCpuMpData = GetMpHobData ();
- ASSERT (PeiCpuMpData != NULL);
-
- if (BootMode != BOOT_ON_S3_RESUME) {
- //
- // Get the HOB list for processing
- //
- Hob.Raw = GetHobList ();
- //
- // Collect memory ranges
- //
- while (!END_OF_HOB_LIST (Hob)) {
- if (Hob.Header->HobType == EFI_HOB_TYPE_MEMORY_ALLOCATION) {
- MemoryHob = Hob.MemoryAllocation;
- if(MemoryHob->AllocDescriptor.MemoryBaseAddress == PeiCpuMpData->WakeupBuffer) {
- //
- // Flag this HOB type to un-used
- //
- GET_HOB_TYPE (Hob) = EFI_HOB_TYPE_UNUSED;
- break;
- }
- }
- Hob.Raw = GET_NEXT_HOB (Hob);
- }
- } else {
- RestoreWakeupBuffer (PeiCpuMpData);
- PeiCpuMpData->EndOfPeiFlag = TRUE;
- }
- return EFI_SUCCESS;
-}
-
-/**
- The Entry point of the MP CPU PEIM.
-
- This function will wakeup APs and collect CPU AP count and install the
- Mp Service Ppi.
-
- @param FileHandle Handle of the file being invoked.
- @param PeiServices Describes the list of possible PEI Services.
-
- @retval EFI_SUCCESS MpServicePpi is installed successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMpPeimInit (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- EFI_STATUS Status;
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINT32 ProcessorCount;
-
- //
- // Load new GDT table on BSP
- //
- AsmInitializeGdt (&mGdt);
- //
- // Get wakeup buffer and copy AP reset code in it
- //
- PeiCpuMpData = PrepareAPStartupVector ();
- //
- // Count processor number and collect processor information
- //
- ProcessorCount = CountProcessorNumber (PeiCpuMpData);
- //
- // Build location of PEI CPU MP DATA buffer in HOB
- //
- BuildGuidDataHob (
- &gEfiCallerIdGuid,
- (VOID *)&PeiCpuMpData,
- sizeof(UINT64)
- );
- //
- // Update and publish CPU BIST information
- //
- CollectBistDataFromPpi (PeiServices, PeiCpuMpData);
- //
- // register an event for EndOfPei
- //
- Status = PeiServicesNotifyPpi (&mNotifyList);
- ASSERT_EFI_ERROR (Status);
- //
- // Install CPU MP PPI
- //
- Status = PeiServicesInstallPpi(&mPeiCpuMpPpiDesc);
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h deleted file mode 100644 index 19e649eb82..0000000000 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h +++ /dev/null @@ -1,302 +0,0 @@ -/** @file
- Definitions to install Multiple Processor PPI.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_MP_PEI_H_
-#define _CPU_MP_PEI_H_
-
-#include <PiPei.h>
-
-#include <Ppi/MpServices.h>
-#include <Ppi/SecPlatformInformation.h>
-#include <Ppi/SecPlatformInformation2.h>
-#include <Ppi/EndOfPeiPhase.h>
-
-#include <Register/LocalApic.h>
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/MtrrLib.h>
-#include <Library/PcdLib.h>
-#include <Library/PeimEntryPoint.h>
-#include <Library/PeiServicesLib.h>
-#include <Library/ReportStatusCodeLib.h>
-#include <Library/SynchronizationLib.h>
-#include <Library/TimerLib.h>
-#include <Library/UefiCpuLib.h>
-
-#include "Microcode.h"
-
-//
-// AP state
-//
-typedef enum {
- CpuStateIdle,
- CpuStateBusy,
- CpuStateDisabled
-} CPU_STATE;
-
-//
-// AP reset code information
-//
-typedef struct {
- UINT8 *RendezvousFunnelAddress;
- UINTN PModeEntryOffset;
- UINTN LModeEntryOffset;
- UINTN RendezvousFunnelSize;
-} MP_ASSEMBLY_ADDRESS_MAP;
-
-//
-// CPU exchange information for switch BSP
-//
-typedef struct {
- UINT8 State; // offset 0
- UINTN StackPointer; // offset 4 / 8
- IA32_DESCRIPTOR Gdtr; // offset 8 / 16
- IA32_DESCRIPTOR Idtr; // offset 14 / 26
-} CPU_EXCHANGE_ROLE_INFO;
-
-typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;
-
-#pragma pack()
-
-typedef union {
- struct {
- UINT32 LimitLow : 16;
- UINT32 BaseLow : 16;
- UINT32 BaseMid : 8;
- UINT32 Type : 4;
- UINT32 System : 1;
- UINT32 Dpl : 2;
- UINT32 Present : 1;
- UINT32 LimitHigh : 4;
- UINT32 Software : 1;
- UINT32 Reserved : 1;
- UINT32 DefaultSize : 1;
- UINT32 Granularity : 1;
- UINT32 BaseHigh : 8;
- } Bits;
- UINT64 Uint64;
-} IA32_GDT;
-
-//
-// MP CPU exchange information for AP reset code
-//
-typedef struct {
- UINTN Lock;
- UINTN StackStart;
- UINTN StackSize;
- UINTN CFunction;
- IA32_DESCRIPTOR GdtrProfile;
- IA32_DESCRIPTOR IdtrProfile;
- UINTN BufferStart;
- UINTN PmodeOffset;
- UINTN NumApsExecuting;
- UINTN LmodeOffset;
- UINTN Cr3;
- PEI_CPU_MP_DATA *PeiCpuMpData;
-} MP_CPU_EXCHANGE_INFO;
-
-#pragma pack()
-
-typedef struct {
- UINT32 ApicId;
- EFI_HEALTH_FLAGS Health;
- CPU_STATE State;
- BOOLEAN CpuHealthy;
-} PEI_CPU_DATA;
-
-//
-// PEI CPU MP Data save in memory
-//
-struct _PEI_CPU_MP_DATA {
- UINT32 CpuCount;
- UINT32 BspNumber;
- UINTN Buffer;
- UINTN CpuApStackSize;
- MP_ASSEMBLY_ADDRESS_MAP AddressMap;
- UINTN WakeupBuffer;
- UINTN BackupBuffer;
- UINTN BackupBufferSize;
- UINTN ApFunction;
- UINTN ApFunctionArgument;
- volatile UINT32 FinishedCount;
- BOOLEAN EndOfPeiFlag;
- BOOLEAN InitFlag;
- CPU_EXCHANGE_ROLE_INFO BSPInfo;
- CPU_EXCHANGE_ROLE_INFO APInfo;
- MTRR_SETTINGS MtrrTable;
- PEI_CPU_DATA *CpuData;
- volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;
-};
-extern EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc;
-
-
-/**
- Assembly code to get starting address and size of the rendezvous entry for APs.
- Information for fixing a jump instruction in the code is also returned.
-
- @param AddressMap Output buffer for address map information.
-**/
-VOID
-EFIAPI
-AsmGetAddressMap (
- OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap
- );
-
-/**
- Assembly code to load GDT table and update segment accordingly.
-
- @param Gdtr Pointer to GDT descriptor
-**/
-VOID
-EFIAPI
-AsmInitializeGdt (
- IN IA32_DESCRIPTOR *Gdtr
- );
-
-/**
- Assembly code to do CLI-HALT loop.
-
-**/
-VOID
-EFIAPI
-AsmCliHltLoop (
- VOID
- );
-
-/**
- Get available system memory below 1MB by specified size.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-**/
-VOID
-BackupAndPrepareWakeupBuffer(
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- );
-
-/**
- Restore wakeup buffer data.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-**/
-VOID
-RestoreWakeupBuffer(
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- );
-
-/**
- Notify function on End Of Pei PPI.
-
- On S3 boot, this function will restore wakeup buffer data.
- On normal boot, this function will flag wakeup buffer to be un-used type.
-
- @param PeiServices The pointer to the PEI Services Table.
- @param NotifyDescriptor Address of the notification descriptor data structure.
- @param Ppi Address of the PPI that was installed.
-
- @retval EFI_SUCCESS When everything is OK.
-
-**/
-EFI_STATUS
-EFIAPI
-CpuMpEndOfPeiCallback (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
- IN VOID *Ppi
- );
-
-/**
- This function will be called by BSP to wakeup AP.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
- @param Broadcast TRUE: Send broadcast IPI to all APs
- FALSE: Send IPI to AP by ApicId
- @param ApicId Apic ID for the processor to be waked
- @param Procedure The function to be invoked by AP
- @param ProcedureArgument The argument to be passed into AP function
-**/
-VOID
-WakeUpAP (
- IN PEI_CPU_MP_DATA *PeiCpuMpData,
- IN BOOLEAN Broadcast,
- IN UINT32 ApicId,
- IN EFI_AP_PROCEDURE Procedure, OPTIONAL
- IN VOID *ProcedureArgument OPTIONAL
- );
-
-/**
- Get CPU MP Data pointer from the Guided HOB.
-
- @return Pointer to Pointer to PEI CPU MP Data
-**/
-PEI_CPU_MP_DATA *
-GetMpHobData (
- VOID
- );
-
-/**
- Find the current Processor number by APIC ID.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
- @param ProcessorNumber Return the pocessor number found
-
- @retval EFI_SUCCESS ProcessorNumber is found and returned.
- @retval EFI_NOT_FOUND ProcessorNumber is not found.
-**/
-EFI_STATUS
-GetProcessorNumber (
- IN PEI_CPU_MP_DATA *PeiCpuMpData,
- OUT UINTN *ProcessorNumber
- );
-
-/**
- Collects BIST data from PPI.
-
- This function collects BIST data from Sec Platform Information2 PPI
- or SEC Platform Information PPI.
-
- @param PeiServices Pointer to PEI Services Table
- @param PeiCpuMpData Pointer to PEI CPU MP Data
-
-**/
-VOID
-CollectBistDataFromPpi (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN PEI_CPU_MP_DATA *PeiCpuMpData
- );
-
-/**
- Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.
-
- @param PeiServices The pointer to the PEI Services Table.
- @param StructureSize The pointer to the variable describing size of the input buffer.
- @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
-
- @retval EFI_SUCCESS The data was successfully returned.
- @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
- hold the record is returned in StructureSize.
-
-**/
-EFI_STATUS
-EFIAPI
-SecPlatformInformation2 (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN OUT UINT64 *StructureSize,
- OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
- );
-
-#endif
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.inf b/UefiCpuPkg/CpuMpPei/CpuMpPei.inf deleted file mode 100644 index 423f7f10ed..0000000000 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.inf +++ /dev/null @@ -1,90 +0,0 @@ -## @file
-# CPU driver installs CPU PI Multi-processor PPI.
-#
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CpuMpPei
- MODULE_UNI_FILE = CpuMpPei.uni
- FILE_GUID = EDADEB9D-DDBA-48BD-9D22-C1C169C8C5C6
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- ENTRY_POINT = CpuMpPeimInit
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- CpuMpPei.h
- CpuMpPei.c
- CpuBist.c
- Microcode.h
- Microcode.c
- PeiMpServices.h
- PeiMpServices.c
-
-[Sources.IA32]
- Ia32/MpEqu.inc
- Ia32/MpFuncs.asm | MSFT
- Ia32/MpFuncs.asm | INTEL
- Ia32/MpFuncs.nasm | GCC
-
-[Sources.X64]
- X64/MpEqu.inc
- X64/MpFuncs.asm | MSFT
- X64/MpFuncs.asm | INTEL
- X64/MpFuncs.nasm | GCC
-
-[Packages]
- MdePkg/MdePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- DebugLib
- HobLib
- LocalApicLib
- MtrrLib
- PcdLib
- PeimEntryPoint
- PeiServicesLib
- ReportStatusCodeLib
- SynchronizationLib
- TimerLib
- UefiCpuLib
-
-[Ppis]
- gEfiPeiMpServicesPpiGuid ## PRODUCES
- gEfiEndOfPeiSignalPpiGuid ## NOTIFY
- gEfiSecPlatformInformationPpiGuid ## SOMETIMES_CONSUMES
- ## SOMETIMES_CONSUMES
- ## SOMETIMES_PRODUCES
- gEfiSecPlatformInformation2PpiGuid
-
-[Pcd]
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds ## CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
-
-[Depex]
- gEfiPeiMemoryDiscoveredPpiGuid
-
-[UserExtensions.TianoCore."ExtraFiles"]
- CpuMpPeiExtra.uni
-
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.uni b/UefiCpuPkg/CpuMpPei/CpuMpPei.uni Binary files differdeleted file mode 100644 index 00c41e2faa..0000000000 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPeiExtra.uni b/UefiCpuPkg/CpuMpPei/CpuMpPeiExtra.uni Binary files differdeleted file mode 100644 index 55ca4f0292..0000000000 --- a/UefiCpuPkg/CpuMpPei/CpuMpPeiExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/CpuMpPei/Ia32/MpEqu.inc b/UefiCpuPkg/CpuMpPei/Ia32/MpEqu.inc deleted file mode 100644 index fc637cc70f..0000000000 --- a/UefiCpuPkg/CpuMpPei/Ia32/MpEqu.inc +++ /dev/null @@ -1,40 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; MpEqu.inc
-;
-; Abstract:
-;
-; This is the equates file for Multiple Processor support
-;
-;-------------------------------------------------------------------------------
-
-PROTECT_MODE_CS equ 10h
-PROTECT_MODE_DS equ 18h
-
-VacantFlag equ 00h
-NotVacantFlag equ 0ffh
-
-CPU_SWITCH_STATE_IDLE equ 0
-CPU_SWITCH_STATE_STORED equ 1
-CPU_SWITCH_STATE_LOADED equ 2
-
-LockLocation equ (RendezvousFunnelProcEnd - RendezvousFunnelProcStart)
-StackStartAddressLocation equ LockLocation + 04h
-StackSizeLocation equ LockLocation + 08h
-ApProcedureLocation equ LockLocation + 0Ch
-GdtrLocation equ LockLocation + 10h
-IdtrLocation equ LockLocation + 16h
-BufferStartLocation equ LockLocation + 1Ch
-PmodeOffsetLocation equ LockLocation + 20h
-NumApsExecutingLoction equ LockLocation + 24h
-
diff --git a/UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.asm b/UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.asm deleted file mode 100644 index eb23a16917..0000000000 --- a/UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.asm +++ /dev/null @@ -1,276 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; MpFuncs32.asm
-;
-; Abstract:
-;
-; This is the assembly code for MP support
-;
-;-------------------------------------------------------------------------------
-
-.686p
-.model flat
-
-include MpEqu.inc
-InitializeFloatingPointUnits PROTO C
-
-.code
-
-;-------------------------------------------------------------------------------------
-;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
-;procedure serializes all the AP processors through an Init sequence. It must be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------------------
-RendezvousFunnelProc PROC PUBLIC
-RendezvousFunnelProcStart::
-; At this point CS = 0x(vv00) and ip= 0x0.
-; Save BIST information to ebp firstly
- db 66h, 08bh, 0e8h ; mov ebp, eax ; save BIST information
-
- db 8ch,0c8h ; mov ax,cs
- db 8eh,0d8h ; mov ds,ax
- db 8eh,0c0h ; mov es,ax
- db 8eh,0d0h ; mov ss,ax
- db 33h,0c0h ; xor ax,ax
- db 8eh,0e0h ; mov fs,ax
- db 8eh,0e8h ; mov gs,ax
-
- db 0BEh ; opcode of mov si, mem16
- dw BufferStartLocation ; mov si, BufferStartLocation
- db 66h, 8Bh, 1Ch ; mov ebx,dword ptr [si]
-
- db 0BFh ; opcode of mov di, mem16
- dw PmodeOffsetLocation ; mov di, PmodeOffsetLocation
- db 66h, 8Bh, 05h ; mov eax,dword ptr [di]
- db 8Bh, 0F8h ; mov di, ax
- db 83h, 0EFh,06h ; sub di, 06h
- db 66h, 03h, 0C3h ; add eax, ebx
- db 66h, 89h, 05h ; mov dword ptr [di],eax
-
- db 0BEh ; opcode of mov si, mem16
- dw GdtrLocation ; mov si, GdtrLocation
- db 66h ; db 66h
- db 2Eh, 0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
-
- db 0BEh
- dw IdtrLocation ; mov si, IdtrLocation
- db 66h ; db 66h
- db 2Eh,0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
-
- db 33h, 0C0h ; xor ax, ax
- db 8Eh, 0D8h ; mov ds, ax
-
- db 0Fh, 20h, 0C0h ; mov eax, cr0 ;Get control register 0
- db 66h, 83h, 0C8h, 03h ; or eax, 000000003h ;Set PE bit (bit #0) & MP
- db 0Fh, 22h, 0C0h ; mov cr0, eax
-
- db 66h, 67h, 0EAh ; far jump
- dd 0h ; 32-bit offset
- dw PROTECT_MODE_CS ; 16-bit selector
-
-Flat32Start:: ; protected mode entry point
- mov ax, PROTECT_MODE_DS
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- mov esi, ebx
- mov edi, esi
- add edi, LockLocation
- mov eax, NotVacantFlag
-
-TestLock:
- xchg dword ptr [edi], eax
- cmp eax, NotVacantFlag
- jz TestLock
-
- mov edi, esi
- add edi, NumApsExecutingLoction
- inc dword ptr [edi]
- mov ebx, dword ptr [edi]
-
-ProgramStack:
- mov edi, esi
- add edi, StackSizeLocation
- mov eax, dword ptr [edi]
- mov edi, esi
- add edi, StackStartAddressLocation
- add eax, dword ptr [edi]
- mov esp, eax
- mov dword ptr [edi], eax
-
-Releaselock:
- mov eax, VacantFlag
- mov edi, esi
- add edi, LockLocation
- xchg dword ptr [edi], eax
-
-CProcedureInvoke:
- push ebp ; push BIST data at top of AP stack
- xor ebp, ebp ; clear ebp for call stack trace
- push ebp
- mov ebp, esp
-
- mov eax, InitializeFloatingPointUnits
- call eax ; Call assembly function to initialize FPU per UEFI spec
-
- push ebx ; Push NumApsExecuting
- mov eax, esi
- add eax, LockLocation
- push eax ; push address of exchange info data buffer
-
- mov edi, esi
- add edi, ApProcedureLocation
- mov eax, dword ptr [edi]
-
- call eax ; invoke C function
-
- jmp $ ; never reach here
-
-RendezvousFunnelProc ENDP
-RendezvousFunnelProcEnd::
-
-AsmCliHltLoop PROC near C PUBLIC
- cli
- hlt
- jmp $-2
-AsmCliHltLoop ENDP
-
-;-------------------------------------------------------------------------------------
-; AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-AsmGetAddressMap PROC near C PUBLIC
- pushad
- mov ebp,esp
-
- mov ebx, dword ptr [ebp+24h]
- mov dword ptr [ebx], RendezvousFunnelProcStart
- mov dword ptr [ebx + 4h], Flat32Start - RendezvousFunnelProcStart
- mov dword ptr [ebx + 8h], 0
- mov dword ptr [ebx + 0ch], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
-
- popad
- ret
-AsmGetAddressMap ENDP
-
-PAUSE32 MACRO
- DB 0F3h
- DB 090h
- ENDM
-
-;-------------------------------------------------------------------------------------
-;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
-;about to become an AP. It switches it'stack with the current AP.
-;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
-;-------------------------------------------------------------------------------------
-AsmExchangeRole PROC near C PUBLIC
- ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
- ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
- pushad
- mov ebp,esp
-
- ; esi contains MyInfo pointer
- mov esi, dword ptr [ebp+24h]
-
- ; edi contains OthersInfo pointer
- mov edi, dword ptr [ebp+28h]
-
- ;Store EFLAGS, GDTR and IDTR register to stack
- pushfd
- mov eax, cr4
- push eax ; push cr4 firstly
- mov eax, cr0
- push eax
-
- sgdt fword ptr [esi+8]
- sidt fword ptr [esi+14]
-
- ; Store the its StackPointer
- mov dword ptr [esi+4],esp
-
- ; update its switch state to STORED
- mov byte ptr [esi], CPU_SWITCH_STATE_STORED
-
-WaitForOtherStored:
- ; wait until the other CPU finish storing its state
- cmp byte ptr [edi], CPU_SWITCH_STATE_STORED
- jz OtherStored
- PAUSE32
- jmp WaitForOtherStored
-
-OtherStored:
- ; Since another CPU already stored its state, load them
- ; load GDTR value
- lgdt fword ptr [edi+8]
-
- ; load IDTR value
- lidt fword ptr [edi+14]
-
- ; load its future StackPointer
- mov esp, dword ptr [edi+4]
-
- ; update the other CPU's switch state to LOADED
- mov byte ptr [edi], CPU_SWITCH_STATE_LOADED
-
-WaitForOtherLoaded:
- ; wait until the other CPU finish loading new state,
- ; otherwise the data in stack may corrupt
- cmp byte ptr [esi], CPU_SWITCH_STATE_LOADED
- jz OtherLoaded
- PAUSE32
- jmp WaitForOtherLoaded
-
-OtherLoaded:
- ; since the other CPU already get the data it want, leave this procedure
- pop eax
- mov cr0, eax
- pop eax
- mov cr4, eax
- popfd
-
- popad
- ret
-AsmExchangeRole ENDP
-
-AsmInitializeGdt PROC near C PUBLIC
- push ebp
- mov ebp, esp
- pushad
- mov edi, [ebp + 8] ; Load GDT register
-
- mov ax,cs ; Get the selector data from our code image
- mov es,ax
- lgdt FWORD PTR es:[edi] ; and update the GDTR
-
- push PROTECT_MODE_CS
- lea eax, SetCodeSelectorFarJump
- push eax
- retf
-SetCodeSelectorFarJump:
- mov ax, PROTECT_MODE_DS ; Update the Base for the new selectors, too
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- popad
- pop ebp
- ret
-AsmInitializeGdt ENDP
-
-END
diff --git a/UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.nasm b/UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.nasm deleted file mode 100644 index 5d2da82d14..0000000000 --- a/UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.nasm +++ /dev/null @@ -1,255 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; MpFuncs.nasm
-;
-; Abstract:
-;
-; This is the assembly code for MP support
-;
-;-------------------------------------------------------------------------------
-
-%include "MpEqu.inc"
-extern ASM_PFX(InitializeFloatingPointUnits)
-
-SECTION .text
-
-;-------------------------------------------------------------------------------------
-;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
-;procedure serializes all the AP processors through an Init sequence. It must be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------------------
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
-RendezvousFunnelProcStart:
-; At this point CS = 0x(vv00) and ip= 0x0.
-BITS 16
- mov ebp, eax ; save BIST information
-
- mov ax, cs
- mov ds, ax
- mov es, ax
- mov ss, ax
- xor ax, ax
- mov fs, ax
- mov gs, ax
-
- mov si, BufferStartLocation
- mov ebx, [si]
-
- mov di, PmodeOffsetLocation
- mov eax, [di]
- mov di, ax
- sub di, 06h
- add eax, ebx
- mov [di],eax
-
- mov si, GdtrLocation
-o32 lgdt [cs:si]
-
- mov si, IdtrLocation
-o32 lidt [cs:si]
-
- xor ax, ax
- mov ds, ax
-
- mov eax, cr0 ;Get control register 0
- or eax, 000000003h ;Set PE bit (bit #0) & MP
- mov cr0, eax
-
- jmp PROTECT_MODE_CS:strict dword 0 ; far jump to protected mode
-BITS 32
-Flat32Start: ; protected mode entry point
- mov ax, PROTECT_MODE_DS
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- mov esi, ebx
- mov edi, esi
- add edi, LockLocation
- mov eax, NotVacantFlag
-
-TestLock:
- xchg [edi], eax
- cmp eax, NotVacantFlag
- jz TestLock
-
- mov edi, esi
- add edi, NumApsExecutingLoction
- inc dword [edi]
- mov ebx, [edi]
-
-ProgramStack:
- mov edi, esi
- add edi, StackSizeLocation
- mov eax, [edi]
- mov edi, esi
- add edi, StackStartAddressLocation
- add eax, [edi]
- mov esp, eax
- mov [edi], eax
-
-Releaselock:
- mov eax, VacantFlag
- mov edi, esi
- add edi, LockLocation
- xchg [edi], eax
-
-CProcedureInvoke:
- push ebp ; push BIST data at top of AP stack
- xor ebp, ebp ; clear ebp for call stack trace
- push ebp
- mov ebp, esp
-
- mov eax, ASM_PFX(InitializeFloatingPointUnits)
- call eax ; Call assembly function to initialize FPU per UEFI spec
-
- push ebx ; Push NumApsExecuting
- mov eax, esi
- add eax, LockLocation
- push eax ; push address of exchange info data buffer
-
- mov edi, esi
- add edi, ApProcedureLocation
- mov eax, [edi]
-
- call eax ; invoke C function
-
- jmp $ ; never reach here
-RendezvousFunnelProcEnd:
-
-global ASM_PFX(AsmCliHltLoop)
-ASM_PFX(AsmCliHltLoop):
- cli
- hlt
- jmp $-2
-
-;-------------------------------------------------------------------------------------
-; AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmGetAddressMap)
-ASM_PFX(AsmGetAddressMap):
- pushad
- mov ebp,esp
-
- mov ebx, [ebp + 24h]
- mov dword [ebx], RendezvousFunnelProcStart
- mov dword [ebx + 4h], Flat32Start - RendezvousFunnelProcStart
- mov dword [ebx + 8h], 0
- mov dword [ebx + 0ch], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
-
- popad
- ret
-
-;-------------------------------------------------------------------------------------
-;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
-;about to become an AP. It switches it'stack with the current AP.
-;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmExchangeRole)
-ASM_PFX(AsmExchangeRole):
- ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
- ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
- pushad
- mov ebp,esp
-
- ; esi contains MyInfo pointer
- mov esi, [ebp + 24h]
-
- ; edi contains OthersInfo pointer
- mov edi, [ebp + 28h]
-
- ;Store EFLAGS, GDTR and IDTR register to stack
- pushfd
- mov eax, cr4
- push eax ; push cr4 firstly
- mov eax, cr0
- push eax
-
- sgdt [esi + 8]
- sidt [esi + 14]
-
- ; Store the its StackPointer
- mov [esi + 4],esp
-
- ; update its switch state to STORED
- mov byte [esi], CPU_SWITCH_STATE_STORED
-
-WaitForOtherStored:
- ; wait until the other CPU finish storing its state
- cmp byte [edi], CPU_SWITCH_STATE_STORED
- jz OtherStored
- pause
- jmp WaitForOtherStored
-
-OtherStored:
- ; Since another CPU already stored its state, load them
- ; load GDTR value
- lgdt [edi + 8]
-
- ; load IDTR value
- lidt [edi + 14]
-
- ; load its future StackPointer
- mov esp, [edi + 4]
-
- ; update the other CPU's switch state to LOADED
- mov byte [edi], CPU_SWITCH_STATE_LOADED
-
-WaitForOtherLoaded:
- ; wait until the other CPU finish loading new state,
- ; otherwise the data in stack may corrupt
- cmp byte [esi], CPU_SWITCH_STATE_LOADED
- jz OtherLoaded
- pause
- jmp WaitForOtherLoaded
-
-OtherLoaded:
- ; since the other CPU already get the data it want, leave this procedure
- pop eax
- mov cr0, eax
- pop eax
- mov cr4, eax
- popfd
-
- popad
- ret
-
-global ASM_PFX(AsmInitializeGdt)
-ASM_PFX(AsmInitializeGdt):
- push ebp
- mov ebp, esp
- pushad
- mov edi, [ebp + 8] ; Load GDT register
-
- lgdt [edi] ; and update the GDTR
-
- push PROTECT_MODE_CS
- mov eax, ASM_PFX(SetCodeSelectorFarJump)
- push eax
- retf
-ASM_PFX(SetCodeSelectorFarJump):
- mov ax, PROTECT_MODE_DS ; Update the Base for the new selectors, too
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- popad
- pop ebp
- ret
diff --git a/UefiCpuPkg/CpuMpPei/Microcode.c b/UefiCpuPkg/CpuMpPei/Microcode.c deleted file mode 100644 index 70e149be87..0000000000 --- a/UefiCpuPkg/CpuMpPei/Microcode.c +++ /dev/null @@ -1,200 +0,0 @@ -/** @file
- Implementation of loading microcode on processors.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuMpPei.h"
-
-/**
- Get microcode update signature of currently loaded microcode update.
-
- @return Microcode signature.
-
-**/
-UINT32
-GetCurrentMicrocodeSignature (
- VOID
- )
-{
- UINT64 Signature;
-
- AsmWriteMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID, 0);
- AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
- Signature = AsmReadMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID);
- return (UINT32) RShiftU64 (Signature, 32);
-}
-
-/**
- Detect whether specified processor can find matching microcode patch and load it.
-
-**/
-VOID
-MicrocodeDetect (
- VOID
- )
-{
- UINT64 MicrocodePatchAddress;
- UINT64 MicrocodePatchRegionSize;
- UINT32 ExtendedTableLength;
- UINT32 ExtendedTableCount;
- EFI_CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable;
- EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *ExtendedTableHeader;
- EFI_CPU_MICROCODE_HEADER *MicrocodeEntryPoint;
- UINTN MicrocodeEnd;
- UINTN Index;
- UINT8 PlatformId;
- UINT32 RegEax;
- UINT32 LatestRevision;
- UINTN TotalSize;
- UINT32 CheckSum32;
- BOOLEAN CorrectMicrocode;
- INT32 CurrentSignature;
- MICROCODE_INFO MicrocodeInfo;
-
- ZeroMem (&MicrocodeInfo, sizeof (MICROCODE_INFO));
- MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);
- MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);
- if (MicrocodePatchRegionSize == 0) {
- //
- // There is no microcode patches
- //
- return;
- }
-
- ExtendedTableLength = 0;
- //
- // Here data of CPUID leafs have not been collected into context buffer, so
- // GetProcessorCpuid() cannot be used here to retrieve CPUID data.
- //
- AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);
-
- //
- // The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID
- //
- PlatformId = (UINT8) AsmMsrBitFieldRead64 (EFI_MSR_IA32_PLATFORM_ID, 50, 52);
-
- LatestRevision = 0;
- MicrocodeEnd = (UINTN) (MicrocodePatchAddress + MicrocodePatchRegionSize);
- MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (UINTN) MicrocodePatchAddress;
- do {
- //
- // Check if the microcode is for the Cpu and the version is newer
- // and the update can be processed on the platform
- //
- CorrectMicrocode = FALSE;
- if (MicrocodeEntryPoint->HeaderVersion == 0x1) {
- //
- // It is the microcode header. It is not the padding data between microcode patches
- // becasue the padding data should not include 0x00000001 and it should be the repeated
- // byte format (like 0xXYXYXYXY....).
- //
- if (MicrocodeEntryPoint->ProcessorId == RegEax &&
- MicrocodeEntryPoint->UpdateRevision > LatestRevision &&
- (MicrocodeEntryPoint->ProcessorFlags & (1 << PlatformId))
- ) {
- if (MicrocodeEntryPoint->DataSize == 0) {
- CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, 2048);
- } else {
- CheckSum32 = CalculateSum32 ((UINT32 *)MicrocodeEntryPoint, MicrocodeEntryPoint->DataSize + sizeof(EFI_CPU_MICROCODE_HEADER));
- }
- if (CheckSum32 == 0) {
- CorrectMicrocode = TRUE;
- }
- } else if ((MicrocodeEntryPoint->DataSize != 0) &&
- (MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {
- ExtendedTableLength = MicrocodeEntryPoint->TotalSize - (MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));
- if (ExtendedTableLength != 0) {
- //
- // Extended Table exist, check if the CPU in support list
- //
- ExtendedTableHeader = (EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER *)((UINT8 *)(MicrocodeEntryPoint) + MicrocodeEntryPoint->DataSize + sizeof (EFI_CPU_MICROCODE_HEADER));
- //
- // Calculate Extended Checksum
- //
- if ((ExtendedTableLength % 4) == 0) {
- CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTableHeader, ExtendedTableLength);
- if (CheckSum32 == 0) {
- //
- // Checksum correct
- //
- ExtendedTableCount = ExtendedTableHeader->ExtendedSignatureCount;
- ExtendedTable = (EFI_CPU_MICROCODE_EXTENDED_TABLE *)(ExtendedTableHeader + 1);
- for (Index = 0; Index < ExtendedTableCount; Index ++) {
- CheckSum32 = CalculateSum32 ((UINT32 *)ExtendedTable, sizeof(EFI_CPU_MICROCODE_EXTENDED_TABLE));
- if (CheckSum32 == 0) {
- //
- // Verify Header
- //
- if ((ExtendedTable->ProcessorSignature == RegEax) &&
- (ExtendedTable->ProcessorFlag & (1 << PlatformId)) ) {
- //
- // Find one
- //
- CorrectMicrocode = TRUE;
- break;
- }
- }
- ExtendedTable ++;
- }
- }
- }
- }
- }
- } else {
- //
- // It is the padding data between the microcode patches for microcode patches alignment.
- // Because the microcode patch is the multiple of 1-KByte, the padding data should not
- // exist if the microcode patch alignment value is not larger than 1-KByte. So, the microcode
- // alignment value should be larger than 1-KByte. We could skip SIZE_1KB padding data to
- // find the next possible microcode patch header.
- //
- MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + SIZE_1KB);
- continue;
- }
- //
- // Get the next patch.
- //
- if (MicrocodeEntryPoint->DataSize == 0) {
- TotalSize = 2048;
- } else {
- TotalSize = MicrocodeEntryPoint->TotalSize;
- }
-
- if (CorrectMicrocode) {
- LatestRevision = MicrocodeEntryPoint->UpdateRevision;
- MicrocodeInfo.MicrocodeData = (VOID *)((UINTN)MicrocodeEntryPoint + sizeof (EFI_CPU_MICROCODE_HEADER));
- MicrocodeInfo.MicrocodeSize = TotalSize;
- MicrocodeInfo.ProcessorId = RegEax;
- }
-
- MicrocodeEntryPoint = (EFI_CPU_MICROCODE_HEADER *) (((UINTN) MicrocodeEntryPoint) + TotalSize);
- } while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));
-
- if (LatestRevision > 0) {
- //
- // Get microcode update signature of currently loaded microcode update
- //
- CurrentSignature = GetCurrentMicrocodeSignature ();
- //
- // If no microcode update has been loaded, then trigger microcode load.
- //
- if (CurrentSignature == 0) {
- AsmWriteMsr64 (
- EFI_MSR_IA32_BIOS_UPDT_TRIG,
- (UINT64) (UINTN) MicrocodeInfo.MicrocodeData
- );
- MicrocodeInfo.Load = TRUE;
- } else {
- MicrocodeInfo.Load = FALSE;
- }
- }
-}
diff --git a/UefiCpuPkg/CpuMpPei/Microcode.h b/UefiCpuPkg/CpuMpPei/Microcode.h deleted file mode 100644 index ea686690ff..0000000000 --- a/UefiCpuPkg/CpuMpPei/Microcode.h +++ /dev/null @@ -1,68 +0,0 @@ -/** @file
- Definitions for loading microcode on processors.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_MICROCODE_H_
-#define _CPU_MICROCODE_H_
-
-#define EFI_MSR_IA32_PLATFORM_ID 0x17
-#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79
-#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8b
-
-#define MAX_MICROCODE_DESCRIPTOR_LENGTH 100
-
-typedef struct {
- VOID *MicrocodeData;
- UINTN MicrocodeSize;
- UINT32 ProcessorId;
- BOOLEAN Load;
-} MICROCODE_INFO;
-
-//
-// Definition for IA32 microcode format
-//
-typedef struct {
- UINT32 HeaderVersion;
- UINT32 UpdateRevision;
- UINT32 Date;
- UINT32 ProcessorId;
- UINT32 Checksum;
- UINT32 LoaderRevision;
- UINT32 ProcessorFlags;
- UINT32 DataSize;
- UINT32 TotalSize;
- UINT8 Reserved[12];
-} EFI_CPU_MICROCODE_HEADER;
-
-typedef struct {
- UINT32 ExtendedSignatureCount;
- UINT32 ExtendedTableChecksum;
- UINT8 Reserved[12];
-} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
-
-typedef struct {
- UINT32 ProcessorSignature;
- UINT32 ProcessorFlag;
- UINT32 ProcessorChecksum;
-} EFI_CPU_MICROCODE_EXTENDED_TABLE;
-
-/**
- Detect whether specified processor can find matching microcode patch and load it.
-
-**/
-VOID
-MicrocodeDetect (
- VOID
- );
-
-#endif
diff --git a/UefiCpuPkg/CpuMpPei/PeiMpServices.c b/UefiCpuPkg/CpuMpPei/PeiMpServices.c deleted file mode 100644 index 5dd2c153f4..0000000000 --- a/UefiCpuPkg/CpuMpPei/PeiMpServices.c +++ /dev/null @@ -1,956 +0,0 @@ -/** @file
- Implementation of Multiple Processor PPI services.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "PeiMpServices.h"
-
-//
-// CPU MP PPI to be installed
-//
-EFI_PEI_MP_SERVICES_PPI mMpServicesPpi = {
- PeiGetNumberOfProcessors,
- PeiGetProcessorInfo,
- PeiStartupAllAPs,
- PeiStartupThisAP,
- PeiSwitchBSP,
- PeiEnableDisableAP,
- PeiWhoAmI,
-};
-
-EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc = {
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gEfiPeiMpServicesPpiGuid,
- &mMpServicesPpi
-};
-
-/**
- Get CPU Package/Core/Thread location information.
-
- @param InitialApicId CPU APIC ID
- @param Location Pointer to CPU location information
-**/
-VOID
-ExtractProcessorLocation (
- IN UINT32 InitialApicId,
- OUT EFI_CPU_PHYSICAL_LOCATION *Location
- )
-{
- BOOLEAN TopologyLeafSupported;
- UINTN ThreadBits;
- UINTN CoreBits;
- UINT32 RegEax;
- UINT32 RegEbx;
- UINT32 RegEcx;
- UINT32 RegEdx;
- UINT32 MaxCpuIdIndex;
- UINT32 SubIndex;
- UINTN LevelType;
- UINT32 MaxLogicProcessorsPerPackage;
- UINT32 MaxCoresPerPackage;
-
- //
- // Check if the processor is capable of supporting more than one logical processor.
- //
- AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);
- if ((RegEdx & BIT28) == 0) {
- Location->Thread = 0;
- Location->Core = 0;
- Location->Package = 0;
- return;
- }
-
- ThreadBits = 0;
- CoreBits = 0;
-
- //
- // Assume three-level mapping of APIC ID: Package:Core:SMT.
- //
-
- TopologyLeafSupported = FALSE;
- //
- // Get the max index of basic CPUID
- //
- AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
-
- //
- // If the extended topology enumeration leaf is available, it
- // is the preferred mechanism for enumerating topology.
- //
- if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
- AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, &RegEax, &RegEbx, &RegEcx, NULL);
- //
- // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for
- // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not
- // supported on that processor.
- //
- if (RegEbx != 0) {
- TopologyLeafSupported = TRUE;
-
- //
- // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract
- // the SMT sub-field of x2APIC ID.
- //
- LevelType = (RegEcx >> 8) & 0xff;
- ASSERT (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);
- ThreadBits = RegEax & 0x1f;
-
- //
- // Software must not assume any "level type" encoding
- // value to be related to any sub-leaf index, except sub-leaf 0.
- //
- SubIndex = 1;
- do {
- AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, SubIndex, &RegEax, NULL, &RegEcx, NULL);
- LevelType = (RegEcx >> 8) & 0xff;
- if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {
- CoreBits = (RegEax & 0x1f) - ThreadBits;
- break;
- }
- SubIndex++;
- } while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);
- }
- }
-
- if (!TopologyLeafSupported) {
- AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);
- MaxLogicProcessorsPerPackage = (RegEbx >> 16) & 0xff;
- if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {
- AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &RegEax, NULL, NULL, NULL);
- MaxCoresPerPackage = (RegEax >> 26) + 1;
- } else {
- //
- // Must be a single-core processor.
- //
- MaxCoresPerPackage = 1;
- }
-
- ThreadBits = (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);
- CoreBits = (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1);
- }
-
- Location->Thread = InitialApicId & ~((-1) << ThreadBits);
- Location->Core = (InitialApicId >> ThreadBits) & ~((-1) << CoreBits);
- Location->Package = (InitialApicId >> (ThreadBits + CoreBits));
-}
-
-/**
- Find the current Processor number by APIC ID.
-
- @param PeiCpuMpData Pointer to PEI CPU MP Data
- @param ProcessorNumber Return the pocessor number found
-
- @retval EFI_SUCCESS ProcessorNumber is found and returned.
- @retval EFI_NOT_FOUND ProcessorNumber is not found.
-**/
-EFI_STATUS
-GetProcessorNumber (
- IN PEI_CPU_MP_DATA *PeiCpuMpData,
- OUT UINTN *ProcessorNumber
- )
-{
- UINTN TotalProcessorNumber;
- UINTN Index;
-
- TotalProcessorNumber = PeiCpuMpData->CpuCount;
- for (Index = 0; Index < TotalProcessorNumber; Index ++) {
- if (PeiCpuMpData->CpuData[Index].ApicId == GetInitialApicId ()) {
- *ProcessorNumber = Index;
- return EFI_SUCCESS;
- }
- }
- return EFI_NOT_FOUND;
-}
-
-/**
- Worker function for SwitchBSP().
-
- Worker function for SwitchBSP(), assigned to the AP which is intended to become BSP.
-
- @param Buffer Pointer to CPU MP Data
-**/
-VOID
-EFIAPI
-FutureBSPProc (
- IN VOID *Buffer
- )
-{
- PEI_CPU_MP_DATA *DataInHob;
-
- DataInHob = (PEI_CPU_MP_DATA *) Buffer;
- AsmExchangeRole (&DataInHob->APInfo, &DataInHob->BSPInfo);
-}
-
-/**
- This service retrieves the number of logical processor in the platform
- and the number of those logical processors that are enabled on this boot.
- This service may only be called from the BSP.
-
- This function is used to retrieve the following information:
- - The number of logical processors that are present in the system.
- - The number of enabled logical processors in the system at the instant
- this call is made.
-
- Because MP Service Ppi provides services to enable and disable processors
- dynamically, the number of enabled logical processors may vary during the
- course of a boot session.
-
- If this service is called from an AP, then EFI_DEVICE_ERROR is returned.
- If NumberOfProcessors or NumberOfEnabledProcessors is NULL, then
- EFI_INVALID_PARAMETER is returned. Otherwise, the total number of processors
- is returned in NumberOfProcessors, the number of currently enabled processor
- is returned in NumberOfEnabledProcessors, and EFI_SUCCESS is returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to this instance of the PPI.
- @param[out] NumberOfProcessors Pointer to the total number of logical processors in
- the system, including the BSP and disabled APs.
- @param[out] NumberOfEnabledProcessors
- Number of processors in the system that are enabled.
-
- @retval EFI_SUCCESS The number of logical processors and enabled
- logical processors was retrieved.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL.
- NumberOfEnabledProcessors is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiGetNumberOfProcessors (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- OUT UINTN *NumberOfProcessors,
- OUT UINTN *NumberOfEnabledProcessors
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN CallerNumber;
- UINTN ProcessorNumber;
- UINTN EnabledProcessorNumber;
- UINTN Index;
-
- PeiCpuMpData = GetMpHobData ();
- if (PeiCpuMpData == NULL) {
- return EFI_NOT_FOUND;
- }
-
- if ((NumberOfProcessors == NULL) || (NumberOfEnabledProcessors == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check whether caller processor is BSP
- //
- PeiWhoAmI (PeiServices, This, &CallerNumber);
- if (CallerNumber != PeiCpuMpData->BspNumber) {
- return EFI_DEVICE_ERROR;
- }
-
- ProcessorNumber = PeiCpuMpData->CpuCount;
- EnabledProcessorNumber = 0;
- for (Index = 0; Index < ProcessorNumber; Index++) {
- if (PeiCpuMpData->CpuData[Index].State != CpuStateDisabled) {
- EnabledProcessorNumber ++;
- }
- }
-
- *NumberOfProcessors = ProcessorNumber;
- *NumberOfEnabledProcessors = EnabledProcessorNumber;
-
- return EFI_SUCCESS;
-}
-
-/**
- Gets detailed MP-related information on the requested processor at the
- instant this call is made. This service may only be called from the BSP.
-
- This service retrieves detailed MP-related information about any processor
- on the platform. Note the following:
- - The processor information may change during the course of a boot session.
- - The information presented here is entirely MP related.
-
- Information regarding the number of caches and their sizes, frequency of operation,
- slot numbers is all considered platform-related information and is not provided
- by this service.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to this instance of the PPI.
- @param[in] ProcessorNumber Pointer to the total number of logical processors in
- the system, including the BSP and disabled APs.
- @param[out] ProcessorInfoBuffer Number of processors in the system that are enabled.
-
- @retval EFI_SUCCESS Processor information was returned.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist in the platform.
-**/
-EFI_STATUS
-EFIAPI
-PeiGetProcessorInfo (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN UINTN ProcessorNumber,
- OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN CallerNumber;
-
- PeiCpuMpData = GetMpHobData ();
- if (PeiCpuMpData == NULL) {
- return EFI_NOT_FOUND;
- }
-
- //
- // Check whether caller processor is BSP
- //
- PeiWhoAmI (PeiServices, This, &CallerNumber);
- if (CallerNumber != PeiCpuMpData->BspNumber) {
- return EFI_DEVICE_ERROR;
- }
-
- if (ProcessorInfoBuffer == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (ProcessorNumber >= PeiCpuMpData->CpuCount) {
- return EFI_NOT_FOUND;
- }
-
- ProcessorInfoBuffer->ProcessorId = (UINT64) PeiCpuMpData->CpuData[ProcessorNumber].ApicId;
- ProcessorInfoBuffer->StatusFlag = 0;
- if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId == GetInitialApicId()) {
- ProcessorInfoBuffer->StatusFlag |= PROCESSOR_AS_BSP_BIT;
- }
- if (PeiCpuMpData->CpuData[ProcessorNumber].CpuHealthy) {
- ProcessorInfoBuffer->StatusFlag |= PROCESSOR_HEALTH_STATUS_BIT;
- }
- if (PeiCpuMpData->CpuData[ProcessorNumber].State == CpuStateDisabled) {
- ProcessorInfoBuffer->StatusFlag &= ~PROCESSOR_ENABLED_BIT;
- } else {
- ProcessorInfoBuffer->StatusFlag |= PROCESSOR_ENABLED_BIT;
- }
-
- //
- // Get processor location information
- //
- ExtractProcessorLocation (PeiCpuMpData->CpuData[ProcessorNumber].ApicId, &ProcessorInfoBuffer->Location);
-
- return EFI_SUCCESS;
-}
-
-/**
- This service executes a caller provided function on all enabled APs. APs can
- run either simultaneously or one at a time in sequence. This service supports
- both blocking requests only. This service may only
- be called from the BSP.
-
- This function is used to dispatch all the enabled APs to the function specified
- by Procedure. If any enabled AP is busy, then EFI_NOT_READY is returned
- immediately and Procedure is not started on any AP.
-
- If SingleThread is TRUE, all the enabled APs execute the function specified by
- Procedure one by one, in ascending order of processor handle number. Otherwise,
- all the enabled APs execute the function specified by Procedure simultaneously.
-
- If the timeout specified by TimeoutInMicroSeconds expires before all APs return
- from Procedure, then Procedure on the failed APs is terminated. All enabled APs
- are always available for further calls to EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- and EFI_PEI_MP_SERVICES_PPI.StartupThisAP(). If FailedCpuList is not NULL, its
- content points to the list of processor handle numbers in which Procedure was
- terminated.
-
- Note: It is the responsibility of the consumer of the EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- to make sure that the nature of the code that is executed on the BSP and the
- dispatched APs is well controlled. The MP Services Ppi does not guarantee
- that the Procedure function is MP-safe. Hence, the tasks that can be run in
- parallel are limited to certain independent tasks and well-controlled exclusive
- code. PEI services and Ppis may not be called by APs unless otherwise
- specified.
-
- In blocking execution mode, BSP waits until all APs finish or
- TimeoutInMicroSeconds expires.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] Procedure A pointer to the function to be run on enabled APs of
- the system.
- @param[in] SingleThread If TRUE, then all the enabled APs execute the function
- specified by Procedure one by one, in ascending order
- of processor handle number. If FALSE, then all the
- enabled APs execute the function specified by Procedure
- simultaneously.
- @param[in] TimeoutInMicroSeconds
- Indicates the time limit in microseconds for APs to
- return from Procedure, for blocking mode only. Zero
- means infinity. If the timeout expires before all APs
- return from Procedure, then Procedure on the failed APs
- is terminated. All enabled APs are available for next
- function assigned by EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- or EFI_PEI_MP_SERVICES_PPI.StartupThisAP(). If the
- timeout expires in blocking mode, BSP returns
- EFI_TIMEOUT.
- @param[in] ProcedureArgument The parameter passed into Procedure for all APs.
-
- @retval EFI_SUCCESS In blocking mode, all APs have finished before the
- timeout expired.
- @retval EFI_DEVICE_ERROR Caller processor is AP.
- @retval EFI_NOT_STARTED No enabled APs exist in the system.
- @retval EFI_NOT_READY Any enabled APs are busy.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before all
- enabled APs have finished.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiStartupAllAPs (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN BOOLEAN SingleThread,
- IN UINTN TimeoutInMicroSeconds,
- IN VOID *ProcedureArgument OPTIONAL
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN ProcessorNumber;
- UINTN Index;
- UINTN CallerNumber;
- BOOLEAN HasEnabledAp;
- BOOLEAN HasEnabledIdleAp;
- volatile UINT32 *FinishedCount;
- EFI_STATUS Status;
- UINTN WaitCountIndex;
- UINTN WaitCountNumber;
-
- PeiCpuMpData = GetMpHobData ();
- if (PeiCpuMpData == NULL) {
- return EFI_NOT_FOUND;
- }
-
- if (Procedure == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check whether caller processor is BSP
- //
- PeiWhoAmI (PeiServices, This, &CallerNumber);
- if (CallerNumber != PeiCpuMpData->BspNumber) {
- return EFI_DEVICE_ERROR;
- }
-
- ProcessorNumber = PeiCpuMpData->CpuCount;
-
- HasEnabledAp = FALSE;
- HasEnabledIdleAp = FALSE;
- for (Index = 0; Index < ProcessorNumber; Index ++) {
- if (Index == CallerNumber) {
- //
- // Skip BSP
- //
- continue;
- }
- if (PeiCpuMpData->CpuData[Index].State != CpuStateDisabled) {
- HasEnabledAp = TRUE;
- if (PeiCpuMpData->CpuData[Index].State != CpuStateBusy) {
- HasEnabledIdleAp = TRUE;
- }
- }
- }
- if (!HasEnabledAp) {
- //
- // If no enabled AP exists, return EFI_NOT_STARTED.
- //
- return EFI_NOT_STARTED;
- }
- if (!HasEnabledIdleAp) {
- //
- // If any enabled APs are busy, return EFI_NOT_READY.
- //
- return EFI_NOT_READY;
- }
-
- if (PeiCpuMpData->EndOfPeiFlag) {
- //
- // Backup original data and copy AP reset vector in it
- //
- BackupAndPrepareWakeupBuffer(PeiCpuMpData);
- }
-
- WaitCountNumber = TimeoutInMicroSeconds / CPU_CHECK_AP_INTERVAL + 1;
- WaitCountIndex = 0;
- FinishedCount = &PeiCpuMpData->FinishedCount;
- if (!SingleThread) {
- WakeUpAP (PeiCpuMpData, TRUE, 0, Procedure, ProcedureArgument);
- //
- // Wait to finish
- //
- if (TimeoutInMicroSeconds == 0) {
- while (*FinishedCount < ProcessorNumber - 1) {
- CpuPause ();
- }
- Status = EFI_SUCCESS;
- } else {
- Status = EFI_TIMEOUT;
- for (WaitCountIndex = 0; WaitCountIndex < WaitCountNumber; WaitCountIndex++) {
- MicroSecondDelay (CPU_CHECK_AP_INTERVAL);
- if (*FinishedCount >= ProcessorNumber - 1) {
- Status = EFI_SUCCESS;
- break;
- }
- }
- }
- } else {
- Status = EFI_SUCCESS;
- for (Index = 0; Index < ProcessorNumber; Index++) {
- if (Index == CallerNumber) {
- continue;
- }
- WakeUpAP (PeiCpuMpData, FALSE, PeiCpuMpData->CpuData[Index].ApicId, Procedure, ProcedureArgument);
- //
- // Wait to finish
- //
- if (TimeoutInMicroSeconds == 0) {
- while (*FinishedCount < 1) {
- CpuPause ();
- }
- } else {
- for (WaitCountIndex = 0; WaitCountIndex < WaitCountNumber; WaitCountIndex++) {
- MicroSecondDelay (CPU_CHECK_AP_INTERVAL);
- if (*FinishedCount >= 1) {
- break;
- }
- }
- if (WaitCountIndex == WaitCountNumber) {
- Status = EFI_TIMEOUT;
- }
- }
- }
- }
-
- if (PeiCpuMpData->EndOfPeiFlag) {
- //
- // Restore original data
- //
- RestoreWakeupBuffer(PeiCpuMpData);
- }
-
- return Status;
-}
-
-/**
- This service lets the caller get one enabled AP to execute a caller-provided
- function. The caller can request the BSP to wait for the completion
- of the AP. This service may only be called from the BSP.
-
- This function is used to dispatch one enabled AP to the function specified by
- Procedure passing in the argument specified by ProcedureArgument.
- The execution is in blocking mode. The BSP waits until the AP finishes or
- TimeoutInMicroSecondss expires.
-
- If the timeout specified by TimeoutInMicroseconds expires before the AP returns
- from Procedure, then execution of Procedure by the AP is terminated. The AP is
- available for subsequent calls to EFI_PEI_MP_SERVICES_PPI.StartupAllAPs() and
- EFI_PEI_MP_SERVICES_PPI.StartupThisAP().
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] Procedure A pointer to the function to be run on enabled APs of
- the system.
- @param[in] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
- @param[in] TimeoutInMicroseconds
- Indicates the time limit in microseconds for APs to
- return from Procedure, for blocking mode only. Zero
- means infinity. If the timeout expires before all APs
- return from Procedure, then Procedure on the failed APs
- is terminated. All enabled APs are available for next
- function assigned by EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- or EFI_PEI_MP_SERVICES_PPI.StartupThisAP(). If the
- timeout expires in blocking mode, BSP returns
- EFI_TIMEOUT.
- @param[in] ProcedureArgument The parameter passed into Procedure for all APs.
-
- @retval EFI_SUCCESS In blocking mode, specified AP finished before the
- timeout expires.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before the
- specified AP has finished.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP or disabled AP.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiStartupThisAP (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN UINTN ProcessorNumber,
- IN UINTN TimeoutInMicroseconds,
- IN VOID *ProcedureArgument OPTIONAL
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN CallerNumber;
- volatile UINT32 *FinishedCount;
- EFI_STATUS Status;
- UINTN WaitCountIndex;
- UINTN WaitCountNumber;
-
- PeiCpuMpData = GetMpHobData ();
- if (PeiCpuMpData == NULL) {
- return EFI_NOT_FOUND;
- }
-
- //
- // Check whether caller processor is BSP
- //
- PeiWhoAmI (PeiServices, This, &CallerNumber);
- if (CallerNumber != PeiCpuMpData->BspNumber) {
- return EFI_DEVICE_ERROR;
- }
-
- if (ProcessorNumber >= PeiCpuMpData->CpuCount) {
- return EFI_NOT_FOUND;
- }
-
- if (ProcessorNumber == PeiCpuMpData->BspNumber || Procedure == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check whether specified AP is disabled
- //
- if (PeiCpuMpData->CpuData[ProcessorNumber].State == CpuStateDisabled) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (PeiCpuMpData->EndOfPeiFlag) {
- //
- // Backup original data and copy AP reset vector in it
- //
- BackupAndPrepareWakeupBuffer(PeiCpuMpData);
- }
-
- WaitCountNumber = TimeoutInMicroseconds / CPU_CHECK_AP_INTERVAL + 1;
- WaitCountIndex = 0;
- FinishedCount = &PeiCpuMpData->FinishedCount;
-
- WakeUpAP (PeiCpuMpData, FALSE, PeiCpuMpData->CpuData[ProcessorNumber].ApicId, Procedure, ProcedureArgument);
-
- //
- // Wait to finish
- //
- if (TimeoutInMicroseconds == 0) {
- while (*FinishedCount < 1) {
- CpuPause() ;
- }
- Status = EFI_SUCCESS;
- } else {
- Status = EFI_TIMEOUT;
- for (WaitCountIndex = 0; WaitCountIndex < WaitCountNumber; WaitCountIndex++) {
- MicroSecondDelay (CPU_CHECK_AP_INTERVAL);
- if (*FinishedCount >= 1) {
- Status = EFI_SUCCESS;
- break;
- }
- }
- }
-
- if (PeiCpuMpData->EndOfPeiFlag) {
- //
- // Backup original data and copy AP reset vector in it
- //
- RestoreWakeupBuffer(PeiCpuMpData);
- }
-
- return Status;
-}
-
-/**
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. This call can only be performed
- by the current BSP.
-
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. The new BSP can take over the
- execution of the old BSP and continue seamlessly from where the old one left
- off.
-
- If the BSP cannot be switched prior to the return from this service, then
- EFI_UNSUPPORTED must be returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
- @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an enabled
- AP. Otherwise, it will be disabled.
-
- @retval EFI_SUCCESS BSP successfully switched.
- @retval EFI_UNSUPPORTED Switching the BSP cannot be completed prior to this
- service returning.
- @retval EFI_UNSUPPORTED Switching the BSP is not supported.
- @retval EFI_SUCCESS The calling processor is an AP.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the current BSP or a disabled
- AP.
- @retval EFI_NOT_READY The specified AP is busy.
-**/
-EFI_STATUS
-EFIAPI
-PeiSwitchBSP (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableOldBSP
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN CallerNumber;
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- PeiCpuMpData = GetMpHobData ();
- if (PeiCpuMpData == NULL) {
- return EFI_NOT_FOUND;
- }
-
- //
- // Check whether caller processor is BSP
- //
- PeiWhoAmI (PeiServices, This, &CallerNumber);
- if (CallerNumber != PeiCpuMpData->BspNumber) {
- return EFI_SUCCESS;
- }
-
- if (ProcessorNumber >= PeiCpuMpData->CpuCount) {
- return EFI_NOT_FOUND;
- }
-
- //
- // Check whether specified AP is disabled
- //
- if (PeiCpuMpData->CpuData[ProcessorNumber].State == CpuStateDisabled) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check whether ProcessorNumber specifies the current BSP
- //
- if (ProcessorNumber == PeiCpuMpData->BspNumber) {
- return EFI_INVALID_PARAMETER;
- }
-
- //
- // Check whether specified AP is busy
- //
- if (PeiCpuMpData->CpuData[ProcessorNumber].State == CpuStateBusy) {
- return EFI_NOT_READY;
- }
-
- //
- // Clear the BSP bit of MSR_IA32_APIC_BASE
- //
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Bsp = 0;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
-
- PeiCpuMpData->BSPInfo.State = CPU_SWITCH_STATE_IDLE;
- PeiCpuMpData->APInfo.State = CPU_SWITCH_STATE_IDLE;
-
- if (PeiCpuMpData->EndOfPeiFlag) {
- //
- // Backup original data and copy AP reset vector in it
- //
- BackupAndPrepareWakeupBuffer(PeiCpuMpData);
- }
-
- //
- // Need to wakeUp AP (future BSP).
- //
- WakeUpAP (PeiCpuMpData, FALSE, PeiCpuMpData->CpuData[ProcessorNumber].ApicId, FutureBSPProc, PeiCpuMpData);
-
- AsmExchangeRole (&PeiCpuMpData->BSPInfo, &PeiCpuMpData->APInfo);
-
- if (PeiCpuMpData->EndOfPeiFlag) {
- //
- // Backup original data and copy AP reset vector in it
- //
- RestoreWakeupBuffer(PeiCpuMpData);
- }
-
- //
- // Set the BSP bit of MSR_IA32_APIC_BASE on new BSP
- //
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Bsp = 1;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
- //
- // Set old BSP enable state
- //
- if (!EnableOldBSP) {
- PeiCpuMpData->CpuData[PeiCpuMpData->BspNumber].State = CpuStateDisabled;
- }
- //
- // Save new BSP number
- //
- PeiCpuMpData->BspNumber = (UINT32) ProcessorNumber;
-
- return EFI_SUCCESS;
-}
-
-/**
- This service lets the caller enable or disable an AP from this point onward.
- This service may only be called from the BSP.
-
- This service allows the caller enable or disable an AP from this point onward.
- The caller can optionally specify the health status of the AP by Health. If
- an AP is being disabled, then the state of the disabled AP is implementation
- dependent. If an AP is enabled, then the implementation must guarantee that a
- complete initialization sequence is performed on the AP, so the AP is in a state
- that is compatible with an MP operating system.
-
- If the enable or disable AP operation cannot be completed prior to the return
- from this service, then EFI_UNSUPPORTED must be returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
- @param[in] EnableAP Specifies the new state for the processor for enabled,
- FALSE for disabled.
- @param[in] HealthFlag If not NULL, a pointer to a value that specifies the
- new health status of the AP. This flag corresponds to
- StatusFlag defined in EFI_PEI_MP_SERVICES_PPI.GetProcessorInfo().
- Only the PROCESSOR_HEALTH_STATUS_BIT is used. All other
- bits are ignored. If it is NULL, this parameter is
- ignored.
-
- @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP cannot be completed prior
- to this service returning.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP is not supported.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber
- does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
-**/
-EFI_STATUS
-EFIAPI
-PeiEnableDisableAP (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableAP,
- IN UINT32 *HealthFlag OPTIONAL
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN CallerNumber;
-
- PeiCpuMpData = GetMpHobData ();
- if (PeiCpuMpData == NULL) {
- return EFI_NOT_FOUND;
- }
-
- //
- // Check whether caller processor is BSP
- //
- PeiWhoAmI (PeiServices, This, &CallerNumber);
- if (CallerNumber != PeiCpuMpData->BspNumber) {
- return EFI_DEVICE_ERROR;
- }
-
- if (ProcessorNumber == PeiCpuMpData->BspNumber) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (ProcessorNumber >= PeiCpuMpData->CpuCount) {
- return EFI_NOT_FOUND;
- }
-
- if (!EnableAP) {
- PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateDisabled;
- } else {
- PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;
- }
-
- if (HealthFlag != NULL) {
- PeiCpuMpData->CpuData[ProcessorNumber].CpuHealthy =
- (BOOLEAN) ((*HealthFlag & PROCESSOR_HEALTH_STATUS_BIT) != 0);
- }
- return EFI_SUCCESS;
-}
-
-/**
- This return the handle number for the calling processor. This service may be
- called from the BSP and APs.
-
- This service returns the processor handle number for the calling processor.
- The returned value is in the range from 0 to the total number of logical
- processors minus 1. The total number of logical processors can be retrieved
- with EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors(). This service may be
- called from the BSP and APs. If ProcessorNumber is NULL, then EFI_INVALID_PARAMETER
- is returned. Otherwise, the current processors handle number is returned in
- ProcessorNumber, and EFI_SUCCESS is returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[out] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
-
- @retval EFI_SUCCESS The current processor handle number was returned in
- ProcessorNumber.
- @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiWhoAmI (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- OUT UINTN *ProcessorNumber
- )
-{
- PEI_CPU_MP_DATA *PeiCpuMpData;
-
- PeiCpuMpData = GetMpHobData ();
- if (PeiCpuMpData == NULL) {
- return EFI_NOT_FOUND;
- }
-
- if (ProcessorNumber == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- return GetProcessorNumber (PeiCpuMpData, ProcessorNumber);
-}
-
diff --git a/UefiCpuPkg/CpuMpPei/PeiMpServices.h b/UefiCpuPkg/CpuMpPei/PeiMpServices.h deleted file mode 100644 index 57f7691161..0000000000 --- a/UefiCpuPkg/CpuMpPei/PeiMpServices.h +++ /dev/null @@ -1,377 +0,0 @@ -/** @file
- Functions prototype of Multiple Processor PPI services.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _PEI_MP_SERVICES_H_
-#define _PEI_MP_SERVICES_H_
-
-#include "CpuMpPei.h"
-
-//
-// The MP data for switch BSP
-//
-#define CPU_SWITCH_STATE_IDLE 0
-#define CPU_SWITCH_STATE_STORED 1
-#define CPU_SWITCH_STATE_LOADED 2
-
-#define CPU_CHECK_AP_INTERVAL 0x100 // 100 microseconds
-
-/**
- This function is called by both the BSP and the AP which is to become the BSP to
- Exchange execution context including stack between them. After return from this
- function, the BSP becomes AP and the AP becomes the BSP.
-
- @param MyInfo Pointer to buffer holding the exchanging information for the executing processor.
- @param OthersInfo Pointer to buffer holding the exchanging information for the peer.
-**/
-VOID
-EFIAPI
-AsmExchangeRole (
- IN CPU_EXCHANGE_ROLE_INFO *MyInfo,
- IN CPU_EXCHANGE_ROLE_INFO *OthersInfo
- );
-
-/**
- This service retrieves the number of logical processor in the platform
- and the number of those logical processors that are enabled on this boot.
- This service may only be called from the BSP.
-
- This function is used to retrieve the following information:
- - The number of logical processors that are present in the system.
- - The number of enabled logical processors in the system at the instant
- this call is made.
-
- Because MP Service Ppi provides services to enable and disable processors
- dynamically, the number of enabled logical processors may vary during the
- course of a boot session.
-
- If this service is called from an AP, then EFI_DEVICE_ERROR is returned.
- If NumberOfProcessors or NumberOfEnabledProcessors is NULL, then
- EFI_INVALID_PARAMETER is returned. Otherwise, the total number of processors
- is returned in NumberOfProcessors, the number of currently enabled processor
- is returned in NumberOfEnabledProcessors, and EFI_SUCCESS is returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to this instance of the PPI.
- @param[out] NumberOfProcessors Pointer to the total number of logical processors in
- the system, including the BSP and disabled APs.
- @param[out] NumberOfEnabledProcessors
- Number of processors in the system that are enabled.
-
- @retval EFI_SUCCESS The number of logical processors and enabled
- logical processors was retrieved.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL.
- NumberOfEnabledProcessors is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiGetNumberOfProcessors (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- OUT UINTN *NumberOfProcessors,
- OUT UINTN *NumberOfEnabledProcessors
- );
-
-/**
- Gets detailed MP-related information on the requested processor at the
- instant this call is made. This service may only be called from the BSP.
-
- This service retrieves detailed MP-related information about any processor
- on the platform. Note the following:
- - The processor information may change during the course of a boot session.
- - The information presented here is entirely MP related.
-
- Information regarding the number of caches and their sizes, frequency of operation,
- slot numbers is all considered platform-related information and is not provided
- by this service.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This Pointer to this instance of the PPI.
- @param[in] ProcessorNumber Pointer to the total number of logical processors in
- the system, including the BSP and disabled APs.
- @param[out] ProcessorInfoBuffer Number of processors in the system that are enabled.
-
- @retval EFI_SUCCESS Processor information was returned.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist in the platform.
-**/
-EFI_STATUS
-EFIAPI
-PeiGetProcessorInfo (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN UINTN ProcessorNumber,
- OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer
- );
-
-/**
- This service executes a caller provided function on all enabled APs. APs can
- run either simultaneously or one at a time in sequence. This service supports
- both blocking requests only. This service may only
- be called from the BSP.
-
- This function is used to dispatch all the enabled APs to the function specified
- by Procedure. If any enabled AP is busy, then EFI_NOT_READY is returned
- immediately and Procedure is not started on any AP.
-
- If SingleThread is TRUE, all the enabled APs execute the function specified by
- Procedure one by one, in ascending order of processor handle number. Otherwise,
- all the enabled APs execute the function specified by Procedure simultaneously.
-
- If the timeout specified by TimeoutInMicroSeconds expires before all APs return
- from Procedure, then Procedure on the failed APs is terminated. All enabled APs
- are always available for further calls to EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- and EFI_PEI_MP_SERVICES_PPI.StartupThisAP(). If FailedCpuList is not NULL, its
- content points to the list of processor handle numbers in which Procedure was
- terminated.
-
- Note: It is the responsibility of the consumer of the EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- to make sure that the nature of the code that is executed on the BSP and the
- dispatched APs is well controlled. The MP Services Ppi does not guarantee
- that the Procedure function is MP-safe. Hence, the tasks that can be run in
- parallel are limited to certain independent tasks and well-controlled exclusive
- code. PEI services and Ppis may not be called by APs unless otherwise
- specified.
-
- In blocking execution mode, BSP waits until all APs finish or
- TimeoutInMicroSeconds expires.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] Procedure A pointer to the function to be run on enabled APs of
- the system.
- @param[in] SingleThread If TRUE, then all the enabled APs execute the function
- specified by Procedure one by one, in ascending order
- of processor handle number. If FALSE, then all the
- enabled APs execute the function specified by Procedure
- simultaneously.
- @param[in] TimeoutInMicroSeconds
- Indicates the time limit in microseconds for APs to
- return from Procedure, for blocking mode only. Zero
- means infinity. If the timeout expires before all APs
- return from Procedure, then Procedure on the failed APs
- is terminated. All enabled APs are available for next
- function assigned by EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- or EFI_PEI_MP_SERVICES_PPI.StartupThisAP(). If the
- timeout expires in blocking mode, BSP returns
- EFI_TIMEOUT.
- @param[in] ProcedureArgument The parameter passed into Procedure for all APs.
-
- @retval EFI_SUCCESS In blocking mode, all APs have finished before the
- timeout expired.
- @retval EFI_DEVICE_ERROR Caller processor is AP.
- @retval EFI_NOT_STARTED No enabled APs exist in the system.
- @retval EFI_NOT_READY Any enabled APs are busy.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before all
- enabled APs have finished.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiStartupAllAPs (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN BOOLEAN SingleThread,
- IN UINTN TimeoutInMicroSeconds,
- IN VOID *ProcedureArgument OPTIONAL
- );
-
-/**
- This service lets the caller get one enabled AP to execute a caller-provided
- function. The caller can request the BSP to wait for the completion
- of the AP. This service may only be called from the BSP.
-
- This function is used to dispatch one enabled AP to the function specified by
- Procedure passing in the argument specified by ProcedureArgument.
- The execution is in blocking mode. The BSP waits until the AP finishes or
- TimeoutInMicroSecondss expires.
-
- If the timeout specified by TimeoutInMicroseconds expires before the AP returns
- from Procedure, then execution of Procedure by the AP is terminated. The AP is
- available for subsequent calls to EFI_PEI_MP_SERVICES_PPI.StartupAllAPs() and
- EFI_PEI_MP_SERVICES_PPI.StartupThisAP().
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] Procedure A pointer to the function to be run on enabled APs of
- the system.
- @param[in] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
- @param[in] TimeoutInMicroseconds
- Indicates the time limit in microseconds for APs to
- return from Procedure, for blocking mode only. Zero
- means infinity. If the timeout expires before all APs
- return from Procedure, then Procedure on the failed APs
- is terminated. All enabled APs are available for next
- function assigned by EFI_PEI_MP_SERVICES_PPI.StartupAllAPs()
- or EFI_PEI_MP_SERVICES_PPI.StartupThisAP(). If the
- timeout expires in blocking mode, BSP returns
- EFI_TIMEOUT.
- @param[in] ProcedureArgument The parameter passed into Procedure for all APs.
-
- @retval EFI_SUCCESS In blocking mode, specified AP finished before the
- timeout expires.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_TIMEOUT In blocking mode, the timeout expired before the
- specified AP has finished.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP or disabled AP.
- @retval EFI_INVALID_PARAMETER Procedure is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiStartupThisAP (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN EFI_AP_PROCEDURE Procedure,
- IN UINTN ProcessorNumber,
- IN UINTN TimeoutInMicroseconds,
- IN VOID *ProcedureArgument OPTIONAL
- );
-
-/**
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. This call can only be performed
- by the current BSP.
-
- This service switches the requested AP to be the BSP from that point onward.
- This service changes the BSP for all purposes. The new BSP can take over the
- execution of the old BSP and continue seamlessly from where the old one left
- off.
-
- If the BSP cannot be switched prior to the return from this service, then
- EFI_UNSUPPORTED must be returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
- @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an enabled
- AP. Otherwise, it will be disabled.
-
- @retval EFI_SUCCESS BSP successfully switched.
- @retval EFI_UNSUPPORTED Switching the BSP cannot be completed prior to this
- service returning.
- @retval EFI_UNSUPPORTED Switching the BSP is not supported.
- @retval EFI_SUCCESS The calling processor is an AP.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the current BSP or a disabled
- AP.
- @retval EFI_NOT_READY The specified AP is busy.
-**/
-EFI_STATUS
-EFIAPI
-PeiSwitchBSP (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableOldBSP
- );
-
-/**
- This service lets the caller enable or disable an AP from this point onward.
- This service may only be called from the BSP.
-
- This service allows the caller enable or disable an AP from this point onward.
- The caller can optionally specify the health status of the AP by Health. If
- an AP is being disabled, then the state of the disabled AP is implementation
- dependent. If an AP is enabled, then the implementation must guarantee that a
- complete initialization sequence is performed on the AP, so the AP is in a state
- that is compatible with an MP operating system.
-
- If the enable or disable AP operation cannot be completed prior to the return
- from this service, then EFI_UNSUPPORTED must be returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[in] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
- @param[in] EnableAP Specifies the new state for the processor for enabled,
- FALSE for disabled.
- @param[in] HealthFlag If not NULL, a pointer to a value that specifies the
- new health status of the AP. This flag corresponds to
- StatusFlag defined in EFI_PEI_MP_SERVICES_PPI.GetProcessorInfo().
- Only the PROCESSOR_HEALTH_STATUS_BIT is used. All other
- bits are ignored. If it is NULL, this parameter is
- ignored.
-
- @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP cannot be completed prior
- to this service returning.
- @retval EFI_UNSUPPORTED Enabling or disabling an AP is not supported.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber
- does not exist.
- @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
-**/
-EFI_STATUS
-EFIAPI
-PeiEnableDisableAP (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- IN UINTN ProcessorNumber,
- IN BOOLEAN EnableAP,
- IN UINT32 *HealthFlag OPTIONAL
- );
-
-/**
- This return the handle number for the calling processor. This service may be
- called from the BSP and APs.
-
- This service returns the processor handle number for the calling processor.
- The returned value is in the range from 0 to the total number of logical
- processors minus 1. The total number of logical processors can be retrieved
- with EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors(). This service may be
- called from the BSP and APs. If ProcessorNumber is NULL, then EFI_INVALID_PARAMETER
- is returned. Otherwise, the current processors handle number is returned in
- ProcessorNumber, and EFI_SUCCESS is returned.
-
- @param[in] PeiServices An indirect pointer to the PEI Services Table
- published by the PEI Foundation.
- @param[in] This A pointer to the EFI_PEI_MP_SERVICES_PPI instance.
- @param[out] ProcessorNumber The handle number of the AP. The range is from 0 to the
- total number of logical processors minus 1. The total
- number of logical processors can be retrieved by
- EFI_PEI_MP_SERVICES_PPI.GetNumberOfProcessors().
-
- @retval EFI_SUCCESS The current processor handle number was returned in
- ProcessorNumber.
- @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
-**/
-EFI_STATUS
-EFIAPI
-PeiWhoAmI (
- IN CONST EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_MP_SERVICES_PPI *This,
- OUT UINTN *ProcessorNumber
- );
-
-#endif
diff --git a/UefiCpuPkg/CpuMpPei/X64/MpEqu.inc b/UefiCpuPkg/CpuMpPei/X64/MpEqu.inc deleted file mode 100644 index ab851cf3e7..0000000000 --- a/UefiCpuPkg/CpuMpPei/X64/MpEqu.inc +++ /dev/null @@ -1,45 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; MpEqu.inc
-;
-; Abstract:
-;
-; This is the equates file for Multiple Processor support
-;
-;-------------------------------------------------------------------------------
-
-PROTECT_MODE_CS equ 10h
-PROTECT_MODE_DS equ 18h
-LONG_MODE_CS equ 38h
-LONG_MODE_DS equ 30h
-
-VacantFlag equ 00h
-NotVacantFlag equ 0ffh
-
-CPU_SWITCH_STATE_IDLE equ 0
-CPU_SWITCH_STATE_STORED equ 1
-CPU_SWITCH_STATE_LOADED equ 2
-
-LockLocation equ (RendezvousFunnelProcEnd - RendezvousFunnelProcStart)
-StackStartAddressLocation equ LockLocation + 08h
-StackSizeLocation equ LockLocation + 10h
-ApProcedureLocation equ LockLocation + 18h
-GdtrLocation equ LockLocation + 20h
-IdtrLocation equ LockLocation + 2Ah
-BufferStartLocation equ LockLocation + 34h
-PmodeOffsetLocation equ LockLocation + 3Ch
-NumApsExecutingLoction equ LockLocation + 44h
-LmodeOffsetLocation equ LockLocation + 4Ch
-Cr3Location equ LockLocation + 54h
-
-;-------------------------------------------------------------------------------
diff --git a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm deleted file mode 100644 index fad5e8d443..0000000000 --- a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm +++ /dev/null @@ -1,334 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; MpFuncs32.asm
-;
-; Abstract:
-;
-; This is the assembly code for MP support
-;
-;-------------------------------------------------------------------------------
-
-include MpEqu.inc
-extern InitializeFloatingPointUnits:PROC
-
-.code
-;-------------------------------------------------------------------------------------
-;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
-;procedure serializes all the AP processors through an Init sequence. It must be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------------------
-RendezvousFunnelProc PROC PUBLIC
-RendezvousFunnelProcStart::
-; At this point CS = 0x(vv00) and ip= 0x0.
-; Save BIST information to ebp firstly
- db 66h, 08bh, 0e8h ; mov ebp, eax ; save BIST information
-
- db 8ch,0c8h ; mov ax,cs
- db 8eh,0d8h ; mov ds,ax
- db 8eh,0c0h ; mov es,ax
- db 8eh,0d0h ; mov ss,ax
- db 33h,0c0h ; xor ax,ax
- db 8eh,0e0h ; mov fs,ax
- db 8eh,0e8h ; mov gs,ax
-
- db 0BEh ; opcode of mov si, mem16
- dw BufferStartLocation ; mov si, BufferStartLocation
- db 66h, 8Bh, 1Ch ; mov ebx,dword ptr [si]
-
- db 0BFh ; opcode of mov di, mem16
- dw PmodeOffsetLocation ; mov di, PmodeOffsetLocation
- db 66h, 8Bh, 05h ; mov eax,dword ptr [di]
- db 8Bh, 0F8h ; mov di, ax
- db 83h, 0EFh,06h ; sub di, 06h
- db 66h, 03h, 0C3h ; add eax, ebx
- db 66h, 89h, 05h ; mov dword ptr [di],eax
-
- db 0BFh ; opcode of mov di, mem16
- dw LmodeOffsetLocation ; mov di, LmodeOffsetLocation
- db 66h, 8Bh, 05h ; mov eax,dword ptr [di]
- db 8Bh, 0F8h ; mov di, ax
- db 83h, 0EFh,06h ; sub di, 06h
- db 66h, 03h, 0C3h ; add eax, ebx
- db 66h, 89h, 05h ; mov dword ptr [di],eax
-
- db 0BEh
- dw Cr3Location ; mov si, Cr3Location
- db 66h, 8Bh, 0Ch ; mov ecx,dword ptr [si] ; ECX is keeping the value of CR3
-
- db 0BEh ; opcode of mov si, mem16
- dw GdtrLocation ; mov si, GdtrLocation
- db 66h ; db 66h
- db 2Eh, 0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
-
- db 0BEh
- dw IdtrLocation ; mov si, IdtrLocation
- db 66h ; db 66h
- db 2Eh,0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
-
- db 33h, 0C0h ; xor ax, ax
- db 8Eh, 0D8h ; mov ds, ax
-
- db 0Fh, 20h, 0C0h ; mov eax, cr0 ;Get control register 0
- db 66h, 83h, 0C8h, 03h ; or eax, 000000003h ;Set PE bit (bit #0) & MP
- db 0Fh, 22h, 0C0h ; mov cr0, eax
-
- db 66h, 67h, 0EAh ; far jump
- dd 0h ; 32-bit offset
- dw PROTECT_MODE_CS ; 16-bit selector
-
-Flat32Start:: ; protected mode entry point
- mov ax, PROTECT_MODE_DS
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- db 0Fh, 20h, 0E0h ; mov eax, cr4
- db 0Fh, 0BAh, 0E8h, 05h ; bts eax, 5
- db 0Fh, 22h, 0E0h ; mov cr4, eax
-
- db 0Fh, 22h, 0D9h ; mov cr3, ecx
-
- db 0B9h
- dd 0C0000080h ; mov ecx, 0c0000080h ; EFER MSR number.
- db 0Fh, 32h ; rdmsr ; Read EFER.
- db 0Fh, 0BAh, 0E8h, 08h ; bts eax, 8 ; Set LME=1.
- db 0Fh, 30h ; wrmsr ; Write EFER.
-
- db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Read CR0.
- db 0Fh, 0BAh, 0E8h, 1Fh ; bts eax, 31 ; Set PG=1.
- db 0Fh, 22h, 0C0h ; mov cr0, eax ; Write CR0.
-
-LONG_JUMP:
- db 67h, 0EAh ; far jump
- dd 0h ; 32-bit offset
- dw LONG_MODE_CS ; 16-bit selector
-
-LongModeStart::
- mov ax, LONG_MODE_DS
- mov ds, ax
- mov es, ax
- mov ss, ax
-
- mov esi, ebx
- mov edi, esi
- add edi, LockLocation
- mov rax, NotVacantFlag
-
-TestLock:
- xchg qword ptr [edi], rax
- cmp rax, NotVacantFlag
- jz TestLock
-
- mov edi, esi
- add edi, NumApsExecutingLoction
- inc dword ptr [edi]
- mov ebx, dword ptr [edi]
-
-ProgramStack:
- mov edi, esi
- add edi, StackSizeLocation
- mov rax, qword ptr [edi]
- mov edi, esi
- add edi, StackStartAddressLocation
- add rax, qword ptr [edi]
- mov rsp, rax
- mov qword ptr [edi], rax
-
-Releaselock:
- mov rax, VacantFlag
- mov edi, esi
- add edi, LockLocation
- xchg qword ptr [edi], rax
-
-CProcedureInvoke:
- push rbp ; push BIST data
- xor rbp, rbp ; clear ebp for call stack trace
- push rbp
- mov rbp, rsp
-
- mov rax, InitializeFloatingPointUnits
- sub rsp, 20h
- call rax ; Call assembly function to initialize FPU per UEFI spec
- add rsp, 20h
-
- mov edx, ebx ; edx is NumApsExecuting
- mov ecx, esi
- add ecx, LockLocation ; rcx is address of exchange info data buffer
-
- mov edi, esi
- add edi, ApProcedureLocation
- mov rax, qword ptr [edi]
-
- sub rsp, 20h
- call rax ; invoke C function
- add rsp, 20h
- jmp $
-
-RendezvousFunnelProc ENDP
-RendezvousFunnelProcEnd::
-
-AsmCliHltLoop PROC
- cli
- hlt
- jmp $-2
-AsmCliHltLoop ENDP
-
-;-------------------------------------------------------------------------------------
-; AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-AsmGetAddressMap PROC
- mov rax, offset RendezvousFunnelProcStart
- mov qword ptr [rcx], rax
- mov qword ptr [rcx + 8h], Flat32Start - RendezvousFunnelProcStart
- mov qword ptr [rcx + 10h], LongModeStart - RendezvousFunnelProcStart
- mov qword ptr [rcx + 18h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
- ret
-AsmGetAddressMap ENDP
-
-;-------------------------------------------------------------------------------------
-;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
-;about to become an AP. It switches it'stack with the current AP.
-;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
-;-------------------------------------------------------------------------------------
-AsmExchangeRole PROC
- ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
- ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
-
- push rax
- push rbx
- push rcx
- push rdx
- push rsi
- push rdi
- push rbp
- push r8
- push r9
- push r10
- push r11
- push r12
- push r13
- push r14
- push r15
-
- mov rax, cr0
- push rax
-
- mov rax, cr4
- push rax
-
- ; rsi contains MyInfo pointer
- mov rsi, rcx
-
- ; rdi contains OthersInfo pointer
- mov rdi, rdx
-
- ;Store EFLAGS, GDTR and IDTR regiter to stack
- pushfq
- sgdt fword ptr [rsi + 16]
- sidt fword ptr [rsi + 26]
-
- ; Store the its StackPointer
- mov qword ptr [rsi + 8], rsp
-
- ; update its switch state to STORED
- mov byte ptr [rsi], CPU_SWITCH_STATE_STORED
-
-WaitForOtherStored:
- ; wait until the other CPU finish storing its state
- cmp byte ptr [rdi], CPU_SWITCH_STATE_STORED
- jz OtherStored
- pause
- jmp WaitForOtherStored
-
-OtherStored:
- ; Since another CPU already stored its state, load them
- ; load GDTR value
- lgdt fword ptr [rdi + 16]
-
- ; load IDTR value
- lidt fword ptr [rdi + 26]
-
- ; load its future StackPointer
- mov rsp, qword ptr [rdi + 8]
-
- ; update the other CPU's switch state to LOADED
- mov byte ptr [rdi], CPU_SWITCH_STATE_LOADED
-
-WaitForOtherLoaded:
- ; wait until the other CPU finish loading new state,
- ; otherwise the data in stack may corrupt
- cmp byte ptr [rsi], CPU_SWITCH_STATE_LOADED
- jz OtherLoaded
- pause
- jmp WaitForOtherLoaded
-
-OtherLoaded:
- ; since the other CPU already get the data it want, leave this procedure
- popfq
-
- pop rax
- mov cr4, rax
-
- pop rax
- mov cr0, rax
-
- pop r15
- pop r14
- pop r13
- pop r12
- pop r11
- pop r10
- pop r9
- pop r8
- pop rbp
- pop rdi
- pop rsi
- pop rdx
- pop rcx
- pop rbx
- pop rax
-
- ret
-AsmExchangeRole ENDP
-
-AsmInitializeGdt PROC
- push rbp
- mov rbp, rsp
-
- lgdt fword PTR [rcx] ; update the GDTR
-
- sub rsp, 0x10
- lea rax, SetCodeSelectorFarJump
- mov [rsp], rax
- mov rdx, LONG_MODE_CS
- mov [rsp + 4], dx ; get new CS
- jmp fword ptr [rsp]
-SetCodeSelectorFarJump:
- add rsp, 0x10
-
- mov rax, LONG_MODE_DS ; get new DS
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- pop rbp
- ret
-AsmInitializeGdt ENDP
-
-END
diff --git a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm deleted file mode 100644 index 0b2e879905..0000000000 --- a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm +++ /dev/null @@ -1,327 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; MpFuncs.nasm
-;
-; Abstract:
-;
-; This is the assembly code for MP support
-;
-;-------------------------------------------------------------------------------
-
-%include "MpEqu.inc"
-extern ASM_PFX(InitializeFloatingPointUnits)
-
-DEFAULT REL
-
-SECTION .text
-
-;-------------------------------------------------------------------------------------
-;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
-;procedure serializes all the AP processors through an Init sequence. It must be
-;noted that APs arrive here very raw...ie: real mode, no stack.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
-;IS IN MACHINE CODE.
-;-------------------------------------------------------------------------------------
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
-RendezvousFunnelProcStart:
-; At this point CS = 0x(vv00) and ip= 0x0.
-; Save BIST information to ebp firstly
-BITS 16
-
- mov eax, 1234h
- mov ebp, eax ; save BIST information
-
- mov ax, cs
- mov ds, ax
- mov es, ax
- mov ss, ax
- xor ax, ax
- mov fs, ax
- mov gs, ax
-
- mov si, BufferStartLocation
- mov ebx, [si]
-
- mov di, PmodeOffsetLocation
- mov eax, [di]
- mov di, ax
- sub di, 06h
- add eax, ebx
- mov [di],eax
-
- mov di, LmodeOffsetLocation
- mov eax, [di]
- mov di, ax
- sub di, 06h
- add eax, ebx
- mov [di],eax
-
-
- mov si, Cr3Location
- mov ecx,[si] ; ECX is keeping the value of CR3
-
- mov si, GdtrLocation
-o32 lgdt [cs:si]
-
- mov si, IdtrLocation
-o32 lidt [cs:si]
-
-
- xor ax, ax
- mov ds, ax
-
- mov eax, cr0 ;Get control register 0
- or eax, 000000003h ;Set PE bit (bit #0) & MP
- mov cr0, eax
-
- jmp PROTECT_MODE_CS:strict dword 0 ; far jump to protected mode
-BITS 32
-Flat32Start: ; protected mode entry point
- mov ax, PROTECT_MODE_DS
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- mov eax, cr4
- bts eax, 5
- mov cr4, eax
-
- mov cr3, ecx
-
-
- mov ecx, 0c0000080h ; EFER MSR number.
- rdmsr ; Read EFER.
- bts eax, 8 ; Set LME=1.
- wrmsr ; Write EFER.
-
- mov eax, cr0 ; Read CR0.
- bts eax, 31 ; Set PG=1.
- mov cr0, eax ; Write CR0.
-
- jmp LONG_MODE_CS:strict dword 0 ; far jump to long mode
-BITS 64
-LongModeStart:
- mov ax, LONG_MODE_DS
- mov ds, ax
- mov es, ax
- mov ss, ax
-
- mov esi, ebx
- mov edi, esi
- add edi, LockLocation
- mov rax, NotVacantFlag
-
-TestLock:
- xchg qword [edi], rax
- cmp rax, NotVacantFlag
- jz TestLock
-
- mov edi, esi
- add edi, NumApsExecutingLoction
- inc dword [edi]
- mov ebx, [edi]
-
-ProgramStack:
- mov edi, esi
- add edi, StackSizeLocation
- mov rax, qword [edi]
- mov edi, esi
- add edi, StackStartAddressLocation
- add rax, qword [edi]
- mov rsp, rax
- mov qword [edi], rax
-
-Releaselock:
- mov rax, VacantFlag
- mov edi, esi
- add edi, LockLocation
- xchg qword [edi], rax
-
-CProcedureInvoke:
- push rbp ; push BIST data at top of AP stack
- xor rbp, rbp ; clear ebp for call stack trace
- push rbp
- mov rbp, rsp
-
- mov rax, ASM_PFX(InitializeFloatingPointUnits)
- sub rsp, 20h
- call rax ; Call assembly function to initialize FPU per UEFI spec
- add rsp, 20h
-
- mov edx, ebx ; edx is NumApsExecuting
- mov ecx, esi
- add ecx, LockLocation ; rcx is address of exchange info data buffer
-
- mov edi, esi
- add edi, ApProcedureLocation
- mov rax, qword [edi]
-
- sub rsp, 20h
- call rax ; invoke C function
- add rsp, 20h
-
-RendezvousFunnelProcEnd:
-
-global ASM_PFX(AsmCliHltLoop)
-ASM_PFX(AsmCliHltLoop):
- cli
- hlt
- jmp $-2
-
-;-------------------------------------------------------------------------------------
-; AsmGetAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmGetAddressMap)
-ASM_PFX(AsmGetAddressMap):
- mov rax, ASM_PFX(RendezvousFunnelProc)
- mov qword [rcx], rax
- mov qword [rcx + 8h], Flat32Start - RendezvousFunnelProcStart
- mov qword [rcx + 10h], LongModeStart - RendezvousFunnelProcStart
- mov qword [rcx + 18h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
- ret
-
-;-------------------------------------------------------------------------------------
-;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
-;about to become an AP. It switches it'stack with the current AP.
-;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
-;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmExchangeRole)
-ASM_PFX(AsmExchangeRole):
- ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
- ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
-
- push rax
- push rbx
- push rcx
- push rdx
- push rsi
- push rdi
- push rbp
- push r8
- push r9
- push r10
- push r11
- push r12
- push r13
- push r14
- push r15
-
- mov rax, cr0
- push rax
-
- mov rax, cr4
- push rax
-
- ; rsi contains MyInfo pointer
- mov rsi, rcx
-
- ; rdi contains OthersInfo pointer
- mov rdi, rdx
-
- ;Store EFLAGS, GDTR and IDTR regiter to stack
- pushfq
- sgdt [rsi + 16]
- sidt [rsi + 26]
-
- ; Store the its StackPointer
- mov [rsi + 8], rsp
-
- ; update its switch state to STORED
- mov byte [rsi], CPU_SWITCH_STATE_STORED
-
-WaitForOtherStored:
- ; wait until the other CPU finish storing its state
- cmp byte [rdi], CPU_SWITCH_STATE_STORED
- jz OtherStored
- pause
- jmp WaitForOtherStored
-
-OtherStored:
- ; Since another CPU already stored its state, load them
- ; load GDTR value
- lgdt [rdi + 16]
-
- ; load IDTR value
- lidt [rdi + 26]
-
- ; load its future StackPointer
- mov rsp, [rdi + 8]
-
- ; update the other CPU's switch state to LOADED
- mov byte [rdi], CPU_SWITCH_STATE_LOADED
-
-WaitForOtherLoaded:
- ; wait until the other CPU finish loading new state,
- ; otherwise the data in stack may corrupt
- cmp byte [rsi], CPU_SWITCH_STATE_LOADED
- jz OtherLoaded
- pause
- jmp WaitForOtherLoaded
-
-OtherLoaded:
- ; since the other CPU already get the data it want, leave this procedure
- popfq
-
- pop rax
- mov cr4, rax
-
- pop rax
- mov cr0, rax
-
- pop r15
- pop r14
- pop r13
- pop r12
- pop r11
- pop r10
- pop r9
- pop r8
- pop rbp
- pop rdi
- pop rsi
- pop rdx
- pop rcx
- pop rbx
- pop rax
-
- ret
-
-global ASM_PFX(AsmInitializeGdt)
-ASM_PFX(AsmInitializeGdt):
- push rbp
- mov rbp, rsp
-
- lgdt [rcx] ; update the GDTR
-
- sub rsp, 0x10
- mov rax, ASM_PFX(SetCodeSelectorFarJump)
- mov [rsp], rax
- mov rdx, LONG_MODE_CS
- mov [rsp + 4], dx ; get new CS
- jmp far dword [rsp] ; far jump with new CS
-ASM_PFX(SetCodeSelectorFarJump):
- add rsp, 0x10
-
- mov rax, LONG_MODE_DS ; get new DS
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- pop rbp
-
- ret
diff --git a/UefiCpuPkg/Include/Library/LocalApicLib.h b/UefiCpuPkg/Include/Library/LocalApicLib.h deleted file mode 100644 index b92b99e115..0000000000 --- a/UefiCpuPkg/Include/Library/LocalApicLib.h +++ /dev/null @@ -1,401 +0,0 @@ -/** @file
- Public include file for Local APIC library.
-
- Local APIC library assumes local APIC is enabled. It does not
- handles cases where local APIC is disabled.
-
- Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __LOCAL_APIC_LIB_H__
-#define __LOCAL_APIC_LIB_H__
-
-#define LOCAL_APIC_MODE_XAPIC 0x1 ///< xAPIC mode.
-#define LOCAL_APIC_MODE_X2APIC 0x2 ///< x2APIC mode.
-
-/**
- Retrieve the base address of local APIC.
-
- @return The base address of local APIC.
-
-**/
-UINTN
-EFIAPI
-GetLocalApicBaseAddress (
- VOID
- );
-
-/**
- Set the base address of local APIC.
-
- If BaseAddress is not aligned on a 4KB boundary, then ASSERT().
-
- @param[in] BaseAddress Local APIC base address to be set.
-
-**/
-VOID
-EFIAPI
-SetLocalApicBaseAddress (
- IN UINTN BaseAddress
- );
-
-/**
- Get the current local APIC mode.
-
- If local APIC is disabled, then ASSERT.
-
- @retval LOCAL_APIC_MODE_XAPIC current APIC mode is xAPIC.
- @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.
-**/
-UINTN
-EFIAPI
-GetApicMode (
- VOID
- );
-
-/**
- Set the current local APIC mode.
-
- If the specified local APIC mode is not valid, then ASSERT.
- If the specified local APIC mode can't be set as current, then ASSERT.
-
- @param ApicMode APIC mode to be set.
-
- @note This API must not be called from an interrupt handler or SMI handler.
- It may result in unpredictable behavior.
-**/
-VOID
-EFIAPI
-SetApicMode (
- IN UINTN ApicMode
- );
-
-/**
- Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
-
- In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
- In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
- the 32-bit local APIC ID is returned as initial APIC ID.
-
- @return 32-bit initial local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetInitialApicId (
- VOID
- );
-
-/**
- Get the local APIC ID of the executing processor.
-
- @return 32-bit local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetApicId (
- VOID
- );
-
-/**
- Get the value of the local APIC version register.
-
- @return the value of the local APIC version register.
-**/
-UINT32
-EFIAPI
-GetApicVersion (
- VOID
- );
-
-/**
- Send a Fixed IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId The local APIC ID of the target processor.
- @param Vector The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpi (
- IN UINT32 ApicId,
- IN UINT8 Vector
- );
-
-/**
- Send a Fixed IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-
- @param Vector The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpiAllExcludingSelf (
- IN UINT8 Vector
- );
-
-/**
- Send a SMI IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendSmiIpi (
- IN UINT32 ApicId
- );
-
-/**
- Send a SMI IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-**/
-VOID
-EFIAPI
-SendSmiIpiAllExcludingSelf (
- VOID
- );
-
-/**
- Send an INIT IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendInitIpi (
- IN UINT32 ApicId
- );
-
-/**
- Send an INIT IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-**/
-VOID
-EFIAPI
-SendInitIpiAllExcludingSelf (
- VOID
- );
-
-/**
- Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- if StartupRoutine >= 1M, then ASSERT.
- if StartupRoutine is not multiple of 4K, then ASSERT.
-
- @param ApicId Specify the local APIC ID of the target processor.
- @param StartupRoutine Points to a start-up routine which is below 1M physical
- address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipi (
- IN UINT32 ApicId,
- IN UINT32 StartupRoutine
- );
-
-/**
- Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-
- if StartupRoutine >= 1M, then ASSERT.
- if StartupRoutine is not multiple of 4K, then ASSERT.
-
- @param StartupRoutine Points to a start-up routine which is below 1M physical
- address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipiAllExcludingSelf (
- IN UINT32 StartupRoutine
- );
-
-/**
- Programming Virtual Wire Mode.
-
- This function programs the local APIC for virtual wire mode following
- the example described in chapter A.3 of the MP 1.4 spec.
-
- IOxAPIC is not involved in this type of virtual wire mode.
-**/
-VOID
-EFIAPI
-ProgramVirtualWireMode (
- VOID
- );
-
-/**
- Disable LINT0 & LINT1 interrupts.
-
- This function sets the mask flag in the LVT LINT0 & LINT1 registers.
-**/
-VOID
-EFIAPI
-DisableLvtInterrupts (
- VOID
- );
-
-/**
- Read the initial count value from the init-count register.
-
- @return The initial count value read from the init-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerInitCount (
- VOID
- );
-
-/**
- Read the current count value from the current-count register.
-
- @return The current count value read from the current-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerCurrentCount (
- VOID
- );
-
-/**
- Initialize the local APIC timer.
-
- The local APIC timer is initialized and enabled.
-
- @param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
- If it is 0, then use the current divide value in the DCR.
- @param InitCount The initial count value.
- @param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
- @param Vector The timer interrupt vector number.
-**/
-VOID
-EFIAPI
-InitializeApicTimer (
- IN UINTN DivideValue,
- IN UINT32 InitCount,
- IN BOOLEAN PeriodicMode,
- IN UINT8 Vector
- );
-
-/**
- Get the state of the local APIC timer.
-
- @param DivideValue Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
- @param PeriodicMode Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
- @param Vector Return the timer interrupt vector number.
-**/
-VOID
-EFIAPI
-GetApicTimerState (
- OUT UINTN *DivideValue OPTIONAL,
- OUT BOOLEAN *PeriodicMode OPTIONAL,
- OUT UINT8 *Vector OPTIONAL
- );
-
-/**
- Enable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-EnableApicTimerInterrupt (
- VOID
- );
-
-/**
- Disable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-DisableApicTimerInterrupt (
- VOID
- );
-
-/**
- Get the local APIC timer interrupt state.
-
- @retval TRUE The local APIC timer interrupt is enabled.
- @retval FALSE The local APIC timer interrupt is disabled.
-**/
-BOOLEAN
-EFIAPI
-GetApicTimerInterruptState (
- VOID
- );
-
-/**
- Send EOI to the local APIC.
-**/
-VOID
-EFIAPI
-SendApicEoi (
- VOID
- );
-
-/**
- Get the 32-bit address that a device should use to send a Message Signaled
- Interrupt (MSI) to the Local APIC of the currently executing processor.
-
- @return 32-bit address used to send an MSI to the Local APIC.
-**/
-UINT32
-EFIAPI
-GetApicMsiAddress (
- VOID
- );
-
-/**
- Get the 64-bit data value that a device should use to send a Message Signaled
- Interrupt (MSI) to the Local APIC of the currently executing processor.
-
- If Vector is not in range 0x10..0xFE, then ASSERT().
- If DeliveryMode is not supported, then ASSERT().
-
- @param Vector The 8-bit interrupt vector associated with the MSI.
- Must be in the range 0x10..0xFE
- @param DeliveryMode A 3-bit value that specifies how the recept of the MSI
- is handled. The only supported values are:
- 0: LOCAL_APIC_DELIVERY_MODE_FIXED
- 1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY
- 2: LOCAL_APIC_DELIVERY_MODE_SMI
- 4: LOCAL_APIC_DELIVERY_MODE_NMI
- 5: LOCAL_APIC_DELIVERY_MODE_INIT
- 7: LOCAL_APIC_DELIVERY_MODE_EXTINT
-
- @param LevelTriggered TRUE specifies a level triggered interrupt.
- FALSE specifies an edge triggered interrupt.
- @param AssertionLevel Ignored if LevelTriggered is FALSE.
- TRUE specifies a level triggered interrupt that active
- when the interrupt line is asserted.
- FALSE specifies a level triggered interrupt that active
- when the interrupt line is deasserted.
-
- @return 64-bit data value used to send an MSI to the Local APIC.
-**/
-UINT64
-EFIAPI
-GetApicMsiValue (
- IN UINT8 Vector,
- IN UINTN DeliveryMode,
- IN BOOLEAN LevelTriggered,
- IN BOOLEAN AssertionLevel
- );
-
-#endif
-
diff --git a/UefiCpuPkg/Include/Library/MtrrLib.h b/UefiCpuPkg/Include/Library/MtrrLib.h deleted file mode 100644 index e06fff7f01..0000000000 --- a/UefiCpuPkg/Include/Library/MtrrLib.h +++ /dev/null @@ -1,346 +0,0 @@ -/** @file
- MTRR setting library
-
- Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _MTRR_LIB_H_
-#define _MTRR_LIB_H_
-
-//
-// According to IA32 SDM, MTRRs number and msr offset are always consistent
-// for IA32 processor family
-//
-
-//
-// The semantics of below macro is MAX_MTRR_NUMBER_OF_VARIABLE_MTRR, the real number can be read out from MTRR_CAP register.
-//
-#define MTRR_NUMBER_OF_VARIABLE_MTRR 32
-//
-// Firmware need reserve 2 MTRR for OS
-//
-#define RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER 2
-
-#define MTRR_NUMBER_OF_FIXED_MTRR 11
-//
-// Below macro is deprecated, and should not be used.
-//
-#define FIRMWARE_VARIABLE_MTRR_NUMBER 6
-#define MTRR_LIB_IA32_MTRR_CAP 0x0FE
-#define MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK 0x0FF
-#define MTRR_LIB_IA32_MTRR_FIX64K_00000 0x250
-#define MTRR_LIB_IA32_MTRR_FIX16K_80000 0x258
-#define MTRR_LIB_IA32_MTRR_FIX16K_A0000 0x259
-#define MTRR_LIB_IA32_MTRR_FIX4K_C0000 0x268
-#define MTRR_LIB_IA32_MTRR_FIX4K_C8000 0x269
-#define MTRR_LIB_IA32_MTRR_FIX4K_D0000 0x26A
-#define MTRR_LIB_IA32_MTRR_FIX4K_D8000 0x26B
-#define MTRR_LIB_IA32_MTRR_FIX4K_E0000 0x26C
-#define MTRR_LIB_IA32_MTRR_FIX4K_E8000 0x26D
-#define MTRR_LIB_IA32_MTRR_FIX4K_F0000 0x26E
-#define MTRR_LIB_IA32_MTRR_FIX4K_F8000 0x26F
-#define MTRR_LIB_IA32_VARIABLE_MTRR_BASE 0x200
-//
-// Below macro is deprecated, and should not be used.
-//
-#define MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F
-#define MTRR_LIB_IA32_MTRR_DEF_TYPE 0x2FF
-#define MTRR_LIB_MSR_VALID_MASK 0xFFFFFFFFFULL
-#define MTRR_LIB_CACHE_VALID_ADDRESS 0xFFFFFF000ULL
-#define MTRR_LIB_CACHE_MTRR_ENABLED 0x800
-#define MTRR_LIB_CACHE_FIXED_MTRR_ENABLED 0x400
-
-//
-// Structure to describe a fixed MTRR
-//
-typedef struct {
- UINT32 Msr;
- UINT32 BaseAddress;
- UINT32 Length;
-} FIXED_MTRR;
-
-//
-// Structure to describe a variable MTRR
-//
-typedef struct {
- UINT64 BaseAddress;
- UINT64 Length;
- UINT64 Type;
- UINT32 Msr;
- BOOLEAN Valid;
- BOOLEAN Used;
-} VARIABLE_MTRR;
-
-//
-// Structure to hold base and mask pair for variable MTRR register
-//
-typedef struct _MTRR_VARIABLE_SETTING_ {
- UINT64 Base;
- UINT64 Mask;
-} MTRR_VARIABLE_SETTING;
-
-//
-// Array for variable MTRRs
-//
-typedef struct _MTRR_VARIABLE_SETTINGS_ {
- MTRR_VARIABLE_SETTING Mtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
-} MTRR_VARIABLE_SETTINGS;
-
-//
-// Array for fixed mtrrs
-//
-typedef struct _MTRR_FIXED_SETTINGS_ {
- UINT64 Mtrr[MTRR_NUMBER_OF_FIXED_MTRR];
-} MTRR_FIXED_SETTINGS;
-
-//
-// Structure to hold all MTRRs
-//
-typedef struct _MTRR_SETTINGS_ {
- MTRR_FIXED_SETTINGS Fixed;
- MTRR_VARIABLE_SETTINGS Variables;
- UINT64 MtrrDefType;
-} MTRR_SETTINGS;
-
-//
-// Memory cache types
-//
-typedef enum {
- CacheUncacheable = 0,
- CacheWriteCombining = 1,
- CacheWriteThrough = 4,
- CacheWriteProtected = 5,
- CacheWriteBack = 6
-} MTRR_MEMORY_CACHE_TYPE;
-
-#define MTRR_CACHE_UNCACHEABLE 0
-#define MTRR_CACHE_WRITE_COMBINING 1
-#define MTRR_CACHE_WRITE_THROUGH 4
-#define MTRR_CACHE_WRITE_PROTECTED 5
-#define MTRR_CACHE_WRITE_BACK 6
-#define MTRR_CACHE_INVALID_TYPE 7
-
-/**
- Returns the variable MTRR count for the CPU.
-
- @return Variable MTRR count
-
-**/
-UINT32
-EFIAPI
-GetVariableMtrrCount (
- VOID
- );
-
-/**
- Returns the firmware usable variable MTRR count for the CPU.
-
- @return Firmware usable variable MTRR count
-
-**/
-UINT32
-EFIAPI
-GetFirmwareVariableMtrrCount (
- VOID
- );
-
-/**
- This function attempts to set the attributes for a memory range.
-
- @param BaseAddress The physical address that is the start address of a memory region.
- @param Length The size in bytes of the memory region.
- @param Attributes The bit mask of attributes to set for the memory region.
-
- @retval RETURN_SUCCESS The attributes were set for the memory region.
- @retval RETURN_INVALID_PARAMETER Length is zero.
- @retval RETURN_UNSUPPORTED The processor does not support one or more bytes of the
- memory resource range specified by BaseAddress and Length.
- @retval RETURN_UNSUPPORTED The bit mask of attributes is not support for the memory resource
- range specified by BaseAddress and Length.
- @retval RETURN_ACCESS_DENIED The attributes for the memory resource range specified by
- BaseAddress and Length cannot be modified.
- @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
- the memory resource range.
-
-**/
-RETURN_STATUS
-EFIAPI
-MtrrSetMemoryAttribute (
- IN PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN MTRR_MEMORY_CACHE_TYPE Attribute
- );
-
-
-/**
- This function will get the memory cache type of the specific address.
- This function is mainly for debugging purposes.
-
- @param Address The specific address
-
- @return The memory cache type of the specific address
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-EFIAPI
-MtrrGetMemoryAttribute (
- IN PHYSICAL_ADDRESS Address
- );
-
-
-/**
- This function will get the raw value in variable MTRRs
-
- @param VariableSettings A buffer to hold variable MTRRs content.
-
- @return The buffer point to MTRR_VARIABLE_SETTINGS in which holds the content of the variable mtrr
-
-**/
-MTRR_VARIABLE_SETTINGS*
-EFIAPI
-MtrrGetVariableMtrr (
- OUT MTRR_VARIABLE_SETTINGS *VariableSettings
- );
-
-
-/**
- This function sets fixed MTRRs
-
- @param VariableSettings A buffer to hold variable MTRRs content.
-
- @return The pointer of VariableSettings
-
-**/
-MTRR_VARIABLE_SETTINGS*
-EFIAPI
-MtrrSetVariableMtrr (
- IN MTRR_VARIABLE_SETTINGS *VariableSettings
- );
-
-
-/**
- This function gets the content in fixed MTRRs
-
- @param FixedSettings A buffer to hold fixed MTRRs content.
-
- @return The pointer of FixedSettings
-
-**/
-MTRR_FIXED_SETTINGS*
-EFIAPI
-MtrrGetFixedMtrr (
- OUT MTRR_FIXED_SETTINGS *FixedSettings
- );
-
-
-/**
- This function sets fixed MTRRs
-
- @param FixedSettings A buffer holding fixed MTRRs content.
-
- @return The pointer of FixedSettings
-
-**/
-MTRR_FIXED_SETTINGS*
-EFIAPI
-MtrrSetFixedMtrr (
- IN MTRR_FIXED_SETTINGS *FixedSettings
- );
-
-
-/**
- This function gets the content in all MTRRs (variable and fixed)
-
- @param MtrrSetting A buffer to hold all MTRRs content.
-
- @return The pointer of MtrrSetting
-
-**/
-MTRR_SETTINGS *
-EFIAPI
-MtrrGetAllMtrrs (
- OUT MTRR_SETTINGS *MtrrSetting
- );
-
-
-/**
- This function sets all MTRRs (variable and fixed)
-
- @param MtrrSetting A buffer to hold all MTRRs content.
-
- @return The pointer of MtrrSetting
-
-**/
-MTRR_SETTINGS *
-EFIAPI
-MtrrSetAllMtrrs (
- IN MTRR_SETTINGS *MtrrSetting
- );
-
-
-/**
- Get the attribute of variable MTRRs.
-
- This function shadows the content of variable MTRRs into
- an internal array: VariableMtrr
-
- @param MtrrValidBitsMask The mask for the valid bit of the MTRR
- @param MtrrValidAddressMask The valid address mask for MTRR since the base address in
- MTRR must align to 4K, so valid address mask equal to
- MtrrValidBitsMask & 0xfffffffffffff000ULL
- @param VariableMtrr The array to shadow variable MTRRs content
- @return The ruturn value of this paramter indicates the number of
- MTRRs which has been used.
-**/
-UINT32
-EFIAPI
-MtrrGetMemoryAttributeInVariableMtrr (
- IN UINT64 MtrrValidBitsMask,
- IN UINT64 MtrrValidAddressMask,
- OUT VARIABLE_MTRR *VariableMtrr
- );
-
-
-/**
- This function prints all MTRRs for debugging.
-**/
-VOID
-EFIAPI
-MtrrDebugPrintAllMtrrs (
- VOID
- );
-
-/**
- Checks if MTRR is supported.
-
- @retval TRUE MTRR is supported.
- @retval FALSE MTRR is not supported.
-
-**/
-BOOLEAN
-EFIAPI
-IsMtrrSupported (
- VOID
- );
-
-/**
- Returns the default MTRR cache type for the system.
-
- @return The default MTRR cache type.
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-EFIAPI
-MtrrGetDefaultMemoryType (
- VOID
- );
-
-#endif // _MTRR_LIB_H_
diff --git a/UefiCpuPkg/Include/Library/UefiCpuLib.h b/UefiCpuPkg/Include/Library/UefiCpuLib.h deleted file mode 100644 index 561d579968..0000000000 --- a/UefiCpuPkg/Include/Library/UefiCpuLib.h +++ /dev/null @@ -1,38 +0,0 @@ -/** @file
- Public header file for UEFI CPU library class.
-
- This library class defines some routines that are generic for IA32 family CPU
- to be UEFI specification compliant.
-
- Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __UEFI_CPU_LIB_H__
-#define __UEFI_CPU_LIB_H__
-
-
-
-/**
- Initializes floating point units for requirement of UEFI specification.
-
- This function initializes floating-point control word to 0x027F (all exceptions
- masked,double-precision, round-to-nearest) and multimedia-extensions control word
- (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
- for masked underflow).
-
-**/
-VOID
-EFIAPI
-InitializeFloatingPointUnits (
- VOID
- );
-
-#endif
diff --git a/UefiCpuPkg/Include/Register/LocalApic.h b/UefiCpuPkg/Include/Register/LocalApic.h deleted file mode 100644 index cf335a69d9..0000000000 --- a/UefiCpuPkg/Include/Register/LocalApic.h +++ /dev/null @@ -1,220 +0,0 @@ -/** @file
- IA32 Local APIC Definitions.
-
- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __LOCAL_APIC_H__
-#define __LOCAL_APIC_H__
-
-//
-// Definitions for IA32 architectural MSRs
-//
-#define MSR_IA32_APIC_BASE_ADDRESS 0x1B
-
-//
-// Definitions for CPUID instruction
-//
-#define CPUID_SIGNATURE 0x0
-#define CPUID_VERSION_INFO 0x1
-#define CPUID_CACHE_PARAMS 0x4
-#define CPUID_EXTENDED_TOPOLOGY 0xB
-#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID 0x0
-#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT 0x1
-#define CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE 0x2
-#define CPUID_EXTENDED_FUNCTION 0x80000000
-#define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008
-
-//
-// Definition for Local APIC registers and related values
-//
-#define XAPIC_ID_OFFSET 0x20
-#define XAPIC_VERSION_OFFSET 0x30
-#define XAPIC_EOI_OFFSET 0x0b0
-#define XAPIC_ICR_DFR_OFFSET 0x0e0
-#define XAPIC_SPURIOUS_VECTOR_OFFSET 0x0f0
-#define XAPIC_ICR_LOW_OFFSET 0x300
-#define XAPIC_ICR_HIGH_OFFSET 0x310
-#define XAPIC_LVT_TIMER_OFFSET 0x320
-#define XAPIC_LVT_LINT0_OFFSET 0x350
-#define XAPIC_LVT_LINT1_OFFSET 0x360
-#define XAPIC_TIMER_INIT_COUNT_OFFSET 0x380
-#define XAPIC_TIMER_CURRENT_COUNT_OFFSET 0x390
-#define XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET 0x3E0
-
-#define X2APIC_MSR_BASE_ADDRESS 0x800
-#define X2APIC_MSR_ICR_ADDRESS 0x830
-
-#define LOCAL_APIC_DELIVERY_MODE_FIXED 0
-#define LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY 1
-#define LOCAL_APIC_DELIVERY_MODE_SMI 2
-#define LOCAL_APIC_DELIVERY_MODE_NMI 4
-#define LOCAL_APIC_DELIVERY_MODE_INIT 5
-#define LOCAL_APIC_DELIVERY_MODE_STARTUP 6
-#define LOCAL_APIC_DELIVERY_MODE_EXTINT 7
-
-#define LOCAL_APIC_DESTINATION_SHORTHAND_NO_SHORTHAND 0
-#define LOCAL_APIC_DESTINATION_SHORTHAND_SELF 1
-#define LOCAL_APIC_DESTINATION_SHORTHAND_ALL_INCLUDING_SELF 2
-#define LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF 3
-
-typedef union {
- struct {
- UINT32 Reserved0:8; ///< Reserved.
- UINT32 Bsp:1; ///< Processor is BSP.
- UINT32 Reserved1:1; ///< Reserved.
- UINT32 Extd:1; ///< Enable x2APIC mode.
- UINT32 En:1; ///< xAPIC global enable/disable.
- UINT32 ApicBaseLow:20; ///< APIC Base physical address. The actual field width depends on physical address width.
- UINT32 ApicBaseHigh:32;
- } Bits;
- UINT64 Uint64;
-} MSR_IA32_APIC_BASE;
-
-//
-// Local APIC Version Register.
-//
-typedef union {
- struct {
- UINT32 Version:8; ///< The version numbers of the local APIC.
- UINT32 Reserved0:8; ///< Reserved.
- UINT32 MaxLvtEntry:8; ///< Number of LVT entries minus 1.
- UINT32 EoiBroadcastSuppression:1; ///< 1 if EOI-broadcast suppression supported.
- UINT32 Reserved1:7; ///< Reserved.
- } Bits;
- UINT32 Uint32;
-} LOCAL_APIC_VERSION;
-
-//
-// Low half of Interrupt Command Register (ICR).
-//
-typedef union {
- struct {
- UINT32 Vector:8; ///< The vector number of the interrupt being sent.
- UINT32 DeliveryMode:3; ///< Specifies the type of IPI to be sent.
- UINT32 DestinationMode:1; ///< 0: physical destination mode, 1: logical destination mode.
- UINT32 DeliveryStatus:1; ///< Indicates the IPI delivery status. This field is reserved in x2APIC mode.
- UINT32 Reserved0:1; ///< Reserved.
- UINT32 Level:1; ///< 0 for the INIT level de-assert delivery mode. Otherwise 1.
- UINT32 TriggerMode:1; ///< 0: edge, 1: level when using the INIT level de-assert delivery mode.
- UINT32 Reserved1:2; ///< Reserved.
- UINT32 DestinationShorthand:2; ///< A shorthand notation to specify the destination of the interrupt.
- UINT32 Reserved2:12; ///< Reserved.
- } Bits;
- UINT32 Uint32;
-} LOCAL_APIC_ICR_LOW;
-
-//
-// High half of Interrupt Command Register (ICR)
-//
-typedef union {
- struct {
- UINT32 Reserved0:24; ///< Reserved.
- UINT32 Destination:8; ///< Specifies the target processor or processors in xAPIC mode.
- } Bits;
- UINT32 Uint32; ///< Destination field expanded to 32-bit in x2APIC mode.
-} LOCAL_APIC_ICR_HIGH;
-
-//
-// Spurious-Interrupt Vector Register (SVR)
-//
-typedef union {
- struct {
- UINT32 SpuriousVector:8; ///< Spurious Vector.
- UINT32 SoftwareEnable:1; ///< APIC Software Enable/Disable.
- UINT32 FocusProcessorChecking:1; ///< Focus Processor Checking.
- UINT32 Reserved0:2; ///< Reserved.
- UINT32 EoiBroadcastSuppression:1; ///< EOI-Broadcast Suppression.
- UINT32 Reserved1:19; ///< Reserved.
- } Bits;
- UINT32 Uint32;
-} LOCAL_APIC_SVR;
-
-//
-// Divide Configuration Register (DCR)
-//
-typedef union {
- struct {
- UINT32 DivideValue1:2; ///< Low 2 bits of the divide value.
- UINT32 Reserved0:1; ///< Always 0.
- UINT32 DivideValue2:1; ///< Highest 1 bit of the divide value.
- UINT32 Reserved1:28; ///< Reserved.
- } Bits;
- UINT32 Uint32;
-} LOCAL_APIC_DCR;
-
-//
-// LVT Timer Register
-//
-typedef union {
- struct {
- UINT32 Vector:8; ///< The vector number of the interrupt being sent.
- UINT32 Reserved0:4; ///< Reserved.
- UINT32 DeliveryStatus:1; ///< 0: Idle, 1: send pending.
- UINT32 Reserved1:3; ///< Reserved.
- UINT32 Mask:1; ///< 0: Not masked, 1: Masked.
- UINT32 TimerMode:1; ///< 0: One-shot, 1: Periodic.
- UINT32 Reserved2:14; ///< Reserved.
- } Bits;
- UINT32 Uint32;
-} LOCAL_APIC_LVT_TIMER;
-
-//
-// LVT LINT0/LINT1 Register
-//
-typedef union {
- struct {
- UINT32 Vector:8; ///< The vector number of the interrupt being sent.
- UINT32 DeliveryMode:3; ///< Specifies the type of interrupt to be sent.
- UINT32 Reserved0:1; ///< Reserved.
- UINT32 DeliveryStatus:1; ///< 0: Idle, 1: send pending.
- UINT32 InputPinPolarity:1; ///< Interrupt Input Pin Polarity.
- UINT32 RemoteIrr:1; ///< RO. Set when the local APIC accepts the interrupt and reset when an EOI is received.
- UINT32 TriggerMode:1; ///< 0:edge, 1:level.
- UINT32 Mask:1; ///< 0: Not masked, 1: Masked.
- UINT32 Reserved1:15; ///< Reserved.
- } Bits;
- UINT32 Uint32;
-} LOCAL_APIC_LVT_LINT;
-
-//
-// MSI Address Register
-//
-typedef union {
- struct {
- UINT32 Reserved0:2; ///< Reserved
- UINT32 DestinationMode:1; ///< Specifies the Destination Mode.
- UINT32 RedirectionHint:1; ///< Specifies the Redirection Hint.
- UINT32 Reserved1:8; ///< Reserved.
- UINT32 DestinationId:8; ///< Specifies the Destination ID.
- UINT32 BaseAddress:12; ///< Must be 0FEEH
- } Bits;
- UINT32 Uint32;
-} LOCAL_APIC_MSI_ADDRESS;
-
-//
-// MSI Address Register
-//
-typedef union {
- struct {
- UINT32 Vector:8; ///< Interrupt vector in range 010h..0FEH
- UINT32 DeliveryMode:3; ///< Specifies the type of interrupt to be sent.
- UINT32 Reserved0:3; ///< Reserved.
- UINT32 Level:1; ///< 0:Deassert, 1:Assert. Ignored for Edge triggered interrupts.
- UINT32 TriggerMode:1; ///< 0:Edge, 1:Level.
- UINT32 Reserved1:16; ///< Reserved.
- UINT32 Reserved2:32; ///< Reserved.
- } Bits;
- UINT64 Uint64;
-} LOCAL_APIC_MSI_DATA;
-
-#endif
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf deleted file mode 100644 index 7cf7d8ca80..0000000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf +++ /dev/null @@ -1,46 +0,0 @@ -## @file
-# This library defines some routines that are generic for IA32 family CPU.
-#
-# The library routines are UEFI specification compliant.
-#
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BaseUefiCpuLib
- MODULE_UNI_FILE = BaseUefiCpuLib.uni
- FILE_GUID = 34C24FD7-7A90-45c2-89FD-946473D9CE98
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = UefiCpuLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources.IA32]
- Ia32/InitializeFpu.asm
- Ia32/InitializeFpu.S
-
-[Sources.X64]
- X64/InitializeFpu.asm
- X64/InitializeFpu.S
-
-[Packages]
- MdePkg/MdePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- UefiCpuLib
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni Binary files differdeleted file mode 100644 index 951fd46a83..0000000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S deleted file mode 100644 index 4972bc2e7f..0000000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S +++ /dev/null @@ -1,73 +0,0 @@ -#------------------------------------------------------------------------------
-#*
-#* Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
-#* This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#*
-#------------------------------------------------------------------------------
-
-#
-# Float control word initial value:
-# all exceptions masked, double-precision, round-to-nearest
-#
-ASM_PFX(mFpuControlWord): .word 0x027F
-#
-# Multimedia-extensions control word:
-# all exceptions masked, round-to-nearest, flush to zero for masked underflow
-#
-ASM_PFX(mMmxControlWord): .long 0x01F80
-
-#
-# Initializes floating point units for requirement of UEFI specification.
-#
-# This function initializes floating-point control word to 0x027F (all exceptions
-# masked,double-precision, round-to-nearest) and multimedia-extensions control word
-# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-# for masked underflow).
-#
-ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
-ASM_PFX(InitializeFloatingPointUnits):
-
- pushl %ebx
-
- #
- # Initialize floating point units
- #
- finit
- fldcw ASM_PFX(mFpuControlWord)
-
- #
- # Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
- # whether the processor supports SSE instruction.
- #
- movl $1, %eax
- cpuid
- btl $25, %edx
- jnc Done
-
- #
- # Set OSFXSR bit 9 in CR4
- #
- movl %cr4, %eax
- or $0x200, %eax
- movl %eax, %cr4
-
- #
- # The processor should support SSE instruction and we can use
- # ldmxcsr instruction
- #
- ldmxcsr ASM_PFX(mMmxControlWord)
-
-Done:
- popl %ebx
-
- ret
-
-#END
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm deleted file mode 100644 index 3c31da98f6..0000000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm +++ /dev/null @@ -1,79 +0,0 @@ -;------------------------------------------------------------------------------
-;*
-;* Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
-;* This program and the accompanying materials
-;* are licensed and made available under the terms and conditions of the BSD License
-;* which accompanies this distribution. The full text of the license may be found at
-;* http://opensource.org/licenses/bsd-license.php
-;*
-;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*
-;------------------------------------------------------------------------------
-
-
- .686
- .model flat,C
- .const
-;
-; Float control word initial value:
-; all exceptions masked, double-precision, round-to-nearest
-;
-mFpuControlWord DW 027Fh
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord DD 01F80h
-
- .xmm
- .code
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-InitializeFloatingPointUnits PROC PUBLIC
-
- push ebx
-
- ;
- ; Initialize floating point units
- ;
- finit
- fldcw mFpuControlWord
-
- ;
- ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
- ; whether the processor supports SSE instruction.
- ;
- mov eax, 1
- cpuid
- bt edx, 25
- jnc Done
-
- ;
- ; Set OSFXSR bit 9 in CR4
- ;
- mov eax, cr4
- or eax, BIT9
- mov cr4, eax
-
- ;
- ; The processor should support SSE instruction and we can use
- ; ldmxcsr instruction
- ;
- ldmxcsr mMmxControlWord
-Done:
- pop ebx
-
- ret
-
-InitializeFloatingPointUnits ENDP
-
-END
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S deleted file mode 100644 index 97d9f72338..0000000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S +++ /dev/null @@ -1,57 +0,0 @@ -#------------------------------------------------------------------------------
-#*
-#* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-#* This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#*
-#------------------------------------------------------------------------------
-
-#
-# Initializes floating point units for requirement of UEFI specification.
-#
-# This function initializes floating-point control word to 0x037F (all exceptions
-# masked,double-extended-precision, round-to-nearest) and multimedia-extensions control word
-# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-# for masked underflow).
-#
-ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
-ASM_PFX(InitializeFloatingPointUnits):
-
- #
- # Initialize floating point units
- #
- finit
-
- #
- # Float control word initial value:
- # all exceptions masked, double-precision, round-to-nearest
- #
- pushq $0x037F
- lea (%rsp), %rax
- fldcw (%rax)
- popq %rax
-
- #
- # Set OSFXSR bit 9 in CR4
- #
- movq %cr4, %rax
- or $0x200, %rax
- movq %rax, %cr4
-
- #
- # Multimedia-extensions control word:
- # all exceptions masked, round-to-nearest, flush to zero for masked underflow
- #
- pushq $0x01F80
- lea (%rsp), %rax
- ldmxcsr (%rax)
- popq %rax
-
- ret
-
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm deleted file mode 100644 index 331af15cc6..0000000000 --- a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm +++ /dev/null @@ -1,62 +0,0 @@ -;------------------------------------------------------------------------------
-;*
-;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
-;* This program and the accompanying materials
-;* are licensed and made available under the terms and conditions of the BSD License
-;* which accompanies this distribution. The full text of the license may be found at
-;* http://opensource.org/licenses/bsd-license.php
-;*
-;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;*
-;*
-;------------------------------------------------------------------------------
-
-
-.const
-;
-; Float control word initial value:
-; all exceptions masked, double-extended-precision, round-to-nearest
-;
-mFpuControlWord DW 037Fh
-;
-; Multimedia-extensions control word:
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow
-;
-mMmxControlWord DD 01F80h
-
-.code
-
-
-;
-; Initializes floating point units for requirement of UEFI specification.
-;
-; This function initializes floating-point control word to 0x027F (all exceptions
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
-; for masked underflow).
-;
-InitializeFloatingPointUnits PROC PUBLIC
-
- ;
- ; Initialize floating point units
- ;
- ; The following opcodes stand for instruction 'finit'
- ; to be supported by some 64-bit assemblers
- ;
- DB 9Bh, 0DBh, 0E3h
- fldcw mFpuControlWord
-
- ;
- ; Set OSFXSR bit 9 in CR4
- ;
- mov rax, cr4
- or rax, BIT9
- mov cr4, rax
-
- ldmxcsr mMmxControlWord
-
- ret
-InitializeFloatingPointUnits ENDP
-
-END
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c deleted file mode 100644 index f219b07888..0000000000 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c +++ /dev/null @@ -1,902 +0,0 @@ -/** @file
- Local APIC Library.
-
- This local APIC library instance supports xAPIC mode only.
-
- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Register/LocalApic.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/IoLib.h>
-#include <Library/TimerLib.h>
-#include <Library/PcdLib.h>
-
-//
-// Library internal functions
-//
-
-/**
- Determine if the CPU supports the Local APIC Base Address MSR.
-
- @retval TRUE The CPU supports the Local APIC Base Address MSR.
- @retval FALSE The CPU does not support the Local APIC Base Address MSR.
-
-**/
-BOOLEAN
-LocalApicBaseAddressMsrSupported (
- VOID
- )
-{
- UINT32 RegEax;
- UINTN FamilyId;
-
- AsmCpuid (1, &RegEax, NULL, NULL, NULL);
- FamilyId = BitFieldRead32 (RegEax, 8, 11);
- if (FamilyId == 0x04 || FamilyId == 0x05) {
- //
- // CPUs with a FamilyId of 0x04 or 0x05 do not support the
- // Local APIC Base Address MSR
- //
- return FALSE;
- }
- return TRUE;
-}
-
-/**
- Retrieve the base address of local APIC.
-
- @return The base address of local APIC.
-
-**/
-UINTN
-EFIAPI
-GetLocalApicBaseAddress (
- VOID
- )
-{
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- if (!LocalApicBaseAddressMsrSupported ()) {
- //
- // If CPU does not support Local APIC Base Address MSR, then retrieve
- // Local APIC Base Address from PCD
- //
- return PcdGet32 (PcdCpuLocalApicBaseAddress);
- }
-
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
-
- return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHigh, 32)) +
- (((UINTN)ApicBaseMsr.Bits.ApicBaseLow) << 12);
-}
-
-/**
- Set the base address of local APIC.
-
- If BaseAddress is not aligned on a 4KB boundary, then ASSERT().
-
- @param[in] BaseAddress Local APIC base address to be set.
-
-**/
-VOID
-EFIAPI
-SetLocalApicBaseAddress (
- IN UINTN BaseAddress
- )
-{
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);
-
- if (!LocalApicBaseAddressMsrSupported ()) {
- //
- // Ignore set request if the CPU does not support APIC Base Address MSR
- //
- return;
- }
-
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
-
- ApicBaseMsr.Bits.ApicBaseLow = (UINT32) (BaseAddress >> 12);
- ApicBaseMsr.Bits.ApicBaseHigh = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));
-
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
-}
-
-/**
- Read from a local APIC register.
-
- This function reads from a local APIC register either in xAPIC or x2APIC mode.
- It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
- accessed using multiple 32-bit loads or stores, so this function only performs
- 32-bit read.
-
- @param MmioOffset The MMIO offset of the local APIC register in xAPIC mode.
- It must be 16-byte aligned.
-
- @return 32-bit Value read from the register.
-**/
-UINT32
-EFIAPI
-ReadLocalApicReg (
- IN UINTN MmioOffset
- )
-{
- ASSERT ((MmioOffset & 0xf) == 0);
- ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-
- return MmioRead32 (GetLocalApicBaseAddress() + MmioOffset);
-}
-
-/**
- Write to a local APIC register.
-
- This function writes to a local APIC register either in xAPIC or x2APIC mode.
- It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
- accessed using multiple 32-bit loads or stores, so this function only performs
- 32-bit write.
-
- if the register index is invalid or unsupported in current APIC mode, then ASSERT.
-
- @param MmioOffset The MMIO offset of the local APIC register in xAPIC mode.
- It must be 16-byte aligned.
- @param Value Value to be written to the register.
-**/
-VOID
-EFIAPI
-WriteLocalApicReg (
- IN UINTN MmioOffset,
- IN UINT32 Value
- )
-{
- ASSERT ((MmioOffset & 0xf) == 0);
- ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-
- MmioWrite32 (GetLocalApicBaseAddress() + MmioOffset, Value);
-}
-
-/**
- Send an IPI by writing to ICR.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param IcrLow 32-bit value to be written to the low half of ICR.
- @param ApicId APIC ID of the target processor if this IPI is targeted for a specific processor.
-**/
-VOID
-SendIpi (
- IN UINT32 IcrLow,
- IN UINT32 ApicId
- )
-{
- LOCAL_APIC_ICR_LOW IcrLowReg;
- UINT32 IcrHigh;
- BOOLEAN InterruptState;
-
- ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
- ASSERT (ApicId <= 0xff);
-
- InterruptState = SaveAndDisableInterrupts ();
-
- //
- // Save existing contents of ICR high 32 bits
- //
- IcrHigh = ReadLocalApicReg (XAPIC_ICR_HIGH_OFFSET);
-
- //
- // Wait for DeliveryStatus clear in case a previous IPI
- // is still being sent
- //
- do {
- IcrLowReg.Uint32 = ReadLocalApicReg (XAPIC_ICR_LOW_OFFSET);
- } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
- //
- // For xAPIC, the act of writing to the low doubleword of the ICR causes the IPI to be sent.
- //
- WriteLocalApicReg (XAPIC_ICR_HIGH_OFFSET, ApicId << 24);
- WriteLocalApicReg (XAPIC_ICR_LOW_OFFSET, IcrLow);
-
- //
- // Wait for DeliveryStatus clear again
- //
- do {
- IcrLowReg.Uint32 = ReadLocalApicReg (XAPIC_ICR_LOW_OFFSET);
- } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
- //
- // And restore old contents of ICR high
- //
- WriteLocalApicReg (XAPIC_ICR_HIGH_OFFSET, IcrHigh);
-
- SetInterruptState (InterruptState);
-
-}
-
-//
-// Library API implementation functions
-//
-
-/**
- Get the current local APIC mode.
-
- If local APIC is disabled, then ASSERT.
-
- @retval LOCAL_APIC_MODE_XAPIC current APIC mode is xAPIC.
- @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.
-**/
-UINTN
-EFIAPI
-GetApicMode (
- VOID
- )
-{
- DEBUG_CODE (
- {
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- //
- // Check to see if the CPU supports the APIC Base Address MSR
- //
- if (LocalApicBaseAddressMsrSupported ()) {
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- //
- // Local APIC should have been enabled
- //
- ASSERT (ApicBaseMsr.Bits.En != 0);
- ASSERT (ApicBaseMsr.Bits.Extd == 0);
- }
- }
- );
- return LOCAL_APIC_MODE_XAPIC;
-}
-
-/**
- Set the current local APIC mode.
-
- If the specified local APIC mode is not valid, then ASSERT.
- If the specified local APIC mode can't be set as current, then ASSERT.
-
- @param ApicMode APIC mode to be set.
-
- @note This API must not be called from an interrupt handler or SMI handler.
- It may result in unpredictable behavior.
-**/
-VOID
-EFIAPI
-SetApicMode (
- IN UINTN ApicMode
- )
-{
- ASSERT (ApicMode == LOCAL_APIC_MODE_XAPIC);
- ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-}
-
-/**
- Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
-
- In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
- In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
- the 32-bit local APIC ID is returned as initial APIC ID.
-
- @return 32-bit initial local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetInitialApicId (
- VOID
- )
-{
- UINT32 ApicId;
- UINT32 MaxCpuIdIndex;
- UINT32 RegEbx;
-
- ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-
- //
- // Get the max index of basic CPUID
- //
- AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
-
- //
- // If CPUID Leaf B is supported,
- // Then the initial 32-bit APIC ID = CPUID.0BH:EDX
- // Else the initial 8-bit APIC ID = CPUID.1:EBX[31:24]
- //
- if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
- AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, NULL, NULL, NULL, &ApicId);
- return ApicId;
- }
-
- AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);
- return RegEbx >> 24;
-}
-
-/**
- Get the local APIC ID of the executing processor.
-
- @return 32-bit local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetApicId (
- VOID
- )
-{
- UINT32 ApicId;
-
- ASSERT (GetApicMode () == LOCAL_APIC_MODE_XAPIC);
-
- if ((ApicId = GetInitialApicId ()) < 0x100) {
- //
- // If the initial local APIC ID is less 0x100, read APIC ID from
- // XAPIC_ID_OFFSET, otherwise return the initial local APIC ID.
- //
- ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
- ApicId >>= 24;
- }
- return ApicId;
-}
-
-/**
- Get the value of the local APIC version register.
-
- @return the value of the local APIC version register.
-**/
-UINT32
-EFIAPI
-GetApicVersion (
- VOID
- )
-{
- return ReadLocalApicReg (XAPIC_VERSION_OFFSET);
-}
-
-/**
- Send a Fixed IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId The local APIC ID of the target processor.
- @param Vector The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpi (
- IN UINT32 ApicId,
- IN UINT8 Vector
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.Vector = Vector;
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send a Fixed IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-
- @param Vector The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpiAllExcludingSelf (
- IN UINT8 Vector
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- IcrLow.Bits.Vector = Vector;
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Send a SMI IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendSmiIpi (
- IN UINT32 ApicId
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
- IcrLow.Bits.Level = 1;
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send a SMI IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-**/
-VOID
-EFIAPI
-SendSmiIpiAllExcludingSelf (
- VOID
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Send an INIT IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendInitIpi (
- IN UINT32 ApicId
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
- IcrLow.Bits.Level = 1;
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send an INIT IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-**/
-VOID
-EFIAPI
-SendInitIpiAllExcludingSelf (
- VOID
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- if StartupRoutine >= 1M, then ASSERT.
- if StartupRoutine is not multiple of 4K, then ASSERT.
-
- @param ApicId Specify the local APIC ID of the target processor.
- @param StartupRoutine Points to a start-up routine which is below 1M physical
- address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipi (
- IN UINT32 ApicId,
- IN UINT32 StartupRoutine
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- ASSERT (StartupRoutine < 0x100000);
- ASSERT ((StartupRoutine & 0xfff) == 0);
-
- SendInitIpi (ApicId);
- MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
- IcrLow.Uint32 = 0;
- IcrLow.Bits.Vector = (StartupRoutine >> 12);
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
- IcrLow.Bits.Level = 1;
- SendIpi (IcrLow.Uint32, ApicId);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-
- if StartupRoutine >= 1M, then ASSERT.
- if StartupRoutine is not multiple of 4K, then ASSERT.
-
- @param StartupRoutine Points to a start-up routine which is below 1M physical
- address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipiAllExcludingSelf (
- IN UINT32 StartupRoutine
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- ASSERT (StartupRoutine < 0x100000);
- ASSERT ((StartupRoutine & 0xfff) == 0);
-
- SendInitIpiAllExcludingSelf ();
- MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
- IcrLow.Uint32 = 0;
- IcrLow.Bits.Vector = (StartupRoutine >> 12);
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- SendIpi (IcrLow.Uint32, 0);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Programming Virtual Wire Mode.
-
- This function programs the local APIC for virtual wire mode following
- the example described in chapter A.3 of the MP 1.4 spec.
-
- IOxAPIC is not involved in this type of virtual wire mode.
-**/
-VOID
-EFIAPI
-ProgramVirtualWireMode (
- VOID
- )
-{
- LOCAL_APIC_SVR Svr;
- LOCAL_APIC_LVT_LINT Lint;
-
- //
- // Enable the APIC via SVR and set the spurious interrupt to use Int 00F.
- //
- Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
- Svr.Bits.SpuriousVector = 0xf;
- Svr.Bits.SoftwareEnable = 1;
- WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-
- //
- // Program the LINT0 vector entry as ExtInt. Not masked, edge, active high.
- //
- Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
- Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_EXTINT;
- Lint.Bits.InputPinPolarity = 0;
- Lint.Bits.TriggerMode = 0;
- Lint.Bits.Mask = 0;
- WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, Lint.Uint32);
-
- //
- // Program the LINT0 vector entry as NMI. Not masked, edge, active high.
- //
- Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
- Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_NMI;
- Lint.Bits.InputPinPolarity = 0;
- Lint.Bits.TriggerMode = 0;
- Lint.Bits.Mask = 0;
- WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, Lint.Uint32);
-}
-
-/**
- Disable LINT0 & LINT1 interrupts.
-
- This function sets the mask flag in the LVT LINT0 & LINT1 registers.
-**/
-VOID
-EFIAPI
-DisableLvtInterrupts (
- VOID
- )
-{
- LOCAL_APIC_LVT_LINT LvtLint;
-
- LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
- LvtLint.Bits.Mask = 1;
- WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, LvtLint.Uint32);
-
- LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
- LvtLint.Bits.Mask = 1;
- WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, LvtLint.Uint32);
-}
-
-/**
- Read the initial count value from the init-count register.
-
- @return The initial count value read from the init-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerInitCount (
- VOID
- )
-{
- return ReadLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET);
-}
-
-/**
- Read the current count value from the current-count register.
-
- @return The current count value read from the current-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerCurrentCount (
- VOID
- )
-{
- return ReadLocalApicReg (XAPIC_TIMER_CURRENT_COUNT_OFFSET);
-}
-
-/**
- Initialize the local APIC timer.
-
- The local APIC timer is initialized and enabled.
-
- @param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
- If it is 0, then use the current divide value in the DCR.
- @param InitCount The initial count value.
- @param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
- @param Vector The timer interrupt vector number.
-**/
-VOID
-EFIAPI
-InitializeApicTimer (
- IN UINTN DivideValue,
- IN UINT32 InitCount,
- IN BOOLEAN PeriodicMode,
- IN UINT8 Vector
- )
-{
- LOCAL_APIC_SVR Svr;
- LOCAL_APIC_DCR Dcr;
- LOCAL_APIC_LVT_TIMER LvtTimer;
- UINT32 Divisor;
-
- //
- // Ensure local APIC is in software-enabled state.
- //
- Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
- Svr.Bits.SoftwareEnable = 1;
- WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-
- //
- // Program init-count register.
- //
- WriteLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET, InitCount);
-
- if (DivideValue != 0) {
- ASSERT (DivideValue <= 128);
- ASSERT (DivideValue == GetPowerOfTwo32((UINT32)DivideValue));
- Divisor = (UINT32)((HighBitSet32 ((UINT32)DivideValue) - 1) & 0x7);
-
- Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
- Dcr.Bits.DivideValue1 = (Divisor & 0x3);
- Dcr.Bits.DivideValue2 = (Divisor >> 2);
- WriteLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET, Dcr.Uint32);
- }
-
- //
- // Enable APIC timer interrupt with specified timer mode.
- //
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- if (PeriodicMode) {
- LvtTimer.Bits.TimerMode = 1;
- } else {
- LvtTimer.Bits.TimerMode = 0;
- }
- LvtTimer.Bits.Mask = 0;
- LvtTimer.Bits.Vector = Vector;
- WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
- Get the state of the local APIC timer.
-
- @param DivideValue Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
- @param PeriodicMode Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
- @param Vector Return the timer interrupt vector number.
-**/
-VOID
-EFIAPI
-GetApicTimerState (
- OUT UINTN *DivideValue OPTIONAL,
- OUT BOOLEAN *PeriodicMode OPTIONAL,
- OUT UINT8 *Vector OPTIONAL
- )
-{
- UINT32 Divisor;
- LOCAL_APIC_DCR Dcr;
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- if (DivideValue != NULL) {
- Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
- Divisor = Dcr.Bits.DivideValue1 | (Dcr.Bits.DivideValue2 << 2);
- Divisor = (Divisor + 1) & 0x7;
- *DivideValue = ((UINTN)1) << Divisor;
- }
-
- if (PeriodicMode != NULL || Vector != NULL) {
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- if (PeriodicMode != NULL) {
- if (LvtTimer.Bits.TimerMode == 1) {
- *PeriodicMode = TRUE;
- } else {
- *PeriodicMode = FALSE;
- }
- }
- if (Vector != NULL) {
- *Vector = (UINT8) LvtTimer.Bits.Vector;
- }
- }
-}
-
-/**
- Enable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-EnableApicTimerInterrupt (
- VOID
- )
-{
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- LvtTimer.Bits.Mask = 0;
- WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
- Disable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-DisableApicTimerInterrupt (
- VOID
- )
-{
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- LvtTimer.Bits.Mask = 1;
- WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
- Get the local APIC timer interrupt state.
-
- @retval TRUE The local APIC timer interrupt is enabled.
- @retval FALSE The local APIC timer interrupt is disabled.
-**/
-BOOLEAN
-EFIAPI
-GetApicTimerInterruptState (
- VOID
- )
-{
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- return (BOOLEAN)(LvtTimer.Bits.Mask == 0);
-}
-
-/**
- Send EOI to the local APIC.
-**/
-VOID
-EFIAPI
-SendApicEoi (
- VOID
- )
-{
- WriteLocalApicReg (XAPIC_EOI_OFFSET, 0);
-}
-
-/**
- Get the 32-bit address that a device should use to send a Message Signaled
- Interrupt (MSI) to the Local APIC of the currently executing processor.
-
- @return 32-bit address used to send an MSI to the Local APIC.
-**/
-UINT32
-EFIAPI
-GetApicMsiAddress (
- VOID
- )
-{
- LOCAL_APIC_MSI_ADDRESS MsiAddress;
-
- //
- // Return address for an MSI interrupt to be delivered only to the APIC ID
- // of the currently executing processor.
- //
- MsiAddress.Uint32 = 0;
- MsiAddress.Bits.BaseAddress = 0xFEE;
- MsiAddress.Bits.DestinationId = GetApicId ();
- return MsiAddress.Uint32;
-}
-
-/**
- Get the 64-bit data value that a device should use to send a Message Signaled
- Interrupt (MSI) to the Local APIC of the currently executing processor.
-
- If Vector is not in range 0x10..0xFE, then ASSERT().
- If DeliveryMode is not supported, then ASSERT().
-
- @param Vector The 8-bit interrupt vector associated with the MSI.
- Must be in the range 0x10..0xFE
- @param DeliveryMode A 3-bit value that specifies how the recept of the MSI
- is handled. The only supported values are:
- 0: LOCAL_APIC_DELIVERY_MODE_FIXED
- 1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY
- 2: LOCAL_APIC_DELIVERY_MODE_SMI
- 4: LOCAL_APIC_DELIVERY_MODE_NMI
- 5: LOCAL_APIC_DELIVERY_MODE_INIT
- 7: LOCAL_APIC_DELIVERY_MODE_EXTINT
-
- @param LevelTriggered TRUE specifies a level triggered interrupt.
- FALSE specifies an edge triggered interrupt.
- @param AssertionLevel Ignored if LevelTriggered is FALSE.
- TRUE specifies a level triggered interrupt that active
- when the interrupt line is asserted.
- FALSE specifies a level triggered interrupt that active
- when the interrupt line is deasserted.
-
- @return 64-bit data value used to send an MSI to the Local APIC.
-**/
-UINT64
-EFIAPI
-GetApicMsiValue (
- IN UINT8 Vector,
- IN UINTN DeliveryMode,
- IN BOOLEAN LevelTriggered,
- IN BOOLEAN AssertionLevel
- )
-{
- LOCAL_APIC_MSI_DATA MsiData;
-
- ASSERT (Vector >= 0x10 && Vector <= 0xFE);
- ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);
-
- MsiData.Uint64 = 0;
- MsiData.Bits.Vector = Vector;
- MsiData.Bits.DeliveryMode = (UINT32)DeliveryMode;
- if (LevelTriggered) {
- MsiData.Bits.TriggerMode = 1;
- if (AssertionLevel) {
- MsiData.Bits.Level = 1;
- }
- }
- return MsiData.Uint64;
-}
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf deleted file mode 100644 index 7dd2714af3..0000000000 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf +++ /dev/null @@ -1,49 +0,0 @@ -## @file
-# The Local Apic library supports xAPIC mode only.
-#
-# Note: Local APIC library assumes local APIC is enabled. It does not handle cases
-# where local APIC is disabled.
-#
-# Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BaseXApicLib
- MODULE_UNI_FILE = BaseXApicLib.uni
- FILE_GUID = D87CA0A8-1AC2-439b-90F8-EF4A2AC88DAF
- MODULE_TYPE = BASE
- VERSION_STRING = 1.1
- LIBRARY_CLASS = LocalApicLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- BaseXApicLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- TimerLib
- IoLib
- PcdLib
-
-[Pcd]
- gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds ## SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress ## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.uni b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.uni Binary files differdeleted file mode 100644 index 0a9d254661..0000000000 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c deleted file mode 100644 index 8c6e8d7415..0000000000 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c +++ /dev/null @@ -1,997 +0,0 @@ -/** @file
- Local APIC Library.
-
- This local APIC library instance supports x2APIC capable processors
- which have xAPIC and x2APIC modes.
-
- Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Register/LocalApic.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/IoLib.h>
-#include <Library/TimerLib.h>
-#include <Library/PcdLib.h>
-
-//
-// Library internal functions
-//
-
-/**
- Determine if the CPU supports the Local APIC Base Address MSR.
-
- @retval TRUE The CPU supports the Local APIC Base Address MSR.
- @retval FALSE The CPU does not support the Local APIC Base Address MSR.
-
-**/
-BOOLEAN
-LocalApicBaseAddressMsrSupported (
- VOID
- )
-{
- UINT32 RegEax;
- UINTN FamilyId;
-
- AsmCpuid (1, &RegEax, NULL, NULL, NULL);
- FamilyId = BitFieldRead32 (RegEax, 8, 11);
- if (FamilyId == 0x04 || FamilyId == 0x05) {
- //
- // CPUs with a FamilyId of 0x04 or 0x05 do not support the
- // Local APIC Base Address MSR
- //
- return FALSE;
- }
- return TRUE;
-}
-
-/**
- Retrieve the base address of local APIC.
-
- @return The base address of local APIC.
-
-**/
-UINTN
-EFIAPI
-GetLocalApicBaseAddress (
- VOID
- )
-{
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- if (!LocalApicBaseAddressMsrSupported ()) {
- //
- // If CPU does not support Local APIC Base Address MSR, then retrieve
- // Local APIC Base Address from PCD
- //
- return PcdGet32 (PcdCpuLocalApicBaseAddress);
- }
-
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
-
- return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHigh, 32)) +
- (((UINTN)ApicBaseMsr.Bits.ApicBaseLow) << 12);
-}
-
-/**
- Set the base address of local APIC.
-
- If BaseAddress is not aligned on a 4KB boundary, then ASSERT().
-
- @param[in] BaseAddress Local APIC base address to be set.
-
-**/
-VOID
-EFIAPI
-SetLocalApicBaseAddress (
- IN UINTN BaseAddress
- )
-{
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);
-
- if (!LocalApicBaseAddressMsrSupported ()) {
- //
- // Ignore set request of the CPU does not support APIC Base Address MSR
- //
- return;
- }
-
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
-
- ApicBaseMsr.Bits.ApicBaseLow = (UINT32) (BaseAddress >> 12);
- ApicBaseMsr.Bits.ApicBaseHigh = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));
-
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
-}
-
-/**
- Read from a local APIC register.
-
- This function reads from a local APIC register either in xAPIC or x2APIC mode.
- It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
- accessed using multiple 32-bit loads or stores, so this function only performs
- 32-bit read.
-
- @param MmioOffset The MMIO offset of the local APIC register in xAPIC mode.
- It must be 16-byte aligned.
-
- @return 32-bit Value read from the register.
-**/
-UINT32
-EFIAPI
-ReadLocalApicReg (
- IN UINTN MmioOffset
- )
-{
- UINT32 MsrIndex;
-
- ASSERT ((MmioOffset & 0xf) == 0);
-
- if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
- return MmioRead32 (GetLocalApicBaseAddress() + MmioOffset);
- } else {
- //
- // DFR is not supported in x2APIC mode.
- //
- ASSERT (MmioOffset != XAPIC_ICR_DFR_OFFSET);
- //
- // Note that in x2APIC mode, ICR is a 64-bit MSR that needs special treatment. It
- // is not supported in this function for simplicity.
- //
- ASSERT (MmioOffset != XAPIC_ICR_HIGH_OFFSET);
-
- MsrIndex = (UINT32)(MmioOffset >> 4) + X2APIC_MSR_BASE_ADDRESS;
- return AsmReadMsr32 (MsrIndex);
- }
-}
-
-/**
- Write to a local APIC register.
-
- This function writes to a local APIC register either in xAPIC or x2APIC mode.
- It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be
- accessed using multiple 32-bit loads or stores, so this function only performs
- 32-bit write.
-
- if the register index is invalid or unsupported in current APIC mode, then ASSERT.
-
- @param MmioOffset The MMIO offset of the local APIC register in xAPIC mode.
- It must be 16-byte aligned.
- @param Value Value to be written to the register.
-**/
-VOID
-EFIAPI
-WriteLocalApicReg (
- IN UINTN MmioOffset,
- IN UINT32 Value
- )
-{
- UINT32 MsrIndex;
-
- ASSERT ((MmioOffset & 0xf) == 0);
-
- if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
- MmioWrite32 (GetLocalApicBaseAddress() + MmioOffset, Value);
- } else {
- //
- // DFR is not supported in x2APIC mode.
- //
- ASSERT (MmioOffset != XAPIC_ICR_DFR_OFFSET);
- //
- // Note that in x2APIC mode, ICR is a 64-bit MSR that needs special treatment. It
- // is not supported in this function for simplicity.
- //
- ASSERT (MmioOffset != XAPIC_ICR_HIGH_OFFSET);
- ASSERT (MmioOffset != XAPIC_ICR_LOW_OFFSET);
-
- MsrIndex = (UINT32)(MmioOffset >> 4) + X2APIC_MSR_BASE_ADDRESS;
- //
- // The serializing semantics of WRMSR are relaxed when writing to the APIC registers.
- // Use memory fence here to force the serializing semantics to be consisent with xAPIC mode.
- //
- MemoryFence ();
- AsmWriteMsr32 (MsrIndex, Value);
- }
-}
-
-/**
- Send an IPI by writing to ICR.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param IcrLow 32-bit value to be written to the low half of ICR.
- @param ApicId APIC ID of the target processor if this IPI is targeted for a specific processor.
-**/
-VOID
-SendIpi (
- IN UINT32 IcrLow,
- IN UINT32 ApicId
- )
-{
- UINT64 MsrValue;
- LOCAL_APIC_ICR_LOW IcrLowReg;
- UINTN LocalApciBaseAddress;
- UINT32 IcrHigh;
- BOOLEAN InterruptState;
-
- //
- // Legacy APIC or X2APIC?
- //
- if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
- ASSERT (ApicId <= 0xff);
-
- InterruptState = SaveAndDisableInterrupts ();
-
- //
- // Get base address of this LAPIC
- //
- LocalApciBaseAddress = GetLocalApicBaseAddress();
-
- //
- // Save existing contents of ICR high 32 bits
- //
- IcrHigh = MmioRead32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET);
-
- //
- // Wait for DeliveryStatus clear in case a previous IPI
- // is still being sent
- //
- do {
- IcrLowReg.Uint32 = MmioRead32 (LocalApciBaseAddress + XAPIC_ICR_LOW_OFFSET);
- } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
- //
- // For xAPIC, the act of writing to the low doubleword of the ICR causes the IPI to be sent.
- //
- MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET, ApicId << 24);
- MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_LOW_OFFSET, IcrLow);
-
- //
- // Wait for DeliveryStatus clear again
- //
- do {
- IcrLowReg.Uint32 = MmioRead32 (LocalApciBaseAddress + XAPIC_ICR_LOW_OFFSET);
- } while (IcrLowReg.Bits.DeliveryStatus != 0);
-
- //
- // And restore old contents of ICR high
- //
- MmioWrite32 (LocalApciBaseAddress + XAPIC_ICR_HIGH_OFFSET, IcrHigh);
-
- SetInterruptState (InterruptState);
-
- } else {
- //
- // For x2APIC, A single MSR write to the Interrupt Command Register is required for dispatching an
- // interrupt in x2APIC mode.
- //
- MsrValue = LShiftU64 ((UINT64) ApicId, 32) | IcrLow;
- AsmWriteMsr64 (X2APIC_MSR_ICR_ADDRESS, MsrValue);
- }
-}
-
-//
-// Library API implementation functions
-//
-
-/**
- Get the current local APIC mode.
-
- If local APIC is disabled, then ASSERT.
-
- @retval LOCAL_APIC_MODE_XAPIC current APIC mode is xAPIC.
- @retval LOCAL_APIC_MODE_X2APIC current APIC mode is x2APIC.
-**/
-UINTN
-EFIAPI
-GetApicMode (
- VOID
- )
-{
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- if (!LocalApicBaseAddressMsrSupported ()) {
- //
- // If CPU does not support APIC Base Address MSR, then return XAPIC mode
- //
- return LOCAL_APIC_MODE_XAPIC;
- }
-
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- //
- // Local APIC should have been enabled
- //
- ASSERT (ApicBaseMsr.Bits.En != 0);
- if (ApicBaseMsr.Bits.Extd != 0) {
- return LOCAL_APIC_MODE_X2APIC;
- } else {
- return LOCAL_APIC_MODE_XAPIC;
- }
-}
-
-/**
- Set the current local APIC mode.
-
- If the specified local APIC mode is not valid, then ASSERT.
- If the specified local APIC mode can't be set as current, then ASSERT.
-
- @param ApicMode APIC mode to be set.
-
- @note This API must not be called from an interrupt handler or SMI handler.
- It may result in unpredictable behavior.
-**/
-VOID
-EFIAPI
-SetApicMode (
- IN UINTN ApicMode
- )
-{
- UINTN CurrentMode;
- MSR_IA32_APIC_BASE ApicBaseMsr;
-
- if (!LocalApicBaseAddressMsrSupported ()) {
- //
- // Ignore set request if the CPU does not support APIC Base Address MSR
- //
- return;
- }
-
- CurrentMode = GetApicMode ();
- if (CurrentMode == LOCAL_APIC_MODE_XAPIC) {
- switch (ApicMode) {
- case LOCAL_APIC_MODE_XAPIC:
- break;
- case LOCAL_APIC_MODE_X2APIC:
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Extd = 1;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
- break;
- default:
- ASSERT (FALSE);
- }
- } else {
- switch (ApicMode) {
- case LOCAL_APIC_MODE_XAPIC:
- //
- // Transition from x2APIC mode to xAPIC mode is a two-step process:
- // x2APIC -> Local APIC disabled -> xAPIC
- //
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Extd = 0;
- ApicBaseMsr.Bits.En = 0;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
- ApicBaseMsr.Bits.En = 1;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
- break;
- case LOCAL_APIC_MODE_X2APIC:
- break;
- default:
- ASSERT (FALSE);
- }
- }
-}
-
-/**
- Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
-
- In xAPIC mode, the initial local APIC ID may be different from current APIC ID.
- In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case,
- the 32-bit local APIC ID is returned as initial APIC ID.
-
- @return 32-bit initial local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetInitialApicId (
- VOID
- )
-{
- UINT32 ApicId;
- UINT32 MaxCpuIdIndex;
- UINT32 RegEbx;
-
- if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
- //
- // Get the max index of basic CPUID
- //
- AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);
- //
- // If CPUID Leaf B is supported,
- // Then the initial 32-bit APIC ID = CPUID.0BH:EDX
- // Else the initial 8-bit APIC ID = CPUID.1:EBX[31:24]
- //
- if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {
- AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, NULL, NULL, NULL, &ApicId);
- return ApicId;
- }
- AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);
- return RegEbx >> 24;
- } else {
- return GetApicId ();
- }
-}
-
-/**
- Get the local APIC ID of the executing processor.
-
- @return 32-bit local APIC ID of the executing processor.
-**/
-UINT32
-EFIAPI
-GetApicId (
- VOID
- )
-{
- UINT32 ApicId;
- UINT32 InitApicId;
-
- ApicId = ReadLocalApicReg (XAPIC_ID_OFFSET);
- if (GetApicMode () == LOCAL_APIC_MODE_XAPIC) {
- ApicId = ((InitApicId = GetInitialApicId ()) < 0x100) ? (ApicId >> 24) : InitApicId;
- }
-
- return ApicId;
-}
-
-/**
- Get the value of the local APIC version register.
-
- @return the value of the local APIC version register.
-**/
-UINT32
-EFIAPI
-GetApicVersion (
- VOID
- )
-{
- return ReadLocalApicReg (XAPIC_VERSION_OFFSET);
-}
-
-/**
- Send a Fixed IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId The local APIC ID of the target processor.
- @param Vector The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpi (
- IN UINT32 ApicId,
- IN UINT8 Vector
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.Vector = Vector;
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send a Fixed IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-
- @param Vector The vector number of the interrupt being sent.
-**/
-VOID
-EFIAPI
-SendFixedIpiAllExcludingSelf (
- IN UINT8 Vector
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_FIXED;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- IcrLow.Bits.Vector = Vector;
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Send a SMI IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendSmiIpi (
- IN UINT32 ApicId
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
- IcrLow.Bits.Level = 1;
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send a SMI IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-**/
-VOID
-EFIAPI
-SendSmiIpiAllExcludingSelf (
- VOID
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_SMI;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Send an INIT IPI to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- @param ApicId Specify the local APIC ID of the target processor.
-**/
-VOID
-EFIAPI
-SendInitIpi (
- IN UINT32 ApicId
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
- IcrLow.Bits.Level = 1;
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send an INIT IPI to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-**/
-VOID
-EFIAPI
-SendInitIpiAllExcludingSelf (
- VOID
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- IcrLow.Uint32 = 0;
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_INIT;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
-
- This function returns after the IPI has been accepted by the target processor.
-
- if StartupRoutine >= 1M, then ASSERT.
- if StartupRoutine is not multiple of 4K, then ASSERT.
-
- @param ApicId Specify the local APIC ID of the target processor.
- @param StartupRoutine Points to a start-up routine which is below 1M physical
- address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipi (
- IN UINT32 ApicId,
- IN UINT32 StartupRoutine
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- ASSERT (StartupRoutine < 0x100000);
- ASSERT ((StartupRoutine & 0xfff) == 0);
-
- SendInitIpi (ApicId);
- MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
- IcrLow.Uint32 = 0;
- IcrLow.Bits.Vector = (StartupRoutine >> 12);
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
- IcrLow.Bits.Level = 1;
- SendIpi (IcrLow.Uint32, ApicId);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, ApicId);
-}
-
-/**
- Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
-
- This function returns after the IPI has been accepted by the target processors.
-
- if StartupRoutine >= 1M, then ASSERT.
- if StartupRoutine is not multiple of 4K, then ASSERT.
-
- @param StartupRoutine Points to a start-up routine which is below 1M physical
- address and 4K aligned.
-**/
-VOID
-EFIAPI
-SendInitSipiSipiAllExcludingSelf (
- IN UINT32 StartupRoutine
- )
-{
- LOCAL_APIC_ICR_LOW IcrLow;
-
- ASSERT (StartupRoutine < 0x100000);
- ASSERT ((StartupRoutine & 0xfff) == 0);
-
- SendInitIpiAllExcludingSelf ();
- MicroSecondDelay (PcdGet32(PcdCpuInitIpiDelayInMicroSeconds));
- IcrLow.Uint32 = 0;
- IcrLow.Bits.Vector = (StartupRoutine >> 12);
- IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
- IcrLow.Bits.Level = 1;
- IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
- SendIpi (IcrLow.Uint32, 0);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, 0);
-}
-
-/**
- Programming Virtual Wire Mode.
-
- This function programs the local APIC for virtual wire mode following
- the example described in chapter A.3 of the MP 1.4 spec.
-
- IOxAPIC is not involved in this type of virtual wire mode.
-**/
-VOID
-EFIAPI
-ProgramVirtualWireMode (
- VOID
- )
-{
- LOCAL_APIC_SVR Svr;
- LOCAL_APIC_LVT_LINT Lint;
-
- //
- // Enable the APIC via SVR and set the spurious interrupt to use Int 00F.
- //
- Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
- Svr.Bits.SpuriousVector = 0xf;
- Svr.Bits.SoftwareEnable = 1;
- WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-
- //
- // Program the LINT0 vector entry as ExtInt. Not masked, edge, active high.
- //
- Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
- Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_EXTINT;
- Lint.Bits.InputPinPolarity = 0;
- Lint.Bits.TriggerMode = 0;
- Lint.Bits.Mask = 0;
- WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, Lint.Uint32);
-
- //
- // Program the LINT0 vector entry as NMI. Not masked, edge, active high.
- //
- Lint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
- Lint.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_NMI;
- Lint.Bits.InputPinPolarity = 0;
- Lint.Bits.TriggerMode = 0;
- Lint.Bits.Mask = 0;
- WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, Lint.Uint32);
-}
-
-/**
- Disable LINT0 & LINT1 interrupts.
-
- This function sets the mask flag in the LVT LINT0 & LINT1 registers.
-**/
-VOID
-EFIAPI
-DisableLvtInterrupts (
- VOID
- )
-{
- LOCAL_APIC_LVT_LINT LvtLint;
-
- LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT0_OFFSET);
- LvtLint.Bits.Mask = 1;
- WriteLocalApicReg (XAPIC_LVT_LINT0_OFFSET, LvtLint.Uint32);
-
- LvtLint.Uint32 = ReadLocalApicReg (XAPIC_LVT_LINT1_OFFSET);
- LvtLint.Bits.Mask = 1;
- WriteLocalApicReg (XAPIC_LVT_LINT1_OFFSET, LvtLint.Uint32);
-}
-
-/**
- Read the initial count value from the init-count register.
-
- @return The initial count value read from the init-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerInitCount (
- VOID
- )
-{
- return ReadLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET);
-}
-
-/**
- Read the current count value from the current-count register.
-
- @return The current count value read from the current-count register.
-**/
-UINT32
-EFIAPI
-GetApicTimerCurrentCount (
- VOID
- )
-{
- return ReadLocalApicReg (XAPIC_TIMER_CURRENT_COUNT_OFFSET);
-}
-
-/**
- Initialize the local APIC timer.
-
- The local APIC timer is initialized and enabled.
-
- @param DivideValue The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
- If it is 0, then use the current divide value in the DCR.
- @param InitCount The initial count value.
- @param PeriodicMode If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
- @param Vector The timer interrupt vector number.
-**/
-VOID
-EFIAPI
-InitializeApicTimer (
- IN UINTN DivideValue,
- IN UINT32 InitCount,
- IN BOOLEAN PeriodicMode,
- IN UINT8 Vector
- )
-{
- LOCAL_APIC_SVR Svr;
- LOCAL_APIC_DCR Dcr;
- LOCAL_APIC_LVT_TIMER LvtTimer;
- UINT32 Divisor;
-
- //
- // Ensure local APIC is in software-enabled state.
- //
- Svr.Uint32 = ReadLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET);
- Svr.Bits.SoftwareEnable = 1;
- WriteLocalApicReg (XAPIC_SPURIOUS_VECTOR_OFFSET, Svr.Uint32);
-
- //
- // Program init-count register.
- //
- WriteLocalApicReg (XAPIC_TIMER_INIT_COUNT_OFFSET, InitCount);
-
- if (DivideValue != 0) {
- ASSERT (DivideValue <= 128);
- ASSERT (DivideValue == GetPowerOfTwo32((UINT32)DivideValue));
- Divisor = (UINT32)((HighBitSet32 ((UINT32)DivideValue) - 1) & 0x7);
-
- Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
- Dcr.Bits.DivideValue1 = (Divisor & 0x3);
- Dcr.Bits.DivideValue2 = (Divisor >> 2);
- WriteLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET, Dcr.Uint32);
- }
-
- //
- // Enable APIC timer interrupt with specified timer mode.
- //
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- if (PeriodicMode) {
- LvtTimer.Bits.TimerMode = 1;
- } else {
- LvtTimer.Bits.TimerMode = 0;
- }
- LvtTimer.Bits.Mask = 0;
- LvtTimer.Bits.Vector = Vector;
- WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
- Get the state of the local APIC timer.
-
- @param DivideValue Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.
- @param PeriodicMode Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.
- @param Vector Return the timer interrupt vector number.
-**/
-VOID
-EFIAPI
-GetApicTimerState (
- OUT UINTN *DivideValue OPTIONAL,
- OUT BOOLEAN *PeriodicMode OPTIONAL,
- OUT UINT8 *Vector OPTIONAL
- )
-{
- UINT32 Divisor;
- LOCAL_APIC_DCR Dcr;
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- if (DivideValue != NULL) {
- Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);
- Divisor = Dcr.Bits.DivideValue1 | (Dcr.Bits.DivideValue2 << 2);
- Divisor = (Divisor + 1) & 0x7;
- *DivideValue = ((UINTN)1) << Divisor;
- }
-
- if (PeriodicMode != NULL || Vector != NULL) {
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- if (PeriodicMode != NULL) {
- if (LvtTimer.Bits.TimerMode == 1) {
- *PeriodicMode = TRUE;
- } else {
- *PeriodicMode = FALSE;
- }
- }
- if (Vector != NULL) {
- *Vector = (UINT8) LvtTimer.Bits.Vector;
- }
- }
-}
-
-/**
- Enable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-EnableApicTimerInterrupt (
- VOID
- )
-{
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- LvtTimer.Bits.Mask = 0;
- WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
- Disable the local APIC timer interrupt.
-**/
-VOID
-EFIAPI
-DisableApicTimerInterrupt (
- VOID
- )
-{
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- LvtTimer.Bits.Mask = 1;
- WriteLocalApicReg (XAPIC_LVT_TIMER_OFFSET, LvtTimer.Uint32);
-}
-
-/**
- Get the local APIC timer interrupt state.
-
- @retval TRUE The local APIC timer interrupt is enabled.
- @retval FALSE The local APIC timer interrupt is disabled.
-**/
-BOOLEAN
-EFIAPI
-GetApicTimerInterruptState (
- VOID
- )
-{
- LOCAL_APIC_LVT_TIMER LvtTimer;
-
- LvtTimer.Uint32 = ReadLocalApicReg (XAPIC_LVT_TIMER_OFFSET);
- return (BOOLEAN)(LvtTimer.Bits.Mask == 0);
-}
-
-/**
- Send EOI to the local APIC.
-**/
-VOID
-EFIAPI
-SendApicEoi (
- VOID
- )
-{
- WriteLocalApicReg (XAPIC_EOI_OFFSET, 0);
-}
-
-/**
- Get the 32-bit address that a device should use to send a Message Signaled
- Interrupt (MSI) to the Local APIC of the currently executing processor.
-
- @return 32-bit address used to send an MSI to the Local APIC.
-**/
-UINT32
-EFIAPI
-GetApicMsiAddress (
- VOID
- )
-{
- LOCAL_APIC_MSI_ADDRESS MsiAddress;
-
- //
- // Return address for an MSI interrupt to be delivered only to the APIC ID
- // of the currently executing processor.
- //
- MsiAddress.Uint32 = 0;
- MsiAddress.Bits.BaseAddress = 0xFEE;
- MsiAddress.Bits.DestinationId = GetApicId ();
- return MsiAddress.Uint32;
-}
-
-/**
- Get the 64-bit data value that a device should use to send a Message Signaled
- Interrupt (MSI) to the Local APIC of the currently executing processor.
-
- If Vector is not in range 0x10..0xFE, then ASSERT().
- If DeliveryMode is not supported, then ASSERT().
-
- @param Vector The 8-bit interrupt vector associated with the MSI.
- Must be in the range 0x10..0xFE
- @param DeliveryMode A 3-bit value that specifies how the recept of the MSI
- is handled. The only supported values are:
- 0: LOCAL_APIC_DELIVERY_MODE_FIXED
- 1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY
- 2: LOCAL_APIC_DELIVERY_MODE_SMI
- 4: LOCAL_APIC_DELIVERY_MODE_NMI
- 5: LOCAL_APIC_DELIVERY_MODE_INIT
- 7: LOCAL_APIC_DELIVERY_MODE_EXTINT
-
- @param LevelTriggered TRUE specifies a level triggered interrupt.
- FALSE specifies an edge triggered interrupt.
- @param AssertionLevel Ignored if LevelTriggered is FALSE.
- TRUE specifies a level triggered interrupt that active
- when the interrupt line is asserted.
- FALSE specifies a level triggered interrupt that active
- when the interrupt line is deasserted.
-
- @return 64-bit data value used to send an MSI to the Local APIC.
-**/
-UINT64
-EFIAPI
-GetApicMsiValue (
- IN UINT8 Vector,
- IN UINTN DeliveryMode,
- IN BOOLEAN LevelTriggered,
- IN BOOLEAN AssertionLevel
- )
-{
- LOCAL_APIC_MSI_DATA MsiData;
-
- ASSERT (Vector >= 0x10 && Vector <= 0xFE);
- ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);
-
- MsiData.Uint64 = 0;
- MsiData.Bits.Vector = Vector;
- MsiData.Bits.DeliveryMode = (UINT32)DeliveryMode;
- if (LevelTriggered) {
- MsiData.Bits.TriggerMode = 1;
- if (AssertionLevel) {
- MsiData.Bits.Level = 1;
- }
- }
- return MsiData.Uint64;
-}
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf deleted file mode 100644 index 53e186858f..0000000000 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf +++ /dev/null @@ -1,49 +0,0 @@ -## @file
-# The Local Apic library supports x2APIC capable processors which have xAPIC and x2APIC modes.
-#
-# Note: Local APIC library assumes local APIC is enabled. It does not handle cases
-# where local APIC is disabled.
-#
-# Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BaseXApicX2ApicLib
- MODULE_UNI_FILE = BaseXApicX2ApicLib.uni
- FILE_GUID = 967B6E05-F10D-4c10-8BF7-365291CA143F
- MODULE_TYPE = BASE
- VERSION_STRING = 1.1
- LIBRARY_CLASS = LocalApicLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- BaseXApicX2ApicLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- TimerLib
- IoLib
- PcdLib
-
-[Pcd]
- gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds ## SOMETIMES_CONSUMES
- gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress ## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.uni b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.uni Binary files differdeleted file mode 100644 index a46183c090..0000000000 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c deleted file mode 100644 index 5d2816111f..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c +++ /dev/null @@ -1,219 +0,0 @@ -/** @file
- CPU Exception Handler Library common functions.
-
- Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-
-//
-// Error code flag indicating whether or not an error code will be
-// pushed on the stack if an exception occurs.
-//
-// 1 means an error code will be pushed, otherwise 0
-//
-CONST UINT32 mErrorCodeFlag = 0x00027d00;
-RESERVED_VECTORS_DATA *mReservedVectors = NULL;
-
-//
-// Define the maximum message length
-//
-#define MAX_DEBUG_MESSAGE_LENGTH 0x100
-
-CONST CHAR8 mExceptionReservedStr[] = "Reserved";
-CONST CHAR8 *mExceptionNameStr[] = {
- "#DE - Divide Error",
- "#DB - Debug",
- "NMI Interrupt",
- "#BP - Breakpoint",
- "#OF - Overflow",
- "#BR - BOUND Range Exceeded",
- "#UD - Invalid Opcode",
- "#NM - Device Not Available",
- "#DF - Double Fault",
- "Coprocessor Segment Overrun",
- "#TS - Invalid TSS",
- "#NP - Segment Not Present",
- "#SS - Stack Fault Fault",
- "#GP - General Protection",
- "#PF - Page-Fault",
- "Reserved",
- "#MF - x87 FPU Floating-Point Error",
- "#AC - Alignment Check",
- "#MC - Machine-Check",
- "#XM - SIMD floating-point",
- "#VE - Virtualization"
-};
-
-#define EXCEPTION_KNOWN_NAME_NUM (sizeof (mExceptionNameStr) / sizeof (CHAR8 *))
-
-/**
- Get ASCII format string exception name by exception type.
-
- @param ExceptionType Exception type.
-
- @return ASCII format string exception name.
-**/
-CONST CHAR8 *
-GetExceptionNameStr (
- IN EFI_EXCEPTION_TYPE ExceptionType
- )
-{
- if ((UINTN) ExceptionType < EXCEPTION_KNOWN_NAME_NUM) {
- return mExceptionNameStr[ExceptionType];
- } else {
- return mExceptionReservedStr;
- }
-}
-
-/**
- Prints a message to the serial port.
-
- @param Format Format string for the message to print.
- @param ... Variable argument list whose contents are accessed
- based on the format string specified by Format.
-
-**/
-VOID
-EFIAPI
-InternalPrintMessage (
- IN CONST CHAR8 *Format,
- ...
- )
-{
- CHAR8 Buffer[MAX_DEBUG_MESSAGE_LENGTH];
- VA_LIST Marker;
-
- //
- // Convert the message to an ASCII String
- //
- VA_START (Marker, Format);
- AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
- VA_END (Marker);
-
- //
- // Send the print string to a Serial Port
- //
- SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer));
-}
-
-/**
- Find and display image base address and return image base and its entry point.
-
- @param CurrentEip Current instruction pointer.
- @param EntryPoint Return module entry point if module header is found.
-
- @return !0 Image base address.
- @return 0 Image header cannot be found.
-**/
-UINTN
-FindModuleImageBase (
- IN UINTN CurrentEip,
- OUT UINTN *EntryPoint
- )
-{
- UINTN Pe32Data;
- EFI_IMAGE_DOS_HEADER *DosHdr;
- EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
- VOID *PdbPointer;
-
- //
- // Find Image Base
- //
- Pe32Data = CurrentEip & ~(mImageAlignSize - 1);
- while (Pe32Data != 0) {
- DosHdr = (EFI_IMAGE_DOS_HEADER *) Pe32Data;
- if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) {
- //
- // DOS image header is present, so read the PE header after the DOS image header.
- //
- Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)(Pe32Data + (UINTN) ((DosHdr->e_lfanew) & 0x0ffff));
- //
- // Make sure PE header address does not overflow and is less than the initial address.
- //
- if (((UINTN)Hdr.Pe32 > Pe32Data) && ((UINTN)Hdr.Pe32 < CurrentEip)) {
- if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) {
- //
- // It's PE image.
- //
- InternalPrintMessage ("!!!! Find PE image ");
- *EntryPoint = (UINTN)Pe32Data + (UINTN)(Hdr.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff);
- break;
- }
- }
- } else {
- //
- // DOS image header is not present, TE header is at the image base.
- //
- Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)Pe32Data;
- if ((Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE) &&
- ((Hdr.Te->Machine == IMAGE_FILE_MACHINE_I386) || Hdr.Te->Machine == IMAGE_FILE_MACHINE_X64)) {
- //
- // It's TE image, it TE header and Machine type match
- //
- InternalPrintMessage ("!!!! Find TE image ");
- *EntryPoint = (UINTN)Pe32Data + (UINTN)(Hdr.Te->AddressOfEntryPoint & 0x0ffffffff) + sizeof(EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize;
- break;
- }
- }
-
- //
- // Not found the image base, check the previous aligned address
- //
- Pe32Data -= mImageAlignSize;
- }
-
- if (Pe32Data != 0) {
- PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data);
- if (PdbPointer != NULL) {
- InternalPrintMessage ("%a", PdbPointer);
- } else {
- InternalPrintMessage ("(No PDB) " );
- }
- } else {
- InternalPrintMessage ("!!!! Can't find image information. !!!!\n");
- }
-
- return Pe32Data;
-}
-
-/**
- Read and save reserved vector information
-
- @param[in] VectorInfo Pointer to reserved vector list.
- @param[out] ReservedVector Pointer to reserved vector data buffer.
- @param[in] VectorCount Vector number to be updated.
-
- @return EFI_SUCCESS Read and save vector info successfully.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-
-**/
-EFI_STATUS
-ReadAndVerifyVectorInfo (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo,
- OUT RESERVED_VECTORS_DATA *ReservedVector,
- IN UINTN VectorCount
- )
-{
- while (VectorInfo->Attribute != EFI_VECTOR_HANDOFF_LAST_ENTRY) {
- if (VectorInfo->Attribute > EFI_VECTOR_HANDOFF_HOOK_AFTER) {
- //
- // If vector attrubute is invalid
- //
- return EFI_INVALID_PARAMETER;
- }
- if (VectorInfo->VectorNumber < VectorCount) {
- ReservedVector[VectorInfo->VectorNumber].Attribute = VectorInfo->Attribute;
- }
- VectorInfo ++;
- }
- return EFI_SUCCESS;
-}
\ No newline at end of file diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h deleted file mode 100644 index b28e9c574a..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h +++ /dev/null @@ -1,253 +0,0 @@ -/** @file
- Common header file for CPU Exception Handler Library.
-
- Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_EXCEPTION_COMMON_H_
-#define _CPU_EXCEPTION_COMMON_H_
-
-#include <Ppi/VectorHandoffInfo.h>
-#include <Protocol/Cpu.h>
-#include <Library/BaseLib.h>
-#include <Library/SerialPortLib.h>
-#include <Library/PrintLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/SynchronizationLib.h>
-
-#define CPU_EXCEPTION_NUM 32
-#define CPU_INTERRUPT_NUM 256
-#define HOOKAFTER_STUB_SIZE 16
-
-#include "ArchInterruptDefs.h"
-
-//
-// Record exception handler information
-//
-typedef struct {
- UINTN ExceptionStart;
- UINTN ExceptionStubHeaderSize;
- UINTN HookAfterStubHeaderStart;
-} EXCEPTION_HANDLER_TEMPLATE_MAP;
-
-extern CONST UINT32 mErrorCodeFlag;
-extern CONST UINTN mImageAlignSize;
-extern CONST UINTN mDoFarReturnFlag;
-extern RESERVED_VECTORS_DATA *mReservedVectors;
-
-/**
- Return address map of exception handler template so that C code can generate
- exception tables.
-
- @param AddressMap Pointer to a buffer where the address map is returned.
-**/
-VOID
-EFIAPI
-AsmGetTemplateAddressMap (
- OUT EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
- );
-
-/**
- Return address map of exception handler template so that C code can generate
- exception tables.
-
- @param IdtEntry Pointer to IDT entry to be updated.
- @param InterruptHandler IDT handler value.
-
-**/
-VOID
-ArchUpdateIdtEntry (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
- IN UINTN InterruptHandler
- );
-
-/**
- Read IDT handler value from IDT entry.
-
- @param IdtEntry Pointer to IDT entry to be read.
-
-**/
-UINTN
-ArchGetIdtHandler (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
- );
-
-/**
- Prints a message to the serial port.
-
- @param Format Format string for the message to print.
- @param ... Variable argument list whose contents are accessed
- based on the format string specified by Format.
-
-**/
-VOID
-EFIAPI
-InternalPrintMessage (
- IN CONST CHAR8 *Format,
- ...
- );
-
-/**
- Find and display image base address and return image base and its entry point.
-
- @param CurrentEip Current instruction pointer.
- @param EntryPoint Return module entry point if module header is found.
-
- @return !0 Image base address.
- @return 0 Image header cannot be found.
-**/
-UINTN
-FindModuleImageBase (
- IN UINTN CurrentEip,
- OUT UINTN *EntryPoint
- );
-
-/**
- Display CPU information.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-DumpCpuContent (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- );
-
-/**
- Internal worker function to initialize exception handler.
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
- with default exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-InitializeCpuExceptionHandlersWorker (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- );
-
-/**
- Registers a function to be called from the processor interrupt handler.
-
- @param[in] InterruptType Defines which interrupt or exception to hook.
- @param[in] InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. If this parameter is NULL, then the handler
- will be uninstalled.
-
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
- previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
- previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported,
- or this function is not supported.
-**/
-EFI_STATUS
-RegisterCpuInterruptHandlerWorker (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- );
-
-/**
- Internal worker function to update IDT entries accordling to vector attributes.
-
- @param[in] IdtTable Pointer to IDT table.
- @param[in] TemplateMap Pointer to a buffer where the address map is returned.
- @param[in] IdtEntryCount IDT entries number to be updated.
-
-**/
-VOID
-UpdateIdtTable (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtTable,
- IN EXCEPTION_HANDLER_TEMPLATE_MAP *TemplateMap,
- IN UINTN IdtEntryCount
- );
-
-/**
- Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
- @param[in] ExceptionType Exception type.
- @param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-
-**/
-VOID
-ArchSaveExceptionContext (
- IN UINTN ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- );
-
-/**
- Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
- @param[in] ExceptionType Exception type.
- @param[in] SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-
-**/
-VOID
-ArchRestoreExceptionContext (
- IN UINTN ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- );
-
-/**
- Fix up the vector number and function address in the vector code.
-
- @param[in] NewVectorAddr New vector handler address.
- @param[in] VectorNum Index of vector.
- @param[in] OldVectorAddr Old vector handler address.
-
-**/
-VOID
-EFIAPI
-AsmVectorNumFixup (
- IN VOID *NewVectorAddr,
- IN UINT8 VectorNum,
- IN VOID *OldVectorAddr
- );
-
-/**
- Read and save reserved vector information
-
- @param[in] VectorInfo Pointer to reserved vector list.
- @param[out] ReservedVector Pointer to reserved vector data buffer.
- @param[in] VectorCount Vector number to be updated.
-
- @return EFI_SUCCESS Read and save vector info successfully.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
-
-**/
-EFI_STATUS
-ReadAndVerifyVectorInfo (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo,
- OUT RESERVED_VECTORS_DATA *ReservedVector,
- IN UINTN VectorCount
- );
-
-/**
- Get ASCII format string exception name by exception type.
-
- @param ExceptionType Exception type.
-
- @return ASCII format string exception name.
-**/
-CONST CHAR8 *
-GetExceptionNameStr (
- IN EFI_EXCEPTION_TYPE ExceptionType
- );
-
-#endif
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf deleted file mode 100644 index 316ed55b2a..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf +++ /dev/null @@ -1,61 +0,0 @@ -## @file
-# CPU Exception Handler library instance for DXE modules.
-#
-# Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = DxeCpuExceptionHandlerLib
- MODULE_UNI_FILE = DxeCpuExceptionHandlerLib.uni
- FILE_GUID = B6E9835A-EDCF-4748-98A8-27D3C722E02D
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.1
- LIBRARY_CLASS = CpuExceptionHandlerLib|DXE_CORE DXE_DRIVER UEFI_APPLICATION
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources.Ia32]
- Ia32/ExceptionHandlerAsm.asm
- Ia32/ExceptionHandlerAsm.S |GCC
- Ia32/ArchExceptionHandler.c
- Ia32/ArchInterruptDefs.h
-
-[Sources.X64]
- X64/ExceptionHandlerAsm.asm
- X64/ExceptionHandlerAsm.S |GCC
- X64/ArchExceptionHandler.c
- X64/ArchInterruptDefs.h
-
-[Sources.common]
- CpuExceptionCommon.h
- CpuExceptionCommon.c
- DxeSmmCpuException.c
- DxeException.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
- SerialPortLib
- PrintLib
- SynchronizationLib
- LocalApicLib
- PeCoffGetEntryPointLib
- MemoryAllocationLib
- DebugLib
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.uni b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.uni Binary files differdeleted file mode 100644 index dd98f5d665..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c deleted file mode 100644 index 6739a2cc3c..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c +++ /dev/null @@ -1,170 +0,0 @@ -/** @file
- CPU exception handler library implemenation for DXE modules.
-
- Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-#include "CpuExceptionCommon.h"
-#include <Library/DebugLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-CONST UINTN mDoFarReturnFlag = 0;
-
-extern SPIN_LOCK mDisplayMessageSpinLock;
-extern EFI_CPU_INTERRUPT_HANDLER *mExternalInterruptHandler;
-
-/**
- Initializes all CPU exceptions entries and provides the default exception handlers.
-
- Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
- persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
- If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
- If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
- with default exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- return InitializeCpuExceptionHandlersWorker (VectorInfo);
-}
-
-/**
- Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
- Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
- persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
- If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
- If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS All CPU interrupt/exception entries have been successfully initialized
- with default interrupt/exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- EFI_STATUS Status;
- IA32_IDT_GATE_DESCRIPTOR *IdtTable;
- IA32_DESCRIPTOR IdtDescriptor;
- UINTN IdtEntryCount;
- EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap;
- UINTN Index;
- UINTN InterruptEntry;
- UINT8 *InterruptEntryCode;
-
- mReservedVectors = AllocatePool (sizeof (RESERVED_VECTORS_DATA) * CPU_INTERRUPT_NUM);
- ASSERT (mReservedVectors != NULL);
- SetMem ((VOID *) mReservedVectors, sizeof (RESERVED_VECTORS_DATA) * CPU_INTERRUPT_NUM, 0xff);
- if (VectorInfo != NULL) {
- Status = ReadAndVerifyVectorInfo (VectorInfo, mReservedVectors, CPU_INTERRUPT_NUM);
- if (EFI_ERROR (Status)) {
- FreePool (mReservedVectors);
- return EFI_INVALID_PARAMETER;
- }
- }
- InitializeSpinLock (&mDisplayMessageSpinLock);
- mExternalInterruptHandler = AllocateZeroPool (sizeof (EFI_CPU_INTERRUPT_HANDLER) * CPU_INTERRUPT_NUM);
- ASSERT (mExternalInterruptHandler != NULL);
-
- //
- // Read IDT descriptor and calculate IDT size
- //
- AsmReadIdtr (&IdtDescriptor);
- IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
- if (IdtEntryCount > CPU_INTERRUPT_NUM) {
- IdtEntryCount = CPU_INTERRUPT_NUM;
- }
- //
- // Create Interrupt Descriptor Table and Copy the old IDT table in
- //
- IdtTable = AllocateZeroPool (sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU_INTERRUPT_NUM);
- ASSERT (IdtTable != NULL);
- CopyMem (IdtTable, (VOID *)IdtDescriptor.Base, sizeof (IA32_IDT_GATE_DESCRIPTOR) * IdtEntryCount);
-
- AsmGetTemplateAddressMap (&TemplateMap);
- ASSERT (TemplateMap.ExceptionStubHeaderSize <= HOOKAFTER_STUB_SIZE);
- InterruptEntryCode = AllocatePool (TemplateMap.ExceptionStubHeaderSize * CPU_INTERRUPT_NUM);
- ASSERT (InterruptEntryCode != NULL);
-
- InterruptEntry = (UINTN) InterruptEntryCode;
- for (Index = 0; Index < CPU_INTERRUPT_NUM; Index ++) {
- CopyMem (
- (VOID *) InterruptEntry,
- (VOID *) TemplateMap.ExceptionStart,
- TemplateMap.ExceptionStubHeaderSize
- );
- AsmVectorNumFixup ((VOID *) InterruptEntry, (UINT8) Index, (VOID *) TemplateMap.ExceptionStart);
- InterruptEntry += TemplateMap.ExceptionStubHeaderSize;
- }
-
- TemplateMap.ExceptionStart = (UINTN) InterruptEntryCode;
- UpdateIdtTable (IdtTable, &TemplateMap, CPU_INTERRUPT_NUM);
-
- //
- // Load Interrupt Descriptor Table
- //
- IdtDescriptor.Base = (UINTN) IdtTable;
- IdtDescriptor.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU_INTERRUPT_NUM - 1);
- AsmWriteIdtr ((IA32_DESCRIPTOR *) &IdtDescriptor);
-
- return EFI_SUCCESS;
-}
-
-/**
- Registers a function to be called from the processor interrupt handler.
-
- This function registers and enables the handler specified by InterruptHandler for a processor
- interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
- handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
- The installed handler is called once for each processor interrupt or exception.
- NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
- InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
- @param[in] InterruptType Defines which interrupt or exception to hook.
- @param[in] InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. If this parameter is NULL, then the handler
- will be uninstalled.
-
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
- previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
- previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported,
- or this function is not supported.
-**/
-EFI_STATUS
-EFIAPI
-RegisterCpuInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- )
-{
- return RegisterCpuInterruptHandlerWorker (InterruptType, InterruptHandler);
-}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeSmmCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeSmmCpuException.c deleted file mode 100644 index d1291aa0eb..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeSmmCpuException.c +++ /dev/null @@ -1,292 +0,0 @@ -/** @file
- CPU Exception Library provides DXE/SMM CPU common exception handler.
-
-Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-#include <Library/DebugLib.h>
-
-//
-// Spinlock for CPU information display
-//
-SPIN_LOCK mDisplayMessageSpinLock;
-
-//
-// Image align size for DXE/SMM
-//
-CONST UINTN mImageAlignSize = SIZE_4KB;
-
-RESERVED_VECTORS_DATA mReservedVectorsData[CPU_EXCEPTION_NUM];
-EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_EXCEPTION_NUM];
-EFI_CPU_INTERRUPT_HANDLER *mExternalInterruptHandler = NULL;
-UINTN mEnabledInterruptNum = 0;
-
-/**
- Common exception handler.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-EFIAPI
-CommonExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- EXCEPTION_HANDLER_CONTEXT *ExceptionHandlerContext;
-
- ExceptionHandlerContext = (EXCEPTION_HANDLER_CONTEXT *) (UINTN) (SystemContext.SystemContextIa32);
-
- switch (mReservedVectors[ExceptionType].Attribute) {
- case EFI_VECTOR_HANDOFF_HOOK_BEFORE:
- //
- // Need to jmp to old IDT handler after this exception handler
- //
- ExceptionHandlerContext->ExceptionDataFlag = (mErrorCodeFlag & (1 << ExceptionType)) ? TRUE : FALSE;
- ExceptionHandlerContext->OldIdtHandler = mReservedVectors[ExceptionType].ExceptonHandler;
- break;
- case EFI_VECTOR_HANDOFF_HOOK_AFTER:
- while (TRUE) {
- //
- // If if anyone has gotten SPIN_LOCK for owner running hook after
- //
- if (AcquireSpinLockOrFail (&mReservedVectors[ExceptionType].SpinLock)) {
- //
- // Need to execute old IDT handler before running this exception handler
- //
- mReservedVectors[ExceptionType].ApicId = GetApicId ();
- ArchSaveExceptionContext (ExceptionType, SystemContext);
- ExceptionHandlerContext->ExceptionDataFlag = (mErrorCodeFlag & (1 << ExceptionType)) ? TRUE : FALSE;
- ExceptionHandlerContext->OldIdtHandler = mReservedVectors[ExceptionType].ExceptonHandler;
- return;
- }
- //
- // If failed to acquire SPIN_LOCK, check if it was locked by processor itself
- //
- if (mReservedVectors[ExceptionType].ApicId == GetApicId ()) {
- //
- // Old IDT handler has been executed, then retore CPU exception content to
- // run new exception handler.
- //
- ArchRestoreExceptionContext (ExceptionType, SystemContext);
- //
- // Rlease spin lock for ApicId
- //
- ReleaseSpinLock (&mReservedVectors[ExceptionType].SpinLock);
- break;
- }
- CpuPause ();
- }
- break;
- case 0xffffffff:
- break;
- default:
- //
- // It should never reach here
- //
- CpuDeadLoop ();
- break;
- }
-
- if (mExternalInterruptHandler[ExceptionType] != NULL) {
- (mExternalInterruptHandler[ExceptionType]) (ExceptionType, SystemContext);
- } else if (ExceptionType < CPU_EXCEPTION_NUM) {
- //
- // Get Spinlock to display CPU information
- //
- while (!AcquireSpinLockOrFail (&mDisplayMessageSpinLock)) {
- CpuPause ();
- }
- //
- // Display ExceptionType, CPU information and Image information
- //
- DumpCpuContent (ExceptionType, SystemContext);
- //
- // Release Spinlock of output message
- //
- ReleaseSpinLock (&mDisplayMessageSpinLock);
- //
- // Enter a dead loop if needn't to execute old IDT handler further
- //
- if (mReservedVectors[ExceptionType].Attribute != EFI_VECTOR_HANDOFF_HOOK_BEFORE) {
- CpuDeadLoop ();
- }
- }
-}
-
-/**
- Internal worker function to update IDT entries accordling to vector attributes.
-
- @param[in] IdtTable Pointer to IDT table.
- @param[in] TemplateMap Pointer to a buffer where the address map is returned.
- @param[in] IdtEntryCount IDT entries number to be updated.
-
-**/
-VOID
-UpdateIdtTable (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtTable,
- IN EXCEPTION_HANDLER_TEMPLATE_MAP *TemplateMap,
- IN UINTN IdtEntryCount
- )
-{
- UINT16 CodeSegment;
- UINTN Index;
- UINTN InterruptHandler;
-
- //
- // Use current CS as the segment selector of interrupt gate in IDT
- //
- CodeSegment = AsmReadCs ();
-
- for (Index = 0; Index < IdtEntryCount; Index ++) {
- IdtTable[Index].Bits.Selector = CodeSegment;
- //
- // Check reserved vectors attributes
- //
- switch (mReservedVectors[Index].Attribute) {
- case EFI_VECTOR_HANDOFF_DO_NOT_HOOK:
- //
- // Keep original IDT entry
- //
- continue;
- case EFI_VECTOR_HANDOFF_HOOK_AFTER:
- InitializeSpinLock (&mReservedVectors[Index].SpinLock);
- CopyMem (
- (VOID *) mReservedVectors[Index].HookAfterStubHeaderCode,
- (VOID *) TemplateMap->HookAfterStubHeaderStart,
- TemplateMap->ExceptionStubHeaderSize
- );
- AsmVectorNumFixup (
- (VOID *) mReservedVectors[Index].HookAfterStubHeaderCode,
- (UINT8) Index,
- (VOID *) TemplateMap->HookAfterStubHeaderStart
- );
- //
- // Go on the following code
- //
- case EFI_VECTOR_HANDOFF_HOOK_BEFORE:
- //
- // Save original IDT handler address
- //
- mReservedVectors[Index].ExceptonHandler = ArchGetIdtHandler (&IdtTable[Index]);
- //
- // Go on the following code
- //
- default:
- //
- // Update new IDT entry
- //
- InterruptHandler = TemplateMap->ExceptionStart + Index * TemplateMap->ExceptionStubHeaderSize;
- ArchUpdateIdtEntry (&IdtTable[Index], InterruptHandler);
- break;
- }
- }
-
- //
- // Save Interrupt number to global variable used for RegisterCpuInterruptHandler ()
- //
- mEnabledInterruptNum = IdtEntryCount;
-}
-
-/**
- Internal worker function to initialize exception handler.
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
- with default exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-InitializeCpuExceptionHandlersWorker (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- EFI_STATUS Status;
- IA32_DESCRIPTOR IdtDescriptor;
- UINTN IdtEntryCount;
- EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap;
- IA32_IDT_GATE_DESCRIPTOR *IdtTable;
-
- mReservedVectors = mReservedVectorsData;
- SetMem ((VOID *) mReservedVectors, sizeof (RESERVED_VECTORS_DATA) * CPU_EXCEPTION_NUM, 0xff);
- if (VectorInfo != NULL) {
- Status = ReadAndVerifyVectorInfo (VectorInfo, mReservedVectors, CPU_EXCEPTION_NUM);
- if (EFI_ERROR (Status)) {
- return EFI_INVALID_PARAMETER;
- }
- }
- InitializeSpinLock (&mDisplayMessageSpinLock);
-
- mExternalInterruptHandler = mExternalInterruptHandlerTable;
- //
- // Read IDT descriptor and calculate IDT size
- //
- AsmReadIdtr (&IdtDescriptor);
- IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
- if (IdtEntryCount > CPU_EXCEPTION_NUM) {
- //
- // CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most
- //
- IdtEntryCount = CPU_EXCEPTION_NUM;
- }
-
- IdtTable = (IA32_IDT_GATE_DESCRIPTOR *) IdtDescriptor.Base;
- AsmGetTemplateAddressMap (&TemplateMap);
- ASSERT (TemplateMap.ExceptionStubHeaderSize <= HOOKAFTER_STUB_SIZE);
- UpdateIdtTable (IdtTable, &TemplateMap, IdtEntryCount);
- mEnabledInterruptNum = IdtEntryCount;
- return EFI_SUCCESS;
-}
-
-/**
- Registers a function to be called from the processor interrupt handler.
-
- @param[in] InterruptType Defines which interrupt or exception to hook.
- @param[in] InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. If this parameter is NULL, then the handler
- will be uninstalled.
-
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
- previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
- previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported,
- or this function is not supported.
-**/
-EFI_STATUS
-RegisterCpuInterruptHandlerWorker (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- )
-{
- if (InterruptType < 0 || InterruptType >= (EFI_EXCEPTION_TYPE)mEnabledInterruptNum ||
- mReservedVectors[InterruptType].Attribute == EFI_VECTOR_HANDOFF_DO_NOT_HOOK) {
- return EFI_UNSUPPORTED;
- }
-
- if (InterruptHandler == NULL && mExternalInterruptHandler[InterruptType] == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- if (InterruptHandler != NULL && mExternalInterruptHandler[InterruptType] != NULL) {
- return EFI_ALREADY_STARTED;
- }
-
- mExternalInterruptHandler[InterruptType] = InterruptHandler;
- return EFI_SUCCESS;
-}
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c deleted file mode 100644 index 7a183bf9a4..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ /dev/null @@ -1,204 +0,0 @@ -/** @file
- IA32 CPU Exception Handler functons.
-
- Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-
-/**
- Return address map of exception handler template so that C code can generate
- exception tables.
-
- @param IdtEntry Pointer to IDT entry to be updated.
- @param InterruptHandler IDT handler value.
-
-**/
-VOID
-ArchUpdateIdtEntry (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
- IN UINTN InterruptHandler
- )
-{
- IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
- IdtEntry->Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
- IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
-}
-
-/**
- Read IDT handler value from IDT entry.
-
- @param IdtEntry Pointer to IDT entry to be read.
-
-**/
-UINTN
-ArchGetIdtHandler (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
- )
-{
- return (UINTN)IdtEntry->Bits.OffsetLow + (((UINTN)IdtEntry->Bits.OffsetHigh) << 16);
-}
-
-/**
- Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-
-**/
-VOID
-ArchSaveExceptionContext (
- IN UINTN ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- IA32_EFLAGS32 Eflags;
- //
- // Save Exception context in global variable
- //
- mReservedVectors[ExceptionType].OldFlags = SystemContext.SystemContextIa32->Eflags;
- mReservedVectors[ExceptionType].OldCs = SystemContext.SystemContextIa32->Cs;
- mReservedVectors[ExceptionType].OldIp = SystemContext.SystemContextIa32->Eip;
- mReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextIa32->ExceptionData;
- //
- // Clear IF flag to avoid old IDT handler enable interrupt by IRET
- //
- Eflags.UintN = SystemContext.SystemContextIa32->Eflags;
- Eflags.Bits.IF = 0;
- SystemContext.SystemContextIa32->Eflags = Eflags.UintN;
- //
- // Modify the EIP in stack, then old IDT handler will return to the stub code
- //
- SystemContext.SystemContextIa32->Eip = (UINTN) mReservedVectors[ExceptionType].HookAfterStubHeaderCode;
-}
-
-/**
- Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-ArchRestoreExceptionContext (
- IN UINTN ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- SystemContext.SystemContextIa32->Eflags = mReservedVectors[ExceptionType].OldFlags;
- SystemContext.SystemContextIa32->Cs = mReservedVectors[ExceptionType].OldCs;
- SystemContext.SystemContextIa32->Eip = mReservedVectors[ExceptionType].OldIp;
- SystemContext.SystemContextIa32->ExceptionData = mReservedVectors[ExceptionType].ExceptionData;
-}
-
-/**
- Display CPU information.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-DumpCpuContent (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- UINTN ImageBase;
- UINTN EntryPoint;
-
- InternalPrintMessage (
- "!!!! IA32 Exception Type - %02x(%a) CPU Apic ID - %08x !!!!\n",
- ExceptionType,
- GetExceptionNameStr (ExceptionType),
- GetApicId ()
- );
-
- InternalPrintMessage (
- "EIP - %08x, CS - %08x, EFLAGS - %08x\n",
- SystemContext.SystemContextIa32->Eip,
- SystemContext.SystemContextIa32->Cs,
- SystemContext.SystemContextIa32->Eflags
- );
- if ((mErrorCodeFlag & (1 << ExceptionType)) != 0) {
- InternalPrintMessage (
- "ExceptionData - %08x\n",
- SystemContext.SystemContextIa32->ExceptionData
- );
- }
- InternalPrintMessage (
- "EAX - %08x, ECX - %08x, EDX - %08x, EBX - %08x\n",
- SystemContext.SystemContextIa32->Eax,
- SystemContext.SystemContextIa32->Ecx,
- SystemContext.SystemContextIa32->Edx,
- SystemContext.SystemContextIa32->Ebx
- );
- InternalPrintMessage (
- "ESP - %08x, EBP - %08x, ESI - %08x, EDI - %08x\n",
- SystemContext.SystemContextIa32->Esp,
- SystemContext.SystemContextIa32->Ebp,
- SystemContext.SystemContextIa32->Esi,
- SystemContext.SystemContextIa32->Edi
- );
- InternalPrintMessage (
- "DS - %08x, ES - %08x, FS - %08x, GS - %08x, SS - %08x\n",
- SystemContext.SystemContextIa32->Ds,
- SystemContext.SystemContextIa32->Es,
- SystemContext.SystemContextIa32->Fs,
- SystemContext.SystemContextIa32->Gs,
- SystemContext.SystemContextIa32->Ss
- );
- InternalPrintMessage (
- "CR0 - %08x, CR2 - %08x, CR3 - %08x, CR4 - %08x\n",
- SystemContext.SystemContextIa32->Cr0,
- SystemContext.SystemContextIa32->Cr2,
- SystemContext.SystemContextIa32->Cr3,
- SystemContext.SystemContextIa32->Cr4
- );
- InternalPrintMessage (
- "DR0 - %08x, DR1 - %08x, DR2 - %08x, DR3 - %08x\n",
- SystemContext.SystemContextIa32->Dr0,
- SystemContext.SystemContextIa32->Dr1,
- SystemContext.SystemContextIa32->Dr2,
- SystemContext.SystemContextIa32->Dr3
- );
- InternalPrintMessage (
- "DR6 - %08x, DR7 - %08x\n",
- SystemContext.SystemContextIa32->Dr6,
- SystemContext.SystemContextIa32->Dr7
- );
- InternalPrintMessage (
- "GDTR - %08x %08x, IDTR - %08x %08x\n",
- SystemContext.SystemContextIa32->Gdtr[0],
- SystemContext.SystemContextIa32->Gdtr[1],
- SystemContext.SystemContextIa32->Idtr[0],
- SystemContext.SystemContextIa32->Idtr[1]
- );
- InternalPrintMessage (
- "LDTR - %08x, TR - %08x\n",
- SystemContext.SystemContextIa32->Ldtr,
- SystemContext.SystemContextIa32->Tr
- );
- InternalPrintMessage (
- "FXSAVE_STATE - %08x\n",
- &SystemContext.SystemContextIa32->FxSaveState
- );
-
- //
- // Find module image base and module entry point by RIP
- //
- ImageBase = FindModuleImageBase (SystemContext.SystemContextIa32->Eip, &EntryPoint);
- if (ImageBase != 0) {
- InternalPrintMessage (
- " (ImageBase=%08x, EntryPoint=%08x) !!!!\n",
- ImageBase,
- EntryPoint
- );
- }
-}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h deleted file mode 100644 index a8d3556a80..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h +++ /dev/null @@ -1,44 +0,0 @@ -/** @file
- Ia32 arch definition for CPU Exception Handler Library.
-
- Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
-#define _ARCH_CPU_INTERRUPT_DEFS_H_
-
-typedef struct {
- EFI_SYSTEM_CONTEXT_IA32 SystemContext;
- BOOLEAN ExceptionDataFlag;
- UINTN OldIdtHandler;
-} EXCEPTION_HANDLER_CONTEXT;
-
-//
-// Register Structure Definitions
-//
-typedef struct {
- EFI_STATUS_CODE_DATA Header;
- EFI_SYSTEM_CONTEXT_IA32 SystemContext;
-} CPU_STATUS_CODE_TEMPLATE;
-
-typedef struct {
- SPIN_LOCK SpinLock;
- UINT32 ApicId;
- UINT32 Attribute;
- UINTN ExceptonHandler;
- UINTN OldFlags;
- UINTN OldCs;
- UINTN OldIp;
- UINTN ExceptionData;
- UINT8 HookAfterStubHeaderCode[HOOKAFTER_STUB_SIZE];
-} RESERVED_VECTORS_DATA;
-
-#endif
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S deleted file mode 100644 index 3676809b4b..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S +++ /dev/null @@ -1,667 +0,0 @@ -#------------------------------------------------------------------------------
-#*
-#* Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
-#* This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* ExceptionHandlerAsm.S
-#*
-#* Abstract:
-#*
-#* IA32 CPU Exception Handler
-#
-#------------------------------------------------------------------------------
-
-
-#.MMX
-#.XMM
-
-ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
-
-#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
-#EXTRN ASM_PFX(mDoFarReturnFlag):DWORD # Do far return flag
-
-.text
-
-#
-# exception handler stub table
-#
-Exception0Handle:
- .byte 0x6a # push #VectorNum
- .byte 0
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception1Handle:
- .byte 0x6a # push #VectorNum
- .byte 1
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception2Handle:
- .byte 0x6a # push #VectorNum
- .byte 2
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception3Handle:
- .byte 0x6a # push #VectorNum
- .byte 3
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception4Handle:
- .byte 0x6a # push #VectorNum
- .byte 4
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception5Handle:
- .byte 0x6a # push #VectorNum
- .byte 5
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception6Handle:
- .byte 0x6a # push #VectorNum
- .byte 6
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception7Handle:
- .byte 0x6a # push #VectorNum
- .byte 7
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception8Handle:
- .byte 0x6a # push #VectorNum
- .byte 8
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception9Handle:
- .byte 0x6a # push #VectorNum
- .byte 9
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception10Handle:
- .byte 0x6a # push #VectorNum
- .byte 10
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception11Handle:
- .byte 0x6a # push #VectorNum
- .byte 11
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception12Handle:
- .byte 0x6a # push #VectorNum
- .byte 12
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception13Handle:
- .byte 0x6a # push #VectorNum
- .byte 13
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception14Handle:
- .byte 0x6a # push #VectorNum
- .byte 14
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception15Handle:
- .byte 0x6a # push #VectorNum
- .byte 15
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception16Handle:
- .byte 0x6a # push #VectorNum
- .byte 16
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception17Handle:
- .byte 0x6a # push #VectorNum
- .byte 17
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception18Handle:
- .byte 0x6a # push #VectorNum
- .byte 18
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception19Handle:
- .byte 0x6a # push #VectorNum
- .byte 19
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception20Handle:
- .byte 0x6a # push #VectorNum
- .byte 20
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception21Handle:
- .byte 0x6a # push #VectorNum
- .byte 21
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception22Handle:
- .byte 0x6a # push #VectorNum
- .byte 22
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception23Handle:
- .byte 0x6a # push #VectorNum
- .byte 23
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception24Handle:
- .byte 0x6a # push #VectorNum
- .byte 24
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception25Handle:
- .byte 0x6a # push #VectorNum
- .byte 25
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception26Handle:
- .byte 0x6a # push #VectorNum
- .byte 26
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception27Handle:
- .byte 0x6a # push #VectorNum
- .byte 27
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception28Handle:
- .byte 0x6a # push #VectorNum
- .byte 28
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception29Handle:
- .byte 0x6a # push #VectorNum
- .byte 29
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception30Handle:
- .byte 0x6a # push #VectorNum
- .byte 30
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-Exception31Handle:
- .byte 0x6a # push #VectorNum
- .byte 31
- pushl %eax
- .byte 0xB8
- .long ASM_PFX(CommonInterruptEntry)
- jmp *%eax
-
-HookAfterStubBegin:
- .byte 0x6a # push
-VectorNum:
- .byte 0 # 0 will be fixed
- pushl %eax
- .byte 0xB8 # movl ASM_PFX(HookAfterStubHeaderEnd), %eax
- .long ASM_PFX(HookAfterStubHeaderEnd)
- jmp *%eax
-ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
-ASM_PFX(HookAfterStubHeaderEnd):
- popl %eax
- subl $8, %esp # reserve room for filling exception data later
- pushl 8(%esp)
- xchgl (%esp), %ecx # get vector number
- bt %ecx, ASM_PFX(mErrorCodeFlag)
- jnc NoErrorData
- pushl (%esp) # addition push if exception data needed
-NoErrorData:
- xchg (%esp), %ecx # restore ecx
- pushl %eax
-
-#---------------------------------------;
-# CommonInterruptEntry ;
-#---------------------------------------;
-# The follow algorithm is used for the common interrupt routine.
-
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
- cli
- popl %eax
- #
- # All interrupt handlers are invoked through interrupt gates, so
- # IF flag automatically cleared at the entry point
- #
-
- #
- # Get vector number from top of stack
- #
- xchgl (%esp), %ecx
- andl $0x0FF, %ecx # Vector number should be less than 256
- cmpl $32, %ecx # Intel reserved vector for exceptions?
- jae NoErrorCode
- bt %ecx, ASM_PFX(mErrorCodeFlag)
- jc HasErrorCode
-
-NoErrorCode:
-
- #
- # Stack:
- # +---------------------+
- # + EFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + EIP +
- # +---------------------+
- # + ECX +
- # +---------------------+ <-- ESP
- #
- # Registers:
- # ECX - Vector Number
- #
-
- #
- # Put Vector Number on stack
- #
- pushl %ecx
-
- #
- # Put 0 (dummy) error code on stack, and restore ECX
- #
- xorl %ecx, %ecx # ECX = 0
- xchgl 4(%esp), %ecx
-
- jmp ErrorCodeAndVectorOnStack
-
-HasErrorCode:
-
- #
- # Stack:
- # +---------------------+
- # + EFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + EIP +
- # +---------------------+
- # + Error Code +
- # +---------------------+
- # + ECX +
- # +---------------------+ <-- ESP
- #
- # Registers:
- # ECX - Vector Number
- #
-
- #
- # Put Vector Number on stack and restore ECX
- #
- xchgl (%esp), %ecx
-
-ErrorCodeAndVectorOnStack:
- pushl %ebp
- movl %esp, %ebp
-
- #
- # Stack:
- # +---------------------+
- # + EFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + EIP +
- # +---------------------+
- # + Error Code +
- # +---------------------+
- # + Vector Number +
- # +---------------------+
- # + EBP +
- # +---------------------+ <-- EBP
- #
-
- #
- # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
- # is 16-byte aligned
- #
- andl $0x0fffffff0, %esp
- subl $12, %esp
-
- subl $8, %esp
- pushl $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- pushl $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
- pushl %eax
- pushl %ecx
- pushl %edx
- pushl %ebx
- leal 24(%ebp), %ecx
- pushl %ecx # ESP
- pushl (%ebp) # EBP
- pushl %esi
- pushl %edi
-
-#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
- movl %ss, %eax
- pushl %eax
- movzwl 16(%ebp), %eax
- pushl %eax
- movl %ds, %eax
- pushl %eax
- movl %es, %eax
- pushl %eax
- movl %fs, %eax
- pushl %eax
- movl %gs, %eax
- pushl %eax
-
-#; UINT32 Eip;
- movl 12(%ebp), %eax
- pushl %eax
-
-#; UINT32 Gdtr[2], Idtr[2];
- subl $8, %esp
- sidt (%esp)
- movl 2(%esp), %eax
- xchgl (%esp), %eax
- andl $0x0FFFF, %eax
- movl %eax, 4(%esp)
-
- subl $8, %esp
- sgdt (%esp)
- movl 2(%esp), %eax
- xchgl (%esp), %eax
- andl $0x0FFFF, %eax
- movl %eax, 4(%esp)
-
-#; UINT32 Ldtr, Tr;
- xorl %eax, %eax
- str %ax
- pushl %eax
- sldt %ax
- pushl %eax
-
-#; UINT32 EFlags;
- movl 20(%ebp), %eax
- pushl %eax
-
-#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
-## insure FXSAVE/FXRSTOR is enabled in CR4...
-## ... while we're at it, make sure DE is also enabled...
- mov $1, %eax
- pushl %ebx # temporarily save value of ebx on stack
- cpuid # use CPUID to determine if FXSAVE/FXRESTOR
- # and DE are supported
- popl %ebx # retore value of ebx that was overwritten
- # by CPUID
- movl %cr4, %eax
- pushl %eax # push cr4 firstly
- testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
- jz L1
- orl $BIT9, %eax # Set CR4.OSFXSR
-L1:
- testl $BIT2, %edx # Test for Debugging Extensions support
- jz L2
- orl $BIT3, %eax # Set CR4.DE
-L2:
- movl %eax, %cr4
- movl %cr3, %eax
- pushl %eax
- movl %cr2, %eax
- pushl %eax
- xorl %eax, %eax
- pushl %eax
- movl %cr0, %eax
- pushl %eax
-
-#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- movl %dr7, %eax
- pushl %eax
- movl %dr6, %eax
- pushl %eax
- movl %dr3, %eax
- pushl %eax
- movl %dr2, %eax
- pushl %eax
- movl %dr1, %eax
- pushl %eax
- movl %dr0, %eax
- pushl %eax
-
-#; FX_SAVE_STATE_IA32 FxSaveState;
- subl $512, %esp
- movl %esp, %edi
- testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support.
- # edx still contains result from CPUID above
- jz L3
- .byte 0x0f, 0x0ae, 0x07 #fxsave [edi]
-L3:
-
-#; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
- cld
-
-#; UINT32 ExceptionData;
- pushl 8(%ebp)
-
-#; Prepare parameter and call
- movl %esp, %edx
- pushl %edx
- movl 4(%ebp), %edx
- pushl %edx
-
- #
- # Call External Exception Handler
- #
- call ASM_PFX(CommonExceptionHandler)
- addl $8, %esp
-
- cli
-#; UINT32 ExceptionData;
- addl $4, %esp
-
-#; FX_SAVE_STATE_IA32 FxSaveState;
- movl %esp, %esi
- movl $1, %eax
- cpuid # use CPUID to determine if FXSAVE/FXRESTOR
- # are supported
- testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support
- jz L4
- .byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]
-L4:
- addl $512, %esp
-
-#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-#; Skip restoration of DRx registers to support in-circuit emualators
-#; or debuggers set breakpoint in interrupt/exception context
- addl $24, %esp
-
-#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
- popl %eax
- movl %eax, %cr0
- addl $4, %esp # not for Cr1
- popl %eax
- movl %eax, %cr2
- popl %eax
- movl %eax, %cr3
- popl %eax
- movl %eax, %cr4
-
-#; UINT32 EFlags;
- popl 20(%ebp)
-
-#; UINT32 Ldtr, Tr;
-#; UINT32 Gdtr[2], Idtr[2];
-#; Best not let anyone mess with these particular registers...
- addl $24, %esp
-
-#; UINT32 Eip;
- popl 12(%ebp)
-
-#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
-#; NOTE - modified segment registers could hang the debugger... We
-#; could attempt to insulate ourselves against this possibility,
-#; but that poses risks as well.
-#;
- popl %gs
- popl %fs
- popl %es
- popl %ds
- popl 16(%ebp)
- popl %ss
-
-#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
- popl %edi
- popl %esi
- addl $4, %esp # not for ebp
- addl $4, %esp # not for esp
- popl %ebx
- popl %edx
- popl %ecx
- popl %eax
-
- popl -8(%ebp)
- popl -4(%ebp)
- movl %ebp, %esp
- popl %ebp
- addl $8, %esp
- cmpl $0, -16(%esp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- jz DoReturn
- cmpl $1, -20(%esp) # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
- jz ErrorCode
- jmp *-16(%esp)
-ErrorCode:
- subl $4, %esp
- jmp *-12(%esp)
-
-DoReturn:
- cmpl $0, ASM_PFX(mDoFarReturnFlag)
- jz DoIret
- pushl 8(%esp) # save EFLAGS
- addl $16, %esp
- pushl -8(%esp) # save CS in new location
- pushl -8(%esp) # save EIP in new location
- pushl -8(%esp) # save EFLAGS in new location
- popfl # restore EFLAGS
- lret # far return
-
-DoIret:
- iretl
-
-
-#---------------------------------------;
-# _AsmGetTemplateAddressMap ;
-#---------------------------------------;
-#
-# Protocol prototype
-# AsmGetTemplateAddressMap (
-# EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
-# );
-#
-# Routine Description:
-#
-# Return address map of interrupt handler template so that C code can generate
-# interrupt table.
-#
-# Arguments:
-#
-#
-# Returns:
-#
-# Nothing
-#
-#
-# Input: [ebp][0] = Original ebp
-# [ebp][4] = Return address
-#
-# Output: Nothing
-#
-# Destroys: Nothing
-#-----------------------------------------------------------------------------;
-#-------------------------------------------------------------------------------------
-# AsmGetAddressMap (&AddressMap);
-#-------------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)
-ASM_PFX(AsmGetTemplateAddressMap):
-
- pushl %ebp
- movl %esp,%ebp
- pushal
-
- movl 0x8(%ebp), %ebx
- movl $Exception0Handle, (%ebx)
- movl $(Exception1Handle - Exception0Handle), 0x4(%ebx)
- movl $(HookAfterStubBegin), 0x8(%ebx)
-
- popal
- popl %ebp
- ret
-#-------------------------------------------------------------------------------------
-# AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-#-------------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)
-ASM_PFX(AsmVectorNumFixup):
- movl 8(%esp), %eax
- movl 4(%esp), %ecx
- movb %al, (VectorNum - HookAfterStubBegin)(%ecx)
- ret
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm deleted file mode 100644 index 12bbec0690..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.asm +++ /dev/null @@ -1,467 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; ExceptionHandlerAsm.Asm
-;
-; Abstract:
-;
-; IA32 CPU Exception Handler
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
- .686
- .model flat,C
-
-;
-; CommonExceptionHandler()
-;
-CommonExceptionHandler PROTO C
-
-.data
-
-EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
-EXTRN mDoFarReturnFlag:DWORD ; Do far return flag
-
-.code
-
-ALIGN 8
-
-;
-; exception handler stub table
-;
-AsmIdtVectorBegin:
-REPEAT 32
- db 6ah ; push #VectorNum
- db ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
- push eax
- mov eax, CommonInterruptEntry
- jmp eax
-ENDM
-AsmIdtVectorEnd:
-
-HookAfterStubBegin:
- db 6ah ; push
-VectorNum:
- db 0 ; 0 will be fixed
- push eax
- mov eax, HookAfterStubHeaderEnd
- jmp eax
-HookAfterStubHeaderEnd:
- pop eax
- sub esp, 8 ; reserve room for filling exception data later
- push [esp + 8]
- xchg ecx, [esp] ; get vector number
- bt mErrorCodeFlag, ecx
- jnc @F
- push [esp] ; addition push if exception data needed
-@@:
- xchg ecx, [esp] ; restore ecx
- push eax
-
-;----------------------------------------------------------------------------;
-; CommonInterruptEntry ;
-;----------------------------------------------------------------------------;
-; The follow algorithm is used for the common interrupt routine.
-; Entry from each interrupt with a push eax and eax=interrupt number
-; Stack:
-; +---------------------+
-; + EFlags +
-; +---------------------+
-; + CS +
-; +---------------------+
-; + EIP +
-; +---------------------+
-; + Error Code +
-; +---------------------+
-; + Vector Number +
-; +---------------------+
-; + EBP +
-; +---------------------+ <-- EBP
-CommonInterruptEntry PROC PUBLIC
- cli
- pop eax
- ;
- ; All interrupt handlers are invoked through interrupt gates, so
- ; IF flag automatically cleared at the entry point
- ;
-
- ;
- ; Get vector number from top of stack
- ;
- xchg ecx, [esp]
- and ecx, 0FFh ; Vector number should be less than 256
- cmp ecx, 32 ; Intel reserved vector for exceptions?
- jae NoErrorCode
- bt mErrorCodeFlag, ecx
- jc HasErrorCode
-
-NoErrorCode:
-
- ;
- ; Stack:
- ; +---------------------+
- ; + EFlags +
- ; +---------------------+
- ; + CS +
- ; +---------------------+
- ; + EIP +
- ; +---------------------+
- ; + ECX +
- ; +---------------------+ <-- ESP
- ;
- ; Registers:
- ; ECX - Vector Number
- ;
-
- ;
- ; Put Vector Number on stack
- ;
- push ecx
-
- ;
- ; Put 0 (dummy) error code on stack, and restore ECX
- ;
- xor ecx, ecx ; ECX = 0
- xchg ecx, [esp+4]
-
- jmp ErrorCodeAndVectorOnStack
-
-HasErrorCode:
-
- ;
- ; Stack:
- ; +---------------------+
- ; + EFlags +
- ; +---------------------+
- ; + CS +
- ; +---------------------+
- ; + EIP +
- ; +---------------------+
- ; + Error Code +
- ; +---------------------+
- ; + ECX +
- ; +---------------------+ <-- ESP
- ;
- ; Registers:
- ; ECX - Vector Number
- ;
-
- ;
- ; Put Vector Number on stack and restore ECX
- ;
- xchg ecx, [esp]
-
-ErrorCodeAndVectorOnStack:
- push ebp
- mov ebp, esp
-
- ;
- ; Stack:
- ; +---------------------+
- ; + EFlags +
- ; +---------------------+
- ; + CS +
- ; +---------------------+
- ; + EIP +
- ; +---------------------+
- ; + Error Code +
- ; +---------------------+
- ; + Vector Number +
- ; +---------------------+
- ; + EBP +
- ; +---------------------+ <-- EBP
- ;
-
- ;
- ; Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
- ; is 16-byte aligned
- ;
- and esp, 0fffffff0h
- sub esp, 12
-
- sub esp, 8
- push 0 ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- push 0 ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
-;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
- push eax
- push ecx
- push edx
- push ebx
- lea ecx, [ebp + 6 * 4]
- push ecx ; ESP
- push dword ptr [ebp] ; EBP
- push esi
- push edi
-
-;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
- mov eax, ss
- push eax
- movzx eax, word ptr [ebp + 4 * 4]
- push eax
- mov eax, ds
- push eax
- mov eax, es
- push eax
- mov eax, fs
- push eax
- mov eax, gs
- push eax
-
-;; UINT32 Eip;
- mov eax, [ebp + 3 * 4]
- push eax
-
-;; UINT32 Gdtr[2], Idtr[2];
- sub esp, 8
- sidt [esp]
- mov eax, [esp + 2]
- xchg eax, [esp]
- and eax, 0FFFFh
- mov [esp+4], eax
-
- sub esp, 8
- sgdt [esp]
- mov eax, [esp + 2]
- xchg eax, [esp]
- and eax, 0FFFFh
- mov [esp+4], eax
-
-;; UINT32 Ldtr, Tr;
- xor eax, eax
- str ax
- push eax
- sldt ax
- push eax
-
-;; UINT32 EFlags;
- mov eax, [ebp + 5 * 4]
- push eax
-
-;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
- mov eax, 1
- push ebx ; temporarily save value of ebx on stack
- cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and DE
- ; are supported
- pop ebx ; retore value of ebx that was overwritten by CPUID
- mov eax, cr4
- push eax ; push cr4 firstly
- test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
- jz @F
- or eax, BIT9 ; Set CR4.OSFXSR
-@@:
- test edx, BIT2 ; Test for Debugging Extensions support
- jz @F
- or eax, BIT3 ; Set CR4.DE
-@@:
- mov cr4, eax
- mov eax, cr3
- push eax
- mov eax, cr2
- push eax
- xor eax, eax
- push eax
- mov eax, cr0
- push eax
-
-;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- mov eax, dr7
- push eax
- mov eax, dr6
- push eax
- mov eax, dr3
- push eax
- mov eax, dr2
- push eax
- mov eax, dr1
- push eax
- mov eax, dr0
- push eax
-
-;; FX_SAVE_STATE_IA32 FxSaveState;
- sub esp, 512
- mov edi, esp
- test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.
- ; edx still contains result from CPUID above
- jz @F
- db 0fh, 0aeh, 07h ;fxsave [edi]
-@@:
-
-;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
- cld
-
-;; UINT32 ExceptionData;
- push dword ptr [ebp + 2 * 4]
-
-;; Prepare parameter and call
- mov edx, esp
- push edx
- mov edx, dword ptr [ebp + 1 * 4]
- push edx
-
- ;
- ; Call External Exception Handler
- ;
- mov eax, CommonExceptionHandler
- call eax
- add esp, 8
-
- cli
-;; UINT32 ExceptionData;
- add esp, 4
-
-;; FX_SAVE_STATE_IA32 FxSaveState;
- mov esi, esp
- mov eax, 1
- cpuid ; use CPUID to determine if FXSAVE/FXRESTOR
- ; are supported
- test edx, BIT24 ; Test for FXSAVE/FXRESTOR support
- jz @F
- db 0fh, 0aeh, 0eh ; fxrstor [esi]
-@@:
- add esp, 512
-
-;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-;; Skip restoration of DRx registers to support in-circuit emualators
-;; or debuggers set breakpoint in interrupt/exception context
- add esp, 4 * 6
-
-;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
- pop eax
- mov cr0, eax
- add esp, 4 ; not for Cr1
- pop eax
- mov cr2, eax
- pop eax
- mov cr3, eax
- pop eax
- mov cr4, eax
-
-;; UINT32 EFlags;
- pop dword ptr [ebp + 5 * 4]
-
-;; UINT32 Ldtr, Tr;
-;; UINT32 Gdtr[2], Idtr[2];
-;; Best not let anyone mess with these particular registers...
- add esp, 24
-
-;; UINT32 Eip;
- pop dword ptr [ebp + 3 * 4]
-
-;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
-;; NOTE - modified segment registers could hang the debugger... We
-;; could attempt to insulate ourselves against this possibility,
-;; but that poses risks as well.
-;;
- pop gs
- pop fs
- pop es
- pop ds
- pop dword ptr [ebp + 4 * 4]
- pop ss
-
-;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
- pop edi
- pop esi
- add esp, 4 ; not for ebp
- add esp, 4 ; not for esp
- pop ebx
- pop edx
- pop ecx
- pop eax
-
- pop dword ptr [ebp - 8]
- pop dword ptr [ebp - 4]
- mov esp, ebp
- pop ebp
- add esp, 8
- cmp dword ptr [esp - 16], 0 ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- jz DoReturn
- cmp dword ptr [esp - 20], 1 ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
- jz ErrorCode
- jmp dword ptr [esp - 16]
-ErrorCode:
- sub esp, 4
- jmp dword ptr [esp - 12]
-
-DoReturn:
- cmp mDoFarReturnFlag, 0 ; Check if need to do far return instead of IRET
- jz DoIret
- push [esp + 8] ; save EFLAGS
- add esp, 16
- push [esp - 8] ; save CS in new location
- push [esp - 8] ; save EIP in new location
- push [esp - 8] ; save EFLAGS in new location
- popfd ; restore EFLAGS
- retf ; far return
-
-DoIret:
- iretd
-
-CommonInterruptEntry ENDP
-
-;---------------------------------------;
-; _AsmGetTemplateAddressMap ;
-;----------------------------------------------------------------------------;
-;
-; Protocol prototype
-; AsmGetTemplateAddressMap (
-; EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap
-; );
-;
-; Routine Description:
-;
-; Return address map of interrupt handler template so that C code can generate
-; interrupt table.
-;
-; Arguments:
-;
-;
-; Returns:
-;
-; Nothing
-;
-;
-; Input: [ebp][0] = Original ebp
-; [ebp][4] = Return address
-;
-; Output: Nothing
-;
-; Destroys: Nothing
-;-----------------------------------------------------------------------------;
-AsmGetTemplateAddressMap proc near public
- push ebp ; C prolog
- mov ebp, esp
- pushad
-
- mov ebx, dword ptr [ebp + 08h]
- mov dword ptr [ebx], AsmIdtVectorBegin
- mov dword ptr [ebx + 4h], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
- mov dword ptr [ebx + 8h], HookAfterStubBegin
-
- popad
- pop ebp
- ret
-AsmGetTemplateAddressMap ENDP
-
-;-------------------------------------------------------------------------------------
-; AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-;-------------------------------------------------------------------------------------
-AsmVectorNumFixup proc near public
- mov eax, dword ptr [esp + 8]
- mov ecx, [esp + 4]
- mov [ecx + (VectorNum - HookAfterStubBegin)], al
- ret
-AsmVectorNumFixup ENDP
-END
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c deleted file mode 100644 index 7e94e38ae1..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ /dev/null @@ -1,183 +0,0 @@ -/** @file
- CPU exception handler library implemenation for SEC/PEIM modules.
-
-Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include "CpuExceptionCommon.h"
-
-//
-// Image Aglinment size for SEC/PEI phase
-//
-CONST UINTN mImageAlignSize = 4;
-CONST UINTN mDoFarReturnFlag = 0;
-
-/**
- Common exception handler.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-EFIAPI
-CommonExceptionHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- //
- // Display ExceptionType, CPU information and Image information
- //
- DumpCpuContent (ExceptionType, SystemContext);
-
- //
- // Enter a dead loop.
- //
- CpuDeadLoop ();
-}
-
-/**
- Initializes all CPU exceptions entries and provides the default exception handlers.
-
- Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
- persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
- If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
- If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
- Note: Before invoking this API, caller must allocate memory for IDT table and load
- IDTR by AsmWriteIdtr().
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
- with default exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- EFI_STATUS Status;
- RESERVED_VECTORS_DATA ReservedVectorData[CPU_EXCEPTION_NUM];
- IA32_DESCRIPTOR IdtDescriptor;
- UINTN IdtEntryCount;
- UINT16 CodeSegment;
- EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap;
- IA32_IDT_GATE_DESCRIPTOR *IdtTable;
- UINTN Index;
- UINTN InterruptHandler;
-
- if (VectorInfo != NULL) {
- SetMem ((VOID *) ReservedVectorData, sizeof (RESERVED_VECTORS_DATA) * CPU_EXCEPTION_NUM, 0xff);
- Status = ReadAndVerifyVectorInfo (VectorInfo, ReservedVectorData, CPU_EXCEPTION_NUM);
- if (EFI_ERROR (Status)) {
- return EFI_INVALID_PARAMETER;
- }
- }
- //
- // Read IDT descriptor and calculate IDT size
- //
- AsmReadIdtr (&IdtDescriptor);
- IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
- if (IdtEntryCount > CPU_EXCEPTION_NUM) {
- //
- // CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most
- //
- IdtEntryCount = CPU_EXCEPTION_NUM;
- }
- //
- // Use current CS as the segment selector of interrupt gate in IDT
- //
- CodeSegment = AsmReadCs ();
-
- AsmGetTemplateAddressMap (&TemplateMap);
- IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
- for (Index = 0; Index < IdtEntryCount; Index ++) {
- IdtTable[Index].Bits.Selector = CodeSegment;
- //
- // Check reserved vectors attributes if has, only EFI_VECTOR_HANDOFF_DO_NOT_HOOK
- // supported in this instance
- //
- if (VectorInfo != NULL) {
- if (ReservedVectorData[Index].Attribute == EFI_VECTOR_HANDOFF_DO_NOT_HOOK) {
- continue;
- }
- }
- //
- // Update IDT entry
- //
- InterruptHandler = TemplateMap.ExceptionStart + Index * TemplateMap.ExceptionStubHeaderSize;
- ArchUpdateIdtEntry (&IdtTable[Index], InterruptHandler);
- }
- return EFI_SUCCESS;
-}
-
-/**
- Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
- Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
- persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
- If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
- If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS All CPU interrupt/exception entries have been successfully initialized
- with default interrupt/exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-/**
- Registers a function to be called from the processor interrupt handler.
-
- This function registers and enables the handler specified by InterruptHandler for a processor
- interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
- handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
- The installed handler is called once for each processor interrupt or exception.
- NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
- InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
- @param[in] InterruptType Defines which interrupt or exception to hook.
- @param[in] InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. If this parameter is NULL, then the handler
- will be uninstalled.
-
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
- previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
- previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported,
- or this function is not supported.
-**/
-EFI_STATUS
-EFIAPI
-RegisterCpuInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- )
-{
- return EFI_UNSUPPORTED;
-}
\ No newline at end of file diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf deleted file mode 100644 index 951a6fe62c..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf +++ /dev/null @@ -1,57 +0,0 @@ -## @file
-# CPU Exception Handler library instance for SEC/PEI modules.
-#
-# Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SecPeiCpuExceptionHandlerLib
- MODULE_UNI_FILE = SecPeiCpuExceptionHandlerLib.uni
- FILE_GUID = CA4BBC99-DFC6-4234-B553-8B6586B7B113
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.1
- LIBRARY_CLASS = CpuExceptionHandlerLib|SEC PEI_CORE PEIM
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources.Ia32]
- Ia32/ExceptionHandlerAsm.asm
- Ia32/ExceptionHandlerAsm.S |GCC
- Ia32/ArchExceptionHandler.c
- Ia32/ArchInterruptDefs.h
-
-[Sources.X64]
- X64/ExceptionHandlerAsm.asm
- X64/ExceptionHandlerAsm.S |GCC
- X64/ArchExceptionHandler.c
- X64/ArchInterruptDefs.h
-
-[Sources.common]
- CpuExceptionCommon.h
- CpuExceptionCommon.c
- SecPeiCpuException.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
- SerialPortLib
- PrintLib
- LocalApicLib
- PeCoffGetEntryPointLib
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.uni b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.uni Binary files differdeleted file mode 100644 index e5530f451e..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf deleted file mode 100644 index 59f2d4d26d..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf +++ /dev/null @@ -1,61 +0,0 @@ -## @file
-# CPU Exception Handler library instance for SMM modules.
-#
-# Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SmmCpuExceptionHandlerLib
- MODULE_UNI_FILE = SmmCpuExceptionHandlerLib.uni
- FILE_GUID = 8D2C439B-3981-42ff-9CE5-1B50ECA502D6
- MODULE_TYPE = DXE_SMM_DRIVER
- VERSION_STRING = 1.1
- LIBRARY_CLASS = CpuExceptionHandlerLib|DXE_SMM_DRIVER
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources.Ia32]
- Ia32/ExceptionHandlerAsm.asm
- Ia32/ExceptionHandlerAsm.S |GCC
- Ia32/ArchExceptionHandler.c
- Ia32/ArchInterruptDefs.h
-
-[Sources.X64]
- X64/ExceptionHandlerAsm.asm
- X64/ExceptionHandlerAsm.S |GCC
- X64/ArchExceptionHandler.c
- X64/ArchInterruptDefs.h
-
-[Sources.common]
- CpuExceptionCommon.h
- CpuExceptionCommon.c
- DxeSmmCpuException.c
- SmmException.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
- SerialPortLib
- PrintLib
- SynchronizationLib
- LocalApicLib
- PeCoffGetEntryPointLib
- DebugLib
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.uni b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.uni Binary files differdeleted file mode 100644 index 1d348931d8..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c deleted file mode 100644 index 40f1250266..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c +++ /dev/null @@ -1,101 +0,0 @@ -/** @file
- CPU exception handler library implemenation for SMM modules.
-
- Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiSmm.h>
-#include "CpuExceptionCommon.h"
-
-CONST UINTN mDoFarReturnFlag = 1;
-
-/**
- Initializes all CPU exceptions entries and provides the default exception handlers.
-
- Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
- persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
- If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
- If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
- with default exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuExceptionHandlers (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- return InitializeCpuExceptionHandlersWorker (VectorInfo);
-}
-
-/**
- Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers.
-
- Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
- persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
- If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
- If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
-
- @param[in] VectorInfo Pointer to reserved vector list.
-
- @retval EFI_SUCCESS All CPU interrupt/exception entries have been successfully initialized
- with default interrupt/exception handlers.
- @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
- @retval EFI_UNSUPPORTED This function is not supported.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializeCpuInterruptHandlers (
- IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-/**
- Registers a function to be called from the processor interrupt handler.
-
- This function registers and enables the handler specified by InterruptHandler for a processor
- interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
- handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
- The installed handler is called once for each processor interrupt or exception.
- NOTE: This function should be invoked after InitializeCpuExceptionHandlers() or
- InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED returned.
-
- @param[in] InterruptType Defines which interrupt or exception to hook.
- @param[in] InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
- when a processor interrupt occurs. If this parameter is NULL, then the handler
- will be uninstalled.
-
- @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
- @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
- previously installed.
- @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
- previously installed.
- @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported,
- or this function is not supported.
-**/
-EFI_STATUS
-EFIAPI
-RegisterCpuInterruptHandler (
- IN EFI_EXCEPTION_TYPE InterruptType,
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
- )
-{
- return RegisterCpuInterruptHandlerWorker (InterruptType, InterruptHandler);
-}
\ No newline at end of file diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c deleted file mode 100644 index f711c3107b..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c +++ /dev/null @@ -1,235 +0,0 @@ -/** @file
- x64 CPU Exception Handler.
-
- Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "CpuExceptionCommon.h"
-
-/**
- Return address map of exception handler template so that C code can generate
- exception tables.
-
- @param IdtEntry Pointer to IDT entry to be updated.
- @param InterruptHandler IDT handler value.
-**/
-VOID
-ArchUpdateIdtEntry (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
- IN UINTN InterruptHandler
- )
-{
- IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;
- IdtEntry->Bits.OffsetHigh = (UINT16)((UINTN)InterruptHandler >> 16);
- IdtEntry->Bits.OffsetUpper = (UINT32)((UINTN)InterruptHandler >> 32);
- IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;
-}
-
-/**
- Read IDT handler value from IDT entry.
-
- @param IdtEntry Pointer to IDT entry to be read.
-
-**/
-UINTN
-ArchGetIdtHandler (
- IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
- )
-{
- return IdtEntry->Bits.OffsetLow + (((UINTN) IdtEntry->Bits.OffsetHigh) << 16) +
- (((UINTN) IdtEntry->Bits.OffsetUpper) << 32);
-}
-
-/**
- Save CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-ArchSaveExceptionContext (
- IN UINTN ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- IA32_EFLAGS32 Eflags;
- //
- // Save Exception context in global variable
- //
- mReservedVectors[ExceptionType].OldSs = SystemContext.SystemContextX64->Ss;
- mReservedVectors[ExceptionType].OldSp = SystemContext.SystemContextX64->Rsp;
- mReservedVectors[ExceptionType].OldFlags = SystemContext.SystemContextX64->Rflags;
- mReservedVectors[ExceptionType].OldCs = SystemContext.SystemContextX64->Cs;
- mReservedVectors[ExceptionType].OldIp = SystemContext.SystemContextX64->Rip;
- mReservedVectors[ExceptionType].ExceptionData = SystemContext.SystemContextX64->ExceptionData;
- //
- // Clear IF flag to avoid old IDT handler enable interrupt by IRET
- //
- Eflags.UintN = SystemContext.SystemContextX64->Rflags;
- Eflags.Bits.IF = 0;
- SystemContext.SystemContextX64->Rflags = Eflags.UintN;
- //
- // Modify the EIP in stack, then old IDT handler will return to the stub code
- //
- SystemContext.SystemContextX64->Rip = (UINTN) mReservedVectors[ExceptionType].HookAfterStubHeaderCode;
-}
-
-/**
- Restore CPU exception context when handling EFI_VECTOR_HANDOFF_HOOK_AFTER case.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-ArchRestoreExceptionContext (
- IN UINTN ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- SystemContext.SystemContextX64->Ss = mReservedVectors[ExceptionType].OldSs;
- SystemContext.SystemContextX64->Rsp = mReservedVectors[ExceptionType].OldSp;
- SystemContext.SystemContextX64->Rflags = mReservedVectors[ExceptionType].OldFlags;
- SystemContext.SystemContextX64->Cs = mReservedVectors[ExceptionType].OldCs;
- SystemContext.SystemContextX64->Rip = mReservedVectors[ExceptionType].OldIp;
- SystemContext.SystemContextX64->ExceptionData = mReservedVectors[ExceptionType].ExceptionData;
-}
-
-/**
- Display CPU information.
-
- @param ExceptionType Exception type.
- @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
-**/
-VOID
-DumpCpuContent (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- UINTN ImageBase;
- UINTN EntryPoint;
-
- InternalPrintMessage (
- "!!!! X64 Exception Type - %02x(%a) CPU Apic ID - %08x !!!!\n",
- ExceptionType,
- GetExceptionNameStr (ExceptionType),
- GetApicId ()
- );
-
- InternalPrintMessage (
- "RIP - %016lx, CS - %016lx, RFLAGS - %016lx\n",
- SystemContext.SystemContextX64->Rip,
- SystemContext.SystemContextX64->Cs,
- SystemContext.SystemContextX64->Rflags
- );
- if (mErrorCodeFlag & (1 << ExceptionType)) {
- InternalPrintMessage (
- "ExceptionData - %016lx\n",
- SystemContext.SystemContextX64->ExceptionData
- );
- }
- InternalPrintMessage (
- "RAX - %016lx, RCX - %016lx, RDX - %016lx\n",
- SystemContext.SystemContextX64->Rax,
- SystemContext.SystemContextX64->Rcx,
- SystemContext.SystemContextX64->Rdx
- );
- InternalPrintMessage (
- "RBX - %016lx, RSP - %016lx, RBP - %016lx\n",
- SystemContext.SystemContextX64->Rbx,
- SystemContext.SystemContextX64->Rsp,
- SystemContext.SystemContextX64->Rbp
- );
- InternalPrintMessage (
- "RSI - %016lx, RDI - %016lx\n",
- SystemContext.SystemContextX64->Rsi,
- SystemContext.SystemContextX64->Rdi
- );
- InternalPrintMessage (
- "R8 - %016lx, R9 - %016lx, R10 - %016lx\n",
- SystemContext.SystemContextX64->R8,
- SystemContext.SystemContextX64->R9,
- SystemContext.SystemContextX64->R10
- );
- InternalPrintMessage (
- "R11 - %016lx, R12 - %016lx, R13 - %016lx\n",
- SystemContext.SystemContextX64->R11,
- SystemContext.SystemContextX64->R12,
- SystemContext.SystemContextX64->R13
- );
- InternalPrintMessage (
- "R14 - %016lx, R15 - %016lx\n",
- SystemContext.SystemContextX64->R14,
- SystemContext.SystemContextX64->R15
- );
- InternalPrintMessage (
- "DS - %016lx, ES - %016lx, FS - %016lx\n",
- SystemContext.SystemContextX64->Ds,
- SystemContext.SystemContextX64->Es,
- SystemContext.SystemContextX64->Fs
- );
- InternalPrintMessage (
- "GS - %016lx, SS - %016lx\n",
- SystemContext.SystemContextX64->Gs,
- SystemContext.SystemContextX64->Ss
- );
- InternalPrintMessage (
- "CR0 - %016lx, CR2 - %016lx, CR3 - %016lx\n",
- SystemContext.SystemContextX64->Cr0,
- SystemContext.SystemContextX64->Cr2,
- SystemContext.SystemContextX64->Cr3
- );
- InternalPrintMessage (
- "CR4 - %016lx, CR8 - %016lx\n",
- SystemContext.SystemContextX64->Cr4,
- SystemContext.SystemContextX64->Cr8
- );
- InternalPrintMessage (
- "DR0 - %016lx, DR1 - %016lx, DR2 - %016lx\n",
- SystemContext.SystemContextX64->Dr0,
- SystemContext.SystemContextX64->Dr1,
- SystemContext.SystemContextX64->Dr2
- );
- InternalPrintMessage (
- "DR3 - %016lx, DR6 - %016lx, DR7 - %016lx\n",
- SystemContext.SystemContextX64->Dr3,
- SystemContext.SystemContextX64->Dr6,
- SystemContext.SystemContextX64->Dr7
- );
- InternalPrintMessage (
- "GDTR - %016lx %016lx, LDTR - %016lx\n",
- SystemContext.SystemContextX64->Gdtr[0],
- SystemContext.SystemContextX64->Gdtr[1],
- SystemContext.SystemContextX64->Ldtr
- );
- InternalPrintMessage (
- "IDTR - %016lx %016lx, TR - %016lx\n",
- SystemContext.SystemContextX64->Idtr[0],
- SystemContext.SystemContextX64->Idtr[1],
- SystemContext.SystemContextX64->Tr
- );
- InternalPrintMessage (
- "FXSAVE_STATE - %016lx\n",
- &SystemContext.SystemContextX64->FxSaveState
- );
-
- //
- // Find module image base and module entry point by RIP
- //
- ImageBase = FindModuleImageBase (SystemContext.SystemContextX64->Rip, &EntryPoint);
- if (ImageBase != 0) {
- InternalPrintMessage (
- " (ImageBase=%016lx, EntryPoint=%016lx) !!!!\n",
- ImageBase,
- EntryPoint
- );
- }
-}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h deleted file mode 100644 index 906480134a..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h +++ /dev/null @@ -1,46 +0,0 @@ -/** @file
- X64 arch definition for CPU Exception Handler Library.
-
- Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
-#define _ARCH_CPU_INTERRUPT_DEFS_H_
-
-typedef struct {
- EFI_SYSTEM_CONTEXT_X64 SystemContext;
- BOOLEAN ExceptionDataFlag;
- UINTN OldIdtHandler;
-} EXCEPTION_HANDLER_CONTEXT;
-
-//
-// Register Structure Definitions
-//
-typedef struct {
- EFI_STATUS_CODE_DATA Header;
- EFI_SYSTEM_CONTEXT_X64 SystemContext;
-} CPU_STATUS_CODE_TEMPLATE;
-
-typedef struct {
- SPIN_LOCK SpinLock;
- UINT32 ApicId;
- UINT32 Attribute;
- UINTN ExceptonHandler;
- UINTN OldSs;
- UINTN OldSp;
- UINTN OldFlags;
- UINTN OldCs;
- UINTN OldIp;
- UINTN ExceptionData;
- UINT8 HookAfterStubHeaderCode[HOOKAFTER_STUB_SIZE];
-} RESERVED_VECTORS_DATA;
-
-#endif
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S deleted file mode 100644 index 6b62f095bd..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.S +++ /dev/null @@ -1,433 +0,0 @@ -#------------------------------------------------------------------------------ ;
-# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-# ExceptionHandlerAsm.S
-#
-# Abstract:
-#
-# x64 CPU Exception Handler
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
-
-
-ASM_GLOBAL ASM_PFX(CommonExceptionHandler)
-
-#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
-#EXTRN ASM_PFX(mDoFarReturnFlag):QWORD # Do far return flag
-.text
-
-#ifdef __APPLE__
-# macros are different between GNU and Xcode as.
-.macro IDT_MACRO
- push $0
-#else
-.macro IDT_MACRO arg
- push \arg
-#endif
- jmp ASM_PFX(CommonInterruptEntry)
-.endm
-
-AsmIdtVectorBegin:
- IDT_MACRO $0
- IDT_MACRO $1
- IDT_MACRO $2
- IDT_MACRO $3
- IDT_MACRO $4
- IDT_MACRO $5
- IDT_MACRO $6
- IDT_MACRO $7
- IDT_MACRO $8
- IDT_MACRO $9
- IDT_MACRO $10
- IDT_MACRO $11
- IDT_MACRO $12
- IDT_MACRO $13
- IDT_MACRO $14
- IDT_MACRO $15
- IDT_MACRO $16
- IDT_MACRO $17
- IDT_MACRO $18
- IDT_MACRO $19
- IDT_MACRO $20
- IDT_MACRO $21
- IDT_MACRO $22
- IDT_MACRO $23
- IDT_MACRO $24
- IDT_MACRO $25
- IDT_MACRO $26
- IDT_MACRO $27
- IDT_MACRO $28
- IDT_MACRO $29
- IDT_MACRO $30
- IDT_MACRO $31
-AsmIdtVectorEnd:
-
-HookAfterStubHeaderBegin:
- .byte 0x6a # push
-PatchVectorNum:
- .byte 0 # 0 will be fixed
- .byte 0xe9 # jmp ASM_PFX(HookAfterStubHeaderEnd)
-PatchFuncAddress:
- .set HOOK_ADDRESS, ASM_PFX(HookAfterStubHeaderEnd) - . - 4
- .long HOOK_ADDRESS # will be fixed
-ASM_GLOBAL ASM_PFX(HookAfterStubHeaderEnd)
-ASM_PFX(HookAfterStubHeaderEnd):
- pushq %rax
- movq %rsp, %rax
- andl $0x0fffffff0, %esp # make sure 16-byte aligned for exception context
- subq $0x18, %rsp # reserve room for filling exception data later
- pushq %rcx
- movq 8(%rax), %rcx
- bt %ecx, ASM_PFX(mErrorCodeFlag)(%rip)
- jnc NoErrorData
- pushq (%rsp) # push additional rcx to make stack alignment
-NoErrorData:
- xchgq (%rsp), %rcx # restore rcx, save Exception Number in stack
- movq (%rax), %rax # restore rax
-
-#---------------------------------------;
-# CommonInterruptEntry ;
-#---------------------------------------;
-# The follow algorithm is used for the common interrupt routine.
-
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
- cli
- #
- # All interrupt handlers are invoked through interrupt gates, so
- # IF flag automatically cleared at the entry point
- #
- #
- # Calculate vector number
- #
- xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.
- andq $0x0FF, %rcx
- cmp $32, %ecx # Intel reserved vector for exceptions?
- jae NoErrorCode
- pushq %rax
- movl ASM_PFX(mErrorCodeFlag)(%rip), %eax
- bt %ecx, %eax
- popq %rax
- jc CommonInterruptEntry_al_0000
-
-NoErrorCode:
-
- #
- # Push a dummy error code on the stack
- # to maintain coherent stack map
- #
- pushq (%rsp)
- movq $0, 8(%rsp)
-CommonInterruptEntry_al_0000:
- pushq %rbp
- movq %rsp, %rbp
- pushq $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- pushq $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
- #
- # Stack:
- # +---------------------+ <-- 16-byte aligned ensured by processor
- # + Old SS +
- # +---------------------+
- # + Old RSP +
- # +---------------------+
- # + RFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + RIP +
- # +---------------------+
- # + Error Code +
- # +---------------------+
- # + RCX / Vector Number +
- # +---------------------+
- # + RBP +
- # +---------------------+ <-- RBP, 16-byte aligned
- #
-
-
- #
- # Since here the stack pointer is 16-byte aligned, so
- # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
- # is 16-byte aligned
- #
-
-#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- pushq %r15
- pushq %r14
- pushq %r13
- pushq %r12
- pushq %r11
- pushq %r10
- pushq %r9
- pushq %r8
- pushq %rax
- pushq 8(%rbp) # RCX
- pushq %rdx
- pushq %rbx
- pushq 48(%rbp) # RSP
- pushq (%rbp) # RBP
- pushq %rsi
- pushq %rdi
-
-#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
- movzwq 56(%rbp), %rax
- pushq %rax # for ss
- movzwq 32(%rbp), %rax
- pushq %rax # for cs
- mov %ds, %rax
- pushq %rax
- mov %es, %rax
- pushq %rax
- mov %fs, %rax
- pushq %rax
- mov %gs, %rax
- pushq %rax
-
- movq %rcx, 8(%rbp) # save vector number
-
-#; UINT64 Rip;
- pushq 24(%rbp)
-
-#; UINT64 Gdtr[2], Idtr[2];
- xorq %rax, %rax
- pushq %rax
- pushq %rax
- sidt (%rsp)
- xchgq 2(%rsp), %rax
- xchgq (%rsp), %rax
- xchgq 8(%rsp), %rax
-
- xorq %rax, %rax
- pushq %rax
- pushq %rax
- sgdt (%rsp)
- xchgq 2(%rsp), %rax
- xchgq (%rsp), %rax
- xchgq 8(%rsp), %rax
-
-#; UINT64 Ldtr, Tr;
- xorq %rax, %rax
- str %ax
- pushq %rax
- sldt %ax
- pushq %rax
-
-#; UINT64 RFlags;
- pushq 40(%rbp)
-
-#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- movq %cr8, %rax
- pushq %rax
- movq %cr4, %rax
- orq $0x208, %rax
- movq %rax, %cr4
- pushq %rax
- mov %cr3, %rax
- pushq %rax
- mov %cr2, %rax
- pushq %rax
- xorq %rax, %rax
- pushq %rax
- mov %cr0, %rax
- pushq %rax
-
-#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- movq %dr7, %rax
- pushq %rax
- movq %dr6, %rax
- pushq %rax
- movq %dr3, %rax
- pushq %rax
- movq %dr2, %rax
- pushq %rax
- movq %dr1, %rax
- pushq %rax
- movq %dr0, %rax
- pushq %rax
-
-#; FX_SAVE_STATE_X64 FxSaveState;
- subq $512, %rsp
- movq %rsp, %rdi
- .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
-
-#; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
- cld
-
-#; UINT32 ExceptionData;
- pushq 16(%rbp)
-
-#; Prepare parameter and call
- mov 8(%rbp), %rcx
- mov %rsp, %rdx
- #
- # Per X64 calling convention, allocate maximum parameter stack space
- # and make sure RSP is 16-byte aligned
- #
- subq $40, %rsp
- call ASM_PFX(CommonExceptionHandler)
- addq $40, %rsp
-
- cli
-#; UINT64 ExceptionData;
- addq $8, %rsp
-
-#; FX_SAVE_STATE_X64 FxSaveState;
-
- movq %rsp, %rsi
- .byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]
- addq $512, %rsp
-
-#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-#; Skip restoration of DRx registers to support in-circuit emualators
-#; or debuggers set breakpoint in interrupt/exception context
- addq $48, %rsp
-
-#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- popq %rax
- movq %rax, %cr0
- addq $8, %rsp # not for Cr1
- popq %rax
- movq %rax, %cr2
- popq %rax
- movq %rax, %cr3
- popq %rax
- movq %rax, %cr4
- popq %rax
- movq %rax, %cr8
-
-#; UINT64 RFlags;
- popq 40(%rbp)
-
-#; UINT64 Ldtr, Tr;
-#; UINT64 Gdtr[2], Idtr[2];
-#; Best not let anyone mess with these particular registers...
- addq $48, %rsp
-
-#; UINT64 Rip;
- popq 24(%rbp)
-
-#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
- popq %rax
- # mov %rax, %gs ; not for gs
- popq %rax
- # mov %rax, %fs ; not for fs
- # (X64 will not use fs and gs, so we do not restore it)
- popq %rax
- mov %rax, %es
- popq %rax
- mov %rax, %ds
- popq 32(%rbp) # for cs
- popq 56(%rbp) # for ss
-
-#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- popq %rdi
- popq %rsi
- addq $8, %rsp # not for rbp
- popq 48(%rbp) # for rsp
- popq %rbx
- popq %rdx
- popq %rcx
- popq %rax
- popq %r8
- popq %r9
- popq %r10
- popq %r11
- popq %r12
- popq %r13
- popq %r14
- popq %r15
-
- movq %rbp, %rsp
- popq %rbp
- addq $16, %rsp
- cmpq $0, -32(%rsp) # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- jz DoReturn # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
- cmpb $1, -40(%rsp)
- jz ErrorCode
- jmp *-32(%rsp)
-ErrorCode:
- subq $8, %rsp
- jmp *-24(%rsp)
-
-DoReturn:
- pushq %rax
- movq ASM_PFX(mDoFarReturnFlag)(%rip), %rax
- cmpq $0, %rax # Check if need to do far return instead of IRET
- popq %rax
- jz DoIret
- pushq %rax
- movq %rsp, %rax # save old RSP to rax
- movq 0x20(%rsp), %rsp
- pushq 0x10(%rax) # save CS in new location
- pushq 0x8(%rax) # save EIP in new location
- pushq 0x18(%rax) # save EFLAGS in new location
- movq (%rax), %rax # restore rax
- popfq # restore EFLAGS
- lretq # far return
-DoIret:
- iretq
-
-
-#-------------------------------------------------------------------------------------
-# AsmGetTemplateAddressMap (&AddressMap);
-#-------------------------------------------------------------------------------------
-# comments here for definition of address map
-ASM_GLOBAL ASM_PFX(AsmGetTemplateAddressMap)
-ASM_PFX(AsmGetTemplateAddressMap):
- pushq %rbp
- movq %rsp, %rbp
-
- leaq AsmIdtVectorBegin(%rip), %rax
- movq %rax, (%rcx)
- .set ENTRY_SIZE, ASM_PFX(HookAfterStubHeaderEnd) - HookAfterStubHeaderBegin
- movq $(ENTRY_SIZE), 0x08(%rcx)
- leaq HookAfterStubHeaderBegin(%rip), %rax
- movq %rax, 0x10(%rcx)
-
- popq %rbp
- ret
-
-#-------------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# AsmVectorNumFixup (
-# IN VOID *NewVectorAddr, // RCX
-# IN UINT8 VectorNum // RDX
-# IN VOID *OldVectorAddr, // R8
-# );
-#-------------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmVectorNumFixup)
-ASM_PFX(AsmVectorNumFixup):
- pushq %rbp
- movq %rsp, %rbp
-
-# Patch vector #
- movb %dl, (PatchVectorNum - HookAfterStubHeaderBegin)(%rcx)
-
-# Patch Function address
- subq %rcx, %r8 # Calculate the offset value
- movl (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx), %eax
- addq %r8, %rax
- movl %eax, (PatchFuncAddress - HookAfterStubHeaderBegin)(%rcx)
-
- popq %rbp
- ret
-
-#END
-
-
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm deleted file mode 100644 index cd21ec4c90..0000000000 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.asm +++ /dev/null @@ -1,389 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; ExceptionHandlerAsm.Asm
-;
-; Abstract:
-;
-; x64 CPU Exception Handler
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
-;
-; CommonExceptionHandler()
-;
-externdef CommonExceptionHandler:near
-
-EXTRN mErrorCodeFlag:DWORD ; Error code flags for exceptions
-EXTRN mDoFarReturnFlag:QWORD ; Do far return flag
-
-data SEGMENT
-
-.code
-
-ALIGN 8
-
-AsmIdtVectorBegin:
-REPEAT 32
- db 6ah ; push #VectorNum
- db ($ - AsmIdtVectorBegin) / ((AsmIdtVectorEnd - AsmIdtVectorBegin) / 32) ; VectorNum
- push rax
- mov rax, CommonInterruptEntry
- jmp rax
-ENDM
-AsmIdtVectorEnd:
-
-HookAfterStubHeaderBegin:
- db 6ah ; push
-@VectorNum:
- db 0 ; 0 will be fixed
- push rax
- mov rax, HookAfterStubHeaderEnd
- jmp rax
-HookAfterStubHeaderEnd:
- mov rax, rsp
- and sp, 0fff0h ; make sure 16-byte aligned for exception context
- sub rsp, 18h ; reserve room for filling exception data later
- push rcx
- mov rcx, [rax + 8]
- bt mErrorCodeFlag, ecx
- jnc @F
- push [rsp] ; push additional rcx to make stack alignment
-@@:
- xchg rcx, [rsp] ; restore rcx, save Exception Number in stack
- push [rax] ; push rax into stack to keep code consistence
-
-;---------------------------------------;
-; CommonInterruptEntry ;
-;---------------------------------------;
-; The follow algorithm is used for the common interrupt routine.
-; Entry from each interrupt with a push eax and eax=interrupt number
-; Stack frame would be as follows as specified in IA32 manuals:
-;
-; +---------------------+ <-- 16-byte aligned ensured by processor
-; + Old SS +
-; +---------------------+
-; + Old RSP +
-; +---------------------+
-; + RFlags +
-; +---------------------+
-; + CS +
-; +---------------------+
-; + RIP +
-; +---------------------+
-; + Error Code +
-; +---------------------+
-; + Vector Number +
-; +---------------------+
-; + RBP +
-; +---------------------+ <-- RBP, 16-byte aligned
-; The follow algorithm is used for the common interrupt routine.
-CommonInterruptEntry PROC PUBLIC
- cli
- pop rax
- ;
- ; All interrupt handlers are invoked through interrupt gates, so
- ; IF flag automatically cleared at the entry point
- ;
- xchg rcx, [rsp] ; Save rcx into stack and save vector number into rcx
- and rcx, 0FFh
- cmp ecx, 32 ; Intel reserved vector for exceptions?
- jae NoErrorCode
- bt mErrorCodeFlag, ecx
- jc @F
-
-NoErrorCode:
-
- ;
- ; Push a dummy error code on the stack
- ; to maintain coherent stack map
- ;
- push [rsp]
- mov qword ptr [rsp + 8], 0
-@@:
- push rbp
- mov rbp, rsp
- push 0 ; clear EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- push 0 ; clear EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
-
- ;
- ; Stack:
- ; +---------------------+ <-- 16-byte aligned ensured by processor
- ; + Old SS +
- ; +---------------------+
- ; + Old RSP +
- ; +---------------------+
- ; + RFlags +
- ; +---------------------+
- ; + CS +
- ; +---------------------+
- ; + RIP +
- ; +---------------------+
- ; + Error Code +
- ; +---------------------+
- ; + RCX / Vector Number +
- ; +---------------------+
- ; + RBP +
- ; +---------------------+ <-- RBP, 16-byte aligned
- ;
-
-
- ;
- ; Since here the stack pointer is 16-byte aligned, so
- ; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
- ; is 16-byte aligned
- ;
-
-;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- push r15
- push r14
- push r13
- push r12
- push r11
- push r10
- push r9
- push r8
- push rax
- push qword ptr [rbp + 8] ; RCX
- push rdx
- push rbx
- push qword ptr [rbp + 48] ; RSP
- push qword ptr [rbp] ; RBP
- push rsi
- push rdi
-
-;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
- movzx rax, word ptr [rbp + 56]
- push rax ; for ss
- movzx rax, word ptr [rbp + 32]
- push rax ; for cs
- mov rax, ds
- push rax
- mov rax, es
- push rax
- mov rax, fs
- push rax
- mov rax, gs
- push rax
-
- mov [rbp + 8], rcx ; save vector number
-
-;; UINT64 Rip;
- push qword ptr [rbp + 24]
-
-;; UINT64 Gdtr[2], Idtr[2];
- xor rax, rax
- push rax
- push rax
- sidt [rsp]
- xchg rax, [rsp + 2]
- xchg rax, [rsp]
- xchg rax, [rsp + 8]
-
- xor rax, rax
- push rax
- push rax
- sgdt [rsp]
- xchg rax, [rsp + 2]
- xchg rax, [rsp]
- xchg rax, [rsp + 8]
-
-;; UINT64 Ldtr, Tr;
- xor rax, rax
- str ax
- push rax
- sldt ax
- push rax
-
-;; UINT64 RFlags;
- push qword ptr [rbp + 40]
-
-;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- mov rax, cr8
- push rax
- mov rax, cr4
- or rax, 208h
- mov cr4, rax
- push rax
- mov rax, cr3
- push rax
- mov rax, cr2
- push rax
- xor rax, rax
- push rax
- mov rax, cr0
- push rax
-
-;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- mov rax, dr7
- push rax
- mov rax, dr6
- push rax
- mov rax, dr3
- push rax
- mov rax, dr2
- push rax
- mov rax, dr1
- push rax
- mov rax, dr0
- push rax
-
-;; FX_SAVE_STATE_X64 FxSaveState;
- sub rsp, 512
- mov rdi, rsp
- db 0fh, 0aeh, 07h ;fxsave [rdi]
-
-;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
- cld
-
-;; UINT32 ExceptionData;
- push qword ptr [rbp + 16]
-
-;; Prepare parameter and call
- mov rcx, [rbp + 8]
- mov rdx, rsp
- ;
- ; Per X64 calling convention, allocate maximum parameter stack space
- ; and make sure RSP is 16-byte aligned
- ;
- sub rsp, 4 * 8 + 8
- mov rax, CommonExceptionHandler
- call rax
- add rsp, 4 * 8 + 8
-
- cli
-;; UINT64 ExceptionData;
- add rsp, 8
-
-;; FX_SAVE_STATE_X64 FxSaveState;
-
- mov rsi, rsp
- db 0fh, 0aeh, 0Eh ; fxrstor [rsi]
- add rsp, 512
-
-;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-;; Skip restoration of DRx registers to support in-circuit emualators
-;; or debuggers set breakpoint in interrupt/exception context
- add rsp, 8 * 6
-
-;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- pop rax
- mov cr0, rax
- add rsp, 8 ; not for Cr1
- pop rax
- mov cr2, rax
- pop rax
- mov cr3, rax
- pop rax
- mov cr4, rax
- pop rax
- mov cr8, rax
-
-;; UINT64 RFlags;
- pop qword ptr [rbp + 40]
-
-;; UINT64 Ldtr, Tr;
-;; UINT64 Gdtr[2], Idtr[2];
-;; Best not let anyone mess with these particular registers...
- add rsp, 48
-
-;; UINT64 Rip;
- pop qword ptr [rbp + 24]
-
-;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
- pop rax
- ; mov gs, rax ; not for gs
- pop rax
- ; mov fs, rax ; not for fs
- ; (X64 will not use fs and gs, so we do not restore it)
- pop rax
- mov es, rax
- pop rax
- mov ds, rax
- pop qword ptr [rbp + 32] ; for cs
- pop qword ptr [rbp + 56] ; for ss
-
-;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- pop rdi
- pop rsi
- add rsp, 8 ; not for rbp
- pop qword ptr [rbp + 48] ; for rsp
- pop rbx
- pop rdx
- pop rcx
- pop rax
- pop r8
- pop r9
- pop r10
- pop r11
- pop r12
- pop r13
- pop r14
- pop r15
-
- mov rsp, rbp
- pop rbp
- add rsp, 16
- cmp qword ptr [rsp - 32], 0 ; check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler
- jz DoReturn
- cmp qword ptr [rsp - 40], 1 ; check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag
- jz ErrorCode
- jmp qword ptr [rsp - 32]
-ErrorCode:
- sub rsp, 8
- jmp qword ptr [rsp - 24]
-
-DoReturn:
- cmp mDoFarReturnFlag, 0 ; Check if need to do far return instead of IRET
- jz DoIret
- push rax
- mov rax, rsp ; save old RSP to rax
- mov rsp, [rsp + 20h]
- push [rax + 10h] ; save CS in new location
- push [rax + 8h] ; save EIP in new location
- push [rax + 18h] ; save EFLAGS in new location
- mov rax, [rax] ; restore rax
- popfq ; restore EFLAGS
- DB 48h ; prefix to composite "retq" with next "retf"
- retf ; far return
-DoIret:
- iretq
-
-CommonInterruptEntry ENDP
-
-;-------------------------------------------------------------------------------------
-; GetTemplateAddressMap (&AddressMap);
-;-------------------------------------------------------------------------------------
-; comments here for definition of address map
-AsmGetTemplateAddressMap PROC
- mov rax, offset AsmIdtVectorBegin
- mov qword ptr [rcx], rax
- mov qword ptr [rcx + 8h], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
- mov rax, offset HookAfterStubHeaderBegin
- mov qword ptr [rcx + 10h], rax
- ret
-AsmGetTemplateAddressMap ENDP
-
-;-------------------------------------------------------------------------------------
-; AsmVectorNumFixup (*NewVectorAddr, VectorNum, *OldVectorAddr);
-;-------------------------------------------------------------------------------------
-AsmVectorNumFixup PROC
- mov rax, rdx
- mov [rcx + (@VectorNum - HookAfterStubHeaderBegin)], al
- ret
-AsmVectorNumFixup ENDP
-
-END
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c deleted file mode 100644 index a65560542c..0000000000 --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c +++ /dev/null @@ -1,1719 +0,0 @@ -/** @file
- MTRR setting library
-
- Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-
-#include <Library/MtrrLib.h>
-#include <Library/BaseLib.h>
-#include <Library/CpuLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-
-//
-// Context to save and restore when MTRRs are programmed
-//
-typedef struct {
- UINTN Cr4;
- BOOLEAN InterruptState;
-} MTRR_CONTEXT;
-
-//
-// This table defines the offset, base and length of the fixed MTRRs
-//
-CONST FIXED_MTRR mMtrrLibFixedMtrrTable[] = {
- {
- MTRR_LIB_IA32_MTRR_FIX64K_00000,
- 0,
- SIZE_64KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX16K_80000,
- 0x80000,
- SIZE_16KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX16K_A0000,
- 0xA0000,
- SIZE_16KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_C0000,
- 0xC0000,
- SIZE_4KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_C8000,
- 0xC8000,
- SIZE_4KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_D0000,
- 0xD0000,
- SIZE_4KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_D8000,
- 0xD8000,
- SIZE_4KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_E0000,
- 0xE0000,
- SIZE_4KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_E8000,
- 0xE8000,
- SIZE_4KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_F0000,
- 0xF0000,
- SIZE_4KB
- },
- {
- MTRR_LIB_IA32_MTRR_FIX4K_F8000,
- 0xF8000,
- SIZE_4KB
- },
-};
-
-//
-// Lookup table used to print MTRRs
-//
-GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8 *mMtrrMemoryCacheTypeShortName[] = {
- "UC", // CacheUncacheable
- "WC", // CacheWriteCombining
- "R*", // Invalid
- "R*", // Invalid
- "WT", // CacheWriteThrough
- "WP", // CacheWriteProtected
- "WB", // CacheWriteBack
- "R*" // Invalid
-};
-
-/**
- Returns the variable MTRR count for the CPU.
-
- @return Variable MTRR count
-
-**/
-UINT32
-EFIAPI
-GetVariableMtrrCount (
- VOID
- )
-{
- UINT32 VariableMtrrCount;
-
- if (!IsMtrrSupported ()) {
- return 0;
- }
-
- VariableMtrrCount = (UINT32)(AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP) & MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK);
- ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-
- return VariableMtrrCount;
-}
-
-/**
- Returns the firmware usable variable MTRR count for the CPU.
-
- @return Firmware usable variable MTRR count
-
-**/
-UINT32
-EFIAPI
-GetFirmwareVariableMtrrCount (
- VOID
- )
-{
- UINT32 VariableMtrrCount;
-
- VariableMtrrCount = GetVariableMtrrCount ();
- if (VariableMtrrCount < RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER) {
- return 0;
- }
-
- return VariableMtrrCount - RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER;
-}
-
-/**
- Returns the default MTRR cache type for the system.
-
- @return The default MTRR cache type.
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-EFIAPI
-MtrrGetDefaultMemoryType (
- VOID
- )
-{
- if (!IsMtrrSupported ()) {
- return CacheUncacheable;
- }
-
- return (MTRR_MEMORY_CACHE_TYPE) (AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE) & 0x7);
-}
-
-/**
- Preparation before programming MTRR.
-
- This function will do some preparation for programming MTRRs:
- disable cache, invalid cache and disable MTRR caching functionality
-
- @param[out] MtrrContext Pointer to context to save
-
-**/
-VOID
-PreMtrrChange (
- OUT MTRR_CONTEXT *MtrrContext
- )
-{
- //
- // Disable interrupts and save current interrupt state
- //
- MtrrContext->InterruptState = SaveAndDisableInterrupts();
-
- //
- // Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
- //
- AsmDisableCache ();
-
- //
- // Save original CR4 value and clear PGE flag (Bit 7)
- //
- MtrrContext->Cr4 = AsmReadCr4 ();
- AsmWriteCr4 (MtrrContext->Cr4 & (~BIT7));
-
- //
- // Flush all TLBs
- //
- CpuFlushTlb ();
-
- //
- // Disable Mtrrs
- //
- AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 0);
-}
-
-/**
- Cleaning up after programming MTRRs.
-
- This function will do some clean up after programming MTRRs:
- Flush all TLBs, re-enable caching, restore CR4.
-
- @param[in] MtrrContext Pointer to context to restore
-
-**/
-VOID
-PostMtrrChangeEnableCache (
- IN MTRR_CONTEXT *MtrrContext
- )
-{
- //
- // Flush all TLBs
- //
- CpuFlushTlb ();
-
- //
- // Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
- //
- AsmEnableCache ();
-
- //
- // Restore original CR4 value
- //
- AsmWriteCr4 (MtrrContext->Cr4);
-
- //
- // Restore original interrupt state
- //
- SetInterruptState (MtrrContext->InterruptState);
-}
-
-/**
- Cleaning up after programming MTRRs.
-
- This function will do some clean up after programming MTRRs:
- enable MTRR caching functionality, and enable cache
-
- @param[in] MtrrContext Pointer to context to restore
-
-**/
-VOID
-PostMtrrChange (
- IN MTRR_CONTEXT *MtrrContext
- )
-{
- //
- // Enable Cache MTRR
- //
- AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 3);
-
- PostMtrrChangeEnableCache (MtrrContext);
-}
-
-
-/**
- Programs fixed MTRRs registers.
-
- @param MemoryCacheType The memory type to set.
- @param Base The base address of memory range.
- @param Length The length of memory range.
-
- @retval RETURN_SUCCESS The cache type was updated successfully
- @retval RETURN_UNSUPPORTED The requested range or cache type was invalid
- for the fixed MTRRs.
-
-**/
-RETURN_STATUS
-ProgramFixedMtrr (
- IN UINT64 MemoryCacheType,
- IN OUT UINT64 *Base,
- IN OUT UINT64 *Length
- )
-{
- UINT32 MsrNum;
- UINT32 ByteShift;
- UINT64 TempQword;
- UINT64 OrMask;
- UINT64 ClearMask;
-
- TempQword = 0;
- OrMask = 0;
- ClearMask = 0;
-
- for (MsrNum = 0; MsrNum < MTRR_NUMBER_OF_FIXED_MTRR; MsrNum++) {
- if ((*Base >= mMtrrLibFixedMtrrTable[MsrNum].BaseAddress) &&
- (*Base <
- (
- mMtrrLibFixedMtrrTable[MsrNum].BaseAddress +
- (8 * mMtrrLibFixedMtrrTable[MsrNum].Length)
- )
- )
- ) {
- break;
- }
- }
-
- if (MsrNum == MTRR_NUMBER_OF_FIXED_MTRR) {
- return RETURN_UNSUPPORTED;
- }
-
- //
- // We found the fixed MTRR to be programmed
- //
- for (ByteShift = 0; ByteShift < 8; ByteShift++) {
- if (*Base ==
- (
- mMtrrLibFixedMtrrTable[MsrNum].BaseAddress +
- (ByteShift * mMtrrLibFixedMtrrTable[MsrNum].Length)
- )
- ) {
- break;
- }
- }
-
- if (ByteShift == 8) {
- return RETURN_UNSUPPORTED;
- }
-
- for (
- ;
- ((ByteShift < 8) && (*Length >= mMtrrLibFixedMtrrTable[MsrNum].Length));
- ByteShift++
- ) {
- OrMask |= LShiftU64 ((UINT64) MemoryCacheType, (UINT32) (ByteShift * 8));
- ClearMask |= LShiftU64 ((UINT64) 0xFF, (UINT32) (ByteShift * 8));
- *Length -= mMtrrLibFixedMtrrTable[MsrNum].Length;
- *Base += mMtrrLibFixedMtrrTable[MsrNum].Length;
- }
-
- if (ByteShift < 8 && (*Length != 0)) {
- return RETURN_UNSUPPORTED;
- }
-
- TempQword =
- (AsmReadMsr64 (mMtrrLibFixedMtrrTable[MsrNum].Msr) & ~ClearMask) | OrMask;
- AsmWriteMsr64 (mMtrrLibFixedMtrrTable[MsrNum].Msr, TempQword);
- return RETURN_SUCCESS;
-}
-
-
-/**
- Get the attribute of variable MTRRs.
-
- This function shadows the content of variable MTRRs into an
- internal array: VariableMtrr.
-
- @param MtrrValidBitsMask The mask for the valid bit of the MTRR
- @param MtrrValidAddressMask The valid address mask for MTRR
- @param VariableMtrr The array to shadow variable MTRRs content
-
- @return The return value of this paramter indicates the
- number of MTRRs which has been used.
-
-**/
-UINT32
-EFIAPI
-MtrrGetMemoryAttributeInVariableMtrr (
- IN UINT64 MtrrValidBitsMask,
- IN UINT64 MtrrValidAddressMask,
- OUT VARIABLE_MTRR *VariableMtrr
- )
-{
- UINTN Index;
- UINT32 MsrNum;
- UINT32 UsedMtrr;
- UINT32 FirmwareVariableMtrrCount;
- UINT32 VariableMtrrEnd;
-
- if (!IsMtrrSupported ()) {
- return 0;
- }
-
- FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
- VariableMtrrEnd = MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (2 * GetVariableMtrrCount ()) - 1;
-
- ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * MTRR_NUMBER_OF_VARIABLE_MTRR);
- UsedMtrr = 0;
-
- for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE, Index = 0;
- (
- (MsrNum < VariableMtrrEnd) &&
- (Index < FirmwareVariableMtrrCount)
- );
- MsrNum += 2
- ) {
- if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) != 0) {
- VariableMtrr[Index].Msr = MsrNum;
- VariableMtrr[Index].BaseAddress = (AsmReadMsr64 (MsrNum) &
- MtrrValidAddressMask);
- VariableMtrr[Index].Length = ((~(AsmReadMsr64 (MsrNum + 1) &
- MtrrValidAddressMask)
- ) &
- MtrrValidBitsMask
- ) + 1;
- VariableMtrr[Index].Type = (AsmReadMsr64 (MsrNum) & 0x0ff);
- VariableMtrr[Index].Valid = TRUE;
- VariableMtrr[Index].Used = TRUE;
- UsedMtrr = UsedMtrr + 1;
- Index++;
- }
- }
- return UsedMtrr;
-}
-
-
-/**
- Checks overlap between given memory range and MTRRs.
-
- @param Start The start address of memory range.
- @param End The end address of memory range.
- @param VariableMtrr The array to shadow variable MTRRs content
-
- @retval TRUE Overlap exists.
- @retval FALSE No overlap.
-
-**/
-BOOLEAN
-CheckMemoryAttributeOverlap (
- IN PHYSICAL_ADDRESS Start,
- IN PHYSICAL_ADDRESS End,
- IN VARIABLE_MTRR *VariableMtrr
- )
-{
- UINT32 Index;
-
- for (Index = 0; Index < 6; Index++) {
- if (
- VariableMtrr[Index].Valid &&
- !(
- (Start > (VariableMtrr[Index].BaseAddress +
- VariableMtrr[Index].Length - 1)
- ) ||
- (End < VariableMtrr[Index].BaseAddress)
- )
- ) {
- return TRUE;
- }
- }
-
- return FALSE;
-}
-
-
-/**
- Marks a variable MTRR as non-valid.
-
- @param Index The index of the array VariableMtrr to be invalidated
- @param VariableMtrr The array to shadow variable MTRRs content
- @param UsedMtrr The number of MTRRs which has already been used
-
-**/
-VOID
-InvalidateShadowMtrr (
- IN UINTN Index,
- IN VARIABLE_MTRR *VariableMtrr,
- OUT UINT32 *UsedMtrr
- )
-{
- VariableMtrr[Index].Valid = FALSE;
- *UsedMtrr = *UsedMtrr - 1;
-}
-
-
-/**
- Combine memory attributes.
-
- If overlap exists between given memory range and MTRRs, try to combine them.
-
- @param Attributes The memory type to set.
- @param Base The base address of memory range.
- @param Length The length of memory range.
- @param VariableMtrr The array to shadow variable MTRRs content
- @param UsedMtrr The number of MTRRs which has already been used
- @param OverwriteExistingMtrr Returns whether an existing MTRR was used
-
- @retval EFI_SUCCESS Memory region successfully combined.
- @retval EFI_ACCESS_DENIED Memory region cannot be combined.
-
-**/
-RETURN_STATUS
-CombineMemoryAttribute (
- IN UINT64 Attributes,
- IN OUT UINT64 *Base,
- IN OUT UINT64 *Length,
- IN VARIABLE_MTRR *VariableMtrr,
- IN OUT UINT32 *UsedMtrr,
- OUT BOOLEAN *OverwriteExistingMtrr
- )
-{
- UINT32 Index;
- UINT64 CombineStart;
- UINT64 CombineEnd;
- UINT64 MtrrEnd;
- UINT64 EndAddress;
- UINT32 FirmwareVariableMtrrCount;
- BOOLEAN CoveredByExistingMtrr;
-
- FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
-
- *OverwriteExistingMtrr = FALSE;
- CoveredByExistingMtrr = FALSE;
- EndAddress = *Base +*Length - 1;
-
- for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {
-
- MtrrEnd = VariableMtrr[Index].BaseAddress + VariableMtrr[Index].Length - 1;
- if (
- !VariableMtrr[Index].Valid ||
- (
- *Base > (MtrrEnd) ||
- (EndAddress < VariableMtrr[Index].BaseAddress)
- )
- ) {
- continue;
- }
-
- //
- // Combine same attribute MTRR range
- //
- if (Attributes == VariableMtrr[Index].Type) {
- //
- // if the Mtrr range contain the request range, set a flag, then continue to
- // invalidate any MTRR of the same request range with higher priority cache type.
- //
- if (VariableMtrr[Index].BaseAddress <= *Base && MtrrEnd >= EndAddress) {
- CoveredByExistingMtrr = TRUE;
- continue;
- }
- //
- // invalid this MTRR, and program the combine range
- //
- CombineStart =
- (*Base) < VariableMtrr[Index].BaseAddress ?
- (*Base) :
- VariableMtrr[Index].BaseAddress;
- CombineEnd = EndAddress > MtrrEnd ? EndAddress : MtrrEnd;
-
- //
- // Record the MTRR usage status in VariableMtrr array.
- //
- InvalidateShadowMtrr (Index, VariableMtrr, UsedMtrr);
- *Base = CombineStart;
- *Length = CombineEnd - CombineStart + 1;
- EndAddress = CombineEnd;
- *OverwriteExistingMtrr = TRUE;
- continue;
- } else {
- //
- // The cache type is different, but the range is convered by one MTRR
- //
- if (VariableMtrr[Index].BaseAddress == *Base && MtrrEnd == EndAddress) {
- InvalidateShadowMtrr (Index, VariableMtrr, UsedMtrr);
- continue;
- }
-
- }
-
- if ((Attributes== MTRR_CACHE_WRITE_THROUGH &&
- VariableMtrr[Index].Type == MTRR_CACHE_WRITE_BACK) ||
- (Attributes == MTRR_CACHE_WRITE_BACK &&
- VariableMtrr[Index].Type == MTRR_CACHE_WRITE_THROUGH) ||
- (Attributes == MTRR_CACHE_UNCACHEABLE) ||
- (VariableMtrr[Index].Type == MTRR_CACHE_UNCACHEABLE)
- ) {
- *OverwriteExistingMtrr = TRUE;
- continue;
- }
- //
- // Other type memory overlap is invalid
- //
- return RETURN_ACCESS_DENIED;
- }
-
- if (CoveredByExistingMtrr) {
- *Length = 0;
- }
-
- return RETURN_SUCCESS;
-}
-
-
-/**
- Calculate the maximum value which is a power of 2, but less the MemoryLength.
-
- @param MemoryLength The number to pass in.
- @return The maximum value which is align to power of 2 and less the MemoryLength
-
-**/
-UINT64
-Power2MaxMemory (
- IN UINT64 MemoryLength
- )
-{
- UINT64 Result;
-
- if (RShiftU64 (MemoryLength, 32) != 0) {
- Result = LShiftU64 (
- (UINT64) GetPowerOfTwo32 (
- (UINT32) RShiftU64 (MemoryLength, 32)
- ),
- 32
- );
- } else {
- Result = (UINT64) GetPowerOfTwo32 ((UINT32) MemoryLength);
- }
-
- return Result;
-}
-
-
-/**
- Determine the MTRR numbers used to program a memory range.
-
- This function first checks the alignment of the base address. If the alignment of the base address <= Length,
- cover the memory range (BaseAddress, alignment) by a MTRR, then BaseAddress += alignment and Length -= alignment.
- Repeat the step until alignment > Length.
-
- Then this function determines which direction of programming the variable MTRRs for the remaining length
- will use fewer MTRRs.
-
- @param BaseAddress Length of Memory to program MTRR
- @param Length Length of Memory to program MTRR
- @param MtrrNumber Pointer to the number of necessary MTRRs
-
- @retval TRUE Positive direction is better.
- FALSE Negtive direction is better.
-
-**/
-BOOLEAN
-GetMtrrNumberAndDirection (
- IN UINT64 BaseAddress,
- IN UINT64 Length,
- IN UINTN *MtrrNumber
- )
-{
- UINT64 TempQword;
- UINT64 Alignment;
- UINT32 Positive;
- UINT32 Subtractive;
-
- *MtrrNumber = 0;
-
- if (BaseAddress != 0) {
- do {
- //
- // Calculate the alignment of the base address.
- //
- Alignment = LShiftU64 (1, (UINTN)LowBitSet64 (BaseAddress));
-
- if (Alignment > Length) {
- break;
- }
-
- (*MtrrNumber)++;
- BaseAddress += Alignment;
- Length -= Alignment;
- } while (TRUE);
-
- if (Length == 0) {
- return TRUE;
- }
- }
-
- TempQword = Length;
- Positive = 0;
- Subtractive = 0;
-
- do {
- TempQword -= Power2MaxMemory (TempQword);
- Positive++;
- } while (TempQword != 0);
-
- TempQword = Power2MaxMemory (LShiftU64 (Length, 1)) - Length;
- Subtractive++;
- do {
- TempQword -= Power2MaxMemory (TempQword);
- Subtractive++;
- } while (TempQword != 0);
-
- if (Positive <= Subtractive) {
- *MtrrNumber += Positive;
- return TRUE;
- } else {
- *MtrrNumber += Subtractive;
- return FALSE;
- }
-}
-
-/**
- Invalid variable MTRRs according to the value in the shadow array.
-
- This function programs MTRRs according to the values specified
- in the shadow array.
-
- @param VariableMtrr The array to shadow variable MTRRs content
-
-**/
-VOID
-InvalidateMtrr (
- IN VARIABLE_MTRR *VariableMtrr
- )
-{
- UINTN Index;
- UINTN VariableMtrrCount;
- MTRR_CONTEXT MtrrContext;
-
- PreMtrrChange (&MtrrContext);
- Index = 0;
- VariableMtrrCount = GetVariableMtrrCount ();
- while (Index < VariableMtrrCount) {
- if (!VariableMtrr[Index].Valid && VariableMtrr[Index].Used) {
- AsmWriteMsr64 (VariableMtrr[Index].Msr, 0);
- AsmWriteMsr64 (VariableMtrr[Index].Msr + 1, 0);
- VariableMtrr[Index].Used = FALSE;
- }
- Index ++;
- }
- PostMtrrChange (&MtrrContext);
-}
-
-
-/**
- Programs variable MTRRs
-
- This function programs variable MTRRs
-
- @param MtrrNumber Index of MTRR to program.
- @param BaseAddress Base address of memory region.
- @param Length Length of memory region.
- @param MemoryCacheType Memory type to set.
- @param MtrrValidAddressMask The valid address mask for MTRR
-
-**/
-VOID
-ProgramVariableMtrr (
- IN UINTN MtrrNumber,
- IN PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN UINT64 MemoryCacheType,
- IN UINT64 MtrrValidAddressMask
- )
-{
- UINT64 TempQword;
- MTRR_CONTEXT MtrrContext;
-
- PreMtrrChange (&MtrrContext);
-
- //
- // MTRR Physical Base
- //
- TempQword = (BaseAddress & MtrrValidAddressMask) | MemoryCacheType;
- AsmWriteMsr64 ((UINT32) MtrrNumber, TempQword);
-
- //
- // MTRR Physical Mask
- //
- TempQword = ~(Length - 1);
- AsmWriteMsr64 (
- (UINT32) (MtrrNumber + 1),
- (TempQword & MtrrValidAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED
- );
-
- PostMtrrChange (&MtrrContext);
-}
-
-
-/**
- Convert the Memory attibute value to MTRR_MEMORY_CACHE_TYPE.
-
- @param MtrrType MTRR memory type
-
- @return The enum item in MTRR_MEMORY_CACHE_TYPE
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-GetMemoryCacheTypeFromMtrrType (
- IN UINT64 MtrrType
- )
-{
- switch (MtrrType) {
- case MTRR_CACHE_UNCACHEABLE:
- return CacheUncacheable;
- case MTRR_CACHE_WRITE_COMBINING:
- return CacheWriteCombining;
- case MTRR_CACHE_WRITE_THROUGH:
- return CacheWriteThrough;
- case MTRR_CACHE_WRITE_PROTECTED:
- return CacheWriteProtected;
- case MTRR_CACHE_WRITE_BACK:
- return CacheWriteBack;
- default:
- //
- // MtrrType is MTRR_CACHE_INVALID_TYPE, that means
- // no mtrr covers the range
- //
- return MtrrGetDefaultMemoryType ();
- }
-}
-
-/**
- Initializes the valid bits mask and valid address mask for MTRRs.
-
- This function initializes the valid bits mask and valid address mask for MTRRs.
-
- @param MtrrValidBitsMask The mask for the valid bit of the MTRR
- @param MtrrValidAddressMask The valid address mask for the MTRR
-
-**/
-VOID
-MtrrLibInitializeMtrrMask (
- OUT UINT64 *MtrrValidBitsMask,
- OUT UINT64 *MtrrValidAddressMask
- )
-{
- UINT32 RegEax;
- UINT8 PhysicalAddressBits;
-
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
-
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-
- PhysicalAddressBits = (UINT8) RegEax;
-
- *MtrrValidBitsMask = LShiftU64 (1, PhysicalAddressBits) - 1;
- *MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL;
- } else {
- *MtrrValidBitsMask = MTRR_LIB_MSR_VALID_MASK;
- *MtrrValidAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS;
- }
-}
-
-
-/**
- Determing the real attribute of a memory range.
-
- This function is to arbitrate the real attribute of the memory when
- there are 2 MTRR covers the same memory range. For further details,
- please refer the IA32 Software Developer's Manual, Volume 3,
- Section 10.11.4.1.
-
- @param MtrrType1 the first kind of Memory type
- @param MtrrType2 the second kind of memory type
-
-**/
-UINT64
-MtrrPrecedence (
- UINT64 MtrrType1,
- UINT64 MtrrType2
- )
-{
- UINT64 MtrrType;
-
- MtrrType = MTRR_CACHE_INVALID_TYPE;
- switch (MtrrType1) {
- case MTRR_CACHE_UNCACHEABLE:
- MtrrType = MTRR_CACHE_UNCACHEABLE;
- break;
- case MTRR_CACHE_WRITE_COMBINING:
- if (
- MtrrType2==MTRR_CACHE_WRITE_COMBINING ||
- MtrrType2==MTRR_CACHE_UNCACHEABLE
- ) {
- MtrrType = MtrrType2;
- }
- break;
- case MTRR_CACHE_WRITE_THROUGH:
- if (
- MtrrType2==MTRR_CACHE_WRITE_THROUGH ||
- MtrrType2==MTRR_CACHE_WRITE_BACK
- ) {
- MtrrType = MTRR_CACHE_WRITE_THROUGH;
- } else if(MtrrType2==MTRR_CACHE_UNCACHEABLE) {
- MtrrType = MTRR_CACHE_UNCACHEABLE;
- }
- break;
- case MTRR_CACHE_WRITE_PROTECTED:
- if (MtrrType2 == MTRR_CACHE_WRITE_PROTECTED ||
- MtrrType2 == MTRR_CACHE_UNCACHEABLE) {
- MtrrType = MtrrType2;
- }
- break;
- case MTRR_CACHE_WRITE_BACK:
- if (
- MtrrType2== MTRR_CACHE_UNCACHEABLE ||
- MtrrType2==MTRR_CACHE_WRITE_THROUGH ||
- MtrrType2== MTRR_CACHE_WRITE_BACK
- ) {
- MtrrType = MtrrType2;
- }
- break;
- case MTRR_CACHE_INVALID_TYPE:
- MtrrType = MtrrType2;
- break;
- default:
- break;
- }
-
- if (MtrrType2 == MTRR_CACHE_INVALID_TYPE) {
- MtrrType = MtrrType1;
- }
- return MtrrType;
-}
-
-
-/**
- This function attempts to set the attributes for a memory range.
-
- @param BaseAddress The physical address that is the start
- address of a memory region.
- @param Length The size in bytes of the memory region.
- @param Attributes The bit mask of attributes to set for the
- memory region.
-
- @retval RETURN_SUCCESS The attributes were set for the memory
- region.
- @retval RETURN_INVALID_PARAMETER Length is zero.
- @retval RETURN_UNSUPPORTED The processor does not support one or
- more bytes of the memory resource range
- specified by BaseAddress and Length.
- @retval RETURN_UNSUPPORTED The bit mask of attributes is not support
- for the memory resource range specified
- by BaseAddress and Length.
- @retval RETURN_ACCESS_DENIED The attributes for the memory resource
- range specified by BaseAddress and Length
- cannot be modified.
- @retval RETURN_OUT_OF_RESOURCES There are not enough system resources to
- modify the attributes of the memory
- resource range.
-
-**/
-RETURN_STATUS
-EFIAPI
-MtrrSetMemoryAttribute (
- IN PHYSICAL_ADDRESS BaseAddress,
- IN UINT64 Length,
- IN MTRR_MEMORY_CACHE_TYPE Attribute
- )
-{
- UINT64 TempQword;
- RETURN_STATUS Status;
- UINT64 MemoryType;
- UINT64 Alignment;
- BOOLEAN OverLap;
- BOOLEAN Positive;
- UINT32 MsrNum;
- UINTN MtrrNumber;
- VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
- UINT32 UsedMtrr;
- UINT64 MtrrValidBitsMask;
- UINT64 MtrrValidAddressMask;
- BOOLEAN OverwriteExistingMtrr;
- UINT32 FirmwareVariableMtrrCount;
- UINT32 VariableMtrrEnd;
- MTRR_CONTEXT MtrrContext;
-
- DEBUG((DEBUG_CACHE, "MtrrSetMemoryAttribute() %a:%016lx-%016lx\n", mMtrrMemoryCacheTypeShortName[Attribute], BaseAddress, Length));
-
- if (!IsMtrrSupported ()) {
- Status = RETURN_UNSUPPORTED;
- goto Done;
- }
-
- FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
- VariableMtrrEnd = MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (2 * GetVariableMtrrCount ()) - 1;
-
- MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
-
- TempQword = 0;
- MemoryType = (UINT64)Attribute;
- OverwriteExistingMtrr = FALSE;
-
- //
- // Check for an invalid parameter
- //
- if (Length == 0) {
- Status = RETURN_INVALID_PARAMETER;
- goto Done;
- }
-
- if (
- (BaseAddress & ~MtrrValidAddressMask) != 0 ||
- (Length & ~MtrrValidAddressMask) != 0
- ) {
- Status = RETURN_UNSUPPORTED;
- goto Done;
- }
-
- //
- // Check if Fixed MTRR
- //
- Status = RETURN_SUCCESS;
- while ((BaseAddress < BASE_1MB) && (Length > 0) && Status == RETURN_SUCCESS) {
- PreMtrrChange (&MtrrContext);
- Status = ProgramFixedMtrr (MemoryType, &BaseAddress, &Length);
- PostMtrrChange (&MtrrContext);
- if (RETURN_ERROR (Status)) {
- goto Done;
- }
- }
-
- if (Length == 0) {
- //
- // A Length of 0 can only make sense for fixed MTTR ranges.
- // Since we just handled the fixed MTRRs, we can skip the
- // variable MTRR section.
- //
- goto Done;
- }
-
- //
- // Since memory ranges below 1MB will be overridden by the fixed MTRRs,
- // we can set the base to 0 to save variable MTRRs.
- //
- if (BaseAddress == BASE_1MB) {
- BaseAddress = 0;
- Length += SIZE_1MB;
- }
-
- //
- // Check for overlap
- //
- UsedMtrr = MtrrGetMemoryAttributeInVariableMtrr (MtrrValidBitsMask, MtrrValidAddressMask, VariableMtrr);
- OverLap = CheckMemoryAttributeOverlap (BaseAddress, BaseAddress + Length - 1, VariableMtrr);
- if (OverLap) {
- Status = CombineMemoryAttribute (MemoryType, &BaseAddress, &Length, VariableMtrr, &UsedMtrr, &OverwriteExistingMtrr);
- if (RETURN_ERROR (Status)) {
- goto Done;
- }
-
- if (Length == 0) {
- //
- // Combined successfully, invalidate the now-unused MTRRs
- //
- InvalidateMtrr(VariableMtrr);
- Status = RETURN_SUCCESS;
- goto Done;
- }
- }
-
- //
- // The memory type is the same with the type specified by
- // MTRR_LIB_IA32_MTRR_DEF_TYPE.
- //
- if ((!OverwriteExistingMtrr) && (Attribute == MtrrGetDefaultMemoryType ())) {
- //
- // Invalidate the now-unused MTRRs
- //
- InvalidateMtrr(VariableMtrr);
- goto Done;
- }
-
- Positive = GetMtrrNumberAndDirection (BaseAddress, Length, &MtrrNumber);
-
- if ((UsedMtrr + MtrrNumber) > FirmwareVariableMtrrCount) {
- Status = RETURN_OUT_OF_RESOURCES;
- goto Done;
- }
-
- //
- // Invalidate the now-unused MTRRs
- //
- InvalidateMtrr(VariableMtrr);
-
- //
- // Find first unused MTRR
- //
- for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
- MsrNum < VariableMtrrEnd;
- MsrNum += 2
- ) {
- if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
- break;
- }
- }
-
- if (BaseAddress != 0) {
- do {
- //
- // Calculate the alignment of the base address.
- //
- Alignment = LShiftU64 (1, (UINTN)LowBitSet64 (BaseAddress));
-
- if (Alignment > Length) {
- break;
- }
-
- //
- // Find unused MTRR
- //
- for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
- if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
- break;
- }
- }
-
- ProgramVariableMtrr (
- MsrNum,
- BaseAddress,
- Alignment,
- MemoryType,
- MtrrValidAddressMask
- );
- BaseAddress += Alignment;
- Length -= Alignment;
- } while (TRUE);
-
- if (Length == 0) {
- goto Done;
- }
- }
-
- TempQword = Length;
-
- if (!Positive) {
- Length = Power2MaxMemory (LShiftU64 (TempQword, 1));
-
- //
- // Find unused MTRR
- //
- for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
- if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
- break;
- }
- }
-
- ProgramVariableMtrr (
- MsrNum,
- BaseAddress,
- Length,
- MemoryType,
- MtrrValidAddressMask
- );
- BaseAddress += Length;
- TempQword = Length - TempQword;
- MemoryType = MTRR_CACHE_UNCACHEABLE;
- }
-
- do {
- //
- // Find unused MTRR
- //
- for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
- if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
- break;
- }
- }
-
- Length = Power2MaxMemory (TempQword);
- if (!Positive) {
- BaseAddress -= Length;
- }
-
- ProgramVariableMtrr (
- MsrNum,
- BaseAddress,
- Length,
- MemoryType,
- MtrrValidAddressMask
- );
-
- if (Positive) {
- BaseAddress += Length;
- }
- TempQword -= Length;
-
- } while (TempQword > 0);
-
-Done:
- DEBUG((DEBUG_CACHE, " Status = %r\n", Status));
- if (!RETURN_ERROR (Status)) {
- MtrrDebugPrintAllMtrrs ();
- }
-
- return Status;
-}
-
-
-/**
- This function will get the memory cache type of the specific address.
-
- This function is mainly for debug purpose.
-
- @param Address The specific address
-
- @return Memory cache type of the sepcific address
-
-**/
-MTRR_MEMORY_CACHE_TYPE
-EFIAPI
-MtrrGetMemoryAttribute (
- IN PHYSICAL_ADDRESS Address
- )
-{
- UINT64 TempQword;
- UINTN Index;
- UINTN SubIndex;
- UINT64 MtrrType;
- UINT64 TempMtrrType;
- MTRR_MEMORY_CACHE_TYPE CacheType;
- VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
- UINT64 MtrrValidBitsMask;
- UINT64 MtrrValidAddressMask;
- UINTN VariableMtrrCount;
-
- if (!IsMtrrSupported ()) {
- return CacheUncacheable;
- }
-
- //
- // Check if MTRR is enabled, if not, return UC as attribute
- //
- TempQword = AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE);
- MtrrType = MTRR_CACHE_INVALID_TYPE;
-
- if ((TempQword & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
- return CacheUncacheable;
- }
-
- //
- // If address is less than 1M, then try to go through the fixed MTRR
- //
- if (Address < BASE_1MB) {
- if ((TempQword & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED) != 0) {
- //
- // Go through the fixed MTRR
- //
- for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
- if (Address >= mMtrrLibFixedMtrrTable[Index].BaseAddress &&
- Address < (
- mMtrrLibFixedMtrrTable[Index].BaseAddress +
- (mMtrrLibFixedMtrrTable[Index].Length * 8)
- )
- ) {
- SubIndex =
- ((UINTN)Address - mMtrrLibFixedMtrrTable[Index].BaseAddress) /
- mMtrrLibFixedMtrrTable[Index].Length;
- TempQword = AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
- MtrrType = RShiftU64 (TempQword, SubIndex * 8) & 0xFF;
- return GetMemoryCacheTypeFromMtrrType (MtrrType);
- }
- }
- }
- }
- MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
- MtrrGetMemoryAttributeInVariableMtrr(
- MtrrValidBitsMask,
- MtrrValidAddressMask,
- VariableMtrr
- );
-
- //
- // Go through the variable MTRR
- //
- VariableMtrrCount = GetVariableMtrrCount ();
- ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-
- for (Index = 0; Index < VariableMtrrCount; Index++) {
- if (VariableMtrr[Index].Valid) {
- if (Address >= VariableMtrr[Index].BaseAddress &&
- Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) {
- TempMtrrType = VariableMtrr[Index].Type;
- MtrrType = MtrrPrecedence (MtrrType, TempMtrrType);
- }
- }
- }
- CacheType = GetMemoryCacheTypeFromMtrrType (MtrrType);
-
- return CacheType;
-}
-
-
-/**
- This function will get the raw value in variable MTRRs
-
- @param VariableSettings A buffer to hold variable MTRRs content.
-
- @return The VariableSettings input pointer
-
-**/
-MTRR_VARIABLE_SETTINGS*
-EFIAPI
-MtrrGetVariableMtrr (
- OUT MTRR_VARIABLE_SETTINGS *VariableSettings
- )
-{
- UINT32 Index;
- UINT32 VariableMtrrCount;
-
- if (!IsMtrrSupported ()) {
- return VariableSettings;
- }
-
- VariableMtrrCount = GetVariableMtrrCount ();
- ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-
- for (Index = 0; Index < VariableMtrrCount; Index++) {
- VariableSettings->Mtrr[Index].Base =
- AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1));
- VariableSettings->Mtrr[Index].Mask =
- AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1);
- }
-
- return VariableSettings;
-}
-
-
-/**
- Worker function setting variable MTRRs
-
- @param VariableSettings A buffer to hold variable MTRRs content.
-
-**/
-VOID
-MtrrSetVariableMtrrWorker (
- IN MTRR_VARIABLE_SETTINGS *VariableSettings
- )
-{
- UINT32 Index;
- UINT32 VariableMtrrCount;
-
- VariableMtrrCount = GetVariableMtrrCount ();
- ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
-
- for (Index = 0; Index < VariableMtrrCount; Index++) {
- AsmWriteMsr64 (
- MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1),
- VariableSettings->Mtrr[Index].Base
- );
- AsmWriteMsr64 (
- MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1,
- VariableSettings->Mtrr[Index].Mask
- );
- }
-}
-
-
-/**
- This function sets variable MTRRs
-
- @param VariableSettings A buffer to hold variable MTRRs content.
-
- @return The pointer of VariableSettings
-
-**/
-MTRR_VARIABLE_SETTINGS*
-EFIAPI
-MtrrSetVariableMtrr (
- IN MTRR_VARIABLE_SETTINGS *VariableSettings
- )
-{
- MTRR_CONTEXT MtrrContext;
-
- if (!IsMtrrSupported ()) {
- return VariableSettings;
- }
-
- PreMtrrChange (&MtrrContext);
- MtrrSetVariableMtrrWorker (VariableSettings);
- PostMtrrChange (&MtrrContext);
- return VariableSettings;
-}
-
-
-/**
- This function gets the content in fixed MTRRs
-
- @param FixedSettings A buffer to hold fixed Mtrrs content.
-
- @retval The pointer of FixedSettings
-
-**/
-MTRR_FIXED_SETTINGS*
-EFIAPI
-MtrrGetFixedMtrr (
- OUT MTRR_FIXED_SETTINGS *FixedSettings
- )
-{
- UINT32 Index;
-
- if (!IsMtrrSupported ()) {
- return FixedSettings;
- }
-
- for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
- FixedSettings->Mtrr[Index] =
- AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
- };
-
- return FixedSettings;
-}
-
-/**
- Worker function setting fixed MTRRs
-
- @param FixedSettings A buffer to hold fixed Mtrrs content.
-
-**/
-VOID
-MtrrSetFixedMtrrWorker (
- IN MTRR_FIXED_SETTINGS *FixedSettings
- )
-{
- UINT32 Index;
-
- for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
- AsmWriteMsr64 (
- mMtrrLibFixedMtrrTable[Index].Msr,
- FixedSettings->Mtrr[Index]
- );
- }
-}
-
-
-/**
- This function sets fixed MTRRs
-
- @param FixedSettings A buffer to hold fixed Mtrrs content.
-
- @retval The pointer of FixedSettings
-
-**/
-MTRR_FIXED_SETTINGS*
-EFIAPI
-MtrrSetFixedMtrr (
- IN MTRR_FIXED_SETTINGS *FixedSettings
- )
-{
- MTRR_CONTEXT MtrrContext;
-
- if (!IsMtrrSupported ()) {
- return FixedSettings;
- }
-
- PreMtrrChange (&MtrrContext);
- MtrrSetFixedMtrrWorker (FixedSettings);
- PostMtrrChange (&MtrrContext);
-
- return FixedSettings;
-}
-
-
-/**
- This function gets the content in all MTRRs (variable and fixed)
-
- @param MtrrSetting A buffer to hold all Mtrrs content.
-
- @retval the pointer of MtrrSetting
-
-**/
-MTRR_SETTINGS *
-EFIAPI
-MtrrGetAllMtrrs (
- OUT MTRR_SETTINGS *MtrrSetting
- )
-{
- if (!IsMtrrSupported ()) {
- return MtrrSetting;
- }
-
- //
- // Get fixed MTRRs
- //
- MtrrGetFixedMtrr (&MtrrSetting->Fixed);
-
- //
- // Get variable MTRRs
- //
- MtrrGetVariableMtrr (&MtrrSetting->Variables);
-
- //
- // Get MTRR_DEF_TYPE value
- //
- MtrrSetting->MtrrDefType = AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE);
-
- return MtrrSetting;
-}
-
-
-/**
- This function sets all MTRRs (variable and fixed)
-
- @param MtrrSetting A buffer holding all MTRRs content.
-
- @retval The pointer of MtrrSetting
-
-**/
-MTRR_SETTINGS *
-EFIAPI
-MtrrSetAllMtrrs (
- IN MTRR_SETTINGS *MtrrSetting
- )
-{
- MTRR_CONTEXT MtrrContext;
-
- if (!IsMtrrSupported ()) {
- return MtrrSetting;
- }
-
- PreMtrrChange (&MtrrContext);
-
- //
- // Set fixed MTRRs
- //
- MtrrSetFixedMtrrWorker (&MtrrSetting->Fixed);
-
- //
- // Set variable MTRRs
- //
- MtrrSetVariableMtrrWorker (&MtrrSetting->Variables);
-
- //
- // Set MTRR_DEF_TYPE value
- //
- AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType);
-
- PostMtrrChangeEnableCache (&MtrrContext);
-
- return MtrrSetting;
-}
-
-/**
- This function prints all MTRRs for debugging.
-**/
-VOID
-EFIAPI
-MtrrDebugPrintAllMtrrs (
- VOID
- )
-{
- DEBUG_CODE (
- MTRR_SETTINGS MtrrSettings;
- UINTN Index;
- UINTN Index1;
- UINTN VariableMtrrCount;
- UINT64 Base;
- UINT64 Limit;
- UINT64 MtrrBase;
- UINT64 MtrrLimit;
- UINT64 RangeBase;
- UINT64 RangeLimit;
- UINT64 NoRangeBase;
- UINT64 NoRangeLimit;
- UINT32 RegEax;
- UINTN MemoryType;
- UINTN PreviousMemoryType;
- BOOLEAN Found;
-
- if (!IsMtrrSupported ()) {
- return;
- }
-
- DEBUG((DEBUG_CACHE, "MTRR Settings\n"));
- DEBUG((DEBUG_CACHE, "=============\n"));
-
- MtrrGetAllMtrrs (&MtrrSettings);
- DEBUG((DEBUG_CACHE, "MTRR Default Type: %016lx\n", MtrrSettings.MtrrDefType));
- for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
- DEBUG((DEBUG_CACHE, "Fixed MTRR[%02d] : %016lx\n", Index, MtrrSettings.Fixed.Mtrr[Index]));
- }
-
- VariableMtrrCount = GetVariableMtrrCount ();
- for (Index = 0; Index < VariableMtrrCount; Index++) {
- DEBUG((DEBUG_CACHE, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
- Index,
- MtrrSettings.Variables.Mtrr[Index].Base,
- MtrrSettings.Variables.Mtrr[Index].Mask
- ));
- }
- DEBUG((DEBUG_CACHE, "\n"));
- DEBUG((DEBUG_CACHE, "MTRR Ranges\n"));
- DEBUG((DEBUG_CACHE, "====================================\n"));
-
- Base = 0;
- PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
- for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
- Base = mMtrrLibFixedMtrrTable[Index].BaseAddress;
- for (Index1 = 0; Index1 < 8; Index1++) {
- MemoryType = (UINTN)(RShiftU64 (MtrrSettings.Fixed.Mtrr[Index], Index1 * 8) & 0xff);
- if (MemoryType > CacheWriteBack) {
- MemoryType = MTRR_CACHE_INVALID_TYPE;
- }
- if (MemoryType != PreviousMemoryType) {
- if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
- DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
- }
- PreviousMemoryType = MemoryType;
- DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
- }
- Base += mMtrrLibFixedMtrrTable[Index].Length;
- }
- }
- DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
-
- VariableMtrrCount = GetVariableMtrrCount ();
-
- Limit = BIT36 - 1;
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- Limit = LShiftU64 (1, RegEax & 0xff) - 1;
- }
- Base = BASE_1MB;
- PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
- do {
- MemoryType = MtrrGetMemoryAttribute (Base);
- if (MemoryType > CacheWriteBack) {
- MemoryType = MTRR_CACHE_INVALID_TYPE;
- }
-
- if (MemoryType != PreviousMemoryType) {
- if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
- DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
- }
- PreviousMemoryType = MemoryType;
- DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
- }
-
- RangeBase = BASE_1MB;
- NoRangeBase = BASE_1MB;
- RangeLimit = Limit;
- NoRangeLimit = Limit;
-
- for (Index = 0, Found = FALSE; Index < VariableMtrrCount; Index++) {
- if ((MtrrSettings.Variables.Mtrr[Index].Mask & BIT11) == 0) {
- //
- // If mask is not valid, then do not display range
- //
- continue;
- }
- MtrrBase = (MtrrSettings.Variables.Mtrr[Index].Base & (~(SIZE_4KB - 1)));
- MtrrLimit = MtrrBase + ((~(MtrrSettings.Variables.Mtrr[Index].Mask & (~(SIZE_4KB - 1)))) & Limit);
-
- if (Base >= MtrrBase && Base < MtrrLimit) {
- Found = TRUE;
- }
-
- if (Base >= MtrrBase && MtrrBase > RangeBase) {
- RangeBase = MtrrBase;
- }
- if (Base > MtrrLimit && MtrrLimit > RangeBase) {
- RangeBase = MtrrLimit + 1;
- }
- if (Base < MtrrBase && MtrrBase < RangeLimit) {
- RangeLimit = MtrrBase - 1;
- }
- if (Base < MtrrLimit && MtrrLimit <= RangeLimit) {
- RangeLimit = MtrrLimit;
- }
-
- if (Base > MtrrLimit && NoRangeBase < MtrrLimit) {
- NoRangeBase = MtrrLimit + 1;
- }
- if (Base < MtrrBase && NoRangeLimit > MtrrBase) {
- NoRangeLimit = MtrrBase - 1;
- }
- }
-
- if (Found) {
- Base = RangeLimit + 1;
- } else {
- Base = NoRangeLimit + 1;
- }
- } while (Base < Limit);
- DEBUG((DEBUG_CACHE, "%016lx\n\n", Base - 1));
- );
-}
-
-/**
- Checks if MTRR is supported.
-
- @retval TRUE MTRR is supported.
- @retval FALSE MTRR is not supported.
-
-**/
-BOOLEAN
-EFIAPI
-IsMtrrSupported (
- VOID
- )
-{
- UINT32 RegEdx;
- UINT64 MtrrCap;
-
- //
- // Check CPUID(1).EDX[12] for MTRR capability
- //
- AsmCpuid (1, NULL, NULL, NULL, &RegEdx);
- if (BitFieldRead32 (RegEdx, 12, 12) == 0) {
- return FALSE;
- }
-
- //
- // Check IA32_MTRRCAP.[0..7] for number of variable MTRRs and IA32_MTRRCAP[8] for
- // fixed MTRRs existence. If number of variable MTRRs is zero, or fixed MTRRs do not
- // exist, return false.
- //
- MtrrCap = AsmReadMsr64 (MTRR_LIB_IA32_MTRR_CAP);
- if ((BitFieldRead64 (MtrrCap, 0, 7) == 0) || (BitFieldRead64 (MtrrCap, 8, 8) == 0)) {
- return FALSE;
- }
-
- return TRUE;
-}
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf b/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf deleted file mode 100644 index 64ec9bd0b0..0000000000 --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.inf +++ /dev/null @@ -1,43 +0,0 @@ -## @file
-# MTRR library provides APIs for MTRR operation.
-#
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = MtrrLib
- MODULE_UNI_FILE = MtrrLib.uni
- FILE_GUID = 6826b408-f4f3-47ee-917f-af7047f9d937
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = MtrrLib
-
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- MtrrLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseMemoryLib
- BaseLib
- CpuLib
- DebugLib
-
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.uni b/UefiCpuPkg/Library/MtrrLib/MtrrLib.uni Binary files differdeleted file mode 100644 index b04a44fe57..0000000000 --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/IpfTimerLib.c b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/IpfTimerLib.c deleted file mode 100644 index 714b99eec4..0000000000 --- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/IpfTimerLib.c +++ /dev/null @@ -1,216 +0,0 @@ -/** @file
- Timer Library functions built upon ITC on IPF.
-
- Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/TimerLib.h>
-#include <Library/BaseLib.h>
-#include <Library/PalLib.h>
-
-
-/**
- Performs a delay measured as number of ticks.
-
- An internal function to perform a delay measured as number of ticks. It's
- invoked by MicroSecondDelay() and NanoSecondDelay().
-
- @param Delay The number of ticks to delay.
-
-**/
-VOID
-EFIAPI
-InternalIpfDelay (
- IN INT64 Delay
- )
-{
- INT64 Ticks;
-
- //
- // The target timer count is calculated here
- //
- Ticks = (INT64)AsmReadItc () + Delay;
-
- //
- // Wait until time out
- // Delay > 2^63 could not be handled by this function
- // Timer wrap-arounds are handled correctly by this function
- //
- while (Ticks - (INT64)AsmReadItc() >= 0);
-}
-
-/**
- Stalls the CPU for at least the given number of microseconds.
-
- Stalls the CPU for the number of microseconds specified by MicroSeconds.
-
- @param MicroSeconds The minimum number of microseconds to delay.
-
- @return The value of MicroSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-MicroSecondDelay (
- IN UINTN MicroSeconds
- )
-{
- InternalIpfDelay (
- GetPerformanceCounterProperties (NULL, NULL) *
- MicroSeconds /
- 1000000
- );
- return MicroSeconds;
-}
-
-/**
- Stalls the CPU for at least the given number of nanoseconds.
-
- Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
-
- @param NanoSeconds The minimum number of nanoseconds to delay.
-
- @return The value of NanoSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-NanoSecondDelay (
- IN UINTN NanoSeconds
- )
-{
- InternalIpfDelay (
- GetPerformanceCounterProperties (NULL, NULL) *
- NanoSeconds /
- 1000000000
- );
- return NanoSeconds;
-}
-
-/**
- Retrieves the current value of a 64-bit free running performance counter.
-
- The counter can either count up by 1 or count down by 1. If the physical
- performance counter counts by a larger increment, then the counter values
- must be translated. The properties of the counter can be retrieved from
- GetPerformanceCounterProperties().
-
- @return The current value of the free running performance counter.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounter (
- VOID
- )
-{
- return AsmReadItc ();
-}
-
-/**
- Retrieves the 64-bit frequency in Hz and the range of performance counter
- values.
-
- If StartValue is not NULL, then the value that the performance counter starts
- with immediately after is it rolls over is returned in StartValue. If
- EndValue is not NULL, then the value that the performance counter end with
- immediately before it rolls over is returned in EndValue. The 64-bit
- frequency of the performance counter in Hz is always returned. If StartValue
- is less than EndValue, then the performance counter counts up. If StartValue
- is greater than EndValue, then the performance counter counts down. For
- example, a 64-bit free running counter that counts up would have a StartValue
- of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
- that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
-
- @param StartValue The value the performance counter starts with when it
- rolls over.
- @param EndValue The value that the performance counter ends with before
- it rolls over.
-
- @return The frequency in Hz.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounterProperties (
- OUT UINT64 *StartValue, OPTIONAL
- OUT UINT64 *EndValue OPTIONAL
- )
-{
- PAL_CALL_RETURN PalRet;
- UINT64 BaseFrequence;
-
- if (StartValue != NULL) {
- *StartValue = 0;
- }
-
- if (EndValue != NULL) {
- *EndValue = (UINT64)(-1);
- }
-
- PalRet = PalCall (PAL_FREQ_BASE, 0, 0, 0);
- if (PalRet.Status != 0) {
- return 1000000;
- }
- BaseFrequence = PalRet.r9;
-
- PalRet = PalCall (PAL_FREQ_RATIOS, 0, 0, 0);
- if (PalRet.Status != 0) {
- return 1000000;
- }
-
- return BaseFrequence * (PalRet.r11 >> 32) / (UINT32)PalRet.r11;
-}
-
-/**
- Converts elapsed ticks of performance counter to time in nanoseconds.
-
- This function converts the elapsed ticks of running performance counter to
- time value in unit of nanoseconds.
-
- @param Ticks The number of elapsed ticks of running performance counter.
-
- @return The elapsed time in nanoseconds.
-
-**/
-UINT64
-EFIAPI
-GetTimeInNanoSecond (
- IN UINT64 Ticks
- )
-{
- UINT64 Frequency;
- UINT64 NanoSeconds;
- UINT64 Remainder;
- INTN Shift;
-
- Frequency = GetPerformanceCounterProperties (NULL, NULL);
-
- //
- // Ticks
- // Time = --------- x 1,000,000,000
- // Frequency
- //
- NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
-
- //
- // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
- // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
- // i.e. highest bit set in Remainder should <= 33.
- //
- Shift = MAX (0, HighBitSet64 (Remainder) - 33);
- Remainder = RShiftU64 (Remainder, (UINTN) Shift);
- Frequency = RShiftU64 (Frequency, (UINTN) Shift);
- NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
-
- return NanoSeconds;
-}
diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf deleted file mode 100644 index a25e94a61a..0000000000 --- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf +++ /dev/null @@ -1,67 +0,0 @@ -## @file
-# Instance of Timer Library only using CPU resources.
-#
-# Timer Library that only uses CPU resources to provide calibrated delays
-# on IA-32, x64, and IPF.
-# Note: A driver of type DXE_RUNTIME_DRIVER and DXE_SMM_DRIVER can use this TimerLib
-# in their initialization without any issues. They only have to be careful in
-# the implementation of runtime services and SMI handlers.
-# Because CPU Local APIC and ITC could be programmed by OS, it cannot be
-# used by SMM drivers and runtime drivers, ACPI timer is recommended for SMM
-# drivers and runtime drivers.
-#
-# This library differs with the SecPeiDxeTimerLibCpu library in the MdePkg in
-# that it uses the local APIC library so that it supports x2APIC mode.
-#
-# Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SecPeiDxeTimerLibUefiCpu
- MODULE_UNI_FILE = SecPeiDxeTimerLibUefiCpu.uni
- FILE_GUID = 4FFF2014-2086-4ee6-9B58-886D1967861C
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = TimerLib
-
-
-#
-# VALID_ARCHITECTURES = IA32 X64 IPF
-#
-
-[Sources.Ia32, Sources.X64]
- X86TimerLib.c
-
-[Sources.IPF]
- IpfTimerLib.c
-
-
-[Packages]
- MdePkg/MdePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- BaseLib
-
-[LibraryClasses.IA32, LibraryClasses.X64]
- PcdLib
- DebugLib
- LocalApicLib
-
-[LibraryClasses.IPF]
- PalLib
-
-
-[Pcd.IA32, Pcd.X64]
- gEfiMdePkgTokenSpaceGuid.PcdFSBClock ## SOMETIMES_CONSUMES
-
diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.uni b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.uni Binary files differdeleted file mode 100644 index 9d100b96ab..0000000000 --- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.uni +++ /dev/null diff --git a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/X86TimerLib.c b/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/X86TimerLib.c deleted file mode 100644 index 52ae7717dd..0000000000 --- a/UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/X86TimerLib.c +++ /dev/null @@ -1,262 +0,0 @@ -/** @file
- Timer Library functions built upon local APIC on IA32/x64.
-
- This library uses the local APIC library so that it supports x2APIC mode.
-
- Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-#include <Library/TimerLib.h>
-#include <Library/BaseLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-#include <Library/LocalApicLib.h>
-
-/**
- Internal function to return the frequency of the local APIC timer.
-
- @return The frequency of the timer in Hz.
-
-**/
-UINT32
-EFIAPI
-InternalX86GetTimerFrequency (
- VOID
- )
-{
- UINTN Divisor;
-
- GetApicTimerState (&Divisor, NULL, NULL);
- return PcdGet32(PcdFSBClock) / (UINT32)Divisor;
-}
-
-/**
- Stalls the CPU for at least the given number of ticks.
-
- Stalls the CPU for at least the given number of ticks. It's invoked by
- MicroSecondDelay() and NanoSecondDelay().
-
- @param Delay A period of time to delay in ticks.
-
-**/
-VOID
-EFIAPI
-InternalX86Delay (
- IN UINT32 Delay
- )
-{
- INT32 Ticks;
- UINT32 Times;
- UINT32 InitCount;
- UINT32 StartTick;
-
- //
- // In case Delay is too larger, separate it into several small delay slot.
- // Devided Delay by half value of Init Count is to avoid Delay close to
- // the Init Count, timeout maybe missing if the time consuming between 2
- // GetApicTimerCurrentCount() invoking is larger than the time gap between
- // Delay and the Init Count.
- //
- InitCount = GetApicTimerInitCount ();
- Times = Delay / (InitCount / 2);
- Delay = Delay % (InitCount / 2);
-
- //
- // Get Start Tick and do delay
- //
- StartTick = GetApicTimerCurrentCount ();
- do {
- //
- // Wait until time out by Delay value
- //
- do {
- CpuPause ();
- //
- // Get Ticks from Start to Current.
- //
- Ticks = StartTick - GetApicTimerCurrentCount ();
- //
- // Ticks < 0 means Timer wrap-arounds happens.
- //
- if (Ticks < 0) {
- Ticks += InitCount;
- }
- } while ((UINT32)Ticks < Delay);
-
- //
- // Update StartTick and Delay for next delay slot
- //
- StartTick -= (StartTick > Delay) ? Delay : (Delay - InitCount);
- Delay = InitCount / 2;
- } while (Times-- > 0);
-}
-
-/**
- Stalls the CPU for at least the given number of microseconds.
-
- Stalls the CPU for the number of microseconds specified by MicroSeconds.
-
- @param MicroSeconds The minimum number of microseconds to delay.
-
- @return The value of MicroSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-MicroSecondDelay (
- IN UINTN MicroSeconds
- )
-{
- InternalX86Delay (
- (UINT32)DivU64x32 (
- MultU64x64 (
- InternalX86GetTimerFrequency (),
- MicroSeconds
- ),
- 1000000u
- )
- );
- return MicroSeconds;
-}
-
-/**
- Stalls the CPU for at least the given number of nanoseconds.
-
- Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
-
- @param NanoSeconds The minimum number of nanoseconds to delay.
-
- @return The value of NanoSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-NanoSecondDelay (
- IN UINTN NanoSeconds
- )
-{
- InternalX86Delay (
- (UINT32)DivU64x32 (
- MultU64x64 (
- InternalX86GetTimerFrequency (),
- NanoSeconds
- ),
- 1000000000u
- )
- );
- return NanoSeconds;
-}
-
-/**
- Retrieves the current value of a 64-bit free running performance counter.
-
- The counter can either count up by 1 or count down by 1. If the physical
- performance counter counts by a larger increment, then the counter values
- must be translated. The properties of the counter can be retrieved from
- GetPerformanceCounterProperties().
-
- @return The current value of the free running performance counter.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounter (
- VOID
- )
-{
- return (UINT64)GetApicTimerCurrentCount ();
-}
-
-/**
- Retrieves the 64-bit frequency in Hz and the range of performance counter
- values.
-
- If StartValue is not NULL, then the value that the performance counter starts
- with immediately after is it rolls over is returned in StartValue. If
- EndValue is not NULL, then the value that the performance counter end with
- immediately before it rolls over is returned in EndValue. The 64-bit
- frequency of the performance counter in Hz is always returned. If StartValue
- is less than EndValue, then the performance counter counts up. If StartValue
- is greater than EndValue, then the performance counter counts down. For
- example, a 64-bit free running counter that counts up would have a StartValue
- of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
- that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
-
- @param StartValue The value the performance counter starts with when it
- rolls over.
- @param EndValue The value that the performance counter ends with before
- it rolls over.
-
- @return The frequency in Hz.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounterProperties (
- OUT UINT64 *StartValue, OPTIONAL
- OUT UINT64 *EndValue OPTIONAL
- )
-{
- if (StartValue != NULL) {
- *StartValue = (UINT64)GetApicTimerInitCount ();
- }
-
- if (EndValue != NULL) {
- *EndValue = 0;
- }
-
- return (UINT64) InternalX86GetTimerFrequency ();
-}
-
-/**
- Converts elapsed ticks of performance counter to time in nanoseconds.
-
- This function converts the elapsed ticks of running performance counter to
- time value in unit of nanoseconds.
-
- @param Ticks The number of elapsed ticks of running performance counter.
-
- @return The elapsed time in nanoseconds.
-
-**/
-UINT64
-EFIAPI
-GetTimeInNanoSecond (
- IN UINT64 Ticks
- )
-{
- UINT64 Frequency;
- UINT64 NanoSeconds;
- UINT64 Remainder;
- INTN Shift;
-
- Frequency = GetPerformanceCounterProperties (NULL, NULL);
-
- //
- // Ticks
- // Time = --------- x 1,000,000,000
- // Frequency
- //
- NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
-
- //
- // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
- // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
- // i.e. highest bit set in Remainder should <= 33.
- //
- Shift = MAX (0, HighBitSet64 (Remainder) - 33);
- Remainder = RShiftU64 (Remainder, (UINTN) Shift);
- Frequency = RShiftU64 (Frequency, (UINTN) Shift);
- NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
-
- return NanoSeconds;
-}
diff --git a/UefiCpuPkg/License.txt b/UefiCpuPkg/License.txt deleted file mode 100644 index be68999be6..0000000000 --- a/UefiCpuPkg/License.txt +++ /dev/null @@ -1,25 +0,0 @@ -Copyright (c) 2012, Intel Corporation. All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-
-* Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in
- the documentation and/or other materials provided with the
- distribution.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
diff --git a/UefiCpuPkg/ResetVector/FixupVtf/ResetVector.uni b/UefiCpuPkg/ResetVector/FixupVtf/ResetVector.uni Binary files differdeleted file mode 100644 index d746ebcef4..0000000000 --- a/UefiCpuPkg/ResetVector/FixupVtf/ResetVector.uni +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/FixupVtf/ResetVectorExtra.uni b/UefiCpuPkg/ResetVector/FixupVtf/ResetVectorExtra.uni Binary files differdeleted file mode 100644 index b907f406be..0000000000 --- a/UefiCpuPkg/ResetVector/FixupVtf/ResetVectorExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/FixupVtf/Vtf.inf b/UefiCpuPkg/ResetVector/FixupVtf/Vtf.inf deleted file mode 100644 index ed41c3807d..0000000000 --- a/UefiCpuPkg/ResetVector/FixupVtf/Vtf.inf +++ /dev/null @@ -1,38 +0,0 @@ -## @file
-# Reset Vector
-#
-# This VTF requires build time fixups in order to find the SEC entry point.
-#
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ResetVector
- FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
- MODULE_TYPE = SEC
- VERSION_STRING = 1.1
- MODULE_UNI_FILE = ResetVector.uni
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- Vtf.nasmb
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[UserExtensions.TianoCore."ExtraFiles"]
- ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb b/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb deleted file mode 100644 index 5aa733ea59..0000000000 --- a/UefiCpuPkg/ResetVector/FixupVtf/Vtf.nasmb +++ /dev/null @@ -1,60 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; First code exectuted by processor after resetting.
-;
-; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 16
-
-ALIGN 16 ; 0xffffffd0
-
-applicationProcessorEntryPoint:
-;
-; Application Processors entry point
-;
-; GenFv generates code aligned on a 4k boundary which will jump to this
-; location. (0xffffffd0) This allows the Local APIC Startup IPI to be
-; used to wake up the application processors.
-;
- jmp short resetVector
-
-ALIGN 16 ; 0xffffffe0
-
-peiCoreEntryPoint:
-;
-; PEI Core entry point
-;
-; GenFv fills the address of the PEI Core into this location
-;
- DD 0x12345678
-
-ALIGN 16 ; 0xfffffff0
-
-resetVector:
-;
-; Reset Vector
-;
-; This is where the processor will begin execution
-;
- nop
- nop
- jmp near $
-
-ALIGN 8
-
-ApStartupSegment:
- DD 0x12345678
-
-BootFvBaseAddress:
- DD 0x12345678
-
-ALIGN 16 ; 0x100000000
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw Binary files differdeleted file mode 100644 index 2c6ff655de..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw Binary files differdeleted file mode 100644 index e34780a3a2..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw Binary files differdeleted file mode 100644 index 6dfa68eabb..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf deleted file mode 100644 index 72abd6e91c..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf +++ /dev/null @@ -1,36 +0,0 @@ -## @file
-# Reset Vector binary
-#
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ResetVector
- MODULE_UNI_FILE = ResetVector.uni
- FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
- MODULE_TYPE = SEC
- VERSION_STRING = 1.1
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Binaries.Ia32]
- RAW|ResetVector.ia32.raw|*
-
-[Binaries.X64]
- RAW|ResetVector.x64.raw|*
-
-[UserExtensions.TianoCore."ExtraFiles"]
- ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.uni b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.uni Binary files differdeleted file mode 100644 index 0773173b2c..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.uni +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw Binary files differdeleted file mode 100644 index 6c0bcc47eb..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw Binary files differdeleted file mode 100644 index a78d5b407c..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw Binary files differdeleted file mode 100644 index 61c71349a8..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVectorExtra.uni b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVectorExtra.uni Binary files differdeleted file mode 100644 index b907f406be..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVectorExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/Build.py b/UefiCpuPkg/ResetVector/Vtf0/Build.py deleted file mode 100644 index a645c371b9..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Build.py +++ /dev/null @@ -1,53 +0,0 @@ -## @file
-# Automate the process of building the various reset vector types
-#
-# Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-import glob
-import os
-import subprocess
-import sys
-
-def RunCommand(commandLine):
- #print ' '.join(commandLine)
- return subprocess.call(commandLine)
-
-for filename in glob.glob(os.path.join('Bin', '*.raw')):
- os.remove(filename)
-
-for arch in ('ia32', 'x64'):
- for debugType in (None, 'port80', 'serial'):
- output = os.path.join('Bin', 'ResetVector')
- output += '.' + arch
- if debugType is not None:
- output += '.' + debugType
- output += '.raw'
- commandLine = (
- 'nasm',
- '-D', 'ARCH_%s' % arch.upper(),
- '-D', 'DEBUG_%s' % str(debugType).upper(),
- '-o', output,
- 'Vtf0.nasmb',
- )
- ret = RunCommand(commandLine)
- print '\tASM\t' + output
- if ret != 0: sys.exit(ret)
-
- commandLine = (
- 'python',
- 'Tools/FixupForRawSection.py',
- output,
- )
- print '\tFIXUP\t' + output
- ret = RunCommand(commandLine)
- if ret != 0: sys.exit(ret)
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/CommonMacros.inc b/UefiCpuPkg/ResetVector/Vtf0/CommonMacros.inc deleted file mode 100644 index b46da27686..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/CommonMacros.inc +++ /dev/null @@ -1,31 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Common macros used in the ResetVector VTF module.
-;
-; Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-%define ADDR16_OF(x) (0x10000 - fourGigabytes + x)
-%define ADDR_OF(x) (0x100000000 - fourGigabytes + x)
-
-%macro OneTimeCall 1
- jmp %1
-%1 %+ OneTimerCallReturn:
-%endmacro
-
-%macro OneTimeCallRet 1
- jmp %1 %+ OneTimerCallReturn
-%endmacro
-
-StartOfResetVectorCode:
-
-%define ADDR_OF_START_OF_RESET_CODE ADDR_OF(StartOfResetVectorCode)
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/DebugDisabled.asm b/UefiCpuPkg/ResetVector/Vtf0/DebugDisabled.asm deleted file mode 100644 index 883cef03e0..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/DebugDisabled.asm +++ /dev/null @@ -1,26 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Debug disabled
-;
-; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 16
-
-%macro debugInitialize 0
- ;
- ; No initialization is required
- ;
-%endmacro
-
-%macro debugShowPostCode 1
-%endmacro
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm deleted file mode 100644 index 226c49f220..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Init16.asm +++ /dev/null @@ -1,48 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; 16-bit initialization code
-;
-; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-
-BITS 16
-
-;
-; @param[out] DI 'BP' to indicate boot-strap processor
-;
-EarlyBspInitReal16:
- mov di, 'BP'
- jmp short Main16
-
-;
-; @param[out] DI 'AP' to indicate application processor
-;
-EarlyApInitReal16:
- mov di, 'AP'
- jmp short Main16
-
-;
-; Modified: EAX
-;
-; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
-; @param[out] ESP Initial value of the EAX register (BIST: Built-in Self Test)
-;
-EarlyInit16:
- ;
- ; ESP - Initial value of the EAX register (BIST: Built-in Self Test)
- ;
- mov esp, eax
-
- debugInitialize
-
- OneTimeCallRet EarlyInit16
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm deleted file mode 100644 index 146df600a6..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/Real16ToFlat32.asm +++ /dev/null @@ -1,133 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Transition from 16 bit real mode into 32 bit flat protected mode
-;
-; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-%define SEC_DEFAULT_CR0 0x40000023
-%define SEC_DEFAULT_CR4 0x640
-
-BITS 16
-
-;
-; Modified: EAX, EBX
-;
-TransitionFromReal16To32BitFlat:
-
- debugShowPostCode POSTCODE_16BIT_MODE
-
- cli
-
- mov bx, 0xf000
- mov ds, bx
-
- mov bx, ADDR16_OF(gdtr)
-
-o32 lgdt [cs:bx]
-
- mov eax, SEC_DEFAULT_CR0
- mov cr0, eax
-
- jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)
-BITS 32
-jumpTo32BitAndLandHere:
-
- mov eax, SEC_DEFAULT_CR4
- mov cr4, eax
-
- debugShowPostCode POSTCODE_32BIT_MODE
-
- mov ax, LINEAR_SEL
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
-
- OneTimeCallRet TransitionFromReal16To32BitFlat
-
-ALIGN 2
-
-gdtr:
- dw GDT_END - GDT_BASE - 1 ; GDT limit
- dd ADDR_OF(GDT_BASE)
-
-ALIGN 16
-
-;
-; Macros for GDT entries
-;
-
-%define PRESENT_FLAG(p) (p << 7)
-%define DPL(dpl) (dpl << 5)
-%define SYSTEM_FLAG(s) (s << 4)
-%define DESC_TYPE(t) (t)
-
-; Type: data, expand-up, writable, accessed
-%define DATA32_TYPE 3
-
-; Type: execute, readable, expand-up, accessed
-%define CODE32_TYPE 0xb
-
-; Type: execute, readable, expand-up, accessed
-%define CODE64_TYPE 0xb
-
-%define GRANULARITY_FLAG(g) (g << 7)
-%define DEFAULT_SIZE32(d) (d << 6)
-%define CODE64_FLAG(l) (l << 5)
-%define UPPER_LIMIT(l) (l)
-
-;
-; The Global Descriptor Table (GDT)
-;
-
-GDT_BASE:
-; null descriptor
-NULL_SEL equ $-GDT_BASE
- DW 0 ; limit 15:0
- DW 0 ; base 15:0
- DB 0 ; base 23:16
- DB 0 ; sys flag, dpl, type
- DB 0 ; limit 19:16, flags
- DB 0 ; base 31:24
-
-; linear data segment descriptor
-LINEAR_SEL equ $-GDT_BASE
- DW 0xffff ; limit 15:0
- DW 0 ; base 15:0
- DB 0 ; base 23:16
- DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)
- DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
- DB 0 ; base 31:24
-
-; linear code segment descriptor
-LINEAR_CODE_SEL equ $-GDT_BASE
- DW 0xffff ; limit 15:0
- DW 0 ; base 15:0
- DB 0 ; base 23:16
- DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)
- DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)
- DB 0 ; base 31:24
-
-%ifdef ARCH_X64
-; linear code (64-bit) segment descriptor
-LINEAR_CODE64_SEL equ $-GDT_BASE
- DW 0xffff ; limit 15:0
- DW 0 ; base 15:0
- DB 0 ; base 23:16
- DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)
- DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)
- DB 0 ; base 31:24
-%endif
-
-GDT_END:
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm deleted file mode 100644 index 142d9f3212..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm +++ /dev/null @@ -1,71 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; First code executed by processor after resetting.
-;
-; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 16
-
-ALIGN 16
-
-;
-; Pad the image size to 4k when page tables are in VTF0
-;
-; If the VTF0 image has page tables built in, then we need to make
-; sure the end of VTF0 is 4k above where the page tables end.
-;
-; This is required so the page tables will be 4k aligned when VTF0 is
-; located just below 0x100000000 (4GB) in the firmware device.
-;
-%ifdef ALIGN_TOP_TO_4K_FOR_PAGING
- TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0
-%endif
-
-applicationProcessorEntryPoint:
-;
-; Application Processors entry point
-;
-; GenFv generates code aligned on a 4k boundary which will jump to this
-; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
-; used to wake up the application processors.
-;
- jmp EarlyApInitReal16
-
-ALIGN 8
-
- DD 0
-
-;
-; The VTF signature
-;
-; VTF-0 means that the VTF (Volume Top File) code does not require
-; any fixups.
-;
-vtfSignature:
- DB 'V', 'T', 'F', 0
-
-ALIGN 16
-
-resetVector:
-;
-; Reset Vector
-;
-; This is where the processor will begin execution
-;
- nop
- nop
- jmp EarlyBspInitReal16
-
-ALIGN 16
-
-fourGigabytes:
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm deleted file mode 100644 index 62e71da3d5..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm +++ /dev/null @@ -1,45 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Transition from 32 bit flat protected mode into 64 bit flat protected mode
-;
-; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 32
-
-;
-; Modified: EAX
-;
-Transition32FlatTo64Flat:
-
- OneTimeCall SetCr3ForPageTables64
-
- mov eax, cr4
- bts eax, 5 ; enable PAE
- mov cr4, eax
-
- mov ecx, 0xc0000080
- rdmsr
- bts eax, 8 ; set LME
- wrmsr
-
- mov eax, cr0
- bts eax, 31 ; set PG
- mov cr0, eax ; enable paging
-
- jmp LINEAR_CODE64_SEL:ADDR_OF(jumpTo64BitAndLandHere)
-BITS 64
-jumpTo64BitAndLandHere:
-
- debugShowPostCode POSTCODE_64BIT_MODE
-
- OneTimeCallRet Transition32FlatTo64Flat
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm deleted file mode 100644 index 2e16e71f6a..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm +++ /dev/null @@ -1,30 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Sets the CR3 register for 64-bit paging
-;
-; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 32
-
-;
-; Modified: EAX
-;
-SetCr3ForPageTables64:
-
- ;
- ; These pages are built into the ROM image in X64/PageTables.asm
- ;
- mov eax, ADDR_OF(TopLevelPageDirectory)
- mov cr3, eax
-
- OneTimeCallRet SetCr3ForPageTables64
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForBfvBase.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForBfvBase.asm deleted file mode 100644 index d0c2d8c39c..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForBfvBase.asm +++ /dev/null @@ -1,86 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Search for the Boot Firmware Volume (BFV) base address
-;
-; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \
-; { 0x8c8ce578, 0x8a3d, 0x4f1c, { 0x99, 0x35, 0x89, 0x61, 0x85, 0xc3, 0x2d, 0xd3 } }
-%define FFS_GUID_DWORD0 0x8c8ce578
-%define FFS_GUID_DWORD1 0x4f1c8a3d
-%define FFS_GUID_DWORD2 0x61893599
-%define FFS_GUID_DWORD3 0xd32dc385
-
-BITS 32
-
-;
-; Modified: EAX, EBX
-; Preserved: EDI, ESP
-;
-; @param[out] EBP Address of Boot Firmware Volume (BFV)
-;
-Flat32SearchForBfvBase:
-
- xor eax, eax
-searchingForBfvHeaderLoop:
- ;
- ; We check for a firmware volume at every 4KB address in the top 16MB
- ; just below 4GB. (Addresses at 0xffHHH000 where H is any hex digit.)
- ;
- sub eax, 0x1000
- cmp eax, 0xff000000
- jb searchedForBfvHeaderButNotFound
-
- ;
- ; Check FFS GUID
- ;
- cmp dword [eax + 0x10], FFS_GUID_DWORD0
- jne searchingForBfvHeaderLoop
- cmp dword [eax + 0x14], FFS_GUID_DWORD1
- jne searchingForBfvHeaderLoop
- cmp dword [eax + 0x18], FFS_GUID_DWORD2
- jne searchingForBfvHeaderLoop
- cmp dword [eax + 0x1c], FFS_GUID_DWORD3
- jne searchingForBfvHeaderLoop
-
- ;
- ; Check FV Length
- ;
- cmp dword [eax + 0x24], 0
- jne searchingForBfvHeaderLoop
- mov ebx, eax
- add ebx, dword [eax + 0x20]
- jnz searchingForBfvHeaderLoop
-
- jmp searchedForBfvHeaderAndItWasFound
-
-searchedForBfvHeaderButNotFound:
- ;
- ; Hang if the SEC entry point was not found
- ;
- debugShowPostCode POSTCODE_BFV_NOT_FOUND
-
- ;
- ; 0xbfbfbfbf in the EAX & EBP registers helps signal what failed
- ; for debugging purposes.
- ;
- mov eax, 0xBFBFBFBF
- mov ebp, eax
- jmp $
-
-searchedForBfvHeaderAndItWasFound:
- mov ebp, eax
-
- debugShowPostCode POSTCODE_BFV_FOUND
-
- OneTimeCallRet Flat32SearchForBfvBase
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForSecEntry.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForSecEntry.asm deleted file mode 100644 index 6206b44485..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/SearchForSecEntry.asm +++ /dev/null @@ -1,200 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Search for the SEC Core entry point
-;
-; Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 32
-
-%define EFI_FV_FILETYPE_SECURITY_CORE 0x03
-
-;
-; Modified: EAX, EBX, ECX, EDX
-; Preserved: EDI, EBP, ESP
-;
-; @param[in] EBP Address of Boot Firmware Volume (BFV)
-; @param[out] ESI SEC Core Entry Point Address
-;
-Flat32SearchForSecEntryPoint:
-
- ;
- ; Initialize EBP and ESI to 0
- ;
- xor ebx, ebx
- mov esi, ebx
-
- ;
- ; Pass over the BFV header
- ;
- mov eax, ebp
- mov bx, [ebp + 0x30]
- add eax, ebx
- jc secEntryPointWasNotFound
-
- jmp searchingForFfsFileHeaderLoop
-
-moveForwardWhileSearchingForFfsFileHeaderLoop:
- ;
- ; Make forward progress in the search
- ;
- inc eax
- jc secEntryPointWasNotFound
-
-searchingForFfsFileHeaderLoop:
- test eax, eax
- jz secEntryPointWasNotFound
-
- ;
- ; Ensure 8 byte alignment
- ;
- add eax, 7
- jc secEntryPointWasNotFound
- and al, 0xf8
-
- ;
- ; Look to see if there is an FFS file at eax
- ;
- mov bl, [eax + 0x17]
- test bl, 0x20
- jz moveForwardWhileSearchingForFfsFileHeaderLoop
- mov ecx, [eax + 0x14]
- and ecx, 0x00ffffff
- or ecx, ecx
- jz moveForwardWhileSearchingForFfsFileHeaderLoop
- add ecx, eax
- jz jumpSinceWeFoundTheLastFfsFile
- jc moveForwardWhileSearchingForFfsFileHeaderLoop
-jumpSinceWeFoundTheLastFfsFile:
-
- ;
- ; There seems to be a valid file at eax
- ;
- cmp byte [eax + 0x12], EFI_FV_FILETYPE_SECURITY_CORE ; Check File Type
- jne readyToTryFfsFileAtEcx
-
-fileTypeIsSecCore:
- OneTimeCall GetEntryPointOfFfsFile
- test eax, eax
- jnz doneSeachingForSecEntryPoint
-
-readyToTryFfsFileAtEcx:
- ;
- ; Try the next FFS file at ECX
- ;
- mov eax, ecx
- jmp searchingForFfsFileHeaderLoop
-
-secEntryPointWasNotFound:
- xor eax, eax
-
-doneSeachingForSecEntryPoint:
- mov esi, eax
-
- test esi, esi
- jnz secCoreEntryPointWasFound
-
-secCoreEntryPointWasNotFound:
- ;
- ; Hang if the SEC entry point was not found
- ;
- debugShowPostCode POSTCODE_SEC_NOT_FOUND
- jz $
-
-secCoreEntryPointWasFound:
- debugShowPostCode POSTCODE_SEC_FOUND
-
- OneTimeCallRet Flat32SearchForSecEntryPoint
-
-%define EFI_SECTION_PE32 0x10
-%define EFI_SECTION_TE 0x12
-
-;
-; Input:
-; EAX - Start of FFS file
-; ECX - End of FFS file
-;
-; Output:
-; EAX - Entry point of PE32 (or 0 if not found)
-;
-; Modified:
-; EBX
-;
-GetEntryPointOfFfsFile:
- test eax, eax
- jz getEntryPointOfFfsFileErrorReturn
- add eax, 0x18 ; EAX = Start of section
-
-getEntryPointOfFfsFileLoopForSections:
- cmp eax, ecx
- jae getEntryPointOfFfsFileErrorReturn
-
- cmp byte [eax + 3], EFI_SECTION_PE32
- je getEntryPointOfFfsFileFoundPe32Section
-
- cmp byte [eax + 3], EFI_SECTION_TE
- je getEntryPointOfFfsFileFoundTeSection
-
- ;
- ; The section type was not PE32 or TE, so move to next section
- ;
- mov ebx, dword [eax]
- and ebx, 0x00ffffff
- add eax, ebx
- jc getEntryPointOfFfsFileErrorReturn
-
- ;
- ; Ensure that FFS section is 32-bit aligned
- ;
- add eax, 3
- jc getEntryPointOfFfsFileErrorReturn
- and al, 0xfc
- jmp getEntryPointOfFfsFileLoopForSections
-
-getEntryPointOfFfsFileFoundPe32Section:
- add eax, 4 ; EAX = Start of PE32 image
-
- cmp word [eax], 'MZ'
- jne getEntryPointOfFfsFileErrorReturn
- movzx ebx, word [eax + 0x3c]
- add ebx, eax
-
- ; if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE)
- cmp dword [ebx], `PE\x00\x00`
- jne getEntryPointOfFfsFileErrorReturn
-
- ; *EntryPoint = (VOID *)((UINTN)Pe32Data +
- ; (UINTN)(Hdr.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));
- add eax, [ebx + 0x4 + 0x14 + 0x10]
- jmp getEntryPointOfFfsFileReturn
-
-getEntryPointOfFfsFileFoundTeSection:
- add eax, 4 ; EAX = Start of TE image
- mov ebx, eax
-
- ; if (Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE)
- cmp word [ebx], 'VZ'
- jne getEntryPointOfFfsFileErrorReturn
- ; *EntryPoint = (VOID *)((UINTN)Pe32Data +
- ; (UINTN)(Hdr.Te->AddressOfEntryPoint & 0x0ffffffff) +
- ; sizeof(EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize);
- add eax, [ebx + 0x8]
- add eax, 0x28
- movzx ebx, word [ebx + 0x6]
- sub eax, ebx
- jmp getEntryPointOfFfsFileReturn
-
-getEntryPointOfFfsFileErrorReturn:
- mov eax, 0
-
-getEntryPointOfFfsFileReturn:
- OneTimeCallRet GetEntryPointOfFfsFile
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Main.asm b/UefiCpuPkg/ResetVector/Vtf0/Main.asm deleted file mode 100644 index ebfb9015d4..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Main.asm +++ /dev/null @@ -1,106 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Main routine of the pre-SEC code up through the jump into SEC
-;
-; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-
-BITS 16
-
-;
-; Modified: EBX, ECX, EDX, EBP
-;
-; @param[in,out] RAX/EAX Initial value of the EAX register
-; (BIST: Built-in Self Test)
-; @param[in,out] DI 'BP': boot-strap processor, or
-; 'AP': application processor
-; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV)
-;
-; @return None This routine jumps to SEC and does not return
-;
-Main16:
- OneTimeCall EarlyInit16
-
- ;
- ; Transition the processor from 16-bit real mode to 32-bit flat mode
- ;
- OneTimeCall TransitionFromReal16To32BitFlat
-
-BITS 32
-
- ;
- ; Search for the Boot Firmware Volume (BFV)
- ;
- OneTimeCall Flat32SearchForBfvBase
-
- ;
- ; EBP - Start of BFV
- ;
-
- ;
- ; Search for the SEC entry point
- ;
- OneTimeCall Flat32SearchForSecEntryPoint
-
- ;
- ; ESI - SEC Core entry point
- ; EBP - Start of BFV
- ;
-
-%ifdef ARCH_IA32
-
- ;
- ; Restore initial EAX value into the EAX register
- ;
- mov eax, esp
-
- ;
- ; Jump to the 32-bit SEC entry point
- ;
- jmp esi
-
-%else
-
- ;
- ; Transition the processor from 32-bit flat mode to 64-bit flat mode
- ;
- OneTimeCall Transition32FlatTo64Flat
-
-BITS 64
-
- ;
- ; Some values were calculated in 32-bit mode. Make sure the upper
- ; 32-bits of 64-bit registers are zero for these values.
- ;
- mov rax, 0x00000000ffffffff
- and rsi, rax
- and rbp, rax
- and rsp, rax
-
- ;
- ; RSI - SEC Core entry point
- ; RBP - Start of BFV
- ;
-
- ;
- ; Restore initial EAX value into the RAX register
- ;
- mov rax, rsp
-
- ;
- ; Jump to the 64-bit SEC entry point
- ;
- jmp rsi
-
-%endif
-
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Port80Debug.asm b/UefiCpuPkg/ResetVector/Vtf0/Port80Debug.asm deleted file mode 100644 index 4b13c4860b..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Port80Debug.asm +++ /dev/null @@ -1,28 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Port 0x80 debug support macros
-;
-; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 16
-
-%macro debugInitialize 0
- ;
- ; No initialization is required
- ;
-%endmacro
-
-%macro debugShowPostCode 1
- mov al, %1
- out 0x80, al
-%endmacro
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/PostCodes.inc b/UefiCpuPkg/ResetVector/Vtf0/PostCodes.inc deleted file mode 100644 index 62eda5d992..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/PostCodes.inc +++ /dev/null @@ -1,25 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Definitions of POST CODES for the reset vector module
-;
-; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-%define POSTCODE_16BIT_MODE 0x16
-%define POSTCODE_32BIT_MODE 0x32
-%define POSTCODE_64BIT_MODE 0x64
-
-%define POSTCODE_BFV_NOT_FOUND 0xb0
-%define POSTCODE_BFV_FOUND 0xb1
-
-%define POSTCODE_SEC_NOT_FOUND 0xf0
-%define POSTCODE_SEC_FOUND 0xf1
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt deleted file mode 100644 index e6e5b54243..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt +++ /dev/null @@ -1,41 +0,0 @@ -
-=== HOW TO USE VTF0 ===
-
-Add this line to your FDF FV section:
-INF RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
-(For X64 SEC/PEI change IA32 to X64 => 'USE = X64')
-
-In your FDF FFS file rules sections add:
-[Rule.Common.SEC.RESET_VECTOR]
- FILE RAW = $(NAMED_GUID) {
- RAW RAW |.raw
- }
-
-=== VTF0 Boot Flow ===
-
-1. Transition to IA32 flat mode
-2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary
-3. Locate SEC image
-4. X64 VTF0 transitions to X64 mode
-5. Call SEC image entry point
-
-== VTF0 SEC input parameters ==
-
-All inputs to SEC image are register based:
-EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)
-DI - 'BP': boot-strap processor, or 'AP': application processor
-EBP/RBP - Pointer to the start of the Boot Firmware Volume
-
-=== HOW TO BUILD VTF0 ===
-
-Dependencies:
-* Python 2.5~2.7
-* Nasm 2.03 or newer
-
-To rebuild the VTF0 binaries:
-1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0
-2. nasm and python should be in executable path
-3. Run this command:
- python Build.py
-4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/ResetVector.uni b/UefiCpuPkg/ResetVector/Vtf0/ResetVector.uni Binary files differdeleted file mode 100644 index 591dc29543..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/ResetVector.uni +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/ResetVectorExtra.uni b/UefiCpuPkg/ResetVector/Vtf0/ResetVectorExtra.uni Binary files differdeleted file mode 100644 index b907f406be..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/ResetVectorExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/ResetVector/Vtf0/SerialDebug.asm b/UefiCpuPkg/ResetVector/Vtf0/SerialDebug.asm deleted file mode 100644 index ebd0910f4a..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/SerialDebug.asm +++ /dev/null @@ -1,132 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Serial port debug support macros
-;
-; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-;//---------------------------------------------
-;// UART Register Offsets
-;//---------------------------------------------
-%define BAUD_LOW_OFFSET 0x00
-%define BAUD_HIGH_OFFSET 0x01
-%define IER_OFFSET 0x01
-%define LCR_SHADOW_OFFSET 0x01
-%define FCR_SHADOW_OFFSET 0x02
-%define IR_CONTROL_OFFSET 0x02
-%define FCR_OFFSET 0x02
-%define EIR_OFFSET 0x02
-%define BSR_OFFSET 0x03
-%define LCR_OFFSET 0x03
-%define MCR_OFFSET 0x04
-%define LSR_OFFSET 0x05
-%define MSR_OFFSET 0x06
-
-;//---------------------------------------------
-;// UART Register Bit Defines
-;//---------------------------------------------
-%define LSR_TXRDY 0x20
-%define LSR_RXDA 0x01
-%define DLAB 0x01
-
-; UINT16 gComBase = 0x3f8;
-; UINTN gBps = 115200;
-; UINT8 gData = 8;
-; UINT8 gStop = 1;
-; UINT8 gParity = 0;
-; UINT8 gBreakSet = 0;
-
-%define DEFAULT_COM_BASE 0x3f8
-%define DEFAULT_BPS 115200
-%define DEFAULT_DATA 8
-%define DEFAULT_STOP 1
-%define DEFAULT_PARITY 0
-%define DEFAULT_BREAK_SET 0
-
-%define SERIAL_DEFAULT_LCR ( \
- (DEFAULT_BREAK_SET << 6) | \
- (DEFAULT_PARITY << 3) | \
- (DEFAULT_STOP << 2) | \
- (DEFAULT_DATA - 5) \
- )
-
-%define SERIAL_PORT_IO_BASE_ADDRESS DEFAULT_COM_BASE
-
-%macro inFromSerialPort 1
- mov dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)
- in al, dx
-%endmacro
-
-%macro waitForSerialTxReady 0
-
-%%waitingForTx:
- inFromSerialPort LSR_OFFSET
- test al, LSR_TXRDY
- jz %%waitingForTx
-
-%endmacro
-
-%macro outToSerialPort 2
- mov dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)
- mov al, %2
- out dx, al
-%endmacro
-
-%macro debugShowCharacter 1
- waitForSerialTxReady
- outToSerialPort 0, %1
-%endmacro
-
-%macro debugShowHexDigit 1
- %if (%1 < 0xa)
- debugShowCharacter BYTE ('0' + (%1))
- %else
- debugShowCharacter BYTE ('a' + ((%1) - 0xa))
- %endif
-%endmacro
-
-%macro debugNewline 0
- debugShowCharacter `\r`
- debugShowCharacter `\n`
-%endmacro
-
-%macro debugShowPostCode 1
- debugShowHexDigit (((%1) >> 4) & 0xf)
- debugShowHexDigit ((%1) & 0xf)
- debugNewline
-%endmacro
-
-BITS 16
-
-%macro debugInitialize 0
- jmp real16InitDebug
-real16InitDebugReturn:
-%endmacro
-
-real16InitDebug:
- ;
- ; Set communications format
- ;
- outToSerialPort LCR_OFFSET, ((DLAB << 7) | SERIAL_DEFAULT_LCR)
-
- ;
- ; Configure baud rate
- ;
- outToSerialPort BAUD_HIGH_OFFSET, ((115200 / DEFAULT_BPS) >> 8)
- outToSerialPort BAUD_LOW_OFFSET, ((115200 / DEFAULT_BPS) & 0xff)
-
- ;
- ; Switch back to bank 0
- ;
- outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR
-
- jmp real16InitDebugReturn
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Tools/FixupForRawSection.py b/UefiCpuPkg/ResetVector/Vtf0/Tools/FixupForRawSection.py deleted file mode 100644 index a70ce7501d..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Tools/FixupForRawSection.py +++ /dev/null @@ -1,26 +0,0 @@ -## @file
-# Apply fixup to VTF binary image for FFS Raw section
-#
-# Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-import sys
-
-filename = sys.argv[1]
-
-d = open(sys.argv[1], 'rb').read()
-c = ((len(d) + 4 + 7) & ~7) - 4
-if c > len(d):
- c -= len(d)
- f = open(sys.argv[1], 'wb')
- f.write('\x90' * c)
- f.write(d)
- f.close()
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf deleted file mode 100644 index 41aba45a14..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf +++ /dev/null @@ -1,36 +0,0 @@ -## @file
-# Reset Vector
-#
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ResetVector
- FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
- MODULE_TYPE = SEC
- VERSION_STRING = 1.1
- MODULE_UNI_FILE = ResetVector.uni
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- Vtf0.nasmb
-
-[Packages]
- MdePkg/MdePkg.dec
-
-[UserExtensions.TianoCore."ExtraFiles"]
- ResetVectorExtra.uni
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb deleted file mode 100644 index f4a29e8d89..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.nasmb +++ /dev/null @@ -1,70 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; This file includes all other code files to assemble the reset vector code
-;
-; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-;
-; If neither ARCH_IA32 nor ARCH_X64 are defined, then try to include
-; Base.h to use the C pre-processor to determine the architecture.
-;
-%ifndef ARCH_IA32
- %ifndef ARCH_X64
- #include <Base.h>
- #if defined (MDE_CPU_IA32)
- %define ARCH_IA32
- #elif defined (MDE_CPU_X64)
- %define ARCH_X64
- #endif
- %endif
-%endif
-
-%ifdef ARCH_IA32
- %ifdef ARCH_X64
- %error "Only one of ARCH_IA32 or ARCH_X64 can be defined."
- %endif
-%elifdef ARCH_X64
-%else
- %error "Either ARCH_IA32 or ARCH_X64 must be defined."
-%endif
-
-%include "CommonMacros.inc"
-
-%include "PostCodes.inc"
-
-%ifdef ARCH_X64
-%include "X64/PageTables.asm"
-%endif
-
-%ifdef DEBUG_PORT80
- %include "Port80Debug.asm"
-%elifdef DEBUG_SERIAL
- %include "SerialDebug.asm"
-%else
- %include "DebugDisabled.asm"
-%endif
-
-%include "Ia32/SearchForBfvBase.asm"
-%include "Ia32/SearchForSecEntry.asm"
-
-%ifdef ARCH_X64
-%include "Ia32/Flat32ToFlat64.asm"
-%include "Ia32/PageTables64.asm"
-%endif
-
-%include "Ia16/Real16ToFlat32.asm"
-%include "Ia16/Init16.asm"
-
-%include "Main.asm"
-
-%include "Ia16/ResetVectorVtf0.asm"
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm b/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm deleted file mode 100644 index 3d703c74f6..0000000000 --- a/UefiCpuPkg/ResetVector/Vtf0/X64/PageTables.asm +++ /dev/null @@ -1,78 +0,0 @@ -;------------------------------------------------------------------------------
-; @file
-; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x100000000 (4GB)
-;
-; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-BITS 64
-
-%define ALIGN_TOP_TO_4K_FOR_PAGING
-
-%define PAGE_PRESENT 0x01
-%define PAGE_READ_WRITE 0x02
-%define PAGE_USER_SUPERVISOR 0x04
-%define PAGE_WRITE_THROUGH 0x08
-%define PAGE_CACHE_DISABLE 0x010
-%define PAGE_ACCESSED 0x020
-%define PAGE_DIRTY 0x040
-%define PAGE_PAT 0x080
-%define PAGE_GLOBAL 0x0100
-%define PAGE_2M_MBO 0x080
-%define PAGE_2M_PAT 0x01000
-
-%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
- PAGE_ACCESSED + \
- PAGE_DIRTY + \
- PAGE_READ_WRITE + \
- PAGE_PRESENT)
-
-%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
- PAGE_READ_WRITE + \
- PAGE_PRESENT)
-
-%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
-%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
-
-%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
- PAGE_PDP_ATTR)
-%define PTE_2MB(x) ((x << 21) + PAGE_2M_PDE_ATTR)
-
-TopLevelPageDirectory:
-
- ;
- ; Top level Page Directory Pointers (1 * 512GB entry)
- ;
- DQ PDP(0x1000)
-
-
- ;
- ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)
- ;
- TIMES 0x1000-PGTBLS_OFFSET($) DB 0
-
- DQ PDP(0x2000)
- DQ PDP(0x3000)
- DQ PDP(0x4000)
- DQ PDP(0x5000)
-
- ;
- ; Page Table Entries (2048 * 2MB entries => 4GB)
- ;
- TIMES 0x2000-PGTBLS_OFFSET($) DB 0
-
-%assign i 0
-%rep 0x800
- DQ PTE_2MB(i)
- %assign i i+1
-%endrep
-
-EndOfPageTables:
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec deleted file mode 100644 index 202e71990f..0000000000 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ /dev/null @@ -1,77 +0,0 @@ -## @file UefiCpuPkg.dec
-# This Package provides UEFI compatible CPU modules and libraries.
-#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials are licensed and made available under
-# the terms and conditions of the BSD License which accompanies this distribution.
-# The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- DEC_SPECIFICATION = 0x00010005
- PACKAGE_NAME = UefiCpuPkg
- PACKAGE_UNI_FILE = UefiCpuPkg.uni
- PACKAGE_GUID = 2171df9b-0d39-45aa-ac37-2de190010d23
- PACKAGE_VERSION = 0.3
-
-[Includes]
- Include
-
-[LibraryClasses]
- ## @libraryclass Defines some routines that are generic for IA32 family CPU
- ## to be UEFI specification compliant.
- ##
- UefiCpuLib|Include/Library/UefiCpuLib.h
-
-[LibraryClasses.IA32, LibraryClasses.X64]
- ## @libraryclass Provides functions to manage MTRR settings on IA32 and X64 CPUs.
- ##
- MtrrLib|Include/Library/MtrrLib.h
-
- ## @libraryclass Provides functions to manage the Local APIC on IA32 and X64 CPUs.
- ##
- LocalApicLib|Include/Library/LocalApicLib.h
-
-[Guids]
- gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
-
-#
-# [Error.gUefiCpuPkgTokenSpaceGuid]
-# 0x80000001 | Invalid value provided.
-#
-
-[PcdsFixedAtBuild, PcdsPatchableInModule]
- ## This value is the CPU Local Apic base address, which aligns the address on a 4-KByte boundary.
- # @Prompt Configure base address of CPU Local Apic
- # @Expression 0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
- gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
- ## Specifies delay value in microseconds after sending out an INIT IPI.
- # @Prompt Configure delay value after send an INIT IPI
- gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
- ## Specifies max supported number of Logical Processors.
- # @Prompt Configure max supported number of Logical Processorss
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
- ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
- ## aligns the address on a 4-KByte boundary.
- # @Prompt Configure stack size for Application Processor (AP)
- gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
-
-[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
- ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
- # @Prompt Timeout for the BSP to detect all APs for the first time.
- gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
- ## Specifies the base address of the first microcode Patch in the microcode Region.
- # @Prompt Microcode Region base address.
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
- ## Specifies the size of the microcode Region.
- # @Prompt Microcode Region size.
- gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
-
-[UserExtensions.TianoCore."ExtraFiles"]
- UefiCpuPkgExtra.uni
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc deleted file mode 100644 index 5fcff1510d..0000000000 --- a/UefiCpuPkg/UefiCpuPkg.dsc +++ /dev/null @@ -1,97 +0,0 @@ -## @file
-# UefiCpuPkg Package
-#
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- PLATFORM_NAME = UefiCpu
- PLATFORM_GUID = a1b7be22-78b3-4260-9569-8649e8c17d49
- PLATFORM_VERSION = 0.3
- DSC_SPECIFICATION = 0x00010005
- OUTPUT_DIRECTORY = Build/UefiCpu
- SUPPORTED_ARCHITECTURES = IA32|IPF|X64
- BUILD_TARGETS = DEBUG|RELEASE
- SKUID_IDENTIFIER = DEFAULT
-
-#
-# External libraries to build package
-#
-
-[LibraryClasses]
- BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
- BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
- CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
- DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
- UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
- IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
- MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
- UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
- UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
- UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
- UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
- DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
- PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
- PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
- PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
- TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
- DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
- LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
- ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
- CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
- SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
-
-[LibraryClasses.common.PEIM]
- MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
- HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
- LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf
-
-[LibraryClasses.IA32.PEIM, LibraryClasses.X64.PEIM]
- PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
-
-[LibraryClasses.IPF.PEIM]
- PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibKr7/PeiServicesTablePointerLibKr7.inf
-
-[LibraryClasses.common.DXE_DRIVER]
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
-
-[LibraryClasses.common.DXE_SMM_DRIVER]
- SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
- MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
-
-#
-# Drivers/Libraries within this package
-#
-
-[Components]
- UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
- UefiCpuPkg/CpuIoPei/CpuIoPei.inf
- UefiCpuPkg/Library/SecPeiDxeTimerLibUefiCpu/SecPeiDxeTimerLibUefiCpu.inf
-
-[Components.IA32, Components.X64]
- UefiCpuPkg/CpuMpPei/CpuMpPei.inf
- UefiCpuPkg/CpuDxe/CpuDxe.inf
- UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
- UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
- UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
- UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
- UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
- UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
- UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
- UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
- UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
-
diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni Binary files differdeleted file mode 100644 index 2f2d20f7fd..0000000000 --- a/UefiCpuPkg/UefiCpuPkg.uni +++ /dev/null diff --git a/UefiCpuPkg/UefiCpuPkgExtra.uni b/UefiCpuPkg/UefiCpuPkgExtra.uni Binary files differdeleted file mode 100644 index d60a6a285a..0000000000 --- a/UefiCpuPkg/UefiCpuPkgExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S deleted file mode 100644 index ede19f21c3..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.S +++ /dev/null @@ -1,38 +0,0 @@ -#------------------------------------------------------------------------------
-#*
-#* Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
-#* This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* AsmFuncs.S
-#*
-#* Abstract:
-#*
-#* Assembly function to set segment selectors.
-#
-#------------------------------------------------------------------------------
-
-.text
-
-#------------------------------------------------------------------------------
-#
-# VOID
-# EFIAPI
-# AsmSetDataSelectors (
-# IN UINT16 SelectorValue
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmSetDataSelectors)
-ASM_PFX(AsmSetDataSelectors):
- movl 4(%esp), %eax
- movw %ax, %ss
- movw %ax, %ds
- movw %ax, %es
- movw %ax, %fs
- movw %ax, %gs
- ret
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm deleted file mode 100644 index 79496c48d7..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/Ia32/AsmFuncs.asm +++ /dev/null @@ -1,45 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; AsmFuncs.Asm
-;
-; Abstract:
-;
-; Assembly function to set segment selectors.
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
-.686
-.model flat,C
-
-.code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmSetDataSelectors (
-; IN UINT16 SelectorValue
-; );
-;------------------------------------------------------------------------------
-AsmSetDataSelectors PROC near public
- mov eax, [esp + 4]
- mov ds, ax
- mov es, ax
- mov fs, ax
- mov gs, ax
- mov ss, ax
- ret
-AsmSetDataSelectors ENDP
-
-END
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c deleted file mode 100644 index a79fc59bdf..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c +++ /dev/null @@ -1,1148 +0,0 @@ -/** @file
- This module produces the EFI_PEI_S3_RESUME2_PPI.
- This module works with StandAloneBootScriptExecutor to S3 resume to OS.
- This module will excute the boot script saved during last boot and after that,
- control is passed to OS waking up handler.
-
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions
- of the BSD License which accompanies this distribution. The
- full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Guid/AcpiS3Context.h>
-#include <Guid/BootScriptExecutorVariable.h>
-#include <Guid/Performance.h>
-#include <Ppi/ReadOnlyVariable2.h>
-#include <Ppi/S3Resume2.h>
-#include <Ppi/SmmAccess.h>
-#include <Ppi/PostBootScriptTable.h>
-#include <Ppi/EndOfPeiPhase.h>
-
-#include <Library/DebugLib.h>
-#include <Library/BaseLib.h>
-#include <Library/TimerLib.h>
-#include <Library/PeimEntryPoint.h>
-#include <Library/PeiServicesLib.h>
-#include <Library/HobLib.h>
-#include <Library/PerformanceLib.h>
-#include <Library/PeiServicesTablePointerLib.h>
-#include <Library/IoLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugAgentLib.h>
-#include <Library/LocalApicLib.h>
-#include <Library/ReportStatusCodeLib.h>
-#include <Library/PrintLib.h>
-#include <Library/HobLib.h>
-#include <Library/LockBoxLib.h>
-#include <IndustryStandard/Acpi.h>
-
-/**
- This macro aligns the address of a variable with auto storage
- duration down to CPU_STACK_ALIGNMENT.
-
- Since the stack grows downward, the result preserves more of the
- stack than the original address (or the same amount), not less.
-**/
-#define STACK_ALIGN_DOWN(Ptr) \
- ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))
-
-#pragma pack(1)
-typedef union {
- struct {
- UINT32 LimitLow : 16;
- UINT32 BaseLow : 16;
- UINT32 BaseMid : 8;
- UINT32 Type : 4;
- UINT32 System : 1;
- UINT32 Dpl : 2;
- UINT32 Present : 1;
- UINT32 LimitHigh : 4;
- UINT32 Software : 1;
- UINT32 Reserved : 1;
- UINT32 DefaultSize : 1;
- UINT32 Granularity : 1;
- UINT32 BaseHigh : 8;
- } Bits;
- UINT64 Uint64;
-} IA32_GDT;
-
-//
-// Page-Map Level-4 Offset (PML4) and
-// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB
-//
-typedef union {
- struct {
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
- UINT64 Reserved:1; // Reserved
- UINT64 MustBeZero:2; // Must Be Zero
- UINT64 Available:3; // Available for use by system software
- UINT64 PageTableBaseAddress:40; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // No Execute bit
- } Bits;
- UINT64 Uint64;
-} PAGE_MAP_AND_DIRECTORY_POINTER;
-
-//
-// Page Table Entry 2MB
-//
-typedef union {
- struct {
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
- UINT64 MustBe1:1; // Must be 1
- UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
- UINT64 Available:3; // Available for use by system software
- UINT64 PAT:1; //
- UINT64 MustBeZero:8; // Must be zero;
- UINT64 PageTableBaseAddress:31; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
- } Bits;
- UINT64 Uint64;
-} PAGE_TABLE_ENTRY;
-
-//
-// Page Table Entry 1GB
-//
-typedef union {
- struct {
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
- UINT64 MustBe1:1; // Must be 1
- UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
- UINT64 Available:3; // Available for use by system software
- UINT64 PAT:1; //
- UINT64 MustBeZero:17; // Must be zero;
- UINT64 PageTableBaseAddress:22; // Page Table Base Address
- UINT64 AvabilableHigh:11; // Available for use by system software
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
- } Bits;
- UINT64 Uint64;
-} PAGE_TABLE_1G_ENTRY;
-
-#pragma pack()
-
-//
-// Function prototypes
-//
-/**
- a ASM function to transfer control to OS.
-
- @param S3WakingVector The S3 waking up vector saved in ACPI Facs table
- @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer
-**/
-typedef
-VOID
-(EFIAPI *ASM_TRANSFER_CONTROL) (
- IN UINT32 S3WakingVector,
- IN UINT32 AcpiLowMemoryBase
- );
-
-/**
- Restores the platform to its preboot configuration for an S3 resume and
- jumps to the OS waking vector.
-
- This function will restore the platform to its pre-boot configuration that was
- pre-stored in the boot script table and transfer control to OS waking vector.
- Upon invocation, this function is responsible for locating the following
- information before jumping to OS waking vector:
- - ACPI tables
- - boot script table
- - any other information that it needs
-
- The S3RestoreConfig() function then executes the pre-stored boot script table
- and transitions the platform to the pre-boot state. The boot script is recorded
- during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
- EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
- transfers control to the OS waking vector. If the OS supports only a real-mode
- waking vector, this function will switch from flat mode to real mode before
- jumping to the waking vector. If all platform pre-boot configurations are
- successfully restored and all other necessary information is ready, this
- function will never return and instead will directly jump to the OS waking
- vector. If this function returns, it indicates that the attempt to resume
- from the ACPI S3 sleep state failed.
-
- @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
-
- @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
- @retval EFI_NOT_FOUND Some necessary information that is used for the S3
- resume boot path could not be located.
-
-**/
-EFI_STATUS
-EFIAPI
-S3RestoreConfig2 (
- IN EFI_PEI_S3_RESUME2_PPI *This
- );
-
-/**
- Set data segment selectors value including DS/ES/FS/GS/SS.
-
- @param[in] SelectorValue Segment selector value to be set.
-
-**/
-VOID
-EFIAPI
-AsmSetDataSelectors (
- IN UINT16 SelectorValue
- );
-
-//
-// Globals
-//
-EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };
-
-EFI_PEI_PPI_DESCRIPTOR mPpiList = {
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gEfiPeiS3Resume2PpiGuid,
- &mS3ResumePpi
-};
-
-EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gPeiPostScriptTablePpiGuid,
- 0
-};
-
-EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
- &gEfiEndOfPeiSignalPpiGuid,
- 0
-};
-
-//
-// Global Descriptor Table (GDT)
-//
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
-/* selector { Global Segment Descriptor } */
-/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
-/* 0x08 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
-/* 0x10 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
-/* 0x18 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}},
-/* 0x20 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
-/* 0x28 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
-/* 0x30 */ {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0}},
-/* 0x38 */ {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}},
-/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
-};
-
-#define DATA_SEGEMENT_SELECTOR 0x18
-
-//
-// IA32 Gdt register
-//
-GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {
- sizeof (mGdtEntries) - 1,
- (UINTN) mGdtEntries
- };
-
-/**
- Performance measure function to get S3 detailed performance data.
-
- This function will getS3 detailed performance data and saved in pre-reserved ACPI memory.
-**/
-VOID
-WriteToOsS3PerformanceData (
- VOID
- )
-{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS mAcpiLowMemoryBase;
- PERF_HEADER *PerfHeader;
- PERF_DATA *PerfData;
- UINT64 Ticker;
- UINTN Index;
- EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;
- UINTN VarSize;
- UINTN LogEntryKey;
- CONST VOID *Handle;
- CONST CHAR8 *Token;
- CONST CHAR8 *Module;
- UINT64 StartTicker;
- UINT64 EndTicker;
- UINT64 StartValue;
- UINT64 EndValue;
- BOOLEAN CountUp;
- UINT64 Freq;
-
- //
- // Retrive time stamp count as early as possilbe
- //
- Ticker = GetPerformanceCounter ();
-
- Freq = GetPerformanceCounterProperties (&StartValue, &EndValue);
-
- Freq = DivU64x32 (Freq, 1000);
-
- Status = PeiServicesLocatePpi (
- &gEfiPeiReadOnlyVariable2PpiGuid,
- 0,
- NULL,
- (VOID **) &VariableServices
- );
- if (EFI_ERROR (Status)) {
- return;
- }
-
- VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
- Status = VariableServices->GetVariable (
- VariableServices,
- L"PerfDataMemAddr",
- &gPerformanceProtocolGuid,
- NULL,
- &VarSize,
- &mAcpiLowMemoryBase
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "Fail to retrieve variable to log S3 performance data \n"));
- return;
- }
-
- PerfHeader = (PERF_HEADER *) (UINTN) mAcpiLowMemoryBase;
-
- if (PerfHeader->Signiture != PERFORMANCE_SIGNATURE) {
- DEBUG ((EFI_D_ERROR, "Performance data in ACPI memory get corrupted! \n"));
- return;
- }
-
- //
- // Record total S3 resume time.
- //
- if (EndValue >= StartValue) {
- PerfHeader->S3Resume = Ticker - StartValue;
- CountUp = TRUE;
- } else {
- PerfHeader->S3Resume = StartValue - Ticker;
- CountUp = FALSE;
- }
-
- //
- // Get S3 detailed performance data
- //
- Index = 0;
- LogEntryKey = 0;
- while ((LogEntryKey = GetPerformanceMeasurement (
- LogEntryKey,
- &Handle,
- &Token,
- &Module,
- &StartTicker,
- &EndTicker)) != 0) {
- if (EndTicker != 0) {
- PerfData = &PerfHeader->S3Entry[Index];
-
- //
- // Use File Handle to specify the different performance log for PEIM.
- // File Handle is the base address of PEIM FFS file.
- //
- if ((AsciiStrnCmp (Token, "PEIM", PEI_PERFORMANCE_STRING_SIZE) == 0) && (Handle != NULL)) {
- AsciiSPrint (PerfData->Token, PERF_TOKEN_LENGTH, "0x%11p", Handle);
- } else {
- AsciiStrnCpyS (PerfData->Token, PERF_TOKEN_SIZE, Token, PERF_TOKEN_LENGTH);
- }
- if (StartTicker == 1) {
- StartTicker = StartValue;
- }
- if (EndTicker == 1) {
- EndTicker = StartValue;
- }
- Ticker = CountUp? (EndTicker - StartTicker) : (StartTicker - EndTicker);
- PerfData->Duration = (UINT32) DivU64x32 (Ticker, (UINT32) Freq);
-
- //
- // Only Record > 1ms performance data so that more big performance can be recorded.
- //
- if ((Ticker > Freq) && (++Index >= PERF_PEI_ENTRY_MAX_NUM)) {
- //
- // Reach the maximum number of PEI performance log entries.
- //
- break;
- }
- }
- }
- PerfHeader->S3EntryNum = (UINT32) Index;
-}
-
-/**
- The function will check if current waking vector is long mode.
-
- @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
-
- @retval TRUE Current context need long mode waking vector.
- @retval FALSE Current context need not long mode waking vector.
-**/
-BOOLEAN
-IsLongModeWakingVector (
- IN ACPI_S3_CONTEXT *AcpiS3Context
- )
-{
- EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
-
- Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
- if ((Facs == NULL) ||
- (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
- ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
- // Something wrong with FACS
- return FALSE;
- }
- if (Facs->XFirmwareWakingVector != 0) {
- if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
- ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
- ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
- // Both BIOS and OS wants 64bit vector
- if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
- return TRUE;
- }
- }
- }
- return FALSE;
-}
-
-/**
- Jump to OS waking vector.
- The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.
-
- @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
- @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE
-**/
-VOID
-EFIAPI
-S3ResumeBootOs (
- IN ACPI_S3_CONTEXT *AcpiS3Context,
- IN PEI_S3_RESUME_STATE *PeiS3ResumeState
- )
-{
- EFI_STATUS Status;
- EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;
- ASM_TRANSFER_CONTROL AsmTransferControl;
- UINTN TempStackTop;
- UINTN TempStack[0x10];
-
- //
- // Restore IDT
- //
- AsmWriteIdtr (&PeiS3ResumeState->Idtr);
-
- if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {
- //
- // Report Status code that boot script execution is failed
- //
- REPORT_STATUS_CODE (
- EFI_ERROR_CODE | EFI_ERROR_MINOR,
- (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)
- );
- }
-
- //
- // NOTE: Because Debug Timer interrupt and system interrupts will be disabled
- // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted
- // by soft debugger.
- //
-
- PERF_END (NULL, "ScriptExec", NULL, 0);
-
- //
- // Install BootScriptDonePpi
- //
- Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);
- ASSERT_EFI_ERROR (Status);
-
- //
- // Get ACPI Table Address
- //
- Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));
-
- if ((Facs == NULL) ||
- (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||
- ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {
- //
- // Report Status code that no valid vector is found
- //
- REPORT_STATUS_CODE (
- EFI_ERROR_CODE | EFI_ERROR_MAJOR,
- (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
- );
- CpuDeadLoop ();
- return ;
- }
-
- //
- // Install EndOfPeiPpi
- //
- Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);
- ASSERT_EFI_ERROR (Status);
-
- //
- // report status code on S3 resume
- //
- REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);
-
- PERF_CODE (
- WriteToOsS3PerformanceData ();
- );
-
- AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;
- if (Facs->XFirmwareWakingVector != 0) {
- //
- // Switch to native waking vector
- //
- TempStackTop = (UINTN)&TempStack + sizeof(TempStack);
- if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&
- ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&
- ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {
- //
- // X64 long mode waking vector
- //
- DEBUG (( EFI_D_ERROR, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
- if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
- AsmEnablePaging64 (
- 0x38,
- Facs->XFirmwareWakingVector,
- 0,
- 0,
- (UINT64)(UINTN)TempStackTop
- );
- } else {
- //
- // Report Status code that no valid waking vector is found
- //
- REPORT_STATUS_CODE (
- EFI_ERROR_CODE | EFI_ERROR_MAJOR,
- (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
- );
- DEBUG (( EFI_D_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));
- ASSERT (FALSE);
- CpuDeadLoop ();
- return ;
- }
- } else {
- //
- // IA32 protected mode waking vector (Page disabled)
- //
- DEBUG (( EFI_D_ERROR, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
- SwitchStack (
- (SWITCH_STACK_ENTRY_POINT) (UINTN) Facs->XFirmwareWakingVector,
- NULL,
- NULL,
- (VOID *)(UINTN)TempStackTop
- );
- }
- } else {
- //
- // 16bit Realmode waking vector
- //
- DEBUG (( EFI_D_ERROR, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));
- AsmTransferControl (Facs->FirmwareWakingVector, 0x0);
- }
-
- //
- // Report Status code the failure of S3Resume
- //
- REPORT_STATUS_CODE (
- EFI_ERROR_CODE | EFI_ERROR_MAJOR,
- (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
- );
-
- //
- // Never run to here
- //
- CpuDeadLoop();
-}
-
-/**
- Restore S3 page table because we do not trust ACPINvs content.
- If BootScriptExector driver will not run in 64-bit mode, this function will do nothing.
-
- @param S3NvsPageTableAddress PageTableAddress in ACPINvs
- @param Build4GPageTableOnly If BIOS just build 4G page table only
-**/
-VOID
-RestoreS3PageTables (
- IN UINTN S3NvsPageTableAddress,
- IN BOOLEAN Build4GPageTableOnly
- )
-{
- if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
- UINT32 RegEax;
- UINT32 RegEdx;
- UINT8 PhysicalAddressBits;
- EFI_PHYSICAL_ADDRESS PageAddress;
- UINTN IndexOfPml4Entries;
- UINTN IndexOfPdpEntries;
- UINTN IndexOfPageDirectoryEntries;
- UINT32 NumberOfPml4EntriesNeeded;
- UINT32 NumberOfPdpEntriesNeeded;
- PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
- PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
- PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
- PAGE_TABLE_ENTRY *PageDirectoryEntry;
- VOID *Hob;
- BOOLEAN Page1GSupport;
- PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
-
- //
- // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.
- // The whole page table is too large to be saved in SMRAM.
- //
- // The assumption is : whole page table is allocated in CONTINOUS memory and CR3 points to TOP page.
- //
- DEBUG ((EFI_D_ERROR, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));
-
- //
- // By architecture only one PageMapLevel4 exists - so lets allocate storgage for it.
- //
- PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
- S3NvsPageTableAddress += SIZE_4KB;
-
- Page1GSupport = FALSE;
- if (PcdGetBool(PcdUse1GPageTable)) {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000001) {
- AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
- if ((RegEdx & BIT26) != 0) {
- Page1GSupport = TRUE;
- }
- }
- }
-
- //
- // Get physical address bits supported.
- //
- Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
- if (Hob != NULL) {
- PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
- } else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8) RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
- }
-
- //
- // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
- //
- ASSERT (PhysicalAddressBits <= 52);
- if (PhysicalAddressBits > 48) {
- PhysicalAddressBits = 48;
- }
-
- //
- // NOTE: In order to save time to create full page table, we just create 4G page table by default.
- // And let PF handler in BootScript driver to create more on request.
- //
- if (Build4GPageTableOnly) {
- PhysicalAddressBits = 32;
- ZeroMem (PageMap, EFI_PAGES_TO_SIZE(2));
- }
- //
- // Calculate the table entries needed.
- //
- if (PhysicalAddressBits <= 39) {
- NumberOfPml4EntriesNeeded = 1;
- NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));
- } else {
- NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));
- NumberOfPdpEntriesNeeded = 512;
- }
-
- PageMapLevel4Entry = PageMap;
- PageAddress = 0;
- for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
- //
- // Each PML4 entry points to a page of Page Directory Pointer entires.
- // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
- //
- PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;
- S3NvsPageTableAddress += SIZE_4KB;
-
- //
- // Make a PML4 Entry
- //
- PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
- PageMapLevel4Entry->Bits.ReadWrite = 1;
- PageMapLevel4Entry->Bits.Present = 1;
-
- if (Page1GSupport) {
- PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
-
- for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
- //
- // Fill in the Page Directory entries
- //
- PageDirectory1GEntry->Uint64 = (UINT64)PageAddress;
- PageDirectory1GEntry->Bits.ReadWrite = 1;
- PageDirectory1GEntry->Bits.Present = 1;
- PageDirectory1GEntry->Bits.MustBe1 = 1;
- }
- } else {
- for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
- //
- // Each Directory Pointer entries points to a page of Page Directory entires.
- // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
- //
- PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;
- S3NvsPageTableAddress += SIZE_4KB;
-
- //
- // Fill in a Page Directory Pointer Entries
- //
- PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
- PageDirectoryPointerEntry->Bits.ReadWrite = 1;
- PageDirectoryPointerEntry->Bits.Present = 1;
-
- for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
- //
- // Fill in the Page Directory entries
- //
- PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
- PageDirectoryEntry->Bits.ReadWrite = 1;
- PageDirectoryEntry->Bits.Present = 1;
- PageDirectoryEntry->Bits.MustBe1 = 1;
- }
- }
- }
- }
- return ;
- } else {
- //
- // If DXE is running 32-bit mode, no need to establish page table.
- //
- return ;
- }
-}
-
-/**
- Jump to boot script executor driver.
-
- The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.
-
- @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT
- @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in
- boot script execute driver
-**/
-VOID
-EFIAPI
-S3ResumeExecuteBootScript (
- IN ACPI_S3_CONTEXT *AcpiS3Context,
- IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable
- )
-{
- EFI_STATUS Status;
- PEI_SMM_ACCESS_PPI *SmmAccess;
- UINTN Index;
- VOID *GuidHob;
- IA32_DESCRIPTOR *IdtDescriptor;
- VOID *IdtBuffer;
- PEI_S3_RESUME_STATE *PeiS3ResumeState;
- BOOLEAN InterruptStatus;
-
- DEBUG ((EFI_D_ERROR, "S3ResumeExecuteBootScript()\n"));
-
- //
- // Attempt to use content from SMRAM first
- //
- GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
- if (GuidHob != NULL) {
- //
- // Last step for SMM - send SMI for initialization
- //
-
- //
- // Send SMI to APs
- //
- SendSmiIpiAllExcludingSelf ();
- //
- // Send SMI to BSP
- //
- SendSmiIpi (GetApicId ());
-
- Status = PeiServicesLocatePpi (
- &gPeiSmmAccessPpiGuid,
- 0,
- NULL,
- (VOID **) &SmmAccess
- );
- if (!EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "Close all SMRAM regions before executing boot script\n"));
-
- for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
- Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
- }
-
- DEBUG ((EFI_D_ERROR, "Lock all SMRAM regions before executing boot script\n"));
-
- for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {
- Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
- }
- }
- }
-
- if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
- AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);
- }
-
- if (FeaturePcdGet (PcdFrameworkCompatibilitySupport)) {
- //
- // On some platform, such as ECP, a dispatch node in boot script table may execute a 32-bit PEIM which may need PeiServices
- // pointer. So PeiServices need preserve in (IDTBase- sizeof (UINTN)).
- //
- IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);
- //
- // Make sure the newly allcated IDT align with 16-bytes
- //
- IdtBuffer = AllocatePages (EFI_SIZE_TO_PAGES((IdtDescriptor->Limit + 1) + 16));
- ASSERT (IdtBuffer != NULL);
- //
- // Additional 16 bytes allocated to save IA32 IDT descriptor and Pei Service Table Pointer
- // IA32 IDT descriptor will be used to setup IA32 IDT table for 32-bit Framework Boot Script code
- //
- ZeroMem (IdtBuffer, 16);
- AsmReadIdtr ((IA32_DESCRIPTOR *)IdtBuffer);
- CopyMem ((VOID*)((UINT8*)IdtBuffer + 16),(VOID*)(IdtDescriptor->Base), (IdtDescriptor->Limit + 1));
- IdtDescriptor->Base = (UINTN)((UINT8*)IdtBuffer + 16);
- *(UINTN*)(IdtDescriptor->Base - sizeof(UINTN)) = (UINTN)GetPeiServicesTablePointer ();
- }
-
- InterruptStatus = SaveAndDisableInterrupts ();
- //
- // Need to make sure the GDT is loaded with values that support long mode and real mode.
- //
- AsmWriteGdtr (&mGdt);
- //
- // update segment selectors per the new GDT.
- //
- AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
- //
- // Restore interrupt state.
- //
- SetInterruptState (InterruptStatus);
-
- //
- // Prepare data for return back
- //
- PeiS3ResumeState = AllocatePool (sizeof(*PeiS3ResumeState));
- ASSERT (PeiS3ResumeState != NULL);
- DEBUG (( EFI_D_ERROR, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));
- PeiS3ResumeState->ReturnCs = 0x10;
- PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;
- PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
- //
- // Save IDT
- //
- AsmReadIdtr (&PeiS3ResumeState->Idtr);
-
- //
- // Report Status Code to indicate S3 boot script execution
- //
- REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);
-
- PERF_START (NULL, "ScriptExec", NULL, 0);
-
- if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
- //
- // X64 S3 Resume
- //
- DEBUG (( EFI_D_ERROR, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));
-
- //
- // Switch to long mode to complete resume.
- //
- AsmEnablePaging64 (
- 0x38,
- EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
- (UINT64)(UINTN)AcpiS3Context,
- (UINT64)(UINTN)PeiS3ResumeState,
- (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
- );
- } else {
- //
- // IA32 S3 Resume
- //
- DEBUG (( EFI_D_ERROR, "transfer control to Standalone Boot Script Executor\r\n"));
- SwitchStack (
- (SWITCH_STACK_ENTRY_POINT) (UINTN) EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,
- (VOID *)AcpiS3Context,
- (VOID *)PeiS3ResumeState,
- (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)
- );
- }
-
- //
- // Never run to here
- //
- CpuDeadLoop();
-}
-/**
- Restores the platform to its preboot configuration for an S3 resume and
- jumps to the OS waking vector.
-
- This function will restore the platform to its pre-boot configuration that was
- pre-stored in the boot script table and transfer control to OS waking vector.
- Upon invocation, this function is responsible for locating the following
- information before jumping to OS waking vector:
- - ACPI tables
- - boot script table
- - any other information that it needs
-
- The S3RestoreConfig() function then executes the pre-stored boot script table
- and transitions the platform to the pre-boot state. The boot script is recorded
- during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and
- EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function
- transfers control to the OS waking vector. If the OS supports only a real-mode
- waking vector, this function will switch from flat mode to real mode before
- jumping to the waking vector. If all platform pre-boot configurations are
- successfully restored and all other necessary information is ready, this
- function will never return and instead will directly jump to the OS waking
- vector. If this function returns, it indicates that the attempt to resume
- from the ACPI S3 sleep state failed.
-
- @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI
-
- @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
- @retval EFI_NOT_FOUND Some necessary information that is used for the S3
- resume boot path could not be located.
-
-**/
-EFI_STATUS
-EFIAPI
-S3RestoreConfig2 (
- IN EFI_PEI_S3_RESUME2_PPI *This
- )
-{
- EFI_STATUS Status;
- PEI_SMM_ACCESS_PPI *SmmAccess;
- UINTN Index;
- ACPI_S3_CONTEXT *AcpiS3Context;
- EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;
- EFI_PHYSICAL_ADDRESS TempAcpiS3Context;
- BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;
- UINTN VarSize;
- EFI_SMRAM_DESCRIPTOR *SmramDescriptor;
- SMM_S3_RESUME_STATE *SmmS3ResumeState;
- VOID *GuidHob;
- BOOLEAN Build4GPageTableOnly;
- BOOLEAN InterruptStatus;
-
- TempAcpiS3Context = 0;
- TempEfiBootScriptExecutorVariable = 0;
-
- DEBUG ((EFI_D_ERROR, "Enter S3 PEIM\r\n"));
-
- VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
- Status = RestoreLockBox (
- &gEfiAcpiVariableGuid,
- &TempAcpiS3Context,
- &VarSize
- );
- ASSERT_EFI_ERROR (Status);
-
- Status = RestoreLockBox (
- &gEfiAcpiS3ContextGuid,
- NULL,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
-
- AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;
- ASSERT (AcpiS3Context != NULL);
-
- VarSize = sizeof (EFI_PHYSICAL_ADDRESS);
- Status = RestoreLockBox (
- &gEfiBootScriptExecutorVariableGuid,
- &TempEfiBootScriptExecutorVariable,
- &VarSize
- );
- ASSERT_EFI_ERROR (Status);
-
- Status = RestoreLockBox (
- &gEfiBootScriptExecutorContextGuid,
- NULL,
- NULL
- );
- ASSERT_EFI_ERROR (Status);
-
- EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *) (UINTN) TempEfiBootScriptExecutorVariable;
- ASSERT (EfiBootScriptExecutorVariable != NULL);
-
- DEBUG (( EFI_D_ERROR, "AcpiS3Context = %x\n", AcpiS3Context));
- DEBUG (( EFI_D_ERROR, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));
- DEBUG (( EFI_D_ERROR, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));
- DEBUG (( EFI_D_ERROR, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile));
- DEBUG (( EFI_D_ERROR, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));
- DEBUG (( EFI_D_ERROR, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));
- DEBUG (( EFI_D_ERROR, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));
- DEBUG (( EFI_D_ERROR, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));
- DEBUG (( EFI_D_ERROR, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));
-
- //
- // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.
- // Script dispatch image and context (parameter) are handled by platform.
- // We just use restore all lock box in place, no need restore one by one.
- //
- Status = RestoreAllLockBoxInPlace ();
- ASSERT_EFI_ERROR (Status);
- if (EFI_ERROR (Status)) {
- // Something wrong
- CpuDeadLoop ();
- }
-
- if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
- //
- // Need reconstruct page table here, since we do not trust ACPINvs.
- //
- if (IsLongModeWakingVector (AcpiS3Context)) {
- Build4GPageTableOnly = FALSE;
- } else {
- Build4GPageTableOnly = TRUE;
- }
- RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);
- }
-
- //
- // Attempt to use content from SMRAM first
- //
- GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
- if (GuidHob != NULL) {
- Status = PeiServicesLocatePpi (
- &gPeiSmmAccessPpiGuid,
- 0,
- NULL,
- (VOID **) &SmmAccess
- );
- for (Index = 0; !EFI_ERROR (Status); Index++) {
- Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);
- }
-
- SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);
- SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;
-
- SmmS3ResumeState->ReturnCs = AsmReadCs ();
- SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;
- SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;
- SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;
- SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);
-
- DEBUG (( EFI_D_ERROR, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));
- DEBUG (( EFI_D_ERROR, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));
- DEBUG (( EFI_D_ERROR, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));
- DEBUG (( EFI_D_ERROR, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));
- DEBUG (( EFI_D_ERROR, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));
- DEBUG (( EFI_D_ERROR, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));
- DEBUG (( EFI_D_ERROR, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));
- DEBUG (( EFI_D_ERROR, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));
- DEBUG (( EFI_D_ERROR, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));
- DEBUG (( EFI_D_ERROR, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));
- DEBUG (( EFI_D_ERROR, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));
- DEBUG (( EFI_D_ERROR, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
- DEBUG (( EFI_D_ERROR, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));
-
- if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
- SwitchStack (
- (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,
- (VOID *)AcpiS3Context,
- 0,
- (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)
- );
- }
- if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {
- //
- // Switch to long mode to complete resume.
- //
-
- InterruptStatus = SaveAndDisableInterrupts ();
- //
- // Need to make sure the GDT is loaded with values that support long mode and real mode.
- //
- AsmWriteGdtr (&mGdt);
- //
- // update segment selectors per the new GDT.
- //
- AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);
- //
- // Restore interrupt state.
- //
- SetInterruptState (InterruptStatus);
-
- AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);
-
- //
- // Disable interrupt of Debug timer, since IDT table cannot work in long mode.
- // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,
- // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.
- //
- SaveAndSetDebugTimerInterrupt (FALSE);
-
- AsmEnablePaging64 (
- 0x38,
- SmmS3ResumeState->SmmS3ResumeEntryPoint,
- (UINT64)(UINTN)AcpiS3Context,
- 0,
- SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize
- );
- }
-
- }
-
- S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable );
- return EFI_SUCCESS;
-}
-/**
- Main entry for S3 Resume PEIM.
-
- This routine is to install EFI_PEI_S3_RESUME2_PPI.
-
- @param FileHandle Handle of the file being invoked.
- @param PeiServices Pointer to PEI Services table.
-
- @retval EFI_SUCCESS S3Resume Ppi is installed successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-PeimS3ResumeEntryPoint (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- EFI_STATUS Status;
-
- //
- // Install S3 Resume Ppi
- //
- Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);
- ASSERT_EFI_ERROR (Status);
-
- return EFI_SUCCESS;
-}
-
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf deleted file mode 100644 index da68e2f936..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf +++ /dev/null @@ -1,97 +0,0 @@ -## @file
-# S3 Resume Module installs EFI_PEI_S3_RESUME2_PPI.
-#
-# This module works with StandAloneBootScriptExecutor to S3 resume to OS.
-# This module will excute the boot script saved during last boot and after that,
-# control is passed to OS waking up handler.
-#
-# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
-#
-# This program and the accompanying materials are
-# licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = S3Resume2Pei
- MODULE_UNI_FILE = S3Resume2Pei.uni
- FILE_GUID = 89E549B0-7CFE-449d-9BA3-10D8B2312D71
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- ENTRY_POINT = PeimS3ResumeEntryPoint
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- S3Resume.c
-
-[Sources.IA32]
- Ia32/AsmFuncs.asm
- Ia32/AsmFuncs.S | GCC
-
-[Sources.X64]
- X64/AsmFuncs.asm
- X64/AsmFuncs.S | GCC
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[LibraryClasses]
- PeiServicesTablePointerLib
- PerformanceLib
- HobLib
- PeiServicesLib
- PeimEntryPoint
- TimerLib
- BaseLib
- DebugLib
- PcdLib
- IoLib
- BaseMemoryLib
- MemoryAllocationLib
- DebugAgentLib
- LocalApicLib
- ReportStatusCodeLib
- LockBoxLib
- PrintLib
-
-[Guids]
- gEfiBootScriptExecutorVariableGuid ## SOMETIMES_CONSUMES ## UNDEFINED # LockBox
- gEfiBootScriptExecutorContextGuid ## SOMETIMES_CONSUMES ## UNDEFINED # LockBox
- gPerformanceProtocolGuid ## SOMETIMES_CONSUMES ## Variable:L"PerfDataMemAddr"
- ## SOMETIMES_CONSUMES ## HOB
- ## SOMETIMES_CONSUMES ## UNDEFINED # LockBox
- gEfiAcpiVariableGuid
- gEfiAcpiS3ContextGuid ## SOMETIMES_CONSUMES ## UNDEFINED # LockBox
-
-[Ppis]
- gEfiPeiReadOnlyVariable2PpiGuid ## CONSUMES
- gEfiPeiS3Resume2PpiGuid ## PRODUCES
- gPeiSmmAccessPpiGuid ## SOMETIMES_CONSUMES
- gPeiPostScriptTablePpiGuid ## SOMETIMES_PRODUCES
- gEfiEndOfPeiSignalPpiGuid ## SOMETIMES_PRODUCES
-
-[FeaturePcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONSUMES
- gEfiMdeModulePkgTokenSpaceGuid.PcdFrameworkCompatibilitySupport ## CONSUMES
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_CONSUMES
-
-[Depex]
- TRUE
-
-[UserExtensions.TianoCore."ExtraFiles"]
- S3Resume2PeiExtra.uni
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.uni b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.uni Binary files differdeleted file mode 100644 index ea3bfd8c4f..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.uni +++ /dev/null diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2PeiExtra.uni b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2PeiExtra.uni Binary files differdeleted file mode 100644 index bc9ae0bcb0..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2PeiExtra.uni +++ /dev/null diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S deleted file mode 100644 index 2ced09f35c..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.S +++ /dev/null @@ -1,37 +0,0 @@ -#------------------------------------------------------------------------------
-#*
-#* Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
-#* This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* AsmFuncs.S
-#*
-#* Abstract:
-#*
-#* Assembly function to set segment selectors.
-#
-#------------------------------------------------------------------------------
-
-.text
-
-#------------------------------------------------------------------------------
-#
-# VOID
-# EFIAPI
-# AsmSetDataSelectors (
-# IN UINT16 SelectorValue
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(AsmSetDataSelectors)
-ASM_PFX(AsmSetDataSelectors):
- movw %cx, %ss
- movw %cx, %ds
- movw %cx, %es
- movw %cx, %fs
- movw %cx, %gs
- ret
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm deleted file mode 100644 index eb014a5862..0000000000 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/X64/AsmFuncs.asm +++ /dev/null @@ -1,41 +0,0 @@ -;------------------------------------------------------------------------------ ;
-; Copyright (c) 2012, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-; Module Name:
-;
-; AsmFuncs.Asm
-;
-; Abstract:
-;
-; Assembly function to set segment selectors.
-;
-; Notes:
-;
-;------------------------------------------------------------------------------
-
-.code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; AsmSetDataSelectors (
-; IN UINT16 SelectorValue
-; );
-;------------------------------------------------------------------------------
-AsmSetDataSelectors PROC
- mov ds, cx
- mov es, cx
- mov fs, cx
- mov gs, cx
- mov ss, cx
- ret
-AsmSetDataSelectors ENDP
-
-END
|