diff options
| author | David Wei <david.wei@intel.com> | 2015-01-12 09:37:20 +0000 |
|---|---|---|
| committer | zwei4 <zwei4@Edk2> | 2015-01-12 09:37:20 +0000 |
| commit | 3cbfba02fef9dae07a041fdbf2e89611d72d6f90 (patch) | |
| tree | 0b3bf0783124d38a191e09736492c0141aa36c15 /Vlv2TbltDevicePkg/MonoStatusCode | |
| parent | 6f785cfcc304c48ec04e542ee429df95e7b51bc5 (diff) | |
| download | edk2-platforms-3cbfba02fef9dae07a041fdbf2e89611d72d6f90.tar.xz | |
Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to
https://svn.code.sf.net/p/edk2/code/trunk/edk2/,
which are for MinnowBoard MAX open source project.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
Reviewed-by: Mike Wu <mike.wu@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'Vlv2TbltDevicePkg/MonoStatusCode')
| -rw-r--r-- | Vlv2TbltDevicePkg/MonoStatusCode/EfiStatusCode.h | 183 | ||||
| -rw-r--r-- | Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.c | 137 | ||||
| -rw-r--r-- | Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.h | 133 | ||||
| -rw-r--r-- | Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf | 78 | ||||
| -rw-r--r-- | Vlv2TbltDevicePkg/MonoStatusCode/PeiPostCode.c | 126 | ||||
| -rw-r--r-- | Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.c | 386 | ||||
| -rw-r--r-- | Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.h | 207 |
7 files changed, 1250 insertions, 0 deletions
diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/EfiStatusCode.h b/Vlv2TbltDevicePkg/MonoStatusCode/EfiStatusCode.h new file mode 100644 index 0000000000..a18fef233a --- /dev/null +++ b/Vlv2TbltDevicePkg/MonoStatusCode/EfiStatusCode.h @@ -0,0 +1,183 @@ +/*++
+
+ Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name:
+
+ EfiStatusCode.h
+
+Abstract:
+
+ Status Code Definitions, according to Intel Platform Innovation Framework
+ for EFI Status Codes Specification
+ Revision 0.92
+
+ The file is divided into sections for ease of use.
+
+ Section: Contents:
+ 1 General Status Code Definitions
+ 2 Class definitions
+ 3 Computing Unit Subclasses, Progress and Error Codes
+ 4 Peripheral Subclasses, Progress and Error Codes.
+ 5 IO Bus Subclasses, Progress and Error Codes.
+ 6 Software Subclasses, Progress and Error Codes.
+ 7 Debug Codes
+
+--*/
+
+#ifndef _EFI_STATUS_CODE_H_
+#define _EFI_STATUS_CODE_H_
+
+
+
+#define EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+
+
+#define EFI_SW_PEIM_PC_RECOVERY_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_PC_CAPSULE_LOAD (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEIM_PC_CAPSULE_START (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PEIM_PC_RECOVERY_USER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PEIM_PC_RECOVERY_AUTO (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+
+
+
+#define EFI_CU_MEMORY_PC_SPD_READ (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_PC_TIMING (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_PC_CONFIGURING (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_PC_OPTIMIZING (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_PC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_PC_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_MEMORY_PC_COMPLETE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_MEMORY_PC_INIT_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+
+
+#define EFI_DC_UNSPECIFIED 0x0
+
+//
+// CPU PEI
+//
+#define EFI_CU_HP_PC_PEI_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+#define EFI_CU_HP_PC_PEI_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000011)
+#define EFI_CU_HP_PC_PEI_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000012)
+#define EFI_CU_HP_PC_PEI_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000013)
+#define EFI_CU_HP_PC_PEI_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000014)
+#define EFI_CU_HP_PC_PEI_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000015)
+#define EFI_CU_HP_PC_PEI_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000016)
+#define EFI_CU_HP_PC_PEI_STEP7 (EFI_SUBCLASS_SPECIFIC | 0x00000017)
+#define EFI_CU_HP_PC_PEI_STEP8 (EFI_SUBCLASS_SPECIFIC | 0x00000018)
+#define EFI_CU_HP_PC_PEI_STEP9 (EFI_SUBCLASS_SPECIFIC | 0x00000019)
+#define EFI_CU_HP_PC_PEI_STEP10 (EFI_SUBCLASS_SPECIFIC | 0x0000001A)
+#define EFI_CU_HP_PC_PEI_STEP11 (EFI_SUBCLASS_SPECIFIC | 0x0000001B)
+#define EFI_CU_HP_PC_PEI_STEP12 (EFI_SUBCLASS_SPECIFIC | 0x0000001C)
+#define EFI_CU_HP_PC_PEI_STEP13 (EFI_SUBCLASS_SPECIFIC | 0x0000001D)
+#define EFI_CU_HP_PC_PEI_STEP14 (EFI_SUBCLASS_SPECIFIC | 0x0000001E)
+#define EFI_CU_HP_PC_PEI_END (EFI_SUBCLASS_SPECIFIC | 0x0000001F)
+
+//
+// CPU DXE
+//
+#define EFI_CU_HP_PC_DXE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000020)
+#define EFI_CU_HP_PC_DXE_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000021)
+#define EFI_CU_HP_PC_DXE_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000022)
+#define EFI_CU_HP_PC_DXE_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000023)
+#define EFI_CU_HP_PC_DXE_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000024)
+#define EFI_CU_HP_PC_DXE_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000025)
+#define EFI_CU_HP_PC_DXE_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000026)
+#define EFI_CU_HP_PC_DXE_STEP7 (EFI_SUBCLASS_SPECIFIC | 0x00000027)
+#define EFI_CU_HP_PC_DXE_STEP8 (EFI_SUBCLASS_SPECIFIC | 0x00000028)
+#define EFI_CU_HP_PC_DXE_STEP9 (EFI_SUBCLASS_SPECIFIC | 0x00000029)
+#define EFI_CU_HP_PC_DXE_STEP10 (EFI_SUBCLASS_SPECIFIC | 0x0000002A)
+#define EFI_CU_HP_PC_DXE_STEP11 (EFI_SUBCLASS_SPECIFIC | 0x0000002B)
+#define EFI_CU_HP_PC_DXE_STEP12 (EFI_SUBCLASS_SPECIFIC | 0x0000002C)
+#define EFI_CU_HP_PC_DXE_STEP13 (EFI_SUBCLASS_SPECIFIC | 0x0000002D)
+#define EFI_CU_HP_PC_DXE_STEP14 (EFI_SUBCLASS_SPECIFIC | 0x0000002E)
+#define EFI_CU_HP_PC_DXE_END (EFI_SUBCLASS_SPECIFIC | 0x0000002F)
+
+//
+// CPU SMM PEI
+//
+#define EFI_CU_HP_PC_SMM_PEI_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000030)
+#define EFI_CU_HP_PC_SMM_PEI_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000031)
+#define EFI_CU_HP_PC_SMM_PEI_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000032)
+#define EFI_CU_HP_PC_SMM_PEI_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000033)
+#define EFI_CU_HP_PC_SMM_PEI_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000034)
+#define EFI_CU_HP_PC_SMM_PEI_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000035)
+#define EFI_CU_HP_PC_SMM_PEI_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000036)
+#define EFI_CU_HP_PC_SMM_PEI_END (EFI_SUBCLASS_SPECIFIC | 0x0000003F)
+
+//
+// CPU SMM DXE
+//
+#define EFI_CU_HP_PC_SMM_DXE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000040)
+#define EFI_CU_HP_PC_SMM_DXE_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000041)
+#define EFI_CU_HP_PC_SMM_DXE_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000042)
+#define EFI_CU_HP_PC_SMM_DXE_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000043)
+#define EFI_CU_HP_PC_SMM_DXE_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000044)
+#define EFI_CU_HP_PC_SMM_DXE_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000045)
+#define EFI_CU_HP_PC_SMM_DXE_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000046)
+#define EFI_CU_HP_PC_SMM_DXE_END (EFI_SUBCLASS_SPECIFIC | 0x0000004F)
+
+//
+// PEI before memory initialization
+//
+#define EFI_CU_PLATFORM_PEI_INIT (EFI_OEM_SPECIFIC | 0x00000001)
+#define EFI_CU_PLATFORM_PEI_STEP1 (EFI_OEM_SPECIFIC | 0x00000002)
+#define EFI_CU_PLATFORM_PEI_STEP2 (EFI_OEM_SPECIFIC | 0x00000003)
+#define EFI_CU_PLATFORM_PEI_STEP3 (EFI_OEM_SPECIFIC | 0x00000004)
+#define EFI_CU_PLATFORM_PEI_STEP4 (EFI_OEM_SPECIFIC | 0x00000005)
+#define EFI_CU_SMBUS_PEI_INIT (EFI_OEM_SPECIFIC | 0x00000006)
+#define EFI_CU_SMBUS_PEI_EXEC_ENTRY (EFI_OEM_SPECIFIC | 0x00000007)
+#define EFI_CU_SMBUS_PEI_EXEC_EXIT (EFI_OEM_SPECIFIC | 0x00000008)
+#define EFI_CU_CLOCK_PEI_INIT_ENTRY (EFI_OEM_SPECIFIC | 0x00000009)
+#define EFI_CU_CLOCK_PEI_INIT_EXIT (EFI_OEM_SPECIFIC | 0x0000000A)
+#define EFI_CU_MEMORY_PC_PROG_MTRR (EFI_OEM_SPECIFIC | 0x0000000B)
+#define EFI_CU_MEMORY_PC_PROG_MTRR_END (EFI_OEM_SPECIFIC | 0x0000000C)
+#define EFI_CU_PLATFORM_PEI_STEP12 (EFI_OEM_SPECIFIC | 0x0000000D)
+#define EFI_CU_PLATFORM_PEI_STEP13 (EFI_OEM_SPECIFIC | 0x0000000E)
+#define EFI_CU_PLATFORM_PEI_END (EFI_OEM_SPECIFIC | 0x0000000F)
+
+#define EFI_CU_PLATFORM_DXE_INIT (EFI_OEM_SPECIFIC | 0x00000011)
+#define EFI_CU_PLATFORM_DXE_STEP1 (EFI_OEM_SPECIFIC | 0x00000012)
+#define EFI_CU_PLATFORM_DXE_STEP2 (EFI_OEM_SPECIFIC | 0x00000013)
+#define EFI_CU_PLATFORM_DXE_STEP3 (EFI_OEM_SPECIFIC | 0x00000014)
+#define EFI_CU_PLATFORM_DXE_STEP4 (EFI_OEM_SPECIFIC | 0x00000015)
+#define EFI_CU_PLATFORM_DXE_INIT_DONE (EFI_OEM_SPECIFIC | 0x00000016)
+
+#define EFI_CU_OVERCLOCK_PEI_INIT_ENTRY (EFI_OEM_SPECIFIC | 0x00000017)
+#define EFI_CU_OVERCLOCK_PEI_INIT_EXIT (EFI_OEM_SPECIFIC | 0x00000018)
+
+//
+// BDS
+//
+#define EFI_CU_BDS_INIT (EFI_OEM_SPECIFIC | 0x00000060)
+#define EFI_CU_BDS_STEP1 (EFI_OEM_SPECIFIC | 0x00000061)
+#define EFI_CU_BDS_STEP2 (EFI_OEM_SPECIFIC | 0x00000062)
+#define EFI_CU_BDS_STEP3 (EFI_OEM_SPECIFIC | 0x00000063)
+#define EFI_CU_BDS_STEP4 (EFI_OEM_SPECIFIC | 0x00000064)
+#define EFI_CU_BDS_STEP5 (EFI_OEM_SPECIFIC | 0x00000065)
+#define EFI_CU_BDS_STEP6 (EFI_OEM_SPECIFIC | 0x00000066)
+#define EFI_CU_BDS_STEP7 (EFI_OEM_SPECIFIC | 0x00000067)
+#define EFI_CU_BDS_STEP8 (EFI_OEM_SPECIFIC | 0x00000068)
+#define EFI_CU_BDS_STEP9 (EFI_OEM_SPECIFIC | 0x00000069)
+#define EFI_CU_BDS_STEP10 (EFI_OEM_SPECIFIC | 0x0000006A)
+#define EFI_CU_BDS_STEP11 (EFI_OEM_SPECIFIC | 0x0000006B)
+#define EFI_CU_BDS_STEP12 (EFI_OEM_SPECIFIC | 0x0000006C)
+#define EFI_CU_BDS_STEP13 (EFI_OEM_SPECIFIC | 0x0000006D)
+#define EFI_CU_BDS_STEP14 (EFI_OEM_SPECIFIC | 0x0000006E)
+#define EFI_CU_BDS_END (EFI_OEM_SPECIFIC | 0x0000006F)
+
+
+
+#endif
diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.c b/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.c new file mode 100644 index 0000000000..80a05b9bd1 --- /dev/null +++ b/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.c @@ -0,0 +1,137 @@ +/** @file
+
+ Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name:
+
+
+ MonoStatusCode.c
+
+Abstract:
+
+ PEIM to provide the status code functionality, to aid in system debug.
+ It includes output to 0x80 port and/or to serial port.
+ This PEIM is monolithic. Different platform should provide different library.
+
+--*/
+
+#include "MonoStatusCode.h"
+#include "PlatformStatusCode.h"
+#define CMOS_EFI_DEBUG 0x14
+
+//
+// Module globals
+//
+EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi = { PlatformReportStatusCode };
+
+EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiStatusCodePpiGuid,
+ &mStatusCodePpi
+};
+
+//
+// Function implemenations
+//
+
+/**
+ Translate from a DXE status code interface into a PEI-callable
+ interface, making the PEI the least common denominator..
+
+ Same as DXE ReportStatusCode RT service
+
+
+**/
+EFI_STATUS
+EFIAPI
+TranslateDxeStatusCodeToPeiStatusCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID * CallerId,
+ IN EFI_STATUS_CODE_DATA * Data OPTIONAL
+ )
+{
+ return PlatformReportStatusCode (NULL, CodeType, Value, Instance, CallerId, Data);
+}
+
+/**
+ Build a hob describing the status code listener that has been installed.
+ This will be used by DXE code until a runtime status code listener is
+ installed.
+
+ @param PeiServices General purpose services available to every PEIM.
+
+ @retval Status EFI_SUCCESS if the interface could be successfully
+ installed
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeDxeReportStatusCode (
+ IN const EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status = EFI_UNSUPPORTED;
+
+ VOID *Instance;
+
+ VOID *Result;
+
+ Instance = (VOID *) (UINTN) TranslateDxeStatusCodeToPeiStatusCode;
+
+ Result = BuildGuidDataHob (
+ &gEfiStatusCodeRuntimeProtocolGuid,
+ &Instance,
+ sizeof (VOID *)
+ );
+ if (Result != NULL) {
+ Status = EFI_SUCCESS;
+ }
+ return Status;
+}
+
+/**
+ Initialize the platform status codes and publish the platform status code
+ PPI.
+
+ @param FfsHeader FV this PEIM was loaded from.
+ @param PeiServices General purpose services available to every PEIM.
+
+ @retval Status EFI_SUCCESS
+
+**/
+VOID
+EFIAPI
+InitializeMonoStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Initialize status code listeners.
+ //
+ PlatformInitializeStatusCode (FfsHeader, PeiServices);
+
+ //
+ // Publish the status code capability to other modules
+ //
+ Status = (*PeiServices)->InstallPpi (PeiServices, &mPpiListStatusCode);
+
+ ASSERT_EFI_ERROR (Status);
+
+ DEBUG ((DEBUG_ERROR, "\nMono Status Code PEIM Loaded\n"));
+
+ return ;
+}
diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.h b/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.h new file mode 100644 index 0000000000..65fd3deda4 --- /dev/null +++ b/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.h @@ -0,0 +1,133 @@ +/*++
+
+ Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name:
+
+ MonoStatusCode.h
+
+Abstract:
+
+ Monolithic single PEIM to provide the status code functionality.
+ The PEIM is a blend of libraries that correspond to the different status code
+ listeners that a platform installs.
+
+--*/
+
+#ifndef _MONO_STATUS_CODE_H_
+#define _MONO_STATUS_CODE_H_
+
+//
+// Statements that include other files.
+//
+#include "PiPei.h"
+
+#include "Pi/PiBootMode.h"
+
+#include "Ppi/StatusCode.h"
+#include "Ppi/MemoryDiscovered.h"
+#include "Ppi/FvLoadFile.h"
+
+#include "Library/HobLib.h"
+#include "Library/DebugLib.h"
+#include "Library/IoLib.h"
+#include "Library/SerialPortLib.h"
+#include "Protocol/StatusCode.h"
+
+
+#ifndef _STATUS_CODE_ENABLER_H_
+#define _STATUS_CODE_ENABLER_H_
+
+#ifdef EFI_DEBUG
+
+#define EFI_STATUS_CODE_ENABLER_HOB_GUID \
+ { \
+ 0x5ffc6cf3, 0x71ad, 0x46f5, 0xbd, 0x8b, 0x7e, 0x8f, 0xfe, 0x19, 0x7, 0xd7 \
+ }
+
+extern EFI_GUID gEfiSerialStatusCodeEnablerHobGuid;
+
+typedef struct _EFI_STATUS_CODE_INFO {
+ BOOLEAN StatusCodeDisable;
+} EFI_STATUS_CODE_INFO;
+
+#endif
+#endif
+
+
+
+//
+// Platform specific function Declarations. These must be implemented in a
+// subdirectory named PlatformName in a file named PlatformStatusCode.c.
+//
+
+//
+// This is the platform function to initialize the listeners desired by the
+// platform.
+//
+VOID
+PlatformInitializeStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ );
+
+//
+// This is the platform function that calls all of the listeners desired by the
+// platform.
+//
+EFI_STATUS
+EFIAPI
+PlatformReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID * CallerId,
+ IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL
+ );
+
+//
+// Platform independent function Declarations
+//
+//
+// Initialize the status code listeners and publish the status code PPI.
+//
+VOID
+EFIAPI
+InitializeMonoStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN const EFI_PEI_SERVICES **PeiServices
+ );
+
+//
+// Convert a DXE status code call into a PEI status code call.
+//
+EFI_STATUS
+EFIAPI
+TranslateDxeStatusCodeToPeiStatusCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID * CallerId,
+ IN EFI_STATUS_CODE_DATA * Data OPTIONAL
+ );
+
+//
+// Publish a HOB that contains the listener to be used by DXE.
+//
+EFI_STATUS
+EFIAPI
+InitializeDxeReportStatusCode (
+ IN const EFI_PEI_SERVICES **PeiServices
+ );
+
+#endif
diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf b/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf new file mode 100644 index 0000000000..d16c04d83f --- /dev/null +++ b/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf @@ -0,0 +1,78 @@ +#
+#
+# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+# Module Name:
+#
+# MonoStatusCode.inf
+#
+# Abstract:
+#
+# Component description file for Status Code PEI module
+#
+#--*/
+
+[defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = MonoStatusCode
+ FILE_GUID = 4BB346D2-8076-4671-8BC9-7B95CBB9A6DF
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+# ENTRY_POINT = InstallMonoStatusCode
+ LIBRARY_CLASS = MonoStatusCodeLib
+
+[sources.common]
+ MonoStatusCode.c
+ MonoStatusCode.h
+ PlatformStatusCode.c
+ PlatformStatusCode.h
+ PeiPostCode.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec
+ Vlv2TbltDevicePkg/PlatformPkg.dec
+ Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+[LibraryClasses]
+ PeimEntryPoint
+ HobLib
+ DebugLib
+ SerialPortLib
+ ReportStatusCodeLib
+ PrintLib
+ BaseMemoryLib
+ PchPlatformLib
+
+[Ppis]
+ gEfiPeiMemoryDiscoveredPpiGuid
+ gEfiPeiStatusCodePpiGuid
+ gEfiPeiFvFileLoaderPpiGuid
+
+[Protocols]
+ gEfiStatusCodeRuntimeProtocolGuid
+
+[Pcd]
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam
+
+[Guids]
+ gEfiPlatformCpuInfoGuid
+ gEfiHtBistHobGuid
+ gEfiStatusCodeDataTypeStringGuid ## CONSUMES
+
+[Depex]
+ TRUE
+
+
+
diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/PeiPostCode.c b/Vlv2TbltDevicePkg/MonoStatusCode/PeiPostCode.c new file mode 100644 index 0000000000..b73026733b --- /dev/null +++ b/Vlv2TbltDevicePkg/MonoStatusCode/PeiPostCode.c @@ -0,0 +1,126 @@ +/** @file
+
+ Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name:
+
+
+ PeiPostCode.c
+
+Abstract:
+
+ Worker functions for PostCode
+
+--*/
+
+#include "EfiStatusCode.h"
+
+#pragma pack(1)
+typedef struct {
+ EFI_STATUS_CODE_VALUE StatusValue;
+ UINT8 Port80Value;
+} EFI_STATUS_CODE_TO_PORT_80;
+#pragma pack()
+
+//
+// see Edk\Foundation\Library\EfiCommonLib\PostCode.c for DXE/BDS POST codes.
+//
+EFI_STATUS_CODE_TO_PORT_80 mPeiPort80Table[] = {
+ //
+ // Platform init
+ //
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_INIT, 0x11},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP1, 0x12},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP2, 0x13},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP3, 0x14},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_PEI_STEP4, 0x15},
+
+ //
+ // SMBUS
+ //
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_SMBUS_PEI_INIT, 0x16},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_SMBUS_PEI_EXEC_ENTRY, 0x17},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_SMBUS_PEI_EXEC_EXIT, 0x18},
+
+ //
+ // Clock
+ //
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CLOCK_PEI_INIT_ENTRY, 0x19},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_CLOCK_PEI_INIT_EXIT, 0x1A},
+
+ //
+ // Over clocking support
+ //
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_OVERCLOCK_PEI_INIT_ENTRY, 0x1B},
+ {EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_OVERCLOCK_PEI_INIT_EXIT, 0x1C},
+
+ //
+ // MRC
+ //
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_INIT_BEGIN, 0x21},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_SPD_READ, 0x23},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PRESENCE_DETECT, 0x24},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TIMING, 0x25},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_OPTIMIZING, 0x26},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_CONFIGURING, 0x27},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TEST, 0x28},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_COMPLETE, 0x29},
+
+ //
+ // Platform Init after MRC
+ //
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PROG_MTRR, 0x2A},
+ {EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PROG_MTRR_END, 0x2B},
+
+ {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_RECOVERY_BEGIN, 0x31},
+ {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_RECOVERY_AUTO, 0x32},
+ {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_CAPSULE_LOAD, 0x33},
+ {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_PC_CAPSULE_START, 0x34},
+ {EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE, 0x35},
+
+ {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_PEI_INIT, 0x41},
+ {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_PEI_STEP1, 0x42},
+ {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_PEI_END, 0x43},
+ {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_PEI_INIT, 0x44},
+ {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_PEI_STEP1, 0x45},
+ {EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_PEI_END, 0x46}
+};
+
+BOOLEAN
+PeiCodeTypeToPostCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ OUT UINT8 *PostCode
+ )
+{
+ UINTN Index;
+
+ if (CodeType == EFI_PROGRESS_CODE) {
+ if ((Value == (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_BEGIN)) ||
+ (Value == (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_END)) ||
+ (Value == (EFI_SOFTWARE_DXE_CORE | EFI_SW_PC_INIT_BEGIN)) ||
+ (Value == (EFI_SOFTWARE_DXE_CORE | EFI_SW_PC_INIT_END))) {
+ return FALSE;
+ }
+ } else {
+ return FALSE;
+ }
+
+ for (Index = 0; Index < sizeof(mPeiPort80Table)/sizeof(EFI_STATUS_CODE_TO_PORT_80); Index++) {
+ if (mPeiPort80Table[Index].StatusValue == Value) {
+ *PostCode = mPeiPort80Table[Index].Port80Value;
+ return TRUE;
+ }
+ }
+
+ return FALSE;
+}
diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.c b/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.c new file mode 100644 index 0000000000..3927cda059 --- /dev/null +++ b/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.c @@ -0,0 +1,386 @@ +/** @file
+
+ Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name:
+
+
+ PlatformStatusCode.c
+
+Abstract:
+
+ Contains Platform specific implementations required to use status codes.
+
+--*/
+
+#include "PlatformStatusCode.h"
+#include <PchRegs.h>
+#include <PlatformBaseAddresses.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PcdLib.h>
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE Handle;
+} PEIM_FILE_HANDLE_EXTENDED_DATA;
+
+#define CONFIG_PORT0 0x4E
+#define PCI_IDX 0xCF8
+#define PCI_DAT 0xCFC
+
+#define PCI_LPC_BASE (0x8000F800)
+#define PCI_LPC_REG(x) (PCI_LPC_BASE + (x))
+
+//
+// Function implementations
+//
+BOOLEAN
+PeiCodeTypeToPostCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ OUT UINT8 *PostCode
+ );
+
+/**
+ Provide a port 80 status code
+
+ @param Same as ReportStatusCode PPI
+
+ @retval EFI_SUCCESS Always returns success.
+
+**/
+EFI_STATUS
+EFIAPI
+Port80ReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId,
+ IN CONST EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+
+{
+ EFI_STATUS Status;
+ EFI_FV_FILE_INFO FvFileInfo;
+ UINT16 Port80Code = 0;
+
+ //
+ // Progress or error code, Output Port 80h card.
+ //
+ if (!PeiCodeTypeToPostCode (CodeType, Value, (UINT8 *)&Port80Code)) {
+ if ((Data != NULL) && (Value ==(EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_BEGIN))){
+ Status = PeiServicesFfsGetFileInfo (
+ ((PEIM_FILE_HANDLE_EXTENDED_DATA *) (Data + 1))->Handle,
+ &FvFileInfo
+ );
+ if (!EFI_ERROR (Status)) {
+ Port80Code = (FvFileInfo.FileName.Data4[6]<<8) + (FvFileInfo.FileName.Data4[7]);
+ }
+ }
+ }
+ if (Port80Code != 0){
+ IoWrite16 (0x80, (UINT16) Port80Code);
+ DEBUG ((EFI_D_ERROR, "POSTCODE=<%04x>\n", Port80Code));
+ }
+ return EFI_SUCCESS;
+}
+
+/**
+ Provide a serial status code
+
+ @param Same as ReportStatusCode PPI
+
+ @retval EFI_SUCCESS Always returns success.
+
+**/
+EFI_STATUS
+EFIAPI
+SerialReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID * CallerId,
+ IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL
+ )
+{
+ CHAR8 *Filename;
+ CHAR8 *Description;
+ CHAR8 *Format;
+ CHAR8 Buffer[EFI_STATUS_CODE_DATA_MAX_SIZE];
+ UINT32 ErrorLevel;
+ UINT32 LineNumber;
+ UINTN CharCount;
+ BASE_LIST Marker;
+
+ Buffer[0] = '\0';
+
+ if (Data != NULL &&
+ ReportStatusCodeExtractAssertInfo (CodeType, Value, Data, &Filename, &Description, &LineNumber)) {
+ //
+ // Print ASSERT() information into output buffer.
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "\n\rPEI_ASSERT!: %a (%d): %a\n\r",
+ Filename,
+ LineNumber,
+ Description
+ );
+ } else if (Data != NULL &&
+ ReportStatusCodeExtractDebugInfo (Data, &ErrorLevel, &Marker, &Format)) {
+ //
+ // Print DEBUG() information into output buffer.
+ //
+ CharCount = AsciiBSPrint (
+ Buffer,
+ sizeof (Buffer),
+ Format,
+ Marker
+ );
+ } else if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) {
+ //
+ // Print ERROR information into output buffer.
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "ERROR: C%x:V%x I%x",
+ CodeType,
+ Value,
+ Instance
+ );
+
+ ASSERT(CharCount > 0);
+
+ if (CallerId != NULL) {
+ CharCount += AsciiSPrint (
+ &Buffer[CharCount],
+ (sizeof (Buffer) - (sizeof (Buffer[0]) * CharCount)),
+ " %g",
+ CallerId
+ );
+ }
+
+ if (Data != NULL) {
+ CharCount += AsciiSPrint (
+ &Buffer[CharCount],
+ (sizeof (Buffer) - (sizeof (Buffer[0]) * CharCount)),
+ " %x",
+ Data
+ );
+ }
+
+ CharCount += AsciiSPrint (
+ &Buffer[CharCount],
+ (sizeof (Buffer) - (sizeof (Buffer[0]) * CharCount)),
+ "\n\r"
+ );
+ } else if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) {
+ //
+ // Print PROGRESS information into output buffer.
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "PROGRESS CODE: V%x I%x\n\r",
+ Value,
+ Instance
+ );
+ } else if (Data != NULL &&
+ CompareGuid (&Data->Type, &gEfiStatusCodeDataTypeStringGuid) &&
+ ((EFI_STATUS_CODE_STRING_DATA *) Data)->StringType == EfiStringAscii) {
+ //
+ // EFI_STATUS_CODE_STRING_DATA
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "%a\n\r",
+ ((EFI_STATUS_CODE_STRING_DATA *) Data)->String.Ascii
+ );
+ } else {
+ //
+ // Code type is not defined.
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "Undefined: C%x:V%x I%x\n\r",
+ CodeType,
+ Value,
+ Instance
+ );
+ }
+
+ //
+ // Call SerialPort Lib function to do print.
+ //
+ SerialPortWrite ((UINT8 *) Buffer, CharCount);
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ Call all status code listeners in the MonoStatusCode.
+
+ @param PeiServices The PEI core services table.
+ @param CodeType Type of Status Code.
+ @param Value Value to output for Status Code.
+ @param Instance Instance Number of this status code.
+ @param CallerId ID of the caller of this status code.
+ @param Data Optional data associated with this status code.
+
+ @retval EFI_SUCCESS If status code is successfully reported.
+ @retval EFI_NOT_AVAILABLE_YET If StatusCodePpi has not been installed.
+
+**/
+EFI_STATUS
+EFIAPI
+PlatformReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID * CallerId,
+ IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL
+ )
+{
+ //
+ // If we are in debug mode, we will allow serial status codes
+ //
+ SerialReportStatusCode (PeiServices, CodeType, Value, Instance, CallerId, Data);
+
+ Port80ReportStatusCode (PeiServices, CodeType, Value, Instance, CallerId, Data);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Install the PEIM. Initialize listeners, publish the PPI and HOB for PEI and
+ DXE use respectively.
+
+ @param FfsHeader FV this PEIM was loaded from.
+ @param PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_SUCCESS The function always returns success.
+
+**/
+EFI_STATUS
+EFIAPI
+InstallMonoStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+
+ //
+ // Initialize all listeners
+ //
+ InitializeMonoStatusCode (FfsHeader, PeiServices);
+
+ //
+ // Publish the listener in a HOB for DXE use.
+ //
+ InitializeDxeReportStatusCode (PeiServices);
+
+ return EFI_SUCCESS;
+}
+
+#define V_PCH_ILB_IRQE_UARTIRQEN_IRQ3 BIT3 // UART IRQ3 Enable
+#define V_PCH_ILB_IRQE_UARTIRQEN_IRQ4 BIT4 // UART IRQ4 Enable
+#define PCIEX_BASE_ADDRESS 0xE0000000
+#define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
+#define SB_RCBA 0xfed1c000
+
+extern PCH_STEPPING EFIAPI PchStepping (VOID);
+
+VOID
+RamDebugInit (
+ VOID
+ );
+
+/**
+ Enable legacy decoding on ICH6
+
+ @param none
+
+ @retval EFI_SUCCESS Always returns success.
+
+**/
+EFI_STATUS
+EnableInternalUart(
+ VOID
+ )
+{
+
+ //
+ // Program and enable PMC Base.
+ //
+ IoWrite32 (PCI_IDX, PCI_LPC_REG(R_PCH_LPC_PMC_BASE));
+ IoWrite32 (PCI_DAT, (PMC_BASE_ADDRESS | B_PCH_LPC_PMC_BASE_EN));
+
+ //
+ // Enable COM1 for debug message output.
+ //
+ MmioAndThenOr32 (PMC_BASE_ADDRESS + R_PCH_PMC_GEN_PMCON_1, (UINT32) (~(B_PCH_PMC_GEN_PMCON_SUS_PWR_FLR + B_PCH_PMC_GEN_PMCON_PWROK_FLR)), BIT24);
+
+ //
+ // Silicon Steppings
+ //
+ if (PchStepping()>= PchB0)
+ MmioOr8 (ILB_BASE_ADDRESS + R_PCH_ILB_IRQE, (UINT8) V_PCH_ILB_IRQE_UARTIRQEN_IRQ4);
+ else
+ MmioOr8 (ILB_BASE_ADDRESS + R_PCH_ILB_IRQE, (UINT8) V_PCH_ILB_IRQE_UARTIRQEN_IRQ3);
+ MmioAnd32(IO_BASE_ADDRESS + 0x0520, (UINT32)~(0x00000187));
+ MmioOr32 (IO_BASE_ADDRESS + 0x0520, (UINT32)0x81); // UART3_RXD-L
+ MmioAnd32(IO_BASE_ADDRESS + 0x0530, (UINT32)~(0x00000007));
+ MmioOr32 (IO_BASE_ADDRESS + 0x0530, (UINT32)0x1); // UART3_RXD-L
+ MmioOr8 (PciD31F0RegBase + R_PCH_LPC_UART_CTRL, (UINT8) B_PCH_LPC_UART_CTRL_COM1_EN);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ INIT the SIO. Ported this code and I don't undertand the comments either.
+
+ @param FfsHeader FV this PEIM was loaded from.
+ @param PeiServices General purpose services available to every PEIM.
+
+ None
+
+**/
+VOID
+EFIAPI
+PlatformInitializeStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+
+ //
+ // Enable internal COM1 on South Cluster.
+ //
+ EnableInternalUart();
+
+
+ //
+ // Initialize additional debug status code listeners.
+ //
+ SerialPortInitialize();
+
+}
+//#endif //EFI_DEBUG
+
diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.h b/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.h new file mode 100644 index 0000000000..51e13e03de --- /dev/null +++ b/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.h @@ -0,0 +1,207 @@ +/*++
+
+ Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name:
+
+ PlatformStatusCode.h
+
+Abstract:
+
+ Contains Platform specific implementations required to use status codes.
+
+--*/
+
+#ifndef _PLATFORM_STATUS_CODE_H_
+#define _PLATFORM_STATUS_CODE_H_
+
+
+#define CONFIG_PORT0 0x4E
+#define INDEX_PORT0 0x4E
+#define DATA_PORT0 0x4F
+#define PCI_IDX 0xCF8
+#define PCI_DAT 0xCFC
+
+#include "MonoStatusCode.h"
+
+/*++
+
+Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ Port80StatusCodeLib.h
+
+Abstract:
+
+ Lib to provide status code reporting via port 80.
+
+--*/
+
+#ifndef _PEI_PORT_80_STATUS_CODE_H_
+#define _PEI_PORT_80_STATUS_CODE_H_
+
+
+
+//
+// Status code reporting function
+//
+EFI_STATUS
+Port80ReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID * CallerId,
+ IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL
+ );
+
+#endif
+
+/*++
+
+Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+This software and associated documentation (if any) is furnished
+under a license and may only be used or copied in accordance
+with the terms of the license. Except as permitted by such
+license, no part of this software or documentation may be
+reproduced, stored in a retrieval system, or transmitted in any
+form or by any means without the express written consent of
+Intel Corporation.
+
+
+Module Name:
+
+ SerialStatusCodeLib.h
+
+Abstract:
+
+ Lib to provide Serial I/O status code reporting.
+
+--*/
+
+#ifndef _PEI_SERIAL_STATUS_CODE_LIB_H_
+#define _PEI_SERIAL_STATUS_CODE_LIB_H_
+
+
+#include <Guid/StatusCodeDataTypeId.h>
+#include <Guid/StatusCodeDataTypeDebug.h>
+#include <Library/ReportStatusCodeLib.h>
+#include <Library/PrintLib.h>
+#include <Library/BaseMemoryLib.h>
+
+//
+// Initialization function
+//
+VOID
+SerialInitializeStatusCode (
+ VOID
+ );
+
+//
+// Status code reporting function
+//
+EFI_STATUS
+SerialReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID * CallerId,
+ IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL
+ );
+
+#endif
+
+extern EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi;
+extern EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode;
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#define STATUSCODE_PEIM_SIGNATURE EFI_SIGNATURE_32 ('p', 's', 't', 'c')
+
+typedef struct {
+ UINT32 Signature;
+ EFI_FFS_FILE_HEADER *FfsHeader;
+ EFI_PEI_NOTIFY_DESCRIPTOR StatusCodeNotify;
+} STATUSCODE_CALLBACK_STATE_INFORMATION;
+
+#pragma pack(1)
+typedef struct {
+ UINT16 Limit;
+ UINT32 Base;
+} GDT_DSCRIPTOR;
+#pragma pack()
+
+#define STATUSCODE_PEIM_FROM_THIS(a) \
+ BASE_CR ( \
+ a, \
+ STATUSCODE_CALLBACK_STATE_INFORMATION, \
+ StatusCodeNotify \
+ )
+
+VOID
+EFIAPI
+PlatformInitializeStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ );
+
+
+//
+// Function declarations
+//
+/**
+ Install Firmware Volume Hob's once there is main memory
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param NotifyDescriptor Not Used
+ @param Ppi Not Used
+
+ @retval Status EFI_SUCCESS if the interface could be successfully
+ installed
+
+**/
+EFI_STATUS
+EFIAPI
+MemoryDiscoveredPpiNotifyCallback (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ );
+
+#endif
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