Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to

https://svn.code.sf.net/p/edk2/code/trunk/edk2/, 

which are for MinnowBoard MAX open source project.


Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Wei <david.wei@intel.com>
Reviewed-by: Mike Wu <mike.wu@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524

4 files changed, 579 insertions, 0 deletions

diff --git a/Vlv2TbltDevicePkg/PciPlatform/BoardPciPlatform.c b/Vlv2TbltDevicePkg/PciPlatform/BoardPciPlatform.c
new file mode 100644
index 0000000000..1f2617803e
--- /dev/null
+++ b/Vlv2TbltDevicePkg/PciPlatform/BoardPciPlatform.c
@@ -0,0 +1,60 @@
+/** @file

+

+  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>

+                                                                                   


+  This program and the accompanying materials are licensed and made available under


+  the terms and conditions of the BSD License that accompanies this distribution.  


+  The full text of the license may be found at                                     


+  http://opensource.org/licenses/bsd-license.php.                                  


+                                                                                   


+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            


+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    


+                                                                                   


+

+Module Name:

+

+

+    BoardPciPlatform.c

+

+Abstract:

+

+Revision History:

+--*/

+

+

+#include "PciPlatform.h"

+#include "PchRegs.h"

+#include "VlvAccess.h"

+

+#define R_INTEL_LAN_VENDOR_ID           0x00

+#define   V_INTEL_LAN_VENDOR_ID         0x8086     // INTEL 82574 Gbe Controller Vendor ID

+#define R_INTEL_LAN_DEVICE_ID           0x02

+#define   V_INTEL_LAN_DEVICE_ID         0x153E     // INTEL 82574 Gbe Controller Device ID

+

+//

+// Global variables for Option ROMs

+//

+

+#define ONBOARD_VIDEO_OPTION_ROM_FILE_GUID \

+{ 0xF2FE1FAA, 0xF04A, 0x4ba1, 0xAE, 0x73, 0xD1, 0x84, 0x6A, 0x6C, 0xD6, 0xD8 }

+

+#define PXE_UNDI_OPTION_ROM_INTELPXE_GUID \

+{0x49F2C48B, 0x4D8E, 0x4238, 0x8D, 0x82, 0x9B, 0x27, 0xF4, 0x38, 0x44, 0xB0}

+

+#define SATA_AHCI_ROM_GUID \

+  {0x592bfc62, 0xd817, 0x4d1a, 0x86, 0xf8, 0x33, 0x33, 0x4c, 0x9e, 0x90, 0xd8}

+

+#define NULL_ROM_FILE_GUID \

+{ 0x00000000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }

+

+PCI_OPTION_ROM_TABLE mPciOptionRomTable[] = {

+  { ONBOARD_VIDEO_OPTION_ROM_FILE_GUID,     0, 0, 0x02, 0, IGD_VID, IGD_DID_VLV_A0, 0},

+  { ONBOARD_VIDEO_OPTION_ROM_FILE_GUID,     0, 0, 0x02, 0, IGD_VID, IGD_DID, 0},  // Desktop/Mobile IGD

+  { ONBOARD_VIDEO_OPTION_ROM_FILE_GUID,     0, 0, 0x02, 0, IGD_VID, IGD_DID_II, 0},  // Desktop/Mobile IGD

+  { ONBOARD_VIDEO_OPTION_ROM_FILE_GUID,     0, 0, 0x02, 0, IGD_VID, IGD_DID_QS, 0},

+  { NULL_ROM_FILE_GUID,                     0, 0, 0, 0, 0xffff, 0xffff, 0}

+};

+

+UINTN mSizeOptionRomTable =  sizeof(mPciOptionRomTable)/sizeof(PCI_OPTION_ROM_TABLE);

+

+

diff --git a/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c b/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c
new file mode 100644
index 0000000000..1b59eee74f
--- /dev/null
+++ b/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.c
@@ -0,0 +1,361 @@
+/** @file

+

+  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>

+                                                                                   


+  This program and the accompanying materials are licensed and made available under


+  the terms and conditions of the BSD License that accompanies this distribution.  


+  The full text of the license may be found at                                     


+  http://opensource.org/licenses/bsd-license.php.                                  


+                                                                                   


+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            


+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    


+                                                                                   


+

+Module Name:

+

+

+    PciPlatform.c

+

+Abstract:

+--*/

+

+

+#include "PciPlatform.h"

+#include "PchRegs.h"

+#include "PchAccess.h"

+#include "VlvCommonDefinitions.h"

+#include "PlatformBootMode.h"

+

+#include <Library/BaseLib.h>

+#include <Library/BaseMemoryLib.h>

+#include <Protocol/CpuIo.h>

+#include <Protocol/PciIo.h>

+#include <Guid/SetupVariable.h>

+#include <Protocol/PciRootBridgeIo.h>

+#include "SetupMode.h"

+#include <Library/UefiBootServicesTableLib.h>

+#include <Library/UefiRuntimeServicesTableLib.h>

+#include <Library/DebugLib.h>

+#include <Protocol/FirmwareVolume.h>

+#include <Library/HobLib.h>

+#include <IndustryStandard/Pci22.h>

+

+extern  PCI_OPTION_ROM_TABLE  mPciOptionRomTable[];

+extern  UINTN                 mSizeOptionRomTable;

+

+EFI_PCI_PLATFORM_PROTOCOL mPciPlatform = {

+  PhaseNotify,

+  PlatformPrepController,

+  GetPlatformPolicy,

+  GetPciRom

+};

+

+EFI_HANDLE mPciPlatformHandle = NULL;

+

+

+SYSTEM_CONFIGURATION          mSystemConfiguration;

+

+EFI_STATUS

+GetRawImage (

+  IN EFI_GUID   *NameGuid,

+  IN OUT VOID   **Buffer,

+  IN OUT UINTN  *Size

+  )

+{

+  EFI_STATUS                    Status;

+  EFI_HANDLE                    *HandleBuffer;

+  UINTN                         HandleCount;

+  UINTN                         Index;

+  EFI_FIRMWARE_VOLUME_PROTOCOL  *Fv;

+  UINT32                        AuthenticationStatus;

+

+  Status = gBS->LocateHandleBuffer (

+                  ByProtocol,

+                  &gEfiFirmwareVolumeProtocolGuid,

+                  NULL,

+                  &HandleCount,

+                  &HandleBuffer

+                  );

+  if (EFI_ERROR (Status) || HandleCount == 0) {

+    return EFI_NOT_FOUND;

+  }

+

+  //

+  // Find desired image in all Fvs

+  //

+  for (Index = 0; Index < HandleCount; Index++) {

+    Status = gBS->HandleProtocol(

+                    HandleBuffer[Index],

+                    &gEfiFirmwareVolumeProtocolGuid,

+                    (VOID **) &Fv

+                    );

+

+    if ( EFI_ERROR ( Status ) ) {

+      return EFI_LOAD_ERROR;

+    }

+

+    //

+    // Try a raw file

+    //

+    *Buffer = NULL;

+    *Size = 0;

+    Status = Fv->ReadSection (

+                   Fv,

+                   NameGuid,

+                   EFI_SECTION_RAW,

+                   0,

+                   Buffer,

+                   Size,

+                   &AuthenticationStatus

+                   );

+

+    if ( !EFI_ERROR ( Status )) {

+        break;

+    }

+  }

+

+  if ( Index >= HandleCount ) {

+    return EFI_NOT_FOUND;

+  }

+

+  return EFI_SUCCESS;

+}

+

+EFI_STATUS

+EFIAPI    

+PhaseNotify (

+  IN EFI_PCI_PLATFORM_PROTOCOL              *This,

+  IN  EFI_HANDLE                                     HostBridge,

+  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE  Phase,

+  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase

+  )

+{

+  return EFI_UNSUPPORTED;

+}

+

+

+EFI_STATUS

+EFIAPI

+PlatformPrepController (

+  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,

+  IN  EFI_HANDLE                                     HostBridge,

+  IN  EFI_HANDLE                                     RootBridge,

+  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS    PciAddress,

+  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE   Phase,

+  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE                ChipsetPhase

+  )

+{

+  return EFI_UNSUPPORTED;

+}

+

+EFI_STATUS

+EFIAPI

+GetPlatformPolicy (

+  IN CONST EFI_PCI_PLATFORM_PROTOCOL        *This,

+  OUT EFI_PCI_PLATFORM_POLICY               *PciPolicy

+  )

+{

+  *PciPolicy = EFI_RESERVE_VGA_IO_ALIAS;

+  return EFI_SUCCESS;

+}

+

+/**

+  GetPciRom from platform specific location for specific PCI device

+

+  @param This        Protocol instance

+  @param PciHandle   Identify the specific PCI devic

+  @param RomImage    Returns the ROM Image memory location

+  @param RomSize     Returns Rom Image size

+

+  @retval EFI_SUCCESS

+  @retval EFI_NOT_FOUND

+  @retval  EFI_OUT_OF_RESOURCES

+

+**/

+EFI_STATUS

+EFIAPI    

+GetPciRom (

+  IN CONST EFI_PCI_PLATFORM_PROTOCOL     *This,

+  IN EFI_HANDLE                           PciHandle,

+  OUT  VOID                               **RomImage,

+  OUT  UINTN                              *RomSize

+  )

+{

+  EFI_STATUS                    Status;

+  EFI_PCI_IO_PROTOCOL           *PciIo;

+  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;

+  UINTN                         Segment;

+  UINTN                         Bus;

+  UINTN                         Device;

+  UINTN                         Function;

+  UINT16                        VendorId;

+  UINT16                        DeviceId;

+  UINT16                        DeviceClass;

+  UINTN                         TableIndex;

+  UINT8                         Data8;

+  BOOLEAN                       MfgMode;

+  EFI_PLATFORM_SETUP_ID         *BootModeBuffer;

+

+  EFI_PEI_HOB_POINTERS        GuidHob;

+

+  MfgMode = FALSE;

+

+//

+// Check if system is in manufacturing mode.

+//

+  GuidHob.Raw = GetHobList ();

+  if (GuidHob.Raw == NULL) {

+    return EFI_NOT_FOUND;

+  }

+

+  if ((GuidHob.Raw = GetNextGuidHob (&gEfiPlatformBootModeGuid, GuidHob.Raw)) != NULL) {

+    BootModeBuffer = GET_GUID_HOB_DATA (GuidHob.Guid);

+    if (!CompareMem (&BootModeBuffer->SetupName, MANUFACTURE_SETUP_NAME,

+        StrSize (MANUFACTURE_SETUP_NAME)))

+      {

+      	//

+        // System is in manufacturing mode.

+        //

+        MfgMode = TRUE;

+      }

+   }

+

+  Status = gBS->HandleProtocol (

+                  PciHandle,

+                  &gEfiPciIoProtocolGuid,

+                  (void **)&PciIo

+                  );

+  if (EFI_ERROR (Status)) {

+    return EFI_NOT_FOUND;

+  }

+

+  Status = gBS->LocateProtocol (

+                  &gEfiPciRootBridgeIoProtocolGuid,

+                  NULL,

+                  (void **)&PciRootBridgeIo

+                  );

+

+  if (EFI_ERROR (Status)) {

+    return EFI_NOT_FOUND;

+  }

+

+  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0x0A, 1, &DeviceClass);

+

+  PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);

+

+  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 0, 1, &VendorId);

+

+  PciIo->Pci.Read (PciIo, EfiPciIoWidthUint16, 2, 1, &DeviceId);

+

+  //

+  // WA for PCIe SATA card (SYBA SY-PEX400-40)

+  //

+  if ((VendorId == 0x1B21) && (DeviceId == 0x0612)) {

+    Data8 = 0x07;

+    PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 4, 1, &Data8);

+  }

+

+    //

+    // Do not run RAID or AHCI Option ROM if IDE

+    //

+    if ( (DeviceClass == ((PCI_CLASS_MASS_STORAGE << 8 ) | PCI_CLASS_MASS_STORAGE_IDE)) ) {

+      return EFI_NOT_FOUND;

+    }

+

+    //

+    // Run PXE ROM only if Boot network is enabled and not in MFG mode

+    //

+    if (DeviceClass == ((PCI_CLASS_NETWORK << 8 ) | PCI_CLASS_NETWORK_ETHERNET)) {

+      if (((mSystemConfiguration.BootNetwork == 0) && (MfgMode == FALSE )) || (mSystemConfiguration.FastBoot == 1)) {

+      return EFI_NOT_FOUND;

+      }

+    }

+

+    //

+    // Loop through table of Onboard option rom descriptions

+    //

+    for (TableIndex = 0; mPciOptionRomTable[TableIndex].VendorId != 0xffff; TableIndex++) {

+

+      //

+      // See if the PCI device specified by PciHandle matches at device in mPciOptionRomTable

+      //

+      if (VendorId != mPciOptionRomTable[TableIndex].VendorId ||

+          DeviceId != mPciOptionRomTable[TableIndex].DeviceId ||

+          ((DeviceClass == ((PCI_CLASS_NETWORK << 8 ) | PCI_CLASS_NETWORK_ETHERNET)) &&

+           (mPciOptionRomTable[TableIndex].Flag != mSystemConfiguration.BootNetwork))  ) {

+        continue;

+      }

+

+      Status = GetRawImage(

+                 &mPciOptionRomTable[TableIndex].FileName,

+                 RomImage,

+                 RomSize

+                 );

+

+      if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_VLV_A0)) {

+        *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_VLV_A0;

+      }

+

+      if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_II)) {

+        *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_II;

+      }

+

+      if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_0BE4)) {

+        *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_0BE4;

+      }

+

+      if ((VendorId == IGD_VID) && (DeviceId == IGD_DID_QS)) {

+        *(UINT16 *)(((UINTN) *RomImage) + OPROM_DID_OFFSET) = IGD_DID_QS;

+      }

+

+

+        if (EFI_ERROR (Status)) {

+          continue;

+        }

+        return EFI_SUCCESS;

+      }

+

+  return EFI_NOT_FOUND;

+}

+

+/**

+

+  @param  (Standard EFI Image entry - EFI_IMAGE_ENTRY_POINT)

+

+  @retval EFI_STATUS

+

+**/

+EFI_STATUS

+EFIAPI

+PciPlatformDriverEntry (

+  IN EFI_HANDLE        ImageHandle,

+  IN EFI_SYSTEM_TABLE  *SystemTable

+  )

+{

+  EFI_STATUS  Status;

+  UINTN       VarSize;

+

+  VarSize = sizeof(SYSTEM_CONFIGURATION);

+  Status = gRT->GetVariable(

+                  L"Setup",

+                  &gEfiNormalSetupGuid,

+                  NULL,

+                  &VarSize,

+                  &mSystemConfiguration

+                  );

+  ASSERT_EFI_ERROR(Status);

+

+  //

+  // Install on a new handle

+  //

+  Status = gBS->InstallProtocolInterface (

+                  &mPciPlatformHandle,

+                  &gEfiPciPlatformProtocolGuid,

+                  EFI_NATIVE_INTERFACE,

+                  &mPciPlatform

+                  );

+

+  return Status;

+}

+

+

diff --git a/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.h b/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.h
new file mode 100644
index 0000000000..75076449a3
--- /dev/null
+++ b/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.h
@@ -0,0 +1,88 @@
+/*++

+

+  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>

+                                                                                   


+  This program and the accompanying materials are licensed and made available under


+  the terms and conditions of the BSD License that accompanies this distribution.  


+  The full text of the license may be found at                                     


+  http://opensource.org/licenses/bsd-license.php.                                  


+                                                                                   


+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            


+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    


+                                                                                   


+

+Module Name:

+

+    PciPlatform.h

+

+Abstract:

+

+--*/

+#ifndef PCI_PLATFORM_H_

+#define PCI_PLATFORM_H_

+

+

+#include <PiDxe.h>

+#include "Platform.h"

+

+//

+// Produced Protocols

+//

+#include <Protocol/PciPlatform.h>

+

+#define IGD_DID_II                     0x0BE1

+#define IGD_DID_0BE4                   0x0BE4

+#define IGD_DID_VLV_A0                 0x0F31

+#define OPROM_DID_OFFSET               0x46

+

+typedef struct {

+  EFI_GUID  FileName;

+  UINTN     Segment;

+  UINTN     Bus;

+  UINTN     Device;

+  UINTN     Function;

+  UINT16    VendorId;

+  UINT16    DeviceId;

+  UINT8     Flag;

+} PCI_OPTION_ROM_TABLE;

+

+EFI_STATUS

+EFIAPI

+PhaseNotify (

+  IN  EFI_PCI_PLATFORM_PROTOCOL                     *This,

+  IN  EFI_HANDLE                                    HostBridge,

+  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,

+  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE               ChipsetPhase

+  );

+

+

+EFI_STATUS

+EFIAPI

+PlatformPrepController (

+  IN EFI_PCI_PLATFORM_PROTOCOL                      *This,

+  IN   EFI_HANDLE                                   HostBridge,

+  IN  EFI_HANDLE                                    RootBridge,

+  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS   PciAddress,

+  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE  Phase,

+  IN  EFI_PCI_CHIPSET_EXECUTION_PHASE               ChipsetPhase

+  );

+

+EFI_STATUS

+EFIAPI    

+GetPlatformPolicy (

+  IN CONST EFI_PCI_PLATFORM_PROTOCOL                      *This,

+  OUT EFI_PCI_PLATFORM_POLICY                       *PciPolicy

+  );

+

+EFI_STATUS

+EFIAPI

+GetPciRom (

+  IN CONST EFI_PCI_PLATFORM_PROTOCOL                      *This,

+  IN EFI_HANDLE                                     PciHandle,

+  OUT  VOID                                         **RomImage,

+  OUT  UINTN                                        *RomSize

+  );

+

+#endif

+

+

diff --git a/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf b/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
new file mode 100644
index 0000000000..a296c24b75
--- /dev/null
+++ b/Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
@@ -0,0 +1,70 @@
+#/*++

+#

+# Copyright (c)  2003  - 2014, Intel Corporation. All rights reserved

+#                                                                                  


+# This program and the accompanying materials are licensed and made available under


+# the terms and conditions of the BSD License that accompanies this distribution.  


+# The full text of the license may be found at                                     


+# http://opensource.org/licenses/bsd-license.php.                                  


+#                                                                                  


+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            


+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    


+#                                                                                  


+

+#

+#  Module Name:

+#

+#    PciPlatform.inf

+#

+#  Abstract:

+#

+#    Component description file for PciPlatform module.

+#

+--*/

+

+[defines]

+  INF_VERSION          = 0x00010005

+  BASE_NAME            = PciPlatform

+  FILE_GUID            = E2441B64-7EF4-41fe-B3A3-8CAA7F8D3017

+  MODULE_TYPE          = DXE_DRIVER

+  VERSION_STRING       = 1.0

+  ENTRY_POINT          = PciPlatformDriverEntry

+

+[sources.common]

+  BoardPciPlatform.c

+  PciPlatform.c

+  PciPlatform.h

+

+[Guids]

+  gEfiNormalSetupGuid

+  gEfiPlatformBootModeGuid

+

+[Protocols]

+  gEfiPciPlatformProtocolGuid

+  gEfiCpuIoProtocolGuid

+  gEfiFirmwareVolumeProtocolGuid

+  gEfiPciRootBridgeIoProtocolGuid

+  gEfiPciIoProtocolGuid

+

+[Packages]

+  MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

+  Vlv2TbltDevicePkg/PlatformPkg.dec

+  Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec

+  IntelFrameworkPkg/IntelFrameworkPkg.dec

+

+[LibraryClasses]

+  HobLib

+  UefiDriverEntryPoint

+  BaseLib

+  BaseMemoryLib

+  UefiDriverEntryPoint

+  UefiBootServicesTableLib

+  UefiRuntimeServicesTableLib

+  DxeServicesTableLib

+

+[BuildOptions]

+

+[Depex]

+  gEfiVariableArchProtocolGuid AND

+  gEfiVariableWriteArchProtocolGuid