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-rw-r--r--Vlv2TbltDevicePkg/BiosIdD.env4
-rw-r--r--Vlv2TbltDevicePkg/BiosIdR.env4
-rw-r--r--Vlv2TbltDevicePkg/BiosIdx64D.env4
-rw-r--r--Vlv2TbltDevicePkg/BiosIdx64R.env4
-rw-r--r--Vlv2TbltDevicePkg/PlatformPkg.fdf36
-rw-r--r--Vlv2TbltDevicePkg/PlatformPkgGcc.fdf24
-rw-r--r--Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc4
-rw-r--r--Vlv2TbltDevicePkg/PlatformPkgIA32.dsc10
-rw-r--r--Vlv2TbltDevicePkg/PlatformPkgX64.dsc10
9 files changed, 47 insertions, 53 deletions
diff --git a/Vlv2TbltDevicePkg/BiosIdD.env b/Vlv2TbltDevicePkg/BiosIdD.env
index 693ff43921..bc6656c2bc 100644
--- a/Vlv2TbltDevicePkg/BiosIdD.env
+++ b/Vlv2TbltDevicePkg/BiosIdD.env
@@ -26,5 +26,5 @@ OEM_ID = I32
BUILD_TYPE = D
BOARD_ID = BLAKCRB
-VERSION_MAJOR = 0078
-VERSION_MINOR = 02
+VERSION_MAJOR = 0079
+VERSION_MINOR = 01
diff --git a/Vlv2TbltDevicePkg/BiosIdR.env b/Vlv2TbltDevicePkg/BiosIdR.env
index d8d8d8cf7a..0709ac7862 100644
--- a/Vlv2TbltDevicePkg/BiosIdR.env
+++ b/Vlv2TbltDevicePkg/BiosIdR.env
@@ -26,5 +26,5 @@ OEM_ID = I32
BUILD_TYPE = R
BOARD_ID = BLAKCRB
-VERSION_MAJOR = 0078
-VERSION_MINOR = 02
+VERSION_MAJOR = 0079
+VERSION_MINOR = 01
diff --git a/Vlv2TbltDevicePkg/BiosIdx64D.env b/Vlv2TbltDevicePkg/BiosIdx64D.env
index 368ed72f0e..5ed4b87456 100644
--- a/Vlv2TbltDevicePkg/BiosIdx64D.env
+++ b/Vlv2TbltDevicePkg/BiosIdx64D.env
@@ -25,6 +25,6 @@ BOARD_REV = 1
OEM_ID = X64
BUILD_TYPE = D
-VERSION_MAJOR = 0078
-VERSION_MINOR = 02
+VERSION_MAJOR = 0079
+VERSION_MINOR = 01
BOARD_ID = BBAYCRB
diff --git a/Vlv2TbltDevicePkg/BiosIdx64R.env b/Vlv2TbltDevicePkg/BiosIdx64R.env
index 0dc4f38d1e..21af131b0d 100644
--- a/Vlv2TbltDevicePkg/BiosIdx64R.env
+++ b/Vlv2TbltDevicePkg/BiosIdx64R.env
@@ -25,6 +25,6 @@ BOARD_REV = 1
OEM_ID = X64
BUILD_TYPE = R
-VERSION_MAJOR = 0078
-VERSION_MINOR = 02
+VERSION_MAJOR = 0079
+VERSION_MINOR = 01
BOARD_ID = BBAYCRB
diff --git a/Vlv2TbltDevicePkg/PlatformPkg.fdf b/Vlv2TbltDevicePkg/PlatformPkg.fdf
index 8077275869..ff0da1e834 100644
--- a/Vlv2TbltDevicePkg/PlatformPkg.fdf
+++ b/Vlv2TbltDevicePkg/PlatformPkg.fdf
@@ -34,49 +34,38 @@ DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00040000
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
!if $(MINNOW2_FSP_BUILD) == TRUE
-DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
+DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x00080000
DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
-DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
+DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFD80000
-DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
+DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000C8000
DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
-DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
+DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDC8000
!endif
-DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00100000
+DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x000D0000
DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
-DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFE00000
+DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFDD0000
!if $(TARGET) == RELEASE
-DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00170000
-DEFINE FLASH_REGION_FVMAIN_SIZE = 0x0012d000
+DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
+DEFINE FLASH_REGION_FVMAIN_SIZE = 0x001AF000
!else
-!if $(SOURCE_DEBUG_ENABLE) == TRUE
-DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00130000
-DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00176000
-!else
-DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00140000
-DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00166000
-!endif
+DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
+DEFINE FLASH_REGION_FVMAIN_SIZE = 0x001A6000
!endif
!if $(TARGET) == RELEASE
-DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x0029d000
+DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x002AF000
DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00021000
DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002D0000
DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00030000
!else
-!if $(SOURCE_DEBUG_ENABLE) == TRUE
DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x002A6000
DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002D000
-!else
-DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x002A6000
-DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002D000
-!endif
-
DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002D3000
DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0002D000
@@ -677,7 +666,8 @@ FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
# UEFI Shell
#
FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
- SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
+# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
+ SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
}
diff --git a/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf b/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
index 3dbcd8c9f8..875bfb7ba9 100644
--- a/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
+++ b/Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
@@ -34,29 +34,29 @@ DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00040000
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
!if $(MINNOW2_FSP_BUILD) == TRUE
-DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
+DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x00080000
DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
-DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
+DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFD80000
-DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
+DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000C8000
DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
-DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
+DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDC8000
!endif
-DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00100000
+DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x000D0000
DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
-DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFE00000
+DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFDD0000
-DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00130000
-DEFINE FLASH_REGION_FVMAIN_SIZE = 0x0016C000
+DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
+DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
-DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x0029C000
-DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002F000
+DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00296000
+DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002D000
-DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002CB000
-DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00035000
+DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002C3000
+DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003D000
################################################################################
#
diff --git a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
index 933ef5b217..8959a9e5fe 100644
--- a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
+++ b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
@@ -585,7 +585,7 @@
[PcdsFixedAtBuild.common]
!if $(MINNOW2_FSP_BUILD) == TRUE
# $(FLASH_REGION_VLVMICROCODE_BASE)
- gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFE00000
+ gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFDD0000
# $(FLASH_REGION_VLVMICROCODE_SIZE)
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x00030000
gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x60
@@ -594,7 +594,7 @@
# $(FLASH_AREA_SIZE)
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000
# $(FLASH_REGION_FSPBIN_BASE)
- gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000
+ gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFD80000
!endif
!if $(PERFORMANCE_ENABLE) == TRUE
diff --git a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
index 60fd88ea95..e9865db5c7 100644
--- a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
+++ b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
@@ -585,7 +585,7 @@
[PcdsFixedAtBuild.common]
!if $(MINNOW2_FSP_BUILD) == TRUE
# $(FLASH_REGION_VLVMICROCODE_BASE)
- gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFE00000
+ gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFDD0000
# $(FLASH_REGION_VLVMICROCODE_SIZE)
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x00030000
gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x60
@@ -594,7 +594,7 @@
# $(FLASH_AREA_SIZE)
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000
# $(FLASH_REGION_FSPBIN_BASE)
- gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000
+ gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFD80000
!endif
!if $(PERFORMANCE_ENABLE) == TRUE
@@ -813,10 +813,12 @@
## This PCD defines the video horizontal resolution.
# This PCD could be set to 0 then video resolution could be at highest resolution.
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
+ #gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
## This PCD defines the video vertical resolution.
# This PCD could be set to 0 then video resolution could be at highest resolution.
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
+ #gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
## This PCD defines the Console output column and the default value is 25 according to UEFI spec.
# This PCD could be set to 0 then console output could be at max column and max row.
diff --git a/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
index 9a47209507..70fc016d03 100644
--- a/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
+++ b/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
@@ -585,7 +585,7 @@
[PcdsFixedAtBuild.common]
!if $(MINNOW2_FSP_BUILD) == TRUE
# $(FLASH_REGION_VLVMICROCODE_BASE)
- gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFE00000
+ gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0xFFDD0000
# $(FLASH_REGION_VLVMICROCODE_SIZE)
gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x00030000
gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x60
@@ -594,7 +594,7 @@
# $(FLASH_AREA_SIZE)
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000
# $(FLASH_REGION_FSPBIN_BASE)
- gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000
+ gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFD80000
!endif
!if $(PERFORMANCE_ENABLE) == TRUE
@@ -813,10 +813,12 @@
## This PCD defines the video horizontal resolution.
# This PCD could be set to 0 then video resolution could be at highest resolution.
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
+ #gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
## This PCD defines the video vertical resolution.
# This PCD could be set to 0 then video resolution could be at highest resolution.
- gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
+ #gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
## This PCD defines the Console output column and the default value is 25 according to UEFI spec.
# This PCD could be set to 0 then console output could be at max column and max row.
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 07:04:17 +0000