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-rw-r--r--ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S40
-rw-r--r--ArmPkg/Include/Chipset/AArch64.h32
-rw-r--r--ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S41
-rw-r--r--ArmPlatformPkg/PrePeiCore/AArch64/Exception.S27
4 files changed, 87 insertions, 53 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S b/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S
index ca6c9a1522..edf9973494 100644
--- a/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S
@@ -12,6 +12,7 @@
//
//------------------------------------------------------------------------------
+#include <Chipset/AArch64.h>
#include <Library/PcdLib.h>
#include <AsmMacroIoLibV8.h>
@@ -95,14 +96,12 @@
UINT64 Padding;0x328 // Required for stack alignment
*/
-GCC_ASM_EXPORT(ExceptionHandlersStart)
GCC_ASM_EXPORT(ExceptionHandlersEnd)
GCC_ASM_EXPORT(CommonExceptionEntry)
GCC_ASM_EXPORT(AsmCommonExceptionEntry)
GCC_ASM_EXPORT(CommonCExceptionHandler)
.text
-.align 11
#define GP_CONTEXT_SIZE (32 * 8)
#define FP_CONTEXT_SIZE (32 * 16)
@@ -160,84 +159,85 @@ GCC_ASM_EXPORT(CommonCExceptionHandler)
// This code gets copied to the ARM vector table
// VectorTableStart - VectorTableEnd gets copied
//
-ASM_PFX(ExceptionHandlersStart):
+VECTOR_BASE(ExceptionHandlersStart)
//
// Current EL with SP0 : 0x0 - 0x180
//
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_SYNC)
ASM_PFX(SynchronousExceptionSP0):
b ASM_PFX(SynchronousExceptionEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_IRQ)
ASM_PFX(IrqSP0):
b ASM_PFX(IrqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_FIQ)
ASM_PFX(FiqSP0):
b ASM_PFX(FiqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SP0_SERR)
ASM_PFX(SErrorSP0):
b ASM_PFX(SErrorEntry)
//
// Current EL with SPx: 0x200 - 0x380
//
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SYNC)
ASM_PFX(SynchronousExceptionSPx):
b ASM_PFX(SynchronousExceptionEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_IRQ)
ASM_PFX(IrqSPx):
b ASM_PFX(IrqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_FIQ)
ASM_PFX(FiqSPx):
b ASM_PFX(FiqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPx_SERR)
ASM_PFX(SErrorSPx):
b ASM_PFX(SErrorEntry)
//
// Lower EL using AArch64 : 0x400 - 0x580
//
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_SYNC)
ASM_PFX(SynchronousExceptionA64):
b ASM_PFX(SynchronousExceptionEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_IRQ)
ASM_PFX(IrqA64):
b ASM_PFX(IrqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_FIQ)
ASM_PFX(FiqA64):
b ASM_PFX(FiqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A64_SERR)
ASM_PFX(SErrorA64):
b ASM_PFX(SErrorEntry)
//
-// Lower EL using AArch32 : 0x0 - 0x180
+// Lower EL using AArch32 : 0x600 - 0x780
//
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_SYNC)
ASM_PFX(SynchronousExceptionA32):
b ASM_PFX(SynchronousExceptionEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_IRQ)
ASM_PFX(IrqA32):
b ASM_PFX(IrqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_FIQ)
ASM_PFX(FiqA32):
b ASM_PFX(FiqEntry)
-.align 7
+VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_LOW_A32_SERR)
ASM_PFX(SErrorA32):
b ASM_PFX(SErrorEntry)
+VECTOR_END(ExceptionHandlersStart)
#undef REG_PAIR
#undef REG_ONE
diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h
index f6a8901289..5e1653bcb6 100644
--- a/ArmPkg/Include/Chipset/AArch64.h
+++ b/ArmPkg/Include/Chipset/AArch64.h
@@ -97,6 +97,38 @@
#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 11)-1)
+// Vector table offset definitions
+#define ARM_VECTOR_CUR_SP0_SYNC 0x000
+#define ARM_VECTOR_CUR_SP0_IRQ 0x080
+#define ARM_VECTOR_CUR_SP0_FIQ 0x100
+#define ARM_VECTOR_CUR_SP0_SERR 0x180
+
+#define ARM_VECTOR_CUR_SPx_SYNC 0x200
+#define ARM_VECTOR_CUR_SPx_IRQ 0x280
+#define ARM_VECTOR_CUR_SPx_FIQ 0x300
+#define ARM_VECTOR_CUR_SPx_SERR 0x380
+
+#define ARM_VECTOR_LOW_A64_SYNC 0x400
+#define ARM_VECTOR_LOW_A64_IRQ 0x480
+#define ARM_VECTOR_LOW_A64_FIQ 0x500
+#define ARM_VECTOR_LOW_A64_SERR 0x580
+
+#define ARM_VECTOR_LOW_A32_SYNC 0x600
+#define ARM_VECTOR_LOW_A32_IRQ 0x680
+#define ARM_VECTOR_LOW_A32_FIQ 0x700
+#define ARM_VECTOR_LOW_A32_SERR 0x780
+
+#define VECTOR_BASE(tbl) \
+ .align 11; \
+ GCC_ASM_EXPORT(tbl); \
+ ASM_PFX(tbl): \
+
+#define VECTOR_ENTRY(tbl, off) \
+ .org ASM_PFX(tbl) + off
+
+#define VECTOR_END(tbl) \
+ .org ASM_PFX(tbl) + 0x800
+
VOID
EFIAPI
ArmEnableSWPInstruction (
diff --git a/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S b/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S
index 3fc090b2c3..f33a07a19b 100644
--- a/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S
+++ b/ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S
@@ -12,82 +12,85 @@
#
#------------------------------------------------------------------------------
-GCC_ASM_EXPORT(DebugAgentVectorTable)
+#include <Chipset/AArch64.h>
+
GCC_ASM_IMPORT(DefaultExceptionHandler)
.text
-.align 11
-ASM_PFX(DebugAgentVectorTable):
+VECTOR_BASE(DebugAgentVectorTable)
//
// Current EL with SP0 : 0x0 - 0x180
//
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_SYNC)
ASM_PFX(SynchronousExceptionSP0):
b ASM_PFX(SynchronousExceptionSP0)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_IRQ)
ASM_PFX(IrqSP0):
b ASM_PFX(IrqSP0)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_FIQ)
ASM_PFX(FiqSP0):
b ASM_PFX(FiqSP0)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SP0_SERR)
ASM_PFX(SErrorSP0):
b ASM_PFX(SErrorSP0)
//
// Current EL with SPx: 0x200 - 0x380
//
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_SYNC)
ASM_PFX(SynchronousExceptionSPx):
b ASM_PFX(SynchronousExceptionSPx)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_IRQ)
ASM_PFX(IrqSPx):
b ASM_PFX(IrqSPx)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_FIQ)
ASM_PFX(FiqSPx):
b ASM_PFX(FiqSPx)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_CUR_SPx_SERR)
ASM_PFX(SErrorSPx):
b ASM_PFX(SErrorSPx)
/* Lower EL using AArch64 : 0x400 - 0x580 */
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_SYNC)
ASM_PFX(SynchronousExceptionA64):
b ASM_PFX(SynchronousExceptionA64)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_IRQ)
ASM_PFX(IrqA64):
b ASM_PFX(IrqA64)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_FIQ)
ASM_PFX(FiqA64):
b ASM_PFX(FiqA64)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A64_SERR)
ASM_PFX(SErrorA64):
b ASM_PFX(SErrorA64)
//
-// Lower EL using AArch32 : 0x0 - 0x180
+// Lower EL using AArch32 : 0x600 - 0x780
//
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_SYNC)
ASM_PFX(SynchronousExceptionA32):
b ASM_PFX(SynchronousExceptionA32)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_IRQ)
ASM_PFX(IrqA32):
b ASM_PFX(IrqA32)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_FIQ)
ASM_PFX(FiqA32):
b ASM_PFX(FiqA32)
-.align 7
+VECTOR_ENTRY(DebugAgentVectorTable, ARM_VECTOR_LOW_A32_SERR)
ASM_PFX(SErrorA32):
b ASM_PFX(SErrorA32)
+
+VECTOR_END(DebugAgentVectorTable)
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
index cdc8d925bc..b31854ced2 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
@@ -11,22 +11,17 @@
#
#
+#include <Chipset/AArch64.h>
#include <AsmMacroIoLibV8.h>
#include <Base.h>
#include <AutoGen.h>
.text
-.align 11
-
-GCC_ASM_EXPORT(PeiVectorTable)
//============================================================
//Default Exception Handlers
//============================================================
-ASM_PFX(PeiVectorTable):
-
-
#define TO_HANDLER \
EL1_OR_EL2(x1) \
1: mrs x1, elr_el1 /* EL1 Exception Link Register */ ;\
@@ -40,42 +35,46 @@ ASM_PFX(PeiVectorTable):
// No context saving at all.
//
-.align 7
+VECTOR_BASE(PeiVectorTable)
+
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SYNC)
_DefaultSyncExceptHandler_t:
mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_IRQ)
_DefaultIrq_t:
mov x0, #EXCEPT_AARCH64_IRQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_FIQ)
_DefaultFiq_t:
mov x0, #EXCEPT_AARCH64_FIQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SERR)
_DefaultSError_t:
mov x0, #EXCEPT_AARCH64_SERROR
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SYNC)
_DefaultSyncExceptHandler_h:
mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_IRQ)
_DefaultIrq_h:
mov x0, #EXCEPT_AARCH64_IRQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_FIQ)
_DefaultFiq_h:
mov x0, #EXCEPT_AARCH64_FIQ
TO_HANDLER
-.align 7
+VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SERR)
_DefaultSError_h:
mov x0, #EXCEPT_AARCH64_SERROR
TO_HANDLER
+
+VECTOR_END(PeiVectorTable)
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-01 10:19:13 +0000