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-rw-r--r--ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c8
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc42
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc132
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/ba.bat112
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/LICENSE.TXT56
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/Makefile192
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/boot.S366
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S154
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.html176
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.txt184
-rw-r--r--ArmPlatformPkg/Scripts/Ds5/system_table.py6
-rw-r--r--BeagleBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc42
-rw-r--r--BeagleBoardPkg/Debugger_scripts/rvi_hw_setup.inc132
-rw-r--r--BeagleBoardPkg/Debugger_scripts/trace32_load_symbols.cmm42
-rw-r--r--BeagleBoardPkg/Debugger_scripts/trace32_load_symbols_cygwin.cmm38
-rw-r--r--BeagleBoardPkg/Tools/GNUmakefile40
-rwxr-xr-xBeagleBoardPkg/Tools/makefile44
-rwxr-xr-xBeagleBoardPkg/b.bat122
-rwxr-xr-xBeagleBoardPkg/ba.bat122
-rw-r--r--Omap35xxPkg/Omap35xxPkg.dec100
20 files changed, 1055 insertions, 1055 deletions
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
index 42b4963913..9bc984f0bf 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
@@ -471,7 +471,7 @@ SetMemoryAttributes (
IN UINT64 Attributes,
IN EFI_PHYSICAL_ADDRESS VirtualMask
)
-{
+{
RETURN_STATUS Status;
ARM_MEMORY_REGION_DESCRIPTOR MemoryRegion;
UINT64 *TranslationTable;
@@ -483,9 +483,9 @@ SetMemoryAttributes (
TranslationTable = ArmGetTTBR0BaseAddress ();
- Status = FillTranslationTable (TranslationTable, &MemoryRegion);
- if (RETURN_ERROR (Status)) {
- return Status;
+ Status = FillTranslationTable (TranslationTable, &MemoryRegion);
+ if (RETURN_ERROR (Status)) {
+ return Status;
}
// Flush d-cache so descriptors make it back to uncached memory for subsequent table walks
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc b/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc
index 6299a84799..c691af69d7 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_boot_from_ram.inc
@@ -1,21 +1,21 @@
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-error = continue
-unload
-error = abort
-
-setreg @CP15_CONTROL = 0x0005107E
-setreg @pc=0x80008208
-setreg @cpsr=0x000000D3
-dis/D
-readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000
-
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+error = continue
+unload
+error = abort
+
+setreg @CP15_CONTROL = 0x0005107E
+setreg @pc=0x80008208
+setreg @cpsr=0x000000D3
+dis/D
+readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000
+
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc b/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc
index ea5f8ec15f..ba4190d568 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Debugger_scripts/rvi_hw_setup.inc
@@ -1,67 +1,67 @@
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-
-error = continue
-unload
-error = abort
-
-setreg @CP15_CONTROL = 0x0005107E
-setreg @cpsr=0x000000D3
-
-; General clock settings.
-setmem /32 0x48307270=0x00000080
-setmem /32 0x48306D40=0x00000003
-setmem /32 0x48005140=0x03020A50
-
-;Clock configuration
-setmem /32 0x48004A40=0x0000030A
-setmem /32 0x48004C40=0x00000015
-
-;DPLL3 (Core) settings
-setmem /32 0x48004D00=0x00370037
-setmem /32 0x48004D30=0x00000000
-setmem /32 0x48004D40=0x094C0C00
-
-;DPLL4 (Peripheral) settings
-setmem /32 0x48004D00=0x00370037
-setmem /32 0x48004D30=0x00000000
-setmem /32 0x48004D44=0x0001B00C
-setmem /32 0x48004D48=0x00000009
-
-;DPLL1 (MPU) settings
-setmem /32 0x48004904=0x00000037
-setmem /32 0x48004934=0x00000000
-setmem /32 0x48004940=0x0011F40C
-setmem /32 0x48004944=0x00000001
-setmem /32 0x48004948=0x00000000
-
-;RAM setup.
-setmem /16 0x6D000010=0x0000
-setmem /16 0x6D000040=0x0001
-setmem /16 0x6D000044=0x0100
-setmem /16 0x6D000048=0x0000
-setmem /32 0x6D000060=0x0000000A
-setmem /32 0x6D000070=0x00000081
-setmem /16 0x6D000040=0x0003
-setmem /32 0x6D000080=0x02D04011
-setmem /16 0x6D000084=0x0032
-setmem /16 0x6D00008C=0x0000
-setmem /32 0x6D00009C=0xBA9DC4C6
-setmem /32 0x6D0000A0=0x00012522
-setmem /32 0x6D0000A4=0x0004E201
-setmem /16 0x6D000040=0x0003
-setmem /32 0x6D0000B0=0x02D04011
-setmem /16 0x6D0000B4=0x0032
-setmem /16 0x6D0000BC=0x0000
-setmem /32 0x6D0000C4=0xBA9DC4C6
-setmem /32 0x6D0000C8=0x00012522
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+error = continue
+unload
+error = abort
+
+setreg @CP15_CONTROL = 0x0005107E
+setreg @cpsr=0x000000D3
+
+; General clock settings.
+setmem /32 0x48307270=0x00000080
+setmem /32 0x48306D40=0x00000003
+setmem /32 0x48005140=0x03020A50
+
+;Clock configuration
+setmem /32 0x48004A40=0x0000030A
+setmem /32 0x48004C40=0x00000015
+
+;DPLL3 (Core) settings
+setmem /32 0x48004D00=0x00370037
+setmem /32 0x48004D30=0x00000000
+setmem /32 0x48004D40=0x094C0C00
+
+;DPLL4 (Peripheral) settings
+setmem /32 0x48004D00=0x00370037
+setmem /32 0x48004D30=0x00000000
+setmem /32 0x48004D44=0x0001B00C
+setmem /32 0x48004D48=0x00000009
+
+;DPLL1 (MPU) settings
+setmem /32 0x48004904=0x00000037
+setmem /32 0x48004934=0x00000000
+setmem /32 0x48004940=0x0011F40C
+setmem /32 0x48004944=0x00000001
+setmem /32 0x48004948=0x00000000
+
+;RAM setup.
+setmem /16 0x6D000010=0x0000
+setmem /16 0x6D000040=0x0001
+setmem /16 0x6D000044=0x0100
+setmem /16 0x6D000048=0x0000
+setmem /32 0x6D000060=0x0000000A
+setmem /32 0x6D000070=0x00000081
+setmem /16 0x6D000040=0x0003
+setmem /32 0x6D000080=0x02D04011
+setmem /16 0x6D000084=0x0032
+setmem /16 0x6D00008C=0x0000
+setmem /32 0x6D00009C=0xBA9DC4C6
+setmem /32 0x6D0000A0=0x00012522
+setmem /32 0x6D0000A4=0x0004E201
+setmem /16 0x6D000040=0x0003
+setmem /32 0x6D0000B0=0x02D04011
+setmem /16 0x6D0000B4=0x0032
+setmem /16 0x6D0000BC=0x0000
+setmem /32 0x6D0000C4=0xBA9DC4C6
+setmem /32 0x6D0000C8=0x00012522
setmem /32 0x6D0000D4=0x0004E201 \ No newline at end of file
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ba.bat b/ArmPlatformPkg/ArmRealViewEbPkg/ba.bat
index 545da382bf..6ec1cbe443 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ba.bat
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ba.bat
@@ -1,56 +1,56 @@
-@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-@REM This program and the accompanying materials
-@REM are licensed and made available under the terms and conditions of the BSD License
-@REM which accompanies this distribution. The full text of the license may be found at
-@REM http://opensource.org/licenses/bsd-license.php
-@REM
-@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-@REM
-
-@REM Example usage of this script. default is a DEBUG build
-@REM b
-@REM b clean
-@REM b release
-@REM b release clean
-@REM b -v -y build.log
-
-ECHO OFF
-@REM Setup Build environment. Sets WORKSPACE and puts build in path
-CALL ..\edksetup.bat
-
-@REM Set for tools chain. Currently ARMGCC
-SET TARGET_TOOLS=ARMGCC
-SET TARGET=DEBUG
-
-
-@if /I "%1"=="RELEASE" (
-
- @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it
-
- SET TARGET=RELEASE
-
- shift /1
-
-)
-
-
-SET BUILD_ROOT=%WORKSPACE%\Build\ArmRealViewEb\%TARGET%_%TARGET_TOOLS%
-
-@REM Build the ARM RealView EB firmware and creat an FD (FLASH Device) Image.
-CALL build -p ArmRealViewEbPkg\ArmRealViewEbPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
-@if ERRORLEVEL 1 goto Exit
-
-@if /I "%1"=="CLEAN" goto Clean
-
-
-ECHO Patching ..\Debugger_scripts ...
-SET DEBUGGER_SCRIPT=Debugger_scripts
-@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
- @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
-)
-
-:Exit
-EXIT /B
-
-:Clean
+@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+@REM This program and the accompanying materials
+@REM are licensed and made available under the terms and conditions of the BSD License
+@REM which accompanies this distribution. The full text of the license may be found at
+@REM http://opensource.org/licenses/bsd-license.php
+@REM
+@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+@REM
+
+@REM Example usage of this script. default is a DEBUG build
+@REM b
+@REM b clean
+@REM b release
+@REM b release clean
+@REM b -v -y build.log
+
+ECHO OFF
+@REM Setup Build environment. Sets WORKSPACE and puts build in path
+CALL ..\edksetup.bat
+
+@REM Set for tools chain. Currently ARMGCC
+SET TARGET_TOOLS=ARMGCC
+SET TARGET=DEBUG
+
+
+@if /I "%1"=="RELEASE" (
+
+ @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it
+
+ SET TARGET=RELEASE
+
+ shift /1
+
+)
+
+
+SET BUILD_ROOT=%WORKSPACE%\Build\ArmRealViewEb\%TARGET%_%TARGET_TOOLS%
+
+@REM Build the ARM RealView EB firmware and creat an FD (FLASH Device) Image.
+CALL build -p ArmRealViewEbPkg\ArmRealViewEbPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
+@if ERRORLEVEL 1 goto Exit
+
+@if /I "%1"=="CLEAN" goto Clean
+
+
+ECHO Patching ..\Debugger_scripts ...
+SET DEBUGGER_SCRIPT=Debugger_scripts
+@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
+ @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
+)
+
+:Exit
+EXIT /B
+
+:Clean
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/LICENSE.TXT b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/LICENSE.TXT
index 880cbaf88b..e33cd4cdcf 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/LICENSE.TXT
+++ b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/LICENSE.TXT
@@ -1,28 +1,28 @@
-Copyright (c) 2011-2013 ARM Limited
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are
-met:
-
- * Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in
- the documentation and/or other materials provided with the
- distribution.
- * Neither the name of ARM nor the names of its contributors may be
- used to endorse or promote products derived from this software
- without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
-TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+Copyright (c) 2011-2013 ARM Limited
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+ * Neither the name of ARM nor the names of its contributors may be
+ used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/Makefile b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/Makefile
index 6aee571478..2ac8368b12 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/Makefile
+++ b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/Makefile
@@ -1,96 +1,96 @@
-#
-# Makefile - build a UEFI boot image for booting from different exception levels.
-#
-# Copyright (C) 2011-2013 ARM Limited.
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met:
-#
-# * Redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer.
-# * Redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in
-# the documentation and/or other materials provided with the
-# distribution.
-# * Neither the name of ARM nor the names of its contributors may be
-# used to endorse or promote products derived from this software
-# without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
-# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
-# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
-# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# This license can also be found in the LICENSE.TXT file.
-
-
-# VE
-PHYS_OFFSET := 0x80000000
-UART_BASE := 0x1c090000
-GIC_DIST_BASE := 0x2c001000
-GIC_CPU_BASE := 0x2c002000
-CNTFRQ := 0x01800000 # 24Mhz
-
-BOOTLOADER := boot.S
-LD_SCRIPT := model.lds.S
-IMAGE_1 := uefi-bootstrap-el1.axf
-IMAGE_2 := uefi-bootstrap-el2.axf
-IMAGE_3 := uefi-bootstrap-el3.axf
-IMAGE_3F := uefi-bootstrap-el3-foundation.axf
-
-
-CROSS_COMPILE ?= aarch64-none-elf-
-CC := $(CROSS_COMPILE)gcc
-LD := $(CROSS_COMPILE)ld
-
-all: $(IMAGE_1) $(IMAGE_2) $(IMAGE_3) $(IMAGE_3F)
-
-clean:
- rm -f *.axf *.o *.lds
-
-$(IMAGE_1): boot1.o model1.lds
- $(LD) -o $@ --script=model1.lds
-
-$(IMAGE_2): boot2.o model2.lds
- $(LD) -o $@ --script=model2.lds
-
-$(IMAGE_3): boot3.o model3.lds
- $(LD) -o $@ --script=model3.lds
-
-$(IMAGE_3F): boot3f.o model3f.lds
- $(LD) -o $@ --script=model3f.lds
-
-boot1.o: $(BOOTLOADER) Makefile
- $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -DSTART_EL1=1 -c -o $@ $(BOOTLOADER)
-
-boot2.o: $(BOOTLOADER) Makefile
- $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -c -o $@ $(BOOTLOADER)
-
-boot3.o: $(BOOTLOADER) Makefile
- $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -c -o $@ $(BOOTLOADER)
-
-boot3f.o: $(BOOTLOADER) Makefile
- $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DFOUNDATION_MODEL=1 -c -o $@ $(BOOTLOADER)
-
-model1.lds: $(LD_SCRIPT) Makefile boot1.o
- $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT1 -E -P -C -o $@ $<
-
-model2.lds: $(LD_SCRIPT) Makefile boot2.o
- $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT2 -E -P -C -o $@ $<
-
-model3.lds: $(LD_SCRIPT) Makefile boot3.o
- $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3 -E -P -C -o $@ $<
-
-model3f.lds: $(LD_SCRIPT) Makefile boot3f.o
- $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3F -E -P -C -o $@ $<
-
-.PHONY: all clean
+#
+# Makefile - build a UEFI boot image for booting from different exception levels.
+#
+# Copyright (C) 2011-2013 ARM Limited.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+#
+# * Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# * Neither the name of ARM nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# This license can also be found in the LICENSE.TXT file.
+
+
+# VE
+PHYS_OFFSET := 0x80000000
+UART_BASE := 0x1c090000
+GIC_DIST_BASE := 0x2c001000
+GIC_CPU_BASE := 0x2c002000
+CNTFRQ := 0x01800000 # 24Mhz
+
+BOOTLOADER := boot.S
+LD_SCRIPT := model.lds.S
+IMAGE_1 := uefi-bootstrap-el1.axf
+IMAGE_2 := uefi-bootstrap-el2.axf
+IMAGE_3 := uefi-bootstrap-el3.axf
+IMAGE_3F := uefi-bootstrap-el3-foundation.axf
+
+
+CROSS_COMPILE ?= aarch64-none-elf-
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+
+all: $(IMAGE_1) $(IMAGE_2) $(IMAGE_3) $(IMAGE_3F)
+
+clean:
+ rm -f *.axf *.o *.lds
+
+$(IMAGE_1): boot1.o model1.lds
+ $(LD) -o $@ --script=model1.lds
+
+$(IMAGE_2): boot2.o model2.lds
+ $(LD) -o $@ --script=model2.lds
+
+$(IMAGE_3): boot3.o model3.lds
+ $(LD) -o $@ --script=model3.lds
+
+$(IMAGE_3F): boot3f.o model3f.lds
+ $(LD) -o $@ --script=model3f.lds
+
+boot1.o: $(BOOTLOADER) Makefile
+ $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -DSTART_EL1=1 -c -o $@ $(BOOTLOADER)
+
+boot2.o: $(BOOTLOADER) Makefile
+ $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -c -o $@ $(BOOTLOADER)
+
+boot3.o: $(BOOTLOADER) Makefile
+ $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -c -o $@ $(BOOTLOADER)
+
+boot3f.o: $(BOOTLOADER) Makefile
+ $(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DFOUNDATION_MODEL=1 -c -o $@ $(BOOTLOADER)
+
+model1.lds: $(LD_SCRIPT) Makefile boot1.o
+ $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT1 -E -P -C -o $@ $<
+
+model2.lds: $(LD_SCRIPT) Makefile boot2.o
+ $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT2 -E -P -C -o $@ $<
+
+model3.lds: $(LD_SCRIPT) Makefile boot3.o
+ $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3 -E -P -C -o $@ $<
+
+model3f.lds: $(LD_SCRIPT) Makefile boot3f.o
+ $(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3F -E -P -C -o $@ $<
+
+.PHONY: all clean
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/boot.S b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/boot.S
index f06106608a..a4b0055c78 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/boot.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/boot.S
@@ -1,183 +1,183 @@
-/*
- * boot.S - simple register setup code for junping to a second stage bootloader
- *
- * Copyright (C) 2011-2013 ARM Limited.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of ARM nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
- * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * This license can also be found in the LICENSE.TXT file.
- */
-
- .text
-
- .globl _start
-
-.set LED_ADDR, 0x1c010008
-
-_start:
- /*
- * EL3 initialisation
- */
-
- // Set LED to show progress.
- ldr x1, =LED_ADDR
- mov w0, #0x1
- str w0, [x1]
- dsb sy
-
-#if defined START_EL2
-
- mrs x0, CurrentEL
- cmp x0, #0xc // EL3?
- b.ne start_ns // skip EL3 initialisation
-
- mov x0, #0x30 // RES1
- orr x0, x0, #(1 << 0) // Non-secure bit
- orr x0, x0, #(1 << 8) // HVC enable
- orr x0, x0, #(1 << 10) // 64-bit EL2
- msr scr_el3, x0
-
- msr cptr_el3, xzr // Disable copro. traps to EL3
-
- ldr x0, =CNTFRQ
- msr cntfrq_el0, x0
-
- /*
- * Check for the primary CPU to avoid a race on the distributor
- * registers.
- */
- mrs x0, mpidr_el1
- tst x0, #15
- b.ne 1f // secondary CPU
-
- ldr x1, =GIC_DIST_BASE // GICD_CTLR
- mov w0, #3 // EnableGrp0 | EnableGrp1
- str w0, [x1]
-
-1: ldr x1, =GIC_DIST_BASE + 0x80 // GICD_IGROUPR
- mov w0, #~0 // Grp1 interrupts
- str w0, [x1], #4
- b.ne 2f // Only local interrupts for secondary CPUs
- str w0, [x1], #4
- str w0, [x1], #4
-
-2: ldr x1, =GIC_CPU_BASE // GICC_CTLR
- ldr w0, [x1]
- orr w0, w0, #3 // EnableGrp0 | EnableGrp1
- str w0, [x1]
-
- mov w0, #1 << 7 // allow NS access to GICC_PMR
- str w0, [x1, #4] // GICC_PMR
-
- msr sctlr_el2, xzr
-
-#if defined START_EL1
-
- /* Now setup our EL1. Controlled by EL2 config on Model */
- mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
- orr x0, x0, #(1 << 31) // Set EL1 to be 64bit
-
- // Send all interrupts to their respective Exception levels for EL2
- bic x0, x0, #(1 << 3) // Disable virtual FIQ
- bic x0, x0, #(1 << 4) // Disable virtual IRQ
- bic x0, x0, #(1 << 5) // Disable virtual SError and Abort
- msr hcr_el2, x0 // Write back our settings
-
- /*
- * Enable architected timer access
- */
- mrs x0, cnthctl_el2
- orr x0, x0, #3 // Enable EL1 access to timers
- msr cnthctl_el2, x0
-
- mrs x0, cntkctl_el1
- orr x0, x0, #3 // EL0 access to counters
- msr cntkctl_el1, x0
-
- /* Set ID regs */
- mrs x0, midr_el1
- mrs x1, mpidr_el1
- msr vpidr_el2, x0
- msr vmpidr_el2, x1
-
- /* Coprocessor traps. */
- mov x0, #0x33ff
- msr cptr_el2, x0 // Disable copro. traps to EL2
-
- msr hstr_el2, xzr // Disable CP15 traps to EL2
-
-#endif // START_EL1
-
- /* Configure UART. Primary CPU only */
- mrs x4, mpidr_el1
- tst x4, #15
- b.ne 1f
-
- /*
- * UART initialisation (38400 8N1)
- */
- ldr x4, =UART_BASE // UART base
- mov w5, #0x10 // ibrd
- str w5, [x4, #0x24]
- mov w5, #0xc300
- orr w5, w5, #0x0001 // cr
- str w5, [x4, #0x30]
-
- /*
- * Prepare the switch to the EL2_SP2 mode from EL3
- */
-1: ldr x0, =start_ns // Return after mode switch
-#if defined START_EL1
- mov x1, #0x3c5 // EL1_SP1 | D | A | I | F
-#else
- mov x1, #0x3c9 // EL2_SP2 | D | A | I | F
-#endif
-
- msr elr_el3, x0
- msr spsr_el3, x1
- eret
-
-#endif // START_EL2
-
-
-start_ns:
-
-/*
- * We do not have NOR flash on the Foundation model. So run UEFI from RAM.
- * On the full model we use the NOR FLASH to store UEFI, so start there.
- */
-#if defined FOUNDATION_MODEL
- mov x0, #0xa0000000
-#else
- mov x0, #0x0
-#endif
- br x0
-
- .ltorg
-
- .org 0x200
+/*
+ * boot.S - simple register setup code for junping to a second stage bootloader
+ *
+ * Copyright (C) 2011-2013 ARM Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of ARM nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This license can also be found in the LICENSE.TXT file.
+ */
+
+ .text
+
+ .globl _start
+
+.set LED_ADDR, 0x1c010008
+
+_start:
+ /*
+ * EL3 initialisation
+ */
+
+ // Set LED to show progress.
+ ldr x1, =LED_ADDR
+ mov w0, #0x1
+ str w0, [x1]
+ dsb sy
+
+#if defined START_EL2
+
+ mrs x0, CurrentEL
+ cmp x0, #0xc // EL3?
+ b.ne start_ns // skip EL3 initialisation
+
+ mov x0, #0x30 // RES1
+ orr x0, x0, #(1 << 0) // Non-secure bit
+ orr x0, x0, #(1 << 8) // HVC enable
+ orr x0, x0, #(1 << 10) // 64-bit EL2
+ msr scr_el3, x0
+
+ msr cptr_el3, xzr // Disable copro. traps to EL3
+
+ ldr x0, =CNTFRQ
+ msr cntfrq_el0, x0
+
+ /*
+ * Check for the primary CPU to avoid a race on the distributor
+ * registers.
+ */
+ mrs x0, mpidr_el1
+ tst x0, #15
+ b.ne 1f // secondary CPU
+
+ ldr x1, =GIC_DIST_BASE // GICD_CTLR
+ mov w0, #3 // EnableGrp0 | EnableGrp1
+ str w0, [x1]
+
+1: ldr x1, =GIC_DIST_BASE + 0x80 // GICD_IGROUPR
+ mov w0, #~0 // Grp1 interrupts
+ str w0, [x1], #4
+ b.ne 2f // Only local interrupts for secondary CPUs
+ str w0, [x1], #4
+ str w0, [x1], #4
+
+2: ldr x1, =GIC_CPU_BASE // GICC_CTLR
+ ldr w0, [x1]
+ orr w0, w0, #3 // EnableGrp0 | EnableGrp1
+ str w0, [x1]
+
+ mov w0, #1 << 7 // allow NS access to GICC_PMR
+ str w0, [x1, #4] // GICC_PMR
+
+ msr sctlr_el2, xzr
+
+#if defined START_EL1
+
+ /* Now setup our EL1. Controlled by EL2 config on Model */
+ mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
+ orr x0, x0, #(1 << 31) // Set EL1 to be 64bit
+
+ // Send all interrupts to their respective Exception levels for EL2
+ bic x0, x0, #(1 << 3) // Disable virtual FIQ
+ bic x0, x0, #(1 << 4) // Disable virtual IRQ
+ bic x0, x0, #(1 << 5) // Disable virtual SError and Abort
+ msr hcr_el2, x0 // Write back our settings
+
+ /*
+ * Enable architected timer access
+ */
+ mrs x0, cnthctl_el2
+ orr x0, x0, #3 // Enable EL1 access to timers
+ msr cnthctl_el2, x0
+
+ mrs x0, cntkctl_el1
+ orr x0, x0, #3 // EL0 access to counters
+ msr cntkctl_el1, x0
+
+ /* Set ID regs */
+ mrs x0, midr_el1
+ mrs x1, mpidr_el1
+ msr vpidr_el2, x0
+ msr vmpidr_el2, x1
+
+ /* Coprocessor traps. */
+ mov x0, #0x33ff
+ msr cptr_el2, x0 // Disable copro. traps to EL2
+
+ msr hstr_el2, xzr // Disable CP15 traps to EL2
+
+#endif // START_EL1
+
+ /* Configure UART. Primary CPU only */
+ mrs x4, mpidr_el1
+ tst x4, #15
+ b.ne 1f
+
+ /*
+ * UART initialisation (38400 8N1)
+ */
+ ldr x4, =UART_BASE // UART base
+ mov w5, #0x10 // ibrd
+ str w5, [x4, #0x24]
+ mov w5, #0xc300
+ orr w5, w5, #0x0001 // cr
+ str w5, [x4, #0x30]
+
+ /*
+ * Prepare the switch to the EL2_SP2 mode from EL3
+ */
+1: ldr x0, =start_ns // Return after mode switch
+#if defined START_EL1
+ mov x1, #0x3c5 // EL1_SP1 | D | A | I | F
+#else
+ mov x1, #0x3c9 // EL2_SP2 | D | A | I | F
+#endif
+
+ msr elr_el3, x0
+ msr spsr_el3, x1
+ eret
+
+#endif // START_EL2
+
+
+start_ns:
+
+/*
+ * We do not have NOR flash on the Foundation model. So run UEFI from RAM.
+ * On the full model we use the NOR FLASH to store UEFI, so start there.
+ */
+#if defined FOUNDATION_MODEL
+ mov x0, #0xa0000000
+#else
+ mov x0, #0x0
+#endif
+ br x0
+
+ .ltorg
+
+ .org 0x200
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S
index f554bd5d4d..cc719c56b9 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S
@@ -1,77 +1,77 @@
-/*
- * model.lds.S - simple linker script for stand-alone Linux booting
- *
- * Copyright (C) 2011, 2012 ARM Limited.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of ARM nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
- * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * This license can also be found in the LICENSE.TXT file.
- */
-
-OUTPUT_FORMAT("elf64-littleaarch64")
-OUTPUT_ARCH(aarch64)
-TARGET(binary)
-
-#ifdef BOOT1
-INPUT(./boot1.o)
-#endif
-
-#ifdef BOOT2
-INPUT(./boot2.o)
-#endif
-
-#ifdef BOOT3
-INPUT(./boot3.o)
-#endif
-
-#ifdef BOOT3F
-INPUT(./boot3f.o)
-#endif
-
-SECTIONS
-{
- . = PHYS_OFFSET;
-#ifdef BOOT1
- .text : { boot1.o }
-#endif
-
-#ifdef BOOT2
- .text : { boot2.o }
-#endif
-
-#ifdef BOOT3
- .text : { boot3.o }
-#endif
-
-#ifdef BOOT3F
- .text : { boot3f.o }
-#endif
-
- .data : { *(.data) }
- .bss : { *(.bss) }
-}
+/*
+ * model.lds.S - simple linker script for stand-alone Linux booting
+ *
+ * Copyright (C) 2011, 2012 ARM Limited.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of ARM nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This license can also be found in the LICENSE.TXT file.
+ */
+
+OUTPUT_FORMAT("elf64-littleaarch64")
+OUTPUT_ARCH(aarch64)
+TARGET(binary)
+
+#ifdef BOOT1
+INPUT(./boot1.o)
+#endif
+
+#ifdef BOOT2
+INPUT(./boot2.o)
+#endif
+
+#ifdef BOOT3
+INPUT(./boot3.o)
+#endif
+
+#ifdef BOOT3F
+INPUT(./boot3f.o)
+#endif
+
+SECTIONS
+{
+ . = PHYS_OFFSET;
+#ifdef BOOT1
+ .text : { boot1.o }
+#endif
+
+#ifdef BOOT2
+ .text : { boot2.o }
+#endif
+
+#ifdef BOOT3
+ .text : { boot3.o }
+#endif
+
+#ifdef BOOT3F
+ .text : { boot3f.o }
+#endif
+
+ .data : { *(.data) }
+ .bss : { *(.bss) }
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.html b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.html
index ecc1a51100..5627285265 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.html
+++ b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.html
@@ -1,88 +1,88 @@
-<h1>AArch64 UEFI bootstraps</h1>
-
-<p>Copyright (c) 2011-2013 ARM Limited. All rights reserved.
-See the <code>LICENSE.TXT</code> file for more information.</p>
-
-<p>Contents:</p>
-
-<ul>
-<li>Introduction</li>
-<li>Build</li>
-<li>Use on ARMv8 RTSM and FVP models</li>
-<li>Use on ARMv8 Foundation model</li>
-</ul>
-
-<h2>Introduction</h2>
-
-<p>A bootstrap can be used to change the model state, like the Exception
-Level (EL), before executing the UEFI binary.</p>
-
-<p>For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
-starting at different exception levels. The ARMv8 models start at EL3 by
-default.</p>
-
-<p>In the case of the Foundation model a bootstrap is required to jump to the
-UEFI binary as loaded in RAM. This is required as the Foundation model cannot
-load and execute UEFI binaries directly. The Foundation model can only load and
-execute ELF binaries.</p>
-
-<h2>Build</h2>
-
-<p>Build the bootstraps using a AArch64 GCC cross-compiler. By default the
-<code>Makefile</code> is configured to assume a GCC bare-metal toolchain:</p>
-
-<pre><code>PATH=$PATH:&lt;path/to/baremetal-tools/bin/&gt; make clean
-PATH=$PATH:&lt;path/to/baremetal-tools/bin/&gt; make
-</code></pre>
-
-<p>To build the bootstraps with a Linux GCC toolchain use the following
-commands:</p>
-
-<pre><code>PATH=$PATH:&lt;path/to/aarch64-linux-gnu-tools/bin/&gt; make clean
-PATH=$PATH:&lt;path/to/aarch64-linux-gnu-tools/bin/&gt; CROSS_COMPILE=&lt;gcc-prefix&gt; make
-</code></pre>
-
-<p>The <code>gcc-prefix</code> depends on the specific toolchain distribution used. It can be
-"aarch64-linux-gnu-" for example.</p>
-
-<p>This will result in four <code>axf</code> files:</p>
-
-<ul>
-<li><p>uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
- changing anything.</p></li>
-<li><p>uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
- UEFI code in FLASH.</p></li>
-<li><p>uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
- non-secure EL1 and run the UEFI code in FLASH.</p></li>
-<li><p>uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
- without changing anything. Only to be used with the
- Foundation model. The Foundation model does not have
- non-secure memory at address <code>0x0</code> and thus the UEFI image
- should be pre-loaded into non-secure RAM at address
- <code>0xA0000000</code>.</p></li>
-</ul>
-
-<h2>Use on ARMv8 RTSM and FVP models</h2>
-
-<p>Add the '-a' option to the model start script and point to the required
-bootstrap:</p>
-
-<pre><code>&lt; ... model start script as described in top-level readme file ... &gt;
- -a &lt;path/to/bootstrap-binary-file&gt;
-</code></pre>
-
-<p>NOTE: The Foundation model bootstrap should not be used with these models.</p>
-
-<h2>Use on ARMv8 Foundation model</h2>
-
-<p>The Foundation model takes an option for an ELF file to be loaded as well as an
-option to load a binary data blob into RAM. This can be used to run UEFI in the
-following manner:</p>
-
-<pre><code>&lt;PATH_TO_INSTALLED_FOUNDATION_MODEL&gt;/Foundation_v8 --cores=2 --visualization
- --image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
-</code></pre>
-
-<p>NOTE: The RTSM version of the bootstraps and UEFI image will not work as
- expected on the Foundation model. Foundation model specific versions
- should be used.</p>
+<h1>AArch64 UEFI bootstraps</h1>
+
+<p>Copyright (c) 2011-2013 ARM Limited. All rights reserved.
+See the <code>LICENSE.TXT</code> file for more information.</p>
+
+<p>Contents:</p>
+
+<ul>
+<li>Introduction</li>
+<li>Build</li>
+<li>Use on ARMv8 RTSM and FVP models</li>
+<li>Use on ARMv8 Foundation model</li>
+</ul>
+
+<h2>Introduction</h2>
+
+<p>A bootstrap can be used to change the model state, like the Exception
+Level (EL), before executing the UEFI binary.</p>
+
+<p>For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
+starting at different exception levels. The ARMv8 models start at EL3 by
+default.</p>
+
+<p>In the case of the Foundation model a bootstrap is required to jump to the
+UEFI binary as loaded in RAM. This is required as the Foundation model cannot
+load and execute UEFI binaries directly. The Foundation model can only load and
+execute ELF binaries.</p>
+
+<h2>Build</h2>
+
+<p>Build the bootstraps using a AArch64 GCC cross-compiler. By default the
+<code>Makefile</code> is configured to assume a GCC bare-metal toolchain:</p>
+
+<pre><code>PATH=$PATH:&lt;path/to/baremetal-tools/bin/&gt; make clean
+PATH=$PATH:&lt;path/to/baremetal-tools/bin/&gt; make
+</code></pre>
+
+<p>To build the bootstraps with a Linux GCC toolchain use the following
+commands:</p>
+
+<pre><code>PATH=$PATH:&lt;path/to/aarch64-linux-gnu-tools/bin/&gt; make clean
+PATH=$PATH:&lt;path/to/aarch64-linux-gnu-tools/bin/&gt; CROSS_COMPILE=&lt;gcc-prefix&gt; make
+</code></pre>
+
+<p>The <code>gcc-prefix</code> depends on the specific toolchain distribution used. It can be
+"aarch64-linux-gnu-" for example.</p>
+
+<p>This will result in four <code>axf</code> files:</p>
+
+<ul>
+<li><p>uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
+ changing anything.</p></li>
+<li><p>uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
+ UEFI code in FLASH.</p></li>
+<li><p>uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
+ non-secure EL1 and run the UEFI code in FLASH.</p></li>
+<li><p>uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
+ without changing anything. Only to be used with the
+ Foundation model. The Foundation model does not have
+ non-secure memory at address <code>0x0</code> and thus the UEFI image
+ should be pre-loaded into non-secure RAM at address
+ <code>0xA0000000</code>.</p></li>
+</ul>
+
+<h2>Use on ARMv8 RTSM and FVP models</h2>
+
+<p>Add the '-a' option to the model start script and point to the required
+bootstrap:</p>
+
+<pre><code>&lt; ... model start script as described in top-level readme file ... &gt;
+ -a &lt;path/to/bootstrap-binary-file&gt;
+</code></pre>
+
+<p>NOTE: The Foundation model bootstrap should not be used with these models.</p>
+
+<h2>Use on ARMv8 Foundation model</h2>
+
+<p>The Foundation model takes an option for an ELF file to be loaded as well as an
+option to load a binary data blob into RAM. This can be used to run UEFI in the
+following manner:</p>
+
+<pre><code>&lt;PATH_TO_INSTALLED_FOUNDATION_MODEL&gt;/Foundation_v8 --cores=2 --visualization
+ --image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
+</code></pre>
+
+<p>NOTE: The RTSM version of the bootstraps and UEFI image will not work as
+ expected on the Foundation model. Foundation model specific versions
+ should be used.</p>
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.txt b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.txt
index 1d4b174557..24a1bbee3d 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.txt
+++ b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/readme.txt
@@ -1,92 +1,92 @@
-AArch64 UEFI bootstraps
-=======================
-
-Copyright (c) 2011-2013 ARM Limited. All rights reserved.
-See the `LICENSE.TXT` file for more information.
-
-Contents:
-
-* Introduction
-* Build
-* Use on ARMv8 RTSM and FVP models
-* Use on ARMv8 Foundation model
-
-
-Introduction
-------------
-
-A bootstrap can be used to change the model state, like the Exception
-Level (EL), before executing the UEFI binary.
-
-For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
-starting at different exception levels. The ARMv8 models start at EL3 by
-default.
-
-In the case of the Foundation model a bootstrap is required to jump to the
-UEFI binary as loaded in RAM. This is required as the Foundation model cannot
-load and execute UEFI binaries directly. The Foundation model can only load and
-execute ELF binaries.
-
-
-Build
------
-
-Build the bootstraps using a AArch64 GCC cross-compiler. By default the
-`Makefile` is configured to assume a GCC bare-metal toolchain:
-
- PATH=$PATH:<path/to/baremetal-tools/bin/> make clean
- PATH=$PATH:<path/to/baremetal-tools/bin/> make
-
-To build the bootstraps with a Linux GCC toolchain use the following
-commands:
-
- PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> make clean
- PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> CROSS_COMPILE=<gcc-prefix> make
-
-The `gcc-prefix` depends on the specific toolchain distribution used. It can be
-"aarch64-linux-gnu-" for example.
-
-This will result in four `axf` files:
-
-* uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
- changing anything.
-
-* uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
- UEFI code in FLASH.
-
-* uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
- non-secure EL1 and run the UEFI code in FLASH.
-
-* uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
- without changing anything. Only to be used with the
- Foundation model. The Foundation model does not have
- non-secure memory at address `0x0` and thus the UEFI image
- should be pre-loaded into non-secure RAM at address
- `0xA0000000`.
-
-
-Use on ARMv8 RTSM and FVP models
---------------------------------
-
-Add the '-a' option to the model start script and point to the required
-bootstrap:
-
- < ... model start script as described in top-level readme file ... >
- -a <path/to/bootstrap-binary-file>
-
-NOTE: The Foundation model bootstrap should not be used with these models.
-
-
-Use on ARMv8 Foundation model
------------------------------
-
-The Foundation model takes an option for an ELF file to be loaded as well as an
-option to load a binary data blob into RAM. This can be used to run UEFI in the
-following manner:
-
- <PATH_TO_INSTALLED_FOUNDATION_MODEL>/Foundation_v8 --cores=2 --visualization
- --image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
-
-NOTE: The RTSM version of the bootstraps and UEFI image will not work as
- expected on the Foundation model. Foundation model specific versions
- should be used.
+AArch64 UEFI bootstraps
+=======================
+
+Copyright (c) 2011-2013 ARM Limited. All rights reserved.
+See the `LICENSE.TXT` file for more information.
+
+Contents:
+
+* Introduction
+* Build
+* Use on ARMv8 RTSM and FVP models
+* Use on ARMv8 Foundation model
+
+
+Introduction
+------------
+
+A bootstrap can be used to change the model state, like the Exception
+Level (EL), before executing the UEFI binary.
+
+For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
+starting at different exception levels. The ARMv8 models start at EL3 by
+default.
+
+In the case of the Foundation model a bootstrap is required to jump to the
+UEFI binary as loaded in RAM. This is required as the Foundation model cannot
+load and execute UEFI binaries directly. The Foundation model can only load and
+execute ELF binaries.
+
+
+Build
+-----
+
+Build the bootstraps using a AArch64 GCC cross-compiler. By default the
+`Makefile` is configured to assume a GCC bare-metal toolchain:
+
+ PATH=$PATH:<path/to/baremetal-tools/bin/> make clean
+ PATH=$PATH:<path/to/baremetal-tools/bin/> make
+
+To build the bootstraps with a Linux GCC toolchain use the following
+commands:
+
+ PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> make clean
+ PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> CROSS_COMPILE=<gcc-prefix> make
+
+The `gcc-prefix` depends on the specific toolchain distribution used. It can be
+"aarch64-linux-gnu-" for example.
+
+This will result in four `axf` files:
+
+* uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
+ changing anything.
+
+* uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
+ UEFI code in FLASH.
+
+* uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
+ non-secure EL1 and run the UEFI code in FLASH.
+
+* uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
+ without changing anything. Only to be used with the
+ Foundation model. The Foundation model does not have
+ non-secure memory at address `0x0` and thus the UEFI image
+ should be pre-loaded into non-secure RAM at address
+ `0xA0000000`.
+
+
+Use on ARMv8 RTSM and FVP models
+--------------------------------
+
+Add the '-a' option to the model start script and point to the required
+bootstrap:
+
+ < ... model start script as described in top-level readme file ... >
+ -a <path/to/bootstrap-binary-file>
+
+NOTE: The Foundation model bootstrap should not be used with these models.
+
+
+Use on ARMv8 Foundation model
+-----------------------------
+
+The Foundation model takes an option for an ELF file to be loaded as well as an
+option to load a binary data blob into RAM. This can be used to run UEFI in the
+following manner:
+
+ <PATH_TO_INSTALLED_FOUNDATION_MODEL>/Foundation_v8 --cores=2 --visualization
+ --image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
+
+NOTE: The RTSM version of the bootstraps and UEFI image will not work as
+ expected on the Foundation model. Foundation model specific versions
+ should be used.
diff --git a/ArmPlatformPkg/Scripts/Ds5/system_table.py b/ArmPlatformPkg/Scripts/Ds5/system_table.py
index ff1db2f6e4..dbb827e96d 100644
--- a/ArmPlatformPkg/Scripts/Ds5/system_table.py
+++ b/ArmPlatformPkg/Scripts/Ds5/system_table.py
@@ -95,7 +95,7 @@ class DebugInfoTable:
if edk2_debugger.is_aarch64(self.ec):
section = firmware_volume.EfiSectionPE64(self.ec, debug_info[0])
else:
- section = firmware_volume.EfiSectionPE32(self.ec, debug_info[0])
+ section = firmware_volume.EfiSectionPE32(self.ec, debug_info[0])
try:
edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase(), verbose)
@@ -151,13 +151,13 @@ class SystemTable:
def get_configuration_table(self, conf_table_guid):
if edk2_debugger.is_aarch64(self.ec):
# Number of configuration Table entry
- conf_table_entry_count = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x68)
+ conf_table_entry_count = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x68)
# Get location of the Configuration Table entries
conf_table_offset = self.ec.getMemoryService().readMemory64(self.system_table_base + 0x70)
else:
# Number of configuration Table entry
- conf_table_entry_count = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x40)
+ conf_table_entry_count = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x40)
# Get location of the Configuration Table entries
conf_table_offset = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x44)
diff --git a/BeagleBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc b/BeagleBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc
index 6299a84799..c691af69d7 100644
--- a/BeagleBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc
+++ b/BeagleBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc
@@ -1,21 +1,21 @@
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-error = continue
-unload
-error = abort
-
-setreg @CP15_CONTROL = 0x0005107E
-setreg @pc=0x80008208
-setreg @cpsr=0x000000D3
-dis/D
-readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000
-
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+error = continue
+unload
+error = abort
+
+setreg @CP15_CONTROL = 0x0005107E
+setreg @pc=0x80008208
+setreg @cpsr=0x000000D3
+dis/D
+readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000
+
diff --git a/BeagleBoardPkg/Debugger_scripts/rvi_hw_setup.inc b/BeagleBoardPkg/Debugger_scripts/rvi_hw_setup.inc
index ea5f8ec15f..ba4190d568 100644
--- a/BeagleBoardPkg/Debugger_scripts/rvi_hw_setup.inc
+++ b/BeagleBoardPkg/Debugger_scripts/rvi_hw_setup.inc
@@ -1,67 +1,67 @@
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-
-error = continue
-unload
-error = abort
-
-setreg @CP15_CONTROL = 0x0005107E
-setreg @cpsr=0x000000D3
-
-; General clock settings.
-setmem /32 0x48307270=0x00000080
-setmem /32 0x48306D40=0x00000003
-setmem /32 0x48005140=0x03020A50
-
-;Clock configuration
-setmem /32 0x48004A40=0x0000030A
-setmem /32 0x48004C40=0x00000015
-
-;DPLL3 (Core) settings
-setmem /32 0x48004D00=0x00370037
-setmem /32 0x48004D30=0x00000000
-setmem /32 0x48004D40=0x094C0C00
-
-;DPLL4 (Peripheral) settings
-setmem /32 0x48004D00=0x00370037
-setmem /32 0x48004D30=0x00000000
-setmem /32 0x48004D44=0x0001B00C
-setmem /32 0x48004D48=0x00000009
-
-;DPLL1 (MPU) settings
-setmem /32 0x48004904=0x00000037
-setmem /32 0x48004934=0x00000000
-setmem /32 0x48004940=0x0011F40C
-setmem /32 0x48004944=0x00000001
-setmem /32 0x48004948=0x00000000
-
-;RAM setup.
-setmem /16 0x6D000010=0x0000
-setmem /16 0x6D000040=0x0001
-setmem /16 0x6D000044=0x0100
-setmem /16 0x6D000048=0x0000
-setmem /32 0x6D000060=0x0000000A
-setmem /32 0x6D000070=0x00000081
-setmem /16 0x6D000040=0x0003
-setmem /32 0x6D000080=0x02D04011
-setmem /16 0x6D000084=0x0032
-setmem /16 0x6D00008C=0x0000
-setmem /32 0x6D00009C=0xBA9DC4C6
-setmem /32 0x6D0000A0=0x00012522
-setmem /32 0x6D0000A4=0x0004E201
-setmem /16 0x6D000040=0x0003
-setmem /32 0x6D0000B0=0x02D04011
-setmem /16 0x6D0000B4=0x0032
-setmem /16 0x6D0000BC=0x0000
-setmem /32 0x6D0000C4=0xBA9DC4C6
-setmem /32 0x6D0000C8=0x00012522
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+error = continue
+unload
+error = abort
+
+setreg @CP15_CONTROL = 0x0005107E
+setreg @cpsr=0x000000D3
+
+; General clock settings.
+setmem /32 0x48307270=0x00000080
+setmem /32 0x48306D40=0x00000003
+setmem /32 0x48005140=0x03020A50
+
+;Clock configuration
+setmem /32 0x48004A40=0x0000030A
+setmem /32 0x48004C40=0x00000015
+
+;DPLL3 (Core) settings
+setmem /32 0x48004D00=0x00370037
+setmem /32 0x48004D30=0x00000000
+setmem /32 0x48004D40=0x094C0C00
+
+;DPLL4 (Peripheral) settings
+setmem /32 0x48004D00=0x00370037
+setmem /32 0x48004D30=0x00000000
+setmem /32 0x48004D44=0x0001B00C
+setmem /32 0x48004D48=0x00000009
+
+;DPLL1 (MPU) settings
+setmem /32 0x48004904=0x00000037
+setmem /32 0x48004934=0x00000000
+setmem /32 0x48004940=0x0011F40C
+setmem /32 0x48004944=0x00000001
+setmem /32 0x48004948=0x00000000
+
+;RAM setup.
+setmem /16 0x6D000010=0x0000
+setmem /16 0x6D000040=0x0001
+setmem /16 0x6D000044=0x0100
+setmem /16 0x6D000048=0x0000
+setmem /32 0x6D000060=0x0000000A
+setmem /32 0x6D000070=0x00000081
+setmem /16 0x6D000040=0x0003
+setmem /32 0x6D000080=0x02D04011
+setmem /16 0x6D000084=0x0032
+setmem /16 0x6D00008C=0x0000
+setmem /32 0x6D00009C=0xBA9DC4C6
+setmem /32 0x6D0000A0=0x00012522
+setmem /32 0x6D0000A4=0x0004E201
+setmem /16 0x6D000040=0x0003
+setmem /32 0x6D0000B0=0x02D04011
+setmem /16 0x6D0000B4=0x0032
+setmem /16 0x6D0000BC=0x0000
+setmem /32 0x6D0000C4=0xBA9DC4C6
+setmem /32 0x6D0000C8=0x00012522
setmem /32 0x6D0000D4=0x0004E201 \ No newline at end of file
diff --git a/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols.cmm b/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols.cmm
index d7a617afd2..1bae172763 100644
--- a/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols.cmm
+++ b/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols.cmm
@@ -139,27 +139,27 @@ valid_pe_header:
)
RETURN 0
-get_file_string:
- ENTRY &stringOffset
-
- local &string
-
- &more_string=data.string(d:&stringOffset)
-
- if (string.len("&more_string")>=128.)
- (
- &string="&string"+"&more_string"
- &stringOffset=&stringOffset+string.len("&more_string")
-
- //Get remaining file string
- GOSUB get_file_string &stringOffset
- ENTRY &more_string
- &string="&string"+"&more_string"
- )
- else
- (
- &string="&string"+"&more_string"
- &more_string=""
+get_file_string:
+ ENTRY &stringOffset
+
+ local &string
+
+ &more_string=data.string(d:&stringOffset)
+
+ if (string.len("&more_string")>=128.)
+ (
+ &string="&string"+"&more_string"
+ &stringOffset=&stringOffset+string.len("&more_string")
+
+ //Get remaining file string
+ GOSUB get_file_string &stringOffset
+ ENTRY &more_string
+ &string="&string"+"&more_string"
+ )
+ else
+ (
+ &string="&string"+"&more_string"
+ &more_string=""
)
RETURN &string
diff --git a/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols_cygwin.cmm b/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols_cygwin.cmm
index c2ecb6ab93..db9ff4e966 100644
--- a/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols_cygwin.cmm
+++ b/BeagleBoardPkg/Debugger_scripts/trace32_load_symbols_cygwin.cmm
@@ -111,27 +111,27 @@ valid_pe_header:
)
RETURN 0
-get_file_string:
- ENTRY &stringOffset
-
+get_file_string:
+ ENTRY &stringOffset
+
local &string
- &more_string=data.string(d:&stringOffset)
-
- if (string.len("&more_string")>=128.)
- (
- &string="&string"+"&more_string"
- &stringOffset=&stringOffset+string.len("&more_string")
-
- //Get remaining file string
- GOSUB get_file_string &stringOffset
- ENTRY &more_string
- &string="&string"+"&more_string"
- )
- else
- (
- &string="&string"+"&more_string"
- &more_string=""
+ &more_string=data.string(d:&stringOffset)
+
+ if (string.len("&more_string")>=128.)
+ (
+ &string="&string"+"&more_string"
+ &stringOffset=&stringOffset+string.len("&more_string")
+
+ //Get remaining file string
+ GOSUB get_file_string &stringOffset
+ ENTRY &more_string
+ &string="&string"+"&more_string"
+ )
+ else
+ (
+ &string="&string"+"&more_string"
+ &more_string=""
)
RETURN &string
diff --git a/BeagleBoardPkg/Tools/GNUmakefile b/BeagleBoardPkg/Tools/GNUmakefile
index 20507fd362..ed09e2bcde 100644
--- a/BeagleBoardPkg/Tools/GNUmakefile
+++ b/BeagleBoardPkg/Tools/GNUmakefile
@@ -1,20 +1,20 @@
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-CC = gcc
-CFLAGS = -g
-
-generate_image: generate_image.c
- $(CC) $(CCFLAGS) $(LDFLAGS) -o generate_image generate_image.c
-
-clean:
- rm -f generate_image generate_image.exe
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+CC = gcc
+CFLAGS = -g
+
+generate_image: generate_image.c
+ $(CC) $(CCFLAGS) $(LDFLAGS) -o generate_image generate_image.c
+
+clean:
+ rm -f generate_image generate_image.exe
diff --git a/BeagleBoardPkg/Tools/makefile b/BeagleBoardPkg/Tools/makefile
index fe5eea853f..cf50b8f2cf 100755
--- a/BeagleBoardPkg/Tools/makefile
+++ b/BeagleBoardPkg/Tools/makefile
@@ -1,22 +1,22 @@
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-all: GenerateImage replace
-
-GenerateImage: generate_image.c
- $(CC) $(CCFLAGS) $(LDFLAGS) -o GenerateImage.exe generate_image.c
-
-replace: replace.c
- $(CC) $(CCFLAGS) $(LDFLAGS) -o replace.exe replace.c
-
-clean:
- del GenerateImage.exe generate_image.obj replace.exe replace.obj
+#
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+all: GenerateImage replace
+
+GenerateImage: generate_image.c
+ $(CC) $(CCFLAGS) $(LDFLAGS) -o GenerateImage.exe generate_image.c
+
+replace: replace.c
+ $(CC) $(CCFLAGS) $(LDFLAGS) -o replace.exe replace.c
+
+clean:
+ del GenerateImage.exe generate_image.obj replace.exe replace.obj
diff --git a/BeagleBoardPkg/b.bat b/BeagleBoardPkg/b.bat
index 130d0d1c7a..76ddea68bd 100755
--- a/BeagleBoardPkg/b.bat
+++ b/BeagleBoardPkg/b.bat
@@ -1,68 +1,68 @@
-@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-@REM This program and the accompanying materials
-@REM are licensed and made available under the terms and conditions of the BSD License
-@REM which accompanies this distribution. The full text of the license may be found at
-@REM http://opensource.org/licenses/bsd-license.php
-@REM
-@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-@REM
-
-@REM Example usage of this script. default is a DEBUG build
-@REM b
-@REM b clean
-@REM b release
-@REM b release clean
-@REM b -v -y build.log
-
-ECHO OFF
-@REM Setup Build environment. Sets WORKSPACE and puts build in path
-CALL ..\edksetup.bat
-
-@REM Set for tools chain. Currently RVCT
-SET TARGET_TOOLS=RVCT
-SET TARGET=DEBUG
+@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+@REM This program and the accompanying materials
+@REM are licensed and made available under the terms and conditions of the BSD License
+@REM which accompanies this distribution. The full text of the license may be found at
+@REM http://opensource.org/licenses/bsd-license.php
+@REM
+@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+@REM
+
+@REM Example usage of this script. default is a DEBUG build
+@REM b
+@REM b clean
+@REM b release
+@REM b release clean
+@REM b -v -y build.log
+
+ECHO OFF
+@REM Setup Build environment. Sets WORKSPACE and puts build in path
+CALL ..\edksetup.bat
+
+@REM Set for tools chain. Currently RVCT
+SET TARGET_TOOLS=RVCT
+SET TARGET=DEBUG
@if /I "%1"=="RELEASE" (
@REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it
SET TARGET=RELEASE
shift /1
)
-
-SET BUILD_ROOT=%WORKSPACE%\Build\BeagleBoard\%TARGET%_%TARGET_TOOLS%
-
-@REM Build the Beagle Board firmware and creat an FD (FLASH Device) Image.
-CALL build -p BeagleBoardPkg\BeagleBoardPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
-@if ERRORLEVEL 1 goto Exit
-
+
+SET BUILD_ROOT=%WORKSPACE%\Build\BeagleBoard\%TARGET%_%TARGET_TOOLS%
+
+@REM Build the Beagle Board firmware and creat an FD (FLASH Device) Image.
+CALL build -p BeagleBoardPkg\BeagleBoardPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
+@if ERRORLEVEL 1 goto Exit
+
@if /I "%1"=="CLEAN" goto Clean
-
-@REM
-@REM Ram starts at 0x80000000
-@REM OMAP 3530 TRM defines 0x80008208 as the entry point
-@REM The reset vector is caught by the mask ROM in the OMAP 3530 so that is why this entry
-@REM point looks so strange.
-@REM OMAP 3430 TRM section 26.4.8 has Image header information. (missing in OMAP 3530 TRM)
-@REM
-@cd Tools
-
-ECHO Building tools...
-CALL nmake
-
-ECHO Patching image with ConfigurationHeader.dat
-CALL GenerateImage -D ..\ConfigurationHeader.dat -E 0x80008208 -I %BUILD_ROOT%\FV\BEAGLEBOARD_EFI.fd -O %BUILD_ROOT%\FV\BeagleBoard_EFI_flashboot.fd
-
-ECHO Patching ..\Debugger_scripts ...
-SET DEBUGGER_SCRIPT=..\Debugger_scripts
-@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
- @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
-)
-
-cd ..
-:Exit
-EXIT /B
-
-:Clean
-cd Tools
-CALL nmake clean
-cd ..
+
+@REM
+@REM Ram starts at 0x80000000
+@REM OMAP 3530 TRM defines 0x80008208 as the entry point
+@REM The reset vector is caught by the mask ROM in the OMAP 3530 so that is why this entry
+@REM point looks so strange.
+@REM OMAP 3430 TRM section 26.4.8 has Image header information. (missing in OMAP 3530 TRM)
+@REM
+@cd Tools
+
+ECHO Building tools...
+CALL nmake
+
+ECHO Patching image with ConfigurationHeader.dat
+CALL GenerateImage -D ..\ConfigurationHeader.dat -E 0x80008208 -I %BUILD_ROOT%\FV\BEAGLEBOARD_EFI.fd -O %BUILD_ROOT%\FV\BeagleBoard_EFI_flashboot.fd
+
+ECHO Patching ..\Debugger_scripts ...
+SET DEBUGGER_SCRIPT=..\Debugger_scripts
+@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
+ @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
+)
+
+cd ..
+:Exit
+EXIT /B
+
+:Clean
+cd Tools
+CALL nmake clean
+cd ..
diff --git a/BeagleBoardPkg/ba.bat b/BeagleBoardPkg/ba.bat
index e73d5e061f..24a60e46d8 100755
--- a/BeagleBoardPkg/ba.bat
+++ b/BeagleBoardPkg/ba.bat
@@ -1,68 +1,68 @@
-@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-@REM This program and the accompanying materials
-@REM are licensed and made available under the terms and conditions of the BSD License
-@REM which accompanies this distribution. The full text of the license may be found at
-@REM http://opensource.org/licenses/bsd-license.php
-@REM
-@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-@REM
-
-@REM Example usage of this script. default is a DEBUG build
-@REM b
-@REM b clean
-@REM b release
-@REM b release clean
-@REM b -v -y build.log
-
-ECHO OFF
-@REM Setup Build environment. Sets WORKSPACE and puts build in path
-CALL ..\edksetup.bat
-
-@REM Set for tools chain. Currently ARMGCC
-SET TARGET_TOOLS=ARMGCC
-SET TARGET=DEBUG
+@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+@REM This program and the accompanying materials
+@REM are licensed and made available under the terms and conditions of the BSD License
+@REM which accompanies this distribution. The full text of the license may be found at
+@REM http://opensource.org/licenses/bsd-license.php
+@REM
+@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+@REM
+
+@REM Example usage of this script. default is a DEBUG build
+@REM b
+@REM b clean
+@REM b release
+@REM b release clean
+@REM b -v -y build.log
+
+ECHO OFF
+@REM Setup Build environment. Sets WORKSPACE and puts build in path
+CALL ..\edksetup.bat
+
+@REM Set for tools chain. Currently ARMGCC
+SET TARGET_TOOLS=ARMGCC
+SET TARGET=DEBUG
@if /I "%1"=="RELEASE" (
@REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it
SET TARGET=RELEASE
shift /1
)
-
-SET BUILD_ROOT=%WORKSPACE%\Build\BeagleBoard\%TARGET%_%TARGET_TOOLS%
-
-@REM Build the Beagle Board firmware and creat an FD (FLASH Device) Image.
-CALL build -p BeagleBoardPkg\BeagleBoardPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
-@if ERRORLEVEL 1 goto Exit
-
+
+SET BUILD_ROOT=%WORKSPACE%\Build\BeagleBoard\%TARGET%_%TARGET_TOOLS%
+
+@REM Build the Beagle Board firmware and creat an FD (FLASH Device) Image.
+CALL build -p BeagleBoardPkg\BeagleBoardPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
+@if ERRORLEVEL 1 goto Exit
+
@if /I "%1"=="CLEAN" goto Clean
-
-@REM
-@REM Ram starts at 0x80000000
-@REM OMAP 3530 TRM defines 0x80008208 as the entry point
-@REM The reset vector is caught by the mask ROM in the OMAP 3530 so that is why this entry
-@REM point looks so strange.
-@REM OMAP 3430 TRM section 26.4.8 has Image header information. (missing in OMAP 3530 TRM)
-@REM
-@cd Tools
-
-ECHO Building tools...
-CALL nmake
-
-ECHO Patching image with ConfigurationHeader.dat
-CALL GenerateImage -D ..\ConfigurationHeader.dat -E 0x80008208 -I %BUILD_ROOT%\FV\BEAGLEBOARD_EFI.fd -O %BUILD_ROOT%\FV\BeagleBoard_EFI_flashboot.fd
-
-ECHO Patching ..\Debugger_scripts ...
-SET DEBUGGER_SCRIPT=..\Debugger_scripts
-@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
- @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
-)
-
-cd ..
-:Exit
-EXIT /B
-
-:Clean
-cd Tools
-CALL nmake clean
-cd ..
+
+@REM
+@REM Ram starts at 0x80000000
+@REM OMAP 3530 TRM defines 0x80008208 as the entry point
+@REM The reset vector is caught by the mask ROM in the OMAP 3530 so that is why this entry
+@REM point looks so strange.
+@REM OMAP 3430 TRM section 26.4.8 has Image header information. (missing in OMAP 3530 TRM)
+@REM
+@cd Tools
+
+ECHO Building tools...
+CALL nmake
+
+ECHO Patching image with ConfigurationHeader.dat
+CALL GenerateImage -D ..\ConfigurationHeader.dat -E 0x80008208 -I %BUILD_ROOT%\FV\BEAGLEBOARD_EFI.fd -O %BUILD_ROOT%\FV\BeagleBoard_EFI_flashboot.fd
+
+ECHO Patching ..\Debugger_scripts ...
+SET DEBUGGER_SCRIPT=..\Debugger_scripts
+@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
+ @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
+)
+
+cd ..
+:Exit
+EXIT /B
+
+:Clean
+cd Tools
+CALL nmake clean
+cd ..
diff --git a/Omap35xxPkg/Omap35xxPkg.dec b/Omap35xxPkg/Omap35xxPkg.dec
index 4285ea1850..3503517978 100644
--- a/Omap35xxPkg/Omap35xxPkg.dec
+++ b/Omap35xxPkg/Omap35xxPkg.dec
@@ -1,36 +1,36 @@
-#/** @file
-# Omap35xx SoC package.
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials are licensed and made available under
-# the terms and conditions of the BSD License which accompanies this distribution.
-# The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- DEC_SPECIFICATION = 0x00010005
- PACKAGE_NAME = Omap35xxPkg
- PACKAGE_GUID = D196A631-B7B7-4953-A3EE-0F773CBABF20
- PACKAGE_VERSION = 0.1
-
-################################################################################
-#
-# Include Section - list of Include Paths that are provided by this package.
-# Comments are used for Keywords and Module Types.
-#
-# Supported Module Types:
-# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
-#
-################################################################################
-[Includes.common]
- Include # Root include for the package
-
+#/** @file
+# Omap35xx SoC package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = Omap35xxPkg
+ PACKAGE_GUID = D196A631-B7B7-4953-A3EE-0F773CBABF20
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+ Include # Root include for the package
+
[LibraryClasses]
## @libraryclass Abstract location of basic OMAP components
##
@@ -39,20 +39,20 @@
## @libraryclass Abstract OMAP and ARM DMA, modeled after PCI IO protocol
##
OmapDmaLib|Include/Library/OmapDmaLib.h
-
-
-[Guids.common]
- gOmap35xxTokenSpaceGuid = { 0x24b09abe, 0x4e47, 0x481c, { 0xa9, 0xad, 0xce, 0xf1, 0x2c, 0x39, 0x23, 0x27} }
-
-[PcdsFeatureFlag.common]
-
-[PcdsFixedAtBuild.common]
- gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart|3|UINT32|0x00000202
- gOmap35xxTokenSpaceGuid.PcdOmap35xxGpmcOffset|0x00000000|UINT32|0x00000203
- gOmap35xxTokenSpaceGuid.PcdOmap35xxMMCHS1Base|0x00000000|UINT32|0x00000204
- gOmap35xxTokenSpaceGuid.PcdOmap35xxArchTimer|3|UINT32|0x00000205
- gOmap35xxTokenSpaceGuid.PcdOmap35xxFreeTimer|4|UINT32|0x00000206
- gOmap35xxTokenSpaceGuid.PcdOmap35xxDebugAgentTimer|5|UINT32|0x00000207
- gOmap35xxTokenSpaceGuid.PcdDebugAgentTimerFreqNanoSeconds|77|UINT32|0x00000208
- gOmap35xxTokenSpaceGuid.PcdMmchsTimerFreq100NanoSeconds|1000000|UINT32|0x00000209
-
+
+
+[Guids.common]
+ gOmap35xxTokenSpaceGuid = { 0x24b09abe, 0x4e47, 0x481c, { 0xa9, 0xad, 0xce, 0xf1, 0x2c, 0x39, 0x23, 0x27} }
+
+[PcdsFeatureFlag.common]
+
+[PcdsFixedAtBuild.common]
+ gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart|3|UINT32|0x00000202
+ gOmap35xxTokenSpaceGuid.PcdOmap35xxGpmcOffset|0x00000000|UINT32|0x00000203
+ gOmap35xxTokenSpaceGuid.PcdOmap35xxMMCHS1Base|0x00000000|UINT32|0x00000204
+ gOmap35xxTokenSpaceGuid.PcdOmap35xxArchTimer|3|UINT32|0x00000205
+ gOmap35xxTokenSpaceGuid.PcdOmap35xxFreeTimer|4|UINT32|0x00000206
+ gOmap35xxTokenSpaceGuid.PcdOmap35xxDebugAgentTimer|5|UINT32|0x00000207
+ gOmap35xxTokenSpaceGuid.PcdDebugAgentTimerFreqNanoSeconds|77|UINT32|0x00000208
+ gOmap35xxTokenSpaceGuid.PcdMmchsTimerFreq100NanoSeconds|1000000|UINT32|0x00000209
+