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-rw-r--r--Platform/BroxtonPlatformPkg/BiosId.env35
-rw-r--r--Platform/BroxtonPlatformPkg/BuildAll.sh41
-rw-r--r--Platform/BroxtonPlatformPkg/BuildBios.bat573
-rw-r--r--Platform/BroxtonPlatformPkg/BuildBios.sh339
-rw-r--r--Platform/BroxtonPlatformPkg/BuildIFWI.bat187
-rw-r--r--Platform/BroxtonPlatformPkg/BuildIFWI.sh161
-rw-r--r--Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc4
-rw-r--r--Platform/BroxtonPlatformPkg/PlatformPkg.dec318
-rw-r--r--Platform/BroxtonPlatformPkg/PlatformPkg.fdf1112
-rw-r--r--Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc179
-rw-r--r--Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc181
-rw-r--r--Platform/BroxtonPlatformPkg/cln.sh63
12 files changed, 3193 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/BiosId.env b/Platform/BroxtonPlatformPkg/BiosId.env
new file mode 100644
index 0000000000..e7eda3d4cf
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/BiosId.env
@@ -0,0 +1,35 @@
+## @file
+# This file is used to define the BIOS ID parameters of the build.
+# This file is processed by GenBiosId.
+# Here, it is just a template and can be customized by user.
+# The BIOS ID format conforms to "BIOS Revision Identification Specification", Rev. 2.0, 01/30/2015.
+#
+# BIOS ID string format:
+# $(BOARD_ID)$(BOARD_REV).$(BOARD_EXT).$(VERSION_MAJOR).$(BUILD_TYPE)$(VERSION_MINOR).YYMMDDHHMM
+# All fields must have a fixed length. YYMMDDHHMM is UTC time.
+# Example: "TRFTCRB1.000.0008.D03.1501301017"
+#
+# If DATE is specified for YYMMDD and TIME is specified for HHMM like below,
+# GenBiosId will use the value of DATE and TIME to fill YYMMDDHHMM,
+# otherwise GenBiosId will fill YYMMDDHHMM with current UTC time of the build machine.
+# DATE = 150130
+# TIME = 1017
+#
+# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+BOARD_ID = APLKRVP
+BOARD_REV = 3
+OEM_ID = X64
+BUILD_TYPE = D
+VERSION_MAJOR = 0060
+VERSION_MINOR = 01
diff --git a/Platform/BroxtonPlatformPkg/BuildAll.sh b/Platform/BroxtonPlatformPkg/BuildAll.sh
new file mode 100644
index 0000000000..2a2afd686d
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/BuildAll.sh
@@ -0,0 +1,41 @@
+##**********************************************************************
+## Function define
+##**********************************************************************
+function Usage() {
+ echo
+ echo "Usage: BuildAll.bat [/ia32 | /x64] "
+ echo
+ echo "If NO flags, both are built. "
+ echo
+ echo " /ia32 Build only 32 bit "
+ echo " /x64 Build only 64 bit "
+ echo
+ echo "Press any key...... "
+ read
+ exit 0
+}
+
+##
+## This script will attempt all the critical build combinations
+## (it will not build all combination, as there are way to many)
+##
+
+##
+## If you think a need build combination is missing, please add it below
+##
+
+echo
+if [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/x64" ]; then
+ ./BuildIFWI.sh /q /vp /x64 APLK debug
+ ./BuildIFWI.sh /q /vp /x64 BXTM debug
+ ./BuildIFWI.sh /q /vp /x64 /csle BXTM debug
+ ./BuildIFWI.sh /q /vp /x64 /sv BXTM debug
+ ./BuildIFWI.sh /q /vp /x64 APLK release
+ ./BuildIFWI.sh /q /vp /x64 BXTM release
+
+else
+ ./BuildIFWI.sh /q /vp APLK debug
+ ./BuildIFWI.sh /q /vp BXTM debug
+ ./BuildIFWI.sh /q /vp APLK release
+ ./BuildIFWI.sh /q /vp BXTM release
+fi \ No newline at end of file
diff --git a/Platform/BroxtonPlatformPkg/BuildBios.bat b/Platform/BroxtonPlatformPkg/BuildBios.bat
new file mode 100644
index 0000000000..900083b640
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/BuildBios.bat
@@ -0,0 +1,573 @@
+@echo off
+::echo on
+setlocal EnableDelayedExpansion EnableExtensions
+echo.
+echo %date% %time%
+echo.
+
+::**********************************************************************
+:: Initial Setup
+::**********************************************************************
+set WORKSPACE=%CD%
+if %WORKSPACE:~-1%==\ (
+ set WORKSPACE=%WORKSPACE:~0,-1%
+)
+set CORE_PATH=%WORKSPACE%\Core
+set PLATFORM_PATH=Platform\BroxtonPlatformPkg
+set SILICON_PATH=Silicon\BroxtonSoC
+set AslPath=%WORKSPACE%\%PLATFORM_PATH%\Common\Tools\Iasl\iasl.exe
+set PACKAGES_PATH=%CORE_PATH%;%WORKSPACE%\Silicon\;%WORKSPACE%\Platform;%WORKSPACE%\%PLATFORM_PATH%;%WORKSPACE%\%SILICON_PATH%;%WORKSPACE%\%PLATFORM_PATH%\Common ;
+set EDK_TOOLS_BIN=%WORKSPACE%\BaseTools\Bin\Win32
+set /a build_threads=1
+set "Nasm_Flags=-D ARCH_IA32 -D DEBUG_PORT80"
+set "Build_Flags= "
+set exitCode=0
+set Arch=X64
+set Compiler=VS2013
+set Stepping=B
+if not defined BiosVersion set BiosVersion=DEV
+
+
+:: Clean up previous build files.
+echo Clean up old build files...
+if exist %WORKSPACE%\edk2.log del %WORKSPACE%\edk2.log
+if exist %WORKSPACE%\unitool.log del %WORKSPACE%\unitool.log
+if exist %WORKSPACE%\Conf\target.txt del %WORKSPACE%\Conf\target.txt
+if exist %WORKSPACE%\Conf\tools_def.txt del %WORKSPACE%\Conf\tools_def.txt
+if exist %WORKSPACE%\Conf\build_rule.txt del %WORKSPACE%\Conf\build_rule.txt
+if exist %WORKSPACE%\Conf\FrameworkDatabase.db del %WORKSPACE%\Conf\FrameworkDatabase.db
+if exist %WORKSPACE%\Stitch\*.bin del %WORKSPACE%\Stitch\*.bin
+if exist conf\.cache rmdir /q/s conf\.cache
+
+
+:: Override tools_def.txt
+echo Creating Conf folder and build config files...
+if not exist %WORKSPACE%\Conf md %WORKSPACE%\Conf
+copy /y %CORE_PATH%\BaseTools\Conf\*.template %WORKSPACE%\Conf\*.txt
+copy /y %WORKSPACE%\%PLATFORM_PATH%\DeviceCommonPkg\Override\BaseTools\Conf\tools_def.template %WORKSPACE%\Conf\tools_def.txt
+
+:: Setup EDK environment. Edksetup puts new copies of target.txt, tools_def.txt, build_rule.txt in WorkSpace\Conf
+:: Also run edksetup as soon as possible to avoid it from changing environment variables we're overriding
+set "VCINSTALLDIR="
+set EDK_TOOLS_PATH=%CORE_PATH%\BaseTools
+call edksetup.bat
+@echo off
+
+set Minnow_RVP=MINN
+
+:: Initialize all the build flags to FALSE
+:: Then based on the cmd line input, some will be set to TRUE prior to building.
+:: Note: These variable names match the actual Build Macro names in DSC for clarity.
+set ENBDT_PF_BUILD=FALSE
+set SrcDebug=FALSE
+set APLK_SETUP_ENABLE_BUILD=FALSE
+set FSP_BUILD=FALSE
+set FSP_WRAPPER=FALSE
+
+:: Set Defaults of platform specific environment variables.
+set EFI_SOURCE=%CD%
+set EDK_SOURCE=%CD%
+set PLATFORM_NAME=BxtPlatformPkg
+set PLATFORM_PACKAGE=%PLATFORM_PATH%\BxtPlatformPkg
+set PLATFORM_RC_PACKAGE=Silicon\BroxtonSoC\BroxtonSiPkg
+set COMMON_PLATFORM_PACKAGE=%PLATFORM_PATH%\BxtPlatformPkg
+set FSP_BIN_PKG_NAME=BroxtonFspBinPkg
+set STITCH_PATH=%WORKSPACE%\%PLATFORM_PATH%\Common\Tools\Stitch
+
+PATH=%PATH%;%WORKSPACE%\%PLATFORM_PATH%\Common\Tools\GenBiosId;%WORKSPACE%\%PLATFORM_PATH%\Common\Tools\nasm\Win32
+PATH=%PATH%;%WORKSPACE%\%PLATFORM_PATH%\Common\Tools\FCE;%WORKSPACE%\%PLATFORM_PATH%\Common\Tools\nasm\Win32
+
+::**********************************************************************
+:: Parse command line arguments
+::**********************************************************************
+
+:: Optional arguments
+:OptLoop
+if /i "%~1"=="" goto Usage
+if /i "%~1"=="/?" goto Usage
+
+if /i "%~1"=="/l" (
+ set Build_Flags=%Build_Flags% -j EDK2.log
+ shift
+ goto OptLoop
+)
+if /i "%~1" == "/c" (
+ echo Removing previous Build files...
+ if exist build (
+ del /f/s/q build > nul
+ rmdir /s/q build
+ )
+ if exist Conf\.cache (
+ del /f/s/q Conf\.cache > nul
+ rmdir /s/q Conf\.cache
+ )
+ echo.
+ shift
+ goto OptLoop
+)
+
+if /i "%~1"=="/ia32" (
+ set Arch=IA32
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/x64" (
+ set Arch=X64
+ shift
+ goto OptLoop
+)
+
+if /i "%~1"=="/vs08" (
+ set Compiler=VS2008
+ echo.
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs10" (
+ set Compiler=VS2010
+ echo.
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs12" (
+ set Compiler=VS2012
+ echo.
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs13" (
+ set Compiler=VS2013
+ echo.
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs15" (
+ set Compiler=VS2015
+ echo.
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/FspW" (
+ set FSP_WRAPPER=TRUE
+ echo.
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/A" (
+ set Stepping=A
+ echo.
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/B" (
+ set Stepping=B
+ echo.
+ shift
+ goto OptLoop
+)
+
+:: Required argument(s)
+if "%~2"=="" (
+ echo. & echo -- ERROR: Not Enough Arguments Provided
+ echo -- Please review the Help screen "/?" -- & echo.
+ goto ExitFail
+)
+
+echo. & echo -- Setting compiler to %Compiler% -- & echo.
+
+:: BOARD_ID needs to be exactly 7 characters (GenBiosId.exe limitation)
+echo Setting %1 platform configuration and BIOS ID...
+if /i "%~1" == "%Minnow_RVP%" (
+ set BOARD_ID=MINNOWV
+ set ENBDT_PF_BUILD=TRUE
+ set PLATFORM_NAME=BroxtonPlatformPkg
+ set PLATFORM_PACKAGE=%PLATFORM_PATH%
+ set APLK_SETUP_ENABLE_BUILD=TRUE
+) else (
+ echo. & echo Error - Unsupported PlatformType: %1
+ echo Please review the Help screen "/?" & echo.
+ goto ExitFail
+)
+set Platform_Type=%~1
+
+::
+:: Tack on BIOS Version
+::
+
+::**********************************************************************
+:: Additional EDK Build Setup/Configuration
+::**********************************************************************
+
+::Setup DefineAtBuildMacros config file
+set Build_Macros=.\%PLATFORM_PACKAGE%\DefineAtBuildMacros.dsc
+copy /y nul %Build_Macros% >nul
+
+::output platform specific build macros to DefineAtBuildMacros.dsc
+echo DEFINE ENBDT_PF_BUILD = %ENBDT_PF_BUILD% >> %Build_Macros%
+echo DEFINE SOURCE_DEBUG_ENABLE = %SrcDebug% >> %Build_Macros%
+echo DEFINE APLK_SETUP_ENABLE_BUILD = %APLK_SETUP_ENABLE_BUILD% >> %Build_Macros%
+
+if "%Arch%"=="IA32" (
+ echo DEFINE X64_CONFIG = FALSE >> %Build_Macros%
+) else if "%Arch%"=="X64" (
+ echo DEFINE X64_CONFIG = TRUE >> %Build_Macros%
+)
+
+::Stage of copy of BiosId.env in Conf/ with Platform_Type and Build_Target values removed
+
+if "%Arch%"=="X64" (
+ findstr /b /v "BOARD_ID BUILD_TYPE" %PLATFORM_PACKAGE%\BiosId.env > Conf\BiosId.env
+) else if "%Arch%"=="IA32" (
+ findstr /b /v "BOARD_ID BUILD_TYPE OEM_ID" %PLATFORM_PACKAGE%\BiosId.env > Conf\BiosId.env
+ echo OEM_ID = I32 >> Conf\BiosId.env
+)
+
+if /i "%~2" == "RELEASE" (
+ set target=RELEASE
+ echo BUILD_TYPE = R >> Conf\BiosId.env
+) else (
+ set target=DEBUG
+ echo BUILD_TYPE = D >> Conf\BiosId.env
+)
+
+:: Set the Build_Type, Version_Major, and Version_Minor environment variables
+find /v "#" Conf\BiosId.env > ver_strings
+for /f "tokens=1,3" %%i in (ver_strings) do set %%i=%%j
+del /f/q ver_strings >nul
+:: Do this after parsing "ver_strings"
+echo BOARD_ID = %BOARD_ID% >> Conf\BiosId.env
+
+echo.
+echo Setting the Build environment for Visual Studio...
+if "%Compiler%"=="VS2008" (
+ if defined VS90COMNTOOLS (
+ call "%VS90COMNTOOLS%\vsvars32.bat" >nul
+ if /I "%VS90COMNTOOLS%" == "C:\Program Files\Microsoft Visual Studio 9.0\Common7\Tools\" (
+ set TOOL_CHAIN_TAG=VS2008
+ ) else set TOOL_CHAIN_TAG=VS2008x86
+ ) else (
+ echo --ERROR: VS2008 not installed correctly. VS90COMNTOOLS not defined ^^!
+ goto BldFail
+ )
+) else if "%Compiler%"=="VS2010" (
+ if defined VS100COMNTOOLS (
+ call "%VS100COMNTOOLS%\vsvars32.bat" >nul
+ if /I "%VS100COMNTOOLS%" == "C:\Program Files\Microsoft Visual Studio 10.0\Common7\Tools\" (
+ set TOOL_CHAIN_TAG=VS2010
+ ) else set TOOL_CHAIN_TAG=VS2010x86
+ ) else (
+ echo --ERROR: VS2010 not installed correctly. VS100COMNTOOLS not defined ^^!
+ goto BldFail
+ )
+) else if "%Compiler%"=="VS2012" (
+ if defined VS110COMNTOOLS (
+ call "%VS110COMNTOOLS%\vsvars32.bat" >nul
+ if /I "%VS110COMNTOOLS%" == "C:\Program Files\Microsoft Visual Studio 11.0\Common7\Tools\" (
+ set TOOL_CHAIN_TAG=VS2012
+ ) else set TOOL_CHAIN_TAG=VS2012x86
+ ) else (
+ echo --ERROR: VS2012 not installed correctly. VS110COMNTOOLS not defined ^^!
+ goto BldFail
+ )
+) else if "%Compiler%"=="VS2013" (
+ if defined VS120COMNTOOLS (
+ call "%VS120COMNTOOLS%\vsvars32.bat" >nul
+ if /I "%VS120COMNTOOLS%" == "C:\Program Files\Microsoft Visual Studio 12.0\Common7\Tools\" (
+ set TOOL_CHAIN_TAG=VS2013
+ ) else set TOOL_CHAIN_TAG=VS2013x86
+ ) else (
+ echo --ERROR: VS2013 not installed correctly. VS120COMNTOOLS not defined ^^!
+ echo See help ^(/?^) for how specify a different VS version.
+ goto BldFail
+ )
+) else if "%Compiler%"=="VS2015" (
+ if defined VS140COMNTOOLS (
+ call "%VS140COMNTOOLS%\vsvars32.bat" >nul
+ if /I "%VS140COMNTOOLS%" == "C:\Program Files\Microsoft Visual Studio 14.0\Common7\Tools\" (
+ set TOOL_CHAIN_TAG=VS2015
+ ) else set TOOL_CHAIN_TAG=VS2015x86
+
+ ) else (
+ echo --ERROR: VS2015 not installed correctly. VS140COMNTOOLS not defined ^^!
+ echo See help ^(/?^) for how specify a different VS version.
+ goto BldFail
+ )
+)
+
+::**********************************************************************
+:: Build BIOS
+::**********************************************************************
+
+echo Setup build directory for GenBiosId...
+set BUILD_PATH=Build\%PLATFORM_NAME%\%TARGET%_%TOOL_CHAIN_TAG%
+if not exist %BUILD_PATH%\IA32 mkdir %BUILD_PATH%\IA32
+
+echo Creating BiosId...
+GenBiosId.exe -i Conf\BiosId.env -o %BUILD_PATH%\IA32\BiosId.bin -ob Conf\BiosId.bat
+if "%Arch%"=="X64" (
+ if not exist %BUILD_PATH%\X64 mkdir %BUILD_PATH%\X64
+ GenBiosId.exe -i Conf\BiosId.env -o %BUILD_PATH%\X64\BiosId.bin -ob Conf\BiosId.bat
+) else if "%Arch%"=="IA32" (
+ if not exist %BUILD_PATH%\IA32 mkdir %BUILD_PATH%\IA32
+ GenBiosId.exe -i Conf\BiosId.env -o %BUILD_PATH%\IA32\BiosId.bin -ob Conf\BiosId.bat
+)
+
+if ErrorLevel 1 goto BldFail
+
+echo Building ResetVector...
+
+set ResetVectorPath=%WORKSPACE%\%PLATFORM_RC_PACKAGE%\Cpu\ResetVector
+pushd %ResetVectorPath%\Vtf1
+ nasm.exe %Nasm_Flags% -o Bin\ResetVector.ia32.port80.raw ResetVectorCode.asm
+ python %CORE_PATH%\UefiCpuPkg\ResetVector\Vtf0\Tools\FixupForRawSection.py Bin\ResetVector.ia32.port80.raw
+popd
+
+:: SaveWorkSpace w/a is needed when using subst for Workspace builds (eg. R:/)
+set SaveWorkSpace=%WORKSPACE%
+set WORKSPACE=%CD%
+if "%Arch%"=="X64" (
+set ActivePlatform=%PLATFORM_PACKAGE%\PlatformPkgX64.dsc
+) else if "%Arch%"=="IA32" (
+set ActivePlatform=%PLATFORM_PACKAGE%\PlatformPkgIA32.dsc
+)
+
+echo Modifying Conf files for this build...
+:: Remove lines with these tags from target.txt
+findstr /V "TARGET TARGET_ARCH TOOL_CHAIN_TAG ACTIVE_PLATFORM MAX_CONCURRENT_THREAD_NUMBER" Conf\target.txt > Conf\target.txt.tmp
+
+if "%Arch%"=="IA32" (
+ echo TARGET_ARCH = IA32 >> Conf\target.txt.tmp
+) else if "%Arch%"=="X64" (
+ echo TARGET_ARCH = IA32 X64 >> Conf\target.txt.tmp
+)
+echo TARGET = %TARGET% >> Conf\target.txt.tmp
+echo TOOL_CHAIN_TAG = %TOOL_CHAIN_TAG% >> Conf\target.txt.tmp
+echo ACTIVE_PLATFORM = %ActivePlatform% >> Conf\target.txt.tmp
+echo MAX_CONCURRENT_THREAD_NUMBER = %build_threads% >> Conf\target.txt.tmp
+
+move /Y Conf\target.txt.tmp Conf\target.txt >nul
+echo *_VS2008x86_*_ASL_PATH = %AslPath% >> Conf\tools_def.txt
+echo *_VS2010x86_*_ASL_PATH = %AslPath% >> Conf\tools_def.txt
+echo *_VS2012x86_*_ASL_PATH = %AslPath% >> Conf\tools_def.txt
+echo *_VS2013x86_*_ASL_PATH = %AslPath% >> Conf\tools_def.txt
+echo *_VS2015x86_*_ASL_PATH = %AslPath% >> Conf\tools_def.txt
+
+echo.
+echo Invoking normal EDK2 build...
+build %Build_Flags%
+if ErrorLevel 1 goto BldFail
+
+set WORKSPACE=%SaveWorkSpace%
+
+::**********************************************************************
+:: Post Build processing and cleanup
+::**********************************************************************
+echo Create FlashMap.h...
+
+set PLAT_INIT_PRE_MEM=PlatformPreMemPei
+
+set AutoGenPath=%BUILD_PATH%\IA32\BroxtonPlatformPkg\Common\PlatformSettings\PlatformPreMemPei\%PLAT_INIT_PRE_MEM%\DEBUG\AutoGen.h
+
+if not exist "%AutoGenPath%" (
+ echo ERROR: Couldn't find %AutoGenPath% so we can generate FlashMap.h
+ goto BldFail
+)
+findstr /L "_PCD_VALUE_" %AutoGenPath% > %STITCH_PATH%\FlashMap.h
+
+echo Running FCE...
+:: Extract Hii data from build and store a copy in HiiDefaultData.txt
+fce.exe read -i %BUILD_PATH%\FV\Soc.fd > %BUILD_PATH%\FV\HiiDefaultData.txt 2>>EDK2.log
+:: Generate the Setup variable and save changes to BxtXXX.fd
+fce.exe update -i %BUILD_PATH%\FV\Soc.fd -s %BUILD_PATH%\FV\HiiDefaultData.txt -o %BUILD_PATH%\FV\Bxt%Arch%.fd 1>>EDK2.log 2>&1
+
+if ErrorLevel 1 goto BldFail
+
+@echo off
+
+:: Translate Release Build Type
+if "%BUILD_TYPE%"=="R" set BUILD_TYPE=R
+
+echo Copy BIOS...
+set BIOS_Name=%BOARD_ID%_%Arch%_%BUILD_TYPE%_%VERSION_MAJOR%_%VERSION_MINOR%
+copy /y/b %BUILD_PATH%\FV\Bxt%Arch%.fd %STITCH_PATH%\%BIOS_Name%.ROM >nul
+copy /y %STITCH_PATH%\FlashMap.h %STITCH_PATH%\%BIOS_Name%.map >nul
+
+set Storage_Folder=%STITCH_PATH%\%BIOS_Name%
+if not exist %Storage_Folder% mkdir %Storage_Folder%
+
+copy /y/b %BUILD_PATH%\FV\FvIBBL.fv %Storage_Folder% >nul
+copy /y/b %BUILD_PATH%\FV\FvIBBM.fv %Storage_Folder% >nul
+copy /y/b %BUILD_PATH%\FV\FvIBBR.fv %Storage_Folder% >nul
+copy /y/b %BUILD_PATH%\FV\FvOBB.fv %Storage_Folder% >nul
+copy /y/b %BUILD_PATH%\FV\FvOBBX.fv %Storage_Folder% >nul
+copy /y/b %BUILD_PATH%\FV\FvOBBY.fv %Storage_Folder% >nul
+
+if /i "%FSP_WRAPPER%" == "TRUE" (
+ if %Stepping%==B (
+ pushd %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin
+ python %WORKSPACE%\IntelFsp2Pkg\Tools\SplitFspBin.py rebase -f ApolloLakeFsp.fd -c m -b 0xFEF65000 -o .\ -n FSP.fd
+ python %WORKSPACE%\IntelFsp2Pkg\Tools\SplitFspBin.py split -f FSP.fd -o .\ -n FSP.Fv
+ popd
+ copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin\FSP_T.Fv %Storage_Folder%\FSP_T.Fv
+ copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin\FSP_M.Fv %Storage_Folder%\FSP_M.Fv
+ copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin\FSP_S.Fv %Storage_Folder%\FSP_S.Fv
+ ) else (
+ pushd %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspGold\FSP
+ python %WORKSPACE%\IntelFsp2Pkg\Tools\SplitFspBin.py split -f FSP.fd -o .\ -n FSP.Fv
+ popd
+ copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspGold\FSP\FSP_T.Fv %Storage_Folder%\FSP_T.Fv
+ copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspGold\FSP\FSP_M.Fv %Storage_Folder%\FSP_M.Fv
+ copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspGold\FSP\FSP_S.Fv %Storage_Folder%\FSP_S.Fv
+ )
+)
+
+echo Get NvStorage Base and Size...
+if not exist "%STITCH_PATH%\FlashMap.h" (
+ echo ERROR: Couldn't find %STITCH_PATH%\FlashMap.h
+ goto BldFail
+)
+
+::generate NvStorage.Fv
+:: %STITCH_PATH%\FlashMap.h has the information for the magic numbers below. Parse it.
+:: You'll need to account for both hex (0x000000) and int (1234567U) value types
+:: FLASH_REGION_VPD_OFFSET
+:: _PCD_VALUE_PcdFlashNvStorageBase - _PCD_VALUE_PcdFlashBaseAddress
+:: FLASH_REGION_VPD_SIZE + FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE + FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE
+:: _PCD_VALUE_PcdFlashNvStorageSize
+::
+:: PCD to find Variable File to search
+::===========================================================================================
+ call :FindPcdInFile _PCD_VALUE_PcdFlashNvStorageBase NvStorageBase "%STITCH_PATH%\FlashMap.h"
+ call :FindPcdInFile _PCD_VALUE_PcdFlashBaseAddress BaseAddress "%STITCH_PATH%\FlashMap.h"
+ call :FindPcdInFile _PCD_VALUE_PcdFlashNvStorageSize NvStorageSize "%STITCH_PATH%\FlashMap.h"
+:: Find image offset as opposed to memory offset
+ PowerShell ($env:NvStorageBase - $env:BaseAddress) > temp.pcd
+ set /p VpdOffset=<temp.pcd
+ del /f /q temp.pcd
+:: Force the variables we care about into DEC string format
+ set VpdSize=%NvStorageSize%
+ call :ForceToDec VpdOffset
+ call :ForceToDec VpdSize
+:: Dump what we found
+ echo - NvStorageBase = %NvStorageBase%
+ echo - BaseAddress = %BaseAddress%
+ echo - NvStorageSize = %NvStorageSize%
+ echo - VpdOffset = %VpdOffset%
+ echo - VpdSize = %VpdSize%
+
+:: Create NvStorage.fv
+ echo Create NvStorage.fv...
+ pushd %STITCH_PATH%
+ REM This -s offset must equal the decimal value of FLASH_REGION_VPD_OFFSET in the Platform.fdf
+ Split.exe -f %STITCH_PATH%\%BIOS_Name%.ROM -s %VpdOffset% -o temp1.bin -t temp2.bin
+ REM This -s offset must equal the decimal value of
+ REM FLASH_REGION_VPD_SIZE + FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE + FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE
+ Split.exe -f temp2.bin -s %VpdSize% -o %Storage_Folder%\NvStorage.Fv -t temp3.bin
+ del /F/Q temp1.bin temp2.bin temp3.bin
+ popd
+
+echo.
+echo Build location: %BUILD_PATH%
+echo BIOS ROM Created: %BIOS_Name%
+echo.
+echo --------------- The EDKII BIOS build has successfully completed. ---------------
+echo.
+goto Exit
+
+::
+:: Find PCD value (%~1) in a file (%~3) and return it in a variable (%~2) as a HEX string
+::
+:: USAGE: call :FindPcdInFile PCD Variable File
+:FindPcdInFile
+ call :GetPcd "%~1" "%~2" "%~3"
+ call :ForceToHex "%~2"
+goto :EOF
+
+::
+:: Find PCD value (%~1) in a file (%~3) and return it in a variable (%~2)
+::
+:: USAGE: call :GetPcd PCD Variable File
+:GetPcd
+ set _TargetFile=%~3
+ if not exist "%_TargetFile%" (
+ echo ERROR: Couldn't find %_TargetFile%^!
+ set ExitCode=1
+ ) else (
+ for /f "tokens=3" %%a in ('findstr /C:"%~1" "%_TargetFile%"') do (
+ set _TestValue=%%~a
+ set _PcdValue=!_TestValue:~0,-1!
+ )
+ set %~2=!_PcdValue!
+ echo %2 %_PcdValue%
+ )
+ set _TargetFile=
+ set _TestValue=
+ set _PcdValue=
+goto :EOF
+
+::
+:: Force value of %1 into hex format 0x1234
+::
+:: USAGE: call :ForceToHex Variable
+:ForceToHex
+ call set _Temp=%%%~1%%
+ if "%_Temp:~0,2%" == "0x" goto :ForceToHexExit
+ PowerShell ('0x' + [convert]::tostring($env:_Temp, 16).ToUpper()) > temp.pcd
+ set /p %~1=<temp.pcd
+ del /f /q temp.pcd
+:ForceToHexExit
+ set _Temp=
+goto :EOF
+
+::
+:: Force value of %1 into decimal format
+::
+:: USAGE: call :ForceToDec Variable
+:ForceToDec
+ call set _Temp=%%%~1%%
+ if not "%_Temp:~0,2%" == "0x" goto :ForceToDecExit
+ PowerShell ([convert]::toInt64((Get-Item env:_Temp).value, 16)) > temp.pcd
+ set /p %~1=<temp.pcd
+ del /f /q temp.pcd
+:ForceToDecExit
+ set _Temp=
+goto :EOF
+
+:Usage
+echo.
+echo ***************************************************************************
+echo Build BIOS Rom for BXT platforms.
+echo.
+echo Usage: BuildBios.bat [options] ^<PlatformType^> ^<BuildTarget^>
+echo.
+echo. /? Display this help text
+echo /l Log a copy of the build output to EDK2.log
+echo /c CleanAll before building
+echo /x64 Set Arch to X64 (default)
+echo /ia32 Set Arch to IA32
+echo /vs08 Set compiler to VisualStudio 2008
+echo /vs10 Set compiler to VisualStudio 2010
+echo /vs12 Set compiler to VisualStudio 2012
+echo /vs13 Set compiler to VisualStudio 2013 (default)
+echo /vs15 Set compiler to VisualStudio 2015
+echo Platform Types: %Minnow_RVP%
+echo Build Targets: Debug, Release
+echo.
+echo ***************************************************************************
+:ExitFail
+echo.
+set exitCode=1
+goto Exit
+
+:BldFail
+set exitCode=1
+echo -- Error: EDKII BIOS Build has failed!
+echo See EDK2.log for more details
+
+:Exit
+echo %date% %time%
+(
+ EndLocal
+ set BiosVersion=%BiosVersion%
+ exit /b %ExitCode%
+)
diff --git a/Platform/BroxtonPlatformPkg/BuildBios.sh b/Platform/BroxtonPlatformPkg/BuildBios.sh
new file mode 100644
index 0000000000..be44009035
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/BuildBios.sh
@@ -0,0 +1,339 @@
+##**********************************************************************
+## Function define
+##**********************************************************************
+function ErrorExit() {
+ echo
+ echo "Press any key......"
+ read
+ exit 0
+}
+
+echo -e $(date)
+##**********************************************************************
+## Initial Setup
+##**********************************************************************
+#WORKSPACE=$(pwd)
+EDK_TOOLS_PATH=
+Build_Flags=
+SV_String=_
+exitCode=0
+Arch=IA32
+
+## Initialize all the build flags to FALSE
+## depending on the cmd line input, some will be set to TRUE prior to building
+ENBDT_PF_BUILD=FALSE
+TABLET_PF_BUILD=FALSE
+BYTI_PF_BUILD=FALSE
+CSLE_ENABLE=FALSE
+VP_BIOS_ENABLE=FALSE
+SV_BIOS_ENABLE=FALSE
+PPV_BIOS_ENABLE=FALSE
+RVVP_BIOS_ENABLE=FALSE
+RVV_BIOS_ENABLE=FALSE
+SrcDebug=FALSE
+
+## Clean up previous build files.
+if [ -e $(pwd)/EDK2.log ]; then
+ rm $(pwd)/EDK2.log
+fi
+
+if [ -e $(pwd)/Unitool.log ]; then
+ rm $(pwd)/Unitool.log
+fi
+
+if [ -e $(pwd)/Conf/target.txt ]; then
+ rm $(pwd)/Conf/target.txt
+fi
+
+if [ -e $(pwd)/Conf/BiosId.env ]; then
+ rm $(pwd)/Conf/BiosId.env
+fi
+
+if [ -e $(pwd)/Conf/build_rule.txt ]; then
+ rm $(pwd)/Conf/build_rule.txt
+fi
+
+if [ -e $(pwd)/FlashMap.h ]; then
+ rm $(pwd)/FlashMap.h
+fi
+
+## Override tools_def.txt
+#cp $WORKSPACE\BaseTools\Conf\tools_def.template $WORKSPACE\Conf\tools_def.txt
+
+## Setup EDK environment. Edksetup puts new copies of target.txt, tools_def.txt, build_rule.txt in WorkSpace\Conf
+## Also run edksetup as soon as possible to avoid it from changing environment variables we're overriding
+##. edksetup.sh > /dev/null
+. edksetup.sh
+
+## Get gcc version to determine which tool_def.template to use.
+## If gcc version is 4.6 or before, use default. If not, use new one.
+GCCVERSION=$(gcc --version | grep 'gcc' | grep '[0-9]' | cut -d ' ' -f 4 | cut -d '.' -f 2)
+if (($GCCVERSION > 6)); then
+ echo "GCC version is 4.7 or after"
+ TOOL_CHAIN_TAG=GCC47
+else
+ echo "Type 'gcc --version' to check version"
+ echo "Please update GCC version to 4.7 or later"
+ ErrorExit
+fi
+
+#make -C BaseTools > /dev/null
+make -C BaseTools
+
+## Define platform specific environment variables.
+PLATFORM_NAME=BxtPlatformPkg
+PLATFORM_PACKAGE=Platform/BxtPlatformPkg
+EFI_SOURCE=$WORKSPACE
+EDK_SOURCE=$WORKSPACE
+
+##**********************************************************************
+## Parse command line arguments
+##**********************************************************************
+
+## Optional arguments
+for (( i=1; i<=$#; ))
+ do
+ if [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/Q" ]; then
+ Build_Flags="$Build_Flags --quiet"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/L" ]; then
+ Build_Flags="$Build_Flags -j EDK2.log"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/C" ]; then
+ echo "Removing previous Build files..."
+ if [ -d "Build" ]; then
+ rm -r Build
+ fi
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/W" ]; then
+ SrcDebug=TRUE
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/SV" ]; then
+ SV_BIOS_ENABLE=TRUE
+ SV_String=_SV_
+ Arch=X64
+ echo "-- Forcing to 64-bit for SV build --"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/PPV" ]; then
+ PPV_BIOS_ENABLE=TRUE
+ SV_String=_PPV_
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/RVVP" ]; then
+ RVVP_BIOS_ENABLE=TRUE
+ SV_String=_RVVP_
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/RVV" ]; then
+ RVV_BIOS_ENABLE=TRUE
+ SV_String=_RVV_
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/X64" ]; then
+ Arch=X64
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/VP" ]; then
+ VP_BIOS_ENABLE=TRUE
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/CSLE" ]; then
+ CSLE_ENABLE=TRUE
+ shift
+ else
+ break
+ fi
+ done
+
+## Required argument(s)
+if [ "$2" == "" ]; then
+ echo
+ echo "Not Enough Arguments Provided"
+ echo "Please review the Help screen "/?""
+ ErrorExit
+fi
+
+## Remove the values for Platform_Type and Build_Target from BiosId.env and stage in Conf/
+cp $PLATFORM_PACKAGE/BiosId.env Conf/BiosId.env
+sed -i '/^BOARD_ID/d' Conf/BiosId.env
+sed -i '/^BUILD_TYPE/d' Conf/BiosId.env
+
+## BOARD_ID needs to be exactly 7 characters (GenBiosId.exe limitation)
+echo "Setting $1 platform configuration and BIOS ID..."
+if [ "$(echo $1 | tr 'a-z' 'A-Z')" == "$eNB_RVP" ]; then ## Lower case to upper case
+ BOARD_ID="$eNB_RVP"RVP
+ echo BOARD_ID = "$eNB_RVP"RVP >> Conf/BiosId.env
+ ENBDT_PF_BUILD=TRUE
+ PLATFORM_NAME=AplPlatSamplePkg
+ PLATFORM_PACKAGE=Platform/AplPlatSamplePkg
+
+elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "$Phblt_RVP" ]; then
+ BOARD_ID="$Phblt_RVP"RVP
+ echo BOARD_ID = "$Phblt_RVP"RVP >> Conf/BiosId.env
+ TABLET_PF_BUILD=TRUE
+
+elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "$Embd_RVP" ]; then
+ BOARD_ID="$Embd_RVP"RVP
+ echo BOARD_ID = "$Embd_RVP"RVP >> Conf/BiosId.env
+ BYTI_PF_BUILD=TRUE
+ PLATFORM_PACKAGE=Platform/IsgPlatPkg
+
+else
+ echo "Error - Unsupported PlatformType: $1"
+ echo "Please review the Help screen "/?""
+ ErrorExit
+fi
+
+Platform_Type=$1
+
+## Create new DefineAtBuildMacros.dsc file
+Build_Macros=$WORKSPACE/$PLATFORM_PACKAGE/DefineAtBuildMacros.dsc
+if [ -f "$Build_Macros" ]; then
+ rm $Build_Macros
+fi
+touch $Build_Macros
+
+## Output platform specific build macros to DefineAtBuildMacros.dsc
+echo DEFINE ENBDT_PF_BUILD = $ENBDT_PF_BUILD >> $Build_Macros
+echo DEFINE TABLET_PF_BUILD = $TABLET_PF_BUILD >> $Build_Macros
+echo DEFINE BYTI_PF_BUILD = $BYTI_PF_BUILD >> $Build_Macros
+echo DEFINE CSLE_ENABLE = $CSLE_ENABLE >> $Build_Macros
+echo DEFINE VP_BIOS_ENABLE = $VP_BIOS_ENABLE >> $Build_Macros
+echo DEFINE SV_BIOS_ENABLE = $SV_BIOS_ENABLE >> $Build_Macros
+echo DEFINE PPV_BIOS_ENABLE = $PPV_BIOS_ENABLE >> $Build_Macros
+echo DEFINE RVVP_BIOS_ENABLE = $RVVP_BIOS_ENABLE >> $Build_Macros
+echo DEFINE RVV_BIOS_ENABLE = $RVV_BIOS_ENABLE >> $Build_Macros
+echo DEFINE SOURCE_DEBUG_ENABLE = $SrcDebug >> $Build_Macros
+
+if [ $Arch == "IA32" ]; then
+ echo DEFINE X64_CONFIG = FALSE >> $Build_Macros
+else
+ echo DEFINE X64_CONFIG = TRUE >> $Build_Macros
+fi
+
+if [ "$(echo $2 | tr 'a-z' 'A-Z')" == "RELEASE" ]; then
+ TARGET=RELEASE
+ BUILD_TYPE=R
+ echo BUILD_TYPE = R >> Conf/BiosId.env
+else
+ TARGET=DEBUG
+ BUILD_TYPE=D
+ echo BUILD_TYPE = D >> Conf/BiosId.env
+fi
+
+
+##**********************************************************************
+## Additional EDK Build Setup/Configuration
+##**********************************************************************
+echo "Ensuring correct build directory is present for GenBiosId..."
+ACTIVE_PLATFORM=$PLATFORM_PACKAGE/PlatformPkg.dsc
+#TOOL_CHAIN_TAG=GCC47
+MAX_CONCURRENT_THREAD_NUMBER=1
+sed -i '/^ACTIVE_PLATFORM/d' Conf/target.txt
+sed -i '/^TARGET /d' Conf/target.txt
+sed -i '/^TARGET_ARCH/d' Conf/target.txt
+sed -i '/^TOOL_CHAIN_TAG/d' Conf/target.txt
+sed -i '/^MAX_CONCURRENT_THREAD_NUMBER/d' Conf/target.txt
+echo ACTIVE_PLATFORM = $ACTIVE_PLATFORM >> Conf/target.txt
+echo TARGET = $TARGET >> Conf/target.txt
+echo TOOL_CHAIN_TAG = $TOOL_CHAIN_TAG >> Conf/target.txt
+echo MAX_CONCURRENT_THREAD_NUMBER = $MAX_CONCURRENT_THREAD_NUMBER >> Conf/target.txt
+if [ $Arch == "IA32" ]; then
+ echo TARGET_ARCH = IA32 >> Conf/target.txt
+else
+ echo TARGET_ARCH = IA32 X64 >> Conf/target.txt
+fi
+
+###
+### Update ASL path for GCC47 & 46
+###
+ echo "*_GCC46_*_ASL_PATH = \"wine $WORKSPACE/PlatformTools/ASL/iasl.exe\"" >> Conf/tools_def.txt
+ echo "*_GCC47_*_ASL_PATH = \"wine $WORKSPACE/PlatformTools/ASL/iasl.exe\"" >> Conf/tools_def.txt
+## Fix error due to '\' in OBJCOPY_ADDDEBUGFLAG GCC Common rule
+ echo DEBUG_*_*_OBJCOPY_ADDDEBUGFLAG = --add-gnu-debuglink=\$\(DEBUG_DIR\)/\$\(MODULE_NAME\).debug >> Conf/tools_def.txt
+###
+
+##**********************************************************************
+## Build BIOS
+##**********************************************************************
+echo "Creating BiosId..."
+BUILD_PATH=Build/$PLATFORM_NAME/"$TARGET"_"$TOOL_CHAIN_TAG"
+if [ ! -d "$BUILD_PATH/$Arch" ]; then
+ mkdir -p $BUILD_PATH/$Arch
+fi
+if [ -e "$BUILD_PATH/$Arch/BiosId.bin" ]; then
+ rm -f $BUILD_PATH/$Arch/BiosId.bin
+fi
+wine PlatformTools/GenBiosId/GenBiosId.exe -i Conf/BiosId.env -o $BUILD_PATH/$Arch/BiosId.bin
+
+echo "Running UniTool..."
+## Scan the main CRB tree, excluding R8VlvDeviceSvRestrictedPkg folders
+wine PlatformTools/UniTool/UniTool.exe -b -u -x Platform/BxtPlatformPkg PlatformSetupDxe/UqiList.uni 1>>Unitool.log 2>&1
+
+echo
+echo "**** Replace DebugLib.h to save space.... ****"
+cp PlatformTools/GCC/DebugLib.h Core/MdePkg/Include/Library/
+
+echo
+echo "**** Copy ResetVector to original folder ****"
+echo "**** Due to nasm can't execute in Ubuntu ****"
+cp PlatformTools/GCC/Vtf0/ResetVector.ia32.port80.raw $PLATFORM_PACKAGE/Override/UefiCpuPkg/ResetVector/Vtf0/Bin
+cp PlatformTools/GCC/Vtf1/ResetVector.ia32.port80.raw $PLATFORM_PACKAGE/Override/UefiCpuPkg/ResetVector/Vtf1/Bin
+
+echo "Invoking EDK2 build..."
+build $Build_Flags
+
+
+##**********************************************************************
+## Post Build processing and cleanup
+##**********************************************************************
+grep "_PCD_VALUE_" $BUILD_PATH/IA32/$PLATFORM_PACKAGE/PlatformPei/PlatformPei/DEBUG/AutoGen.h > FlashMap.h
+
+#echo "Running fce..."
+## Extract Hii data from build and store in HiiDefaultData.txt
+#wine PlatformTools/FCE/FCE.exe read -i $BUILD_PATH/FV/SOC.fd > $BUILD_PATH/FV/HiiDefaultData.txt 1>>EDK2.log 2>&1
+
+## copy the Setup variable to the SetupDefault variable and save changes to BxtXXX.fd
+#wine PlatformTools/FCE/FCE.exe mirror -i $BUILD_PATH/FV/SOC.fd -o $BUILD_PATH/FV/Bxt"$Arch".fd Setup SetupDefault 1>>EDK2.log 2>&1
+echo "Skip FCE tool..."
+cp $BUILD_PATH/FV/SOC.fd $BUILD_PATH/FV/Bxt"$Arch".fd
+
+##echo Running KeyEnroll...
+## RestrictedBegin
+##if /i not "$Platform_Type" == "$eNB_RVP" (
+## call $PLATFORM_PACKAGE/Restricted/Internal/Tools/KeyEnroll/KeyEnroll.bat $BUILD_PATH $BUILD_PATH/FV/Vlv"$Arch".fd 1>>EDK2.log 2>&1
+##) else if /i "$Platform_Type" == "$eNB_RVP" (
+## call $PLATFORM_PACKAGE/Restricted/Internal/Tools/KeyEnroll/BBAY-KeyEnroll.bat $BUILD_PATH $BUILD_PATH/FV/Vlv"$Arch".fd 1>>EDK2.log 2>&1
+##)
+## if %ERRORLEVEL% NEQ 0 goto BldFail
+## RestrictedEnd
+echo Skip "KeyEnroll tool..."
+
+## Set the Board_Id, Build_Type, Version_Major, and Version_Minor environment variables
+##find /v "#" Conf\BiosId.env > ver_strings
+##for /f "tokens=1,3" %%i in (ver_strings) do set %%i=%%j
+##del /f/q ver_strings >nul
+##
+VERSION_MAJOR=$(grep '^VERSION_MAJOR' Conf/BiosId.env | cut -d ' ' -f 3 | cut -c 1-4)
+VERSION_MINOR=$(grep '^VERSION_MINOR' Conf/BiosId.env | cut -d ' ' -f 3 | cut -c 1-2)
+BIOS_Name="$BOARD_ID""$SV_String""$Arch"_"$BUILD_TYPE"_"$VERSION_MAJOR"_"$VERSION_MINOR"
+cp -f $BUILD_PATH/FV/Bxt"$Arch".fd $WORKSPACE/$BIOS_Name.ROM
+cp -f $BUILD_PATH/FV/FVOBB.Fv $WORKSPACE
+cp -f $BUILD_PATH/FV/FVOBBX.Fv $WORKSPACE
+cp -f $BUILD_PATH/FV/FVIBBR.Fv $WORKSPACE
+cp -f $BUILD_PATH/FV/FVIBBM.Fv $WORKSPACE
+cp -f $BUILD_PATH/FV/FVIBBL.Fv $WORKSPACE
+cp FlashMap.h $WORKSPACE/$BIOS_Name.map
+
+echo
+echo "Skip Running BIOS_Signing.bat ..."
+#echo "Running BIOS_Signing.bat ..."
+##pushd Stitch/BIOS_Signing
+##set SEC_Ver=1.0.0.1054
+##call BIOS_Signing.bat ../../$BIOS_Name $target $Arch BLAK $SEC_Ver >>../../EDK2.log 2>&1
+## use temp signing until Signing Script can be updated for BXT
+#cd Stitch/BIOS_Signing_Temp
+#./SBT_sign_no_KM_3M.sh ../../$BIOS_Name >>../../EDK2.log 2>&1
+#echo "BIOS signing complete"
+
+echo
+echo Build location: $BUILD_PATH
+echo BIOS ROM Created: $BIOS_Name
+echo
+echo -------------------- The EDKII BIOS build has successfully completed. --------------------
+echo
diff --git a/Platform/BroxtonPlatformPkg/BuildIFWI.bat b/Platform/BroxtonPlatformPkg/BuildIFWI.bat
new file mode 100644
index 0000000000..e8e1c4f4d7
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/BuildIFWI.bat
@@ -0,0 +1,187 @@
+@echo off
+SetLocal EnableDelayedExpansion EnableExtensions
+
+:: Assign initial values
+set exitCode=0
+set "Build_Flags= "
+set Arch=X64
+set SkipUsageFlag=FALSE
+set Stepping=B
+set WORKSPACE=%CD%
+if %WORKSPACE:~-1%==\ (
+ set WORKSPACE=%WORKSPACE:~0,-1%
+)
+set CORE_PATH=%WORKSPACE%\Core
+set PLATFORM_PATH=Platform\BroxtonPlatformPkg
+set SILICON_PATH=Silicon\Src\BroxtonSoC
+set STITCH_PATH=%WORKSPACE%\%PLATFORM_PATH%\Common\Tools\Stitch
+
+set Minnow_RVP=MINN
+
+:: Parse Optional arguments
+:OptLoop
+if /i "%~1"=="" goto Usage
+if /i "%~1"=="/?" goto Usage
+
+::Build Flags
+if /i "%~1"=="/l" (
+ set Build_Flags=%Build_Flags% /l
+ shift
+ goto OptLoop
+)
+if /i "%~1" == "/c" (
+ set Build_Flags=%Build_Flags% /c
+ shift
+ set SkipUsageFlag=TRUE
+ goto OptLoop
+)
+if /i "%~1"=="/ia32" (
+ set Arch=IA32
+ set Build_Flags=%Build_Flags% /ia32
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/x64" (
+ set Arch=X64
+ set Build_Flags=%Build_Flags% /x64
+ shift
+ goto OptLoop
+)
+
+if /i "%~1"=="/vs08" (
+ set Build_Flags=%Build_Flags% /vs08
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs10" (
+ set Build_Flags=%Build_Flags% /vs10
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs12" (
+ set Build_Flags=%Build_Flags% /vs12
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs13" (
+ set Build_Flags=%Build_Flags% /vs13
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/vs15" (
+ set Build_Flags=%Build_Flags% /vs15
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/FspW" (
+ set Build_Flags=%Build_Flags% /FspW
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/A" (
+ set Stepping=A
+ set Build_Flags=%Build_Flags% /A
+ shift
+ goto OptLoop
+)
+if /i "%~1"=="/B" (
+ set Stepping=B
+ set Build_Flags=%Build_Flags% /B
+ shift
+ goto OptLoop
+)
+
+
+:: Require 2 input parameters
+if "%~2"=="" (
+ echo. & echo -- ERROR: Not Enough Arguments Provided
+ echo -- Please review the Help screen "/?" -- & echo.
+ goto exit
+)
+
+:: Assign required arguments
+set Platform_Type=%~1
+set Build_Target=%~2
+
+:: Build BIOS
+echo ================================================================================
+echo Build_IFWI: Calling BIOS build Script...
+echo.
+
+echo - call BuildBios.bat %Build_Flags% %Platform_Type% %Build_Target%
+call %WORKSPACE%\%PLATFORM_PATH%\BuildBios.bat %Build_Flags% %Platform_Type% %Build_Target%
+if ErrorLevel 1 (
+ echo echo -- Error Building BIOS & echo.
+ set exitCode=1
+ goto exit
+)
+
+echo ================================================================================
+echo.
+
+call Conf\BiosId.bat
+echo BIOS_ID=%BIOS_ID%
+
+:: Set the Board_Id, Build_Type, Version_Major, and Version_Minor environment variables
+find /v "#" Conf\BiosId.env > ver_strings
+for /f "tokens=1,3" %%i in (ver_strings) do set %%i=%%j
+del /f/q ver_strings >nul
+
+:: Translate Release Build Type
+if "%BUILD_TYPE%"=="R" set BUILD_TYPE=R
+
+set BIOS_Name=%BOARD_ID%_%Arch%_%BUILD_TYPE%_%VERSION_MAJOR%_%VERSION_MINOR%
+
+:: Start Integration process
+echo ================================================================================
+echo Build_IFWI: Calling IFWI Stitching Script...
+echo.
+echo BIOS ROM input: %BIOS_Name%
+echo.
+pushd %STITCH_PATH%
+ echo - call IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %Stepping%
+ call %STITCH_PATH%\IFWIStitch_Simple.bat %STITCH_PATH%\%BIOS_Name% %Stepping%
+ @echo off
+popd
+if ErrorLevel 1 (
+ echo echo -- Error Stitching %BIOS_Name% & echo.
+ set exitCode=1
+)
+echo.
+echo Build_IFWI is finished.
+echo The final IFWI file is located in Stitch\
+echo ======================================================================
+
+
+goto Exit
+
+:Usage
+if /i "%SkipUsageFlag%" == "TRUE" goto Exit
+echo Script to build BIOS firmware and stitch the entire IFWI.
+echo.
+echo Usage: BuildIFWI.bat [options] ^<PlatformType^> ^<BuildTarget^>
+echo.
+echo. /? Display this help text
+echo /l Log a copy of the build output to EDK2.log
+echo /c CleanAll before building
+echo /FspW Build FSP and FSP Wrapper
+echo /x64 Set Arch to X64 (default)
+echo /vs08 Set compiler to VisualStudio 2008
+echo /vs10 Set compiler to VisualStudio 2010
+echo /vs12 Set compiler to VisualStudio 2012
+echo /vs13 Set compiler to VisualStudio 2013
+echo /vs15 Set compiler to VisualStudio 2015
+echo.
+echo Platform Types: %Minnow_RVP%
+echo MINN - Minnow (ApolloLake)
+echo.
+echo Build Targets: Release, Debug
+echo.
+set exitCode=1
+
+:Exit
+(
+ EndLocal
+ set Arch=%Arch%
+ exit /b %exitCode%
+)
diff --git a/Platform/BroxtonPlatformPkg/BuildIFWI.sh b/Platform/BroxtonPlatformPkg/BuildIFWI.sh
new file mode 100644
index 0000000000..98b5b7141a
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/BuildIFWI.sh
@@ -0,0 +1,161 @@
+##**********************************************************************
+## Function define
+##**********************************************************************
+function Usage() {
+ echo
+ echo "Script to build BIOS firmware and stitch the entire IFWI."
+ echo
+ echo "Usage: BuildIFWI.bat [options] ^<PlatformType^> ^<BuildTarget^> [IFWI Suffix]"
+ echo
+ echo " /? Display this help text "
+ echo " /q Quiet mode. Only display Fatal Errors (slightly faster) "
+ echo " /l Log a copy of the build output to EDK2.log "
+ echo " /c CleanAll before building "
+ echo " /w Enabled WinDbg module for build "
+ echo " /sv Build with SVBIOS flags enabled "
+ echo " /ppv Build with PPV flags enabled "
+ echo " /rvv Build with RVV BXTM flags enabled "
+ echo " /rvvp Build with RVVP BXTP flags enabled "
+ echo " /x64 Set Arch to X64 (default: IA32) "
+ echo " /sata Enable SATA Build "
+ echo " /pcie Enable PCIe Build "
+ echo " /nG Not update GOP driver per StitchConfig (override src version) "
+ echo " /uM Update Microcode per StitchConfig (override src version) "
+ echo
+ echo " Set ONLY ONE of the following: "
+ echo " /vp Set special build flag for ALL Pre-Si "
+ echo " /csle Set special build flag for C-SLE "
+ echo
+ echo " Platform Types: $eNB_RVP $Phblt_RVP $Phblt_Die1_RVP $Embd_RVP "
+ echo " APLK - Netbook/Desktop "
+ echo " BXTM - Phablet build for BXT-A "
+ echo " BXTM1 - Phablet build for BXT Die1(E0) "
+ echo " APLI - Embedded/IVI build (IOTG) "
+ echo
+ echo " Build Targets: Release, Debug "
+ echo " IFWI Suffix: Suffix to append to end of IFWI filename (default: MM_DD_YYYY) "
+ echo
+ echo " See Stitch/Stitch_Config.txt for additional stitching settings. "
+ echo
+ echo "Press any key......"
+ read
+ exit 0
+}
+
+
+## Assign initial values
+exitCode=0
+Build_Flags=
+Stitch_Flags=
+Arch=IA32
+
+## Description of each Platform/Board_ID
+## APLK - Netbook/Desktop (PCCG)
+## BXTM - Phablet build (MCG)
+## BXTM1 - Phablet build for BXT Die1(E0) (MCG)
+## APLI - Embedded/IVI build (IOTG)
+eNB_RVP=APLK
+Phblt_RVP=BXTM
+Phblt_Die1_RVP=BXTM1
+Embd_RVP=APLI
+
+## Parse Optional arguments
+if [ "$1" == "/?" ]; then
+ Usage
+fi
+
+## Build Flags
+for (( i=1; i<=$#; ))
+ do
+ if [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/Q" ]; then
+ Build_Flags="$Build_Flags /q"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/L" ]; then
+ Build_Flags="$Build_Flags /l"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/C" ]; then
+ Build_Flags="$Build_Flags /c"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/W" ]; then
+ Build_Flags="$Build_Flags /w"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/SV" ]; then
+ Build_Flags="$Build_Flags /sv"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/PPV" ]; then
+ Build_Flags="$Build_Flags /ppv"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/RVVP" ]; then
+ Build_Flags="$Build_Flags /rvvp"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/RVV" ]; then
+ Build_Flags="$Build_Flags /rvv"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/X64" ]; then
+ Arch=X64
+ Build_Flags="$Build_Flags /x64"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/VP" ]; then
+ Build_Flags="$Build_Flags /vp"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/CSLE" ]; then
+ Build_Flags="$Build_Flags /csle"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/SATA" ]; then
+ Build_Flags="$Build_Flags /sata"
+ shift
+ elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/PCIE" ]; then
+ Build_Flags="$Build_Flags /pcie"
+ shift
+ else
+ break
+ fi
+ done
+
+## Stitch Flags
+for (( i=1; i<=$#; ))
+ do
+ if [ "$1" == "/nG" ]; then
+ Stitch_Flags="$Stitch_Flags /nG"
+ shift
+ elif [ "$1" == "/uM" ]; then
+ Stitch_Flags="$Stitch_Flags /uM"
+ shift
+ elif [ "$1" == "/nB" ]; then
+ Stitch_Flags="$Stitch_Flags /nB"
+ shift
+ else
+ break
+ fi
+ done
+
+## Require 2 input parameters
+if [ "$2" == "" ]; then
+ echo "Not Enough Arguments Provided"
+ echo "Please review the Help screen "/?""
+fi
+
+## Assign required arguments
+Platform_Type=$1
+Build_Target=$2
+if [ "$3" == "" ]; then
+ IFWI_Suffix=
+else
+ IFWI_Suffix="/S $3"
+fi
+
+# Go to root directory of work space.
+cd ..
+cd ..
+
+## Build BIOS
+echo "======================================================================"
+echo "Build_IFWI: Calling BIOS build Script..."
+./Platform/BroxtonPlatformPkg/BuildBios.sh $Build_Flags $Platform_Type $Build_Target
+
+echo
+echo Finished Building BIOS.
+
+## Start Integration process
+echo ======================================================================
+echo Skip "Build_IFWI: Calling IFWI Stitching Script..."
diff --git a/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc b/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc
new file mode 100644
index 0000000000..d9290217cc
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc
@@ -0,0 +1,4 @@
+DEFINE ENBDT_PF_BUILD = TRUE
+DEFINE SOURCE_DEBUG_ENABLE = FALSE
+DEFINE APLK_SETUP_ENABLE_BUILD = TRUE
+DEFINE X64_CONFIG = TRUE
diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.dec b/Platform/BroxtonPlatformPkg/PlatformPkg.dec
new file mode 100644
index 0000000000..13eb5f9e0f
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/PlatformPkg.dec
@@ -0,0 +1,318 @@
+## @file
+# Platform Package.
+#
+# This package provides platform specific modules.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = PlatformPkg
+ PACKAGE_GUID = C04320E4-1F50-409A-A32A-5E0589192FA2
+ PACKAGE_VERSION = 0.1
+
+[Includes]
+ Common/Include
+ Common/Include/Library
+ Common/SampleCode/IntelFsp2WrapperPkg/Include
+ Common
+
+[LibraryClasses]
+
+[Guids]
+ gEfiPlatformBootModeGuid = { 0xce845704, 0x1683, 0x4d38, { 0xa4, 0xf9, 0x7d, 0x0b, 0x50, 0x77, 0x57, 0x93 } }
+ gPlatformModuleTokenSpaceGuid = { 0x69d13bf0, 0xaf91, 0x4d96, { 0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0 } }
+ gMinnowModuleTokenSpaceGuid = { 0xAA4B1C87, 0x33E3, 0x4127, { 0x81, 0x62, 0xDC, 0x63, 0xF6, 0xF6, 0x05, 0x46 } }
+ gEfiSerialPortTokenSpaceGuid = { 0x5fad2389, 0x2bc7, 0x4bd2, { 0x83, 0xd3, 0x42, 0x9f, 0xb6, 0xae, 0xa3, 0x3f } }
+ gEfiIchTokenSpaceGuid = { 0xe38c11e3, 0x968f, 0x47b8, { 0xac, 0xef, 0xac, 0xc0, 0x69, 0x3d, 0xb9, 0xff } }
+ gEfiPlatformCpuInfoGuid = { 0xbb9c7ab7, 0xb8d9, 0x4bf3, { 0x9c, 0x29, 0x9b, 0xf3, 0x41, 0xe2, 0x17, 0xbc } }
+ gEfiBiosIdGuid = { 0xC3E36D09, 0x8294, 0x4b97, { 0xA8, 0x57, 0xD5, 0x28, 0x8F, 0xE3, 0x3E, 0x28 } }
+ gEfiBoardFeaturesGuid = { 0x94b9e8ae, 0x8877, 0x479a, { 0x98, 0x42, 0xf5, 0x97, 0x4b, 0x82, 0xce, 0xd3 } }
+ gItkDataVarGuid = { 0x3812723d, 0x7e48, 0x4e29, { 0xbc, 0x27, 0xf5, 0xa3, 0x9a, 0xc9, 0x4e, 0xf1 } }
+ gDmiDataGuid = { 0x70e56c5e, 0x280c, 0x44b0, { 0xa4, 0x97, 0x09, 0x68, 0x1a, 0xbc, 0x37, 0x5e } }
+ gIdccDataHubGuid = { 0x788e1d9f, 0x1eab, 0x47d2, { 0xa2, 0xf3, 0x78, 0xca, 0xe8, 0x7d, 0x60, 0x12 } }
+ gEfiPlatformInfoGuid = { 0x1e2acc41, 0xe26a, 0x483d, { 0xaf, 0xc7, 0xa0, 0x56, 0xc3, 0x4e, 0x08, 0x7b } }
+ gEfiBoardSelectGuid = { 0x114ba15a, 0x6189, 0x180d, { 0xbf, 0xc0, 0x20, 0x53, 0xb3, 0x48, 0x09, 0x49 } }
+ gMfgModeVariableGuid = { 0xEF14FD78, 0x0793, 0x4e2b, { 0xAC, 0x6D, 0x06, 0x28, 0x47, 0xE0, 0x17, 0x91 } }
+ gEfiAcpiTableStorageGuid = { 0x7e374e25, 0x8e01, 0x4fee, { 0x87, 0xf2, 0x39, 0x0c, 0x23, 0xc6, 0x06, 0xcd } }
+ gACPIOSFRMfgStringVariableGuid = { 0x72234213, 0x0fd7, 0x48a1, { 0xa5, 0x9f, 0xb4, 0x1b, 0xc1, 0x07, 0xfb, 0xcd } }
+ gSLP20EncryptedOEMPublicKeyVariableGuid = { 0x6d9bf711, 0xa90d, 0x42f9, { 0xa3, 0xfb, 0xdd, 0x08, 0xb6, 0xe8, 0x90, 0x37 } }
+ gSLP20MarkerVariableGuid = { 0xec2a6c28, 0x2286, 0x44ed, { 0x91, 0x6b, 0x24, 0x3a, 0xb5, 0x25, 0x35, 0x46 } }
+ gSLP20OEMPublicKeyVariableGuid = { 0x0a4d622d, 0x01f4, 0x4974, { 0xb3, 0xf5, 0x2b, 0xfe, 0x98, 0x88, 0xef, 0x92 } }
+ gACPIOSFRRefDataBlockVariableGuid = { 0x72234213, 0x0fd7, 0x48a1, { 0xa5, 0x9f, 0xb4, 0x1b, 0xc1, 0x07, 0xfb, 0xcd } }
+ gACPIOSFRModelStringVariableGuid = { 0x72234213, 0x0fd7, 0x48a1, { 0xa5, 0x9f, 0xb4, 0x1b, 0xc1, 0x07, 0xfb, 0xcd } }
+ gEfiPciLanInfoGuid = { 0x0d9a1427, 0xe02a, 0x437d, { 0x92, 0x6b, 0xaa, 0x52, 0x1f, 0xd7, 0x22, 0xba } }
+ gEfiNormalSetupGuid = { 0xec87d643, 0xeba4, 0x4bb5, { 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0x0d, 0xa9 } }
+ gEfiAttemptUSBFirstGuid = { 0x77FA9ABD, 0x0359, 0x4D32, { 0xBD, 0x60, 0x28, 0xF4, 0xE7, 0x8F, 0x78, 0x4B } }
+ gVbtMipiAuoGuid = { 0xDBADD769, 0xE86A, 0x4819, { 0x81, 0x20, 0xE9, 0x91, 0x79, 0x2C, 0x0B, 0xC1 } }
+ gVbtMipiSharpGuid = { 0xC7DCFF6F, 0x6F2A, 0x4DC1, { 0x91, 0xC6, 0xDF, 0x0B, 0xAF, 0xDB, 0xDA, 0x46 } }
+ gVbtMipiJdiGuid = { 0xB850A139, 0xBABB, 0x4D91, { 0x9F, 0x27, 0x72, 0xD2, 0xEF, 0x01, 0xBF, 0x3A } }
+ gVbtEdpTypeCGuid = { 0x21E70404, 0xDF72, 0x4122, { 0xB0, 0x30, 0x28, 0x13, 0x06, 0xEB, 0x7B, 0xE3 } }
+ gPeiDefaultVbtGuid = { 0xE08CA6D5, 0x8D02, 0x43ae, { 0xAB, 0xB1, 0x95, 0x2C, 0xC7, 0x87, 0xC9, 0x33 } }
+ gPeiLogoGuid = { 0x7BB28B99, 0x61BB, 0x11d5, { 0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } }
+ gPlatformEmmcHs400TuningInfoGuid = { 0xb0ae3e81, 0xc6b0, 0x4d35, { 0xad, 0x51, 0x91, 0x17, 0xe0, 0x65, 0x1e, 0xa3 } }
+ gEfiTraceHubDebugLibIa32Guid = { 0x23a3e7ba, 0x75d1, 0x4cb9, { 0x9c, 0x8f, 0x56, 0xfa, 0x4e, 0x48, 0xd9, 0x9e } }
+ gEfiTraceHubDebugLibX64Guid = { 0x8f7e1a3a, 0x9657, 0x44f0, { 0xb9, 0xe6, 0x4e, 0xf7, 0x4b, 0x22, 0xd5, 0x43 } }
+ gPlatformAOSDnXEventGuid = { 0x5e84f15a, 0xea7f, 0x47fe, { 0x84, 0x44, 0x5f, 0xeb, 0x2c, 0xf4, 0x12, 0x9f } }
+ gEfiCrashDumpMemoryMapGuid = { 0xcbe2a6f1, 0x778e, 0x4422, { 0x93, 0x71, 0xab, 0xf4, 0x90, 0x91, 0x63, 0xf5 } }
+ gUpdatedPdtExistGuid = { 0x7c2b32c9, 0x312f, 0x40e5, { 0xa7, 0x45, 0x8a, 0x76, 0xce, 0xa1, 0x29, 0xbb } }
+ gUpdatedArbExistGuid = { 0xdf38ec32, 0xff7d, 0x46a7, { 0xb1, 0x27, 0xb5, 0xf6, 0x84, 0x30, 0xd7, 0xbe } }
+ gEfiBootStateGuid = { 0x60b5e939, 0x0fcf, 0x4227, { 0xba, 0x83, 0x6b, 0xbe, 0xd4, 0x5b, 0xc0, 0xe3 } }
+ gIFWIVersionHobGuid = { 0xc498f432, 0xb8b7, 0x44bf, { 0x86, 0xd3, 0x7b, 0x36, 0xf2, 0xec, 0x13, 0x90 } }
+ gEfiSmmBaseThunkCommunicationGuid = { 0x6568a3d6, 0x015f, 0x4b4a, { 0x9c, 0x89, 0x1d, 0x14, 0x63, 0x14, 0x13, 0x0a } }
+ gTpmDeviceInstanceTpm20PttPtpGuid = { 0x93d66f66, 0x55da, 0x4f03, { 0x9b, 0x5f, 0x32, 0xcf, 0x9e, 0x54, 0x3b, 0x3a } }
+ gEfiFwDisplayCapsuleGuid = { 0x3b8c8162, 0x188c, 0x46a4, { 0xae, 0xc9, 0xbe, 0x43, 0xf1, 0xd6, 0x56, 0x97 } }
+ gEfiSystemFirmwareGuid = { 0x86aafa19, 0xbe02, 0x4a21, { 0xaa, 0x8d, 0x5c, 0x12, 0x7b, 0x63, 0x5e, 0x8b } }
+ gEfiDFUVerGuid = { 0x0dc73aed, 0xcbf6, 0x4a25, { 0xa6, 0x8d, 0x59, 0xc8, 0x0f, 0x44, 0xc7, 0xc3 } }
+ gEfiEsrtTableGuid = { 0xb122a263, 0x3661, 0x4f68, { 0x99, 0x29, 0x78, 0xf8, 0xb0, 0xd6, 0x21, 0x80 } }
+ gEfiCapsuleCrashLogVarGuid = { 0xf3ff1468, 0x04ba, 0x4966, { 0x9f, 0xb2, 0xe4, 0xa7, 0x90, 0x05, 0x46, 0x50 } }
+ gEfiCapsuleCrashGuid = { 0x0e1d2972, 0x65af, 0x4ac1, { 0xbf, 0xa3, 0xce, 0xf4, 0xab, 0x0c, 0x38, 0xfe } }
+ gEfiDeviceFirmwareGuid = { 0x9a5c9a15, 0xb821, 0x469a, { 0x8b, 0x7b, 0xe9, 0x66, 0xd4, 0x6c, 0xe1, 0xfe } }
+ gEfiBiosCapsuleFromAfuGuid = { 0xcd193840, 0x2881, 0x9567, { 0x39, 0x28, 0x38, 0xc5, 0x97, 0x53, 0x49, 0x77 } }
+ gPlatformSsdtImageGuid = { 0x8041f38b, 0xa34, 0x49d7, { 0xa9, 0x05, 0x03, 0xae, 0xef, 0x48, 0x26, 0xf7 } }
+ gObbyFirmwareFileSystemFvGuid = { 0xb723eff4, 0xee4a, 0x40bd, { 0xbd, 0x7b, 0x22, 0x27, 0x2e, 0x36, 0xb3, 0xe7 } }
+ gFspSFirmwareFileSystemFvGuid = { 0x1B5C27FE, 0xF01C, 0x4fbc, { 0xAE, 0xAE, 0x34, 0x1B, 0x2E, 0x99, 0x2A, 0x17 } }
+ gIbbrFirmwareFileSystemFvGuid = { 0xB73FE497, 0xB92E, 0x416e, { 0x83, 0x26, 0x45, 0xAD, 0x0D, 0x27, 0x00, 0x92 } }
+
+ #
+ # For FSP Wrapper
+ #
+ gFspTempRamExitGuid = { 0x204c3d37, 0xd83f, 0x49ab, { 0x88, 0x3f, 0x9b, 0x5d, 0x6c, 0x64, 0x77, 0x62 } }
+ gUndiDriverImageGuid = { 0x2E561D56, 0x4863, 0x44F7, { 0x96, 0x0D, 0xEF, 0x2D, 0x7F, 0x2D, 0x35, 0xBB } }
+
+ gClientSiliconPkgTokenSpaceGuid = {0xddf913cf, 0x8c2e, 0x449d, {0x8f, 0x6b, 0xd6, 0x44, 0xd2, 0xb6, 0x22, 0xf6}}
+ gSmbiosFirmwareVersionInfoHobGuid = {0x947c974a, 0xc5aa, 0x48a2, {0xa4, 0x77, 0x1a, 0x4c, 0x9f, 0x52, 0xe7, 0x82}}
+ gSmbiosProcessorInfoHobGuid = {0xe6d73d92, 0xff56, 0x4146, {0xaf, 0xac, 0x1c, 0x18, 0x81, 0x7d, 0x68, 0x71}}
+ gSmbiosCacheInfoHobGuid = {0xd805b74e, 0x1460, 0x4755, {0xbb, 0x36, 0x1e, 0x8c, 0x8a, 0xd6, 0x78, 0xd7}}
+
+ gClientCommonModuleTokenSpaceGuid = { 0x6239f660, 0x54dc, 0x4cf2, { 0xb2, 0x07, 0x45, 0xdb, 0x9c, 0x4d, 0x22, 0xeb }}
+ gFastBootExceptionInfoHobGuid = { 0x4ed88276, 0xd4df, 0x4d03, { 0x86, 0x61, 0x29, 0x58, 0x01, 0xb2, 0xda, 0x58 }}
+ gFastBootFunctionEnabledHobGuid = { 0x019fb1ca, 0xd411, 0x4948, { 0xb7, 0x3c, 0x4c, 0x05, 0x4a, 0xba, 0x9e, 0x8e }}
+ gPeiFirmwarePerformanceGuid = { 0x55765e8f, 0x021a, 0x41f9, { 0x93, 0x2d, 0x4c, 0x49, 0xc5, 0xb7, 0xef, 0x5d }}
+ gRamDebugTokenSpaceGuid = { 0x93adad6a, 0x60d1, 0x47f7, { 0xab, 0xdb, 0x20, 0x32, 0xf4, 0xa8, 0x8e, 0xa6 }}
+ gSystemConfigGuid = { 0x0bb533de, 0xc8d9, 0x4e21, { 0x93, 0x42, 0xc4, 0x9c, 0x05, 0xb5, 0xe7, 0x89 }}
+ gSetupEnterGuid = { 0x71202EEE, 0x5F53, 0x40d9, { 0xAB, 0x3D, 0x9E, 0x0C, 0x26, 0xD9, 0x66, 0x57 }}
+ gHiiExportDatabaseGuid = { 0x1b838190, 0x4625, 0x4ead, { 0xab, 0xc9, 0xcd, 0x5e, 0x6a, 0xf1, 0x8f, 0xe0 }}
+
+ gEfiHtBistHobGuid = { 0xBE644001, 0xE7D4, 0x48B1, { 0xB0, 0x96, 0x8B, 0xA0, 0x47, 0xBC, 0x7A, 0xE7 }}
+
+[Ppis]
+ gDebugServicePpiGuid = { 0xb781df4c, 0xdc36, 0x4230, { 0xb5, 0x6d, 0xa0, 0x1, 0xb6, 0x8c, 0x15, 0xc7 } }
+ gPeiMfgMemoryTestPpiGuid = { 0xab294a92, 0xeaf5, 0x4cf3, { 0xab, 0x2b, 0x2d, 0x4b, 0xed, 0x4d, 0xb6, 0x3d } }
+ gBoardPreMemInitPpiGuid = { 0x202bd97a, 0x3255, 0x4277, { 0x89, 0x8f, 0xa0, 0x3c, 0x6a, 0x63, 0x64, 0x1 } }
+ gBoardPreMemInitDoneGuid = { 0x74dbd885, 0xa9ab, 0x4502, { 0xbb, 0x9a, 0xa6, 0x70, 0xb5, 0xec, 0x96, 0x66 } }
+ gBoardPostMemInitStartGuid = { 0xcecd3556, 0x24f1, 0x478f, { 0x94, 0x78, 0xe5, 0xcf, 0x2b, 0x62, 0x5e, 0xb } }
+ gBoardPostMemInitDoneGuid = { 0xa2f2192f, 0xb51e, 0x492d, { 0xb6, 0x8, 0xad, 0x7d, 0xa0, 0x5, 0xb6, 0x99 } }
+ gPeiCachePpiGuid = { 0xC153205A, 0xE898, 0x4C24, { 0x86, 0x89, 0xA4, 0xB4, 0xBC, 0xC5, 0xC8, 0xA2 }}
+
+[Protocols]
+ gEfiUsbFnIoProtocolGuid = { 0x32d2963a, 0xfe5d, 0x4f30, { 0xb6, 0x33, 0x6e, 0x5d, 0xc5, 0x58, 0x03, 0xcc } }
+ gEfiUsbDeviceModeProtocolGuid = { 0xC9923F7E, 0x1746, 0x4802, { 0x86, 0x2e, 0x01, 0x1c, 0x2c, 0x2d, 0x9d, 0x86 } }
+#
+# @TODO: Moved from EdkCompatibilityPkg.dec to here, need to verify.
+#
+ gEfiSmmBaseHelperReadyProtocolGuid = { 0x910dca07, 0x1f94, 0x4ee7, { 0xaf, 0x2f, 0xff, 0x72, 0xf3, 0x15, 0x43, 0x53 } }
+ gEfiDpsdRSA1024AndSHA256SignatureVerificationProtocolGuid = { 0x045b6f49, 0x9102, 0x4590, { 0xa0, 0xa5, 0x35, 0x31, 0x1b, 0x0a, 0xef, 0xc3 } }
+ gEfiPlatformCpuProtocolGuid = { 0xbd26cdc9, 0xa092, 0x462a, { 0x87, 0x7a, 0x5a, 0xb6, 0xad, 0xce, 0x48, 0x12 } }
+ gEnhancedSpeedstepProtocolGuid = { 0x91a1ddcf, 0x5374, 0x4939, { 0x89, 0x51, 0xd7, 0x29, 0x3f, 0x1a, 0x78, 0x6f } }
+ gEfiPlatformIdeInitProtocolGuid = { 0x377c66a3, 0x8fe7, 0x4ee8, { 0x85, 0xb8, 0xf1, 0xa2, 0x82, 0x56, 0x9e, 0x3b } }
+ gEfiWatchdogTimerDriverProtocolGuid = { 0xd5b06d16, 0x2ea1, 0x4def, { 0x98, 0xd0, 0xa0, 0x5d, 0x40, 0x72, 0x84, 0x17 } }
+ gEfiUsbLegacyPlatformProtocolGuid = { 0x13f40f6e, 0x50c1, 0x4b73, { 0xb1, 0xe2, 0x6e, 0x72, 0xd2, 0x1c, 0xb0, 0x4a } }
+ gEfiLpcWpc83627PolicyProtocolGuid = { 0xd3ecc567, 0x9fd5, 0x44c1, { 0x86, 0xcf, 0x5d, 0xa7, 0xa2, 0x4f, 0x4b, 0x5d } }
+ gEfiCk505ClockPlatformInfoGuid = { 0x3c485ea4, 0x449a, 0x46ce, { 0xbb, 0x08, 0x2a, 0x33, 0x6e, 0xa9, 0x6b, 0x4e } }
+ gEfiSmbiosSlotPopulationGuid = { 0xef7bf7d6, 0xf8ff, 0x4a76, { 0x82, 0x47, 0xc0, 0xd0, 0xd1, 0xcc, 0x49, 0xc0 } }
+ gUsbPolicyGuid = { 0xf617b358, 0x12cf, 0x414a, { 0xa0, 0x69, 0x60, 0x67, 0x7b, 0xda, 0x13, 0xb4 } }
+ gEfiLpcWpce791PolicyProtocolGuid = { 0xab2bee2f, 0xc1a6, 0x4399, { 0x85, 0x3d, 0xc0, 0x7c, 0x77, 0x4f, 0xfd, 0x0d } }
+ gEfiTpmMpDriverProtocolGuid = { 0xde161cfe, 0x1e60, 0x42a1, { 0x8c, 0xc3, 0xee, 0x7e, 0xf0, 0x73, 0x52, 0x12 } }
+ gPlatformGOPPolicyGuid = { 0xec2e931b, 0x3281, 0x48a5, { 0x81, 0x07, 0xdf, 0x8a, 0x8b, 0xed, 0x3c, 0x5d } }
+ gEfiI2cBusProtocolGuid = { 0x9fa1b225, 0x3346, 0x461b, { 0xa0, 0x69, 0xed, 0x01, 0xb6, 0x73, 0xd2, 0x40 } }
+ gDxePlatformPolicyProtocolGuid = { 0x4b0165a9, 0x61d6, 0x4e23, { 0xa0, 0xb5, 0x3e, 0xc7, 0x9c, 0x2e, 0x30, 0xd5 } }
+ gEfiDFUResultGuid = { 0x14a7c46f, 0xbc02, 0x4047, { 0x9f, 0x18, 0xa5, 0xd7, 0x25, 0xd8, 0xbd, 0x19 } }
+ gEfiUsbKeyboardConnectGuid = { 0xad9c4381, 0x1ede, 0x430c, { 0x8d, 0x42, 0x23, 0x76, 0x7c, 0x46, 0x5d, 0x52 } }
+ gEfiTdtOperationProtocolGuid = { 0xfd301ba4, 0x5e62, 0x4679, { 0xa0, 0x6f, 0xe0, 0x9a, 0xab, 0xdd, 0x2a, 0x91 } }
+ gEfiSpiProtocolGuid = { 0x1156efc6, 0xea32, 0x4396, { 0xb5, 0xd5, 0x26, 0x93, 0x2e, 0x83, 0xc3, 0x13 } }
+ gEfiSeCOperationProtocolGuid = { 0x704ebea2, 0x5ee6, 0x4898, { 0x96, 0x59, 0x01, 0x8b, 0x74, 0xb4, 0x47, 0x89 } }
+ gEfiPssVerificationProtocolGuid = { 0x6fbb9473, 0xcb45, 0x4b0f, { 0x85, 0xac, 0x29, 0xbe, 0xa7, 0x86, 0xad, 0x80 } }
+ gEfiTcoResetProtocolGuid = { 0xa6a79162, 0xe325, 0x4c30, { 0xbc, 0xc3, 0x59, 0x37, 0x30, 0x64, 0xef, 0xb3 } }
+ gEfiEcAccessProtocolGuid = { 0x70eeecbe, 0x727a, 0x4244, { 0x90, 0x4c, 0xdb, 0x6b, 0xf0, 0x05, 0x53, 0x92 } }
+ gPlatformConfigChangeProtocolGuid = {0xf429c00a, 0x9640, 0x46b3, {0x95, 0x44, 0xf8, 0xf8, 0x6a, 0x28, 0xf3, 0x0f}}
+
+ gSmmThunkProtocolGuid = { 0x2a82fce6, 0x8bb6, 0x413e, { 0xb9, 0xeb, 0x45, 0xdf, 0xc0, 0x52, 0x2d, 0xf3 }}
+ gEfiTrEEPlatformProtocolGuid = { 0x77ef4b99, 0x1186, 0x48ab, { 0x9d, 0x0b, 0x0b, 0x78, 0x12, 0xe5, 0xe6, 0xab }}
+ gLegacyUsbProtocolGuid = { 0x2ad8e2d2, 0x2e91, 0x4cd1, { 0x95, 0xf5, 0xe7, 0x8f, 0xe5, 0xeb, 0xe3, 0x16 }}
+
+[PcdsDynamic,PcdsDynamicEx] # 0x00000000
+ gMinnowModuleTokenSpaceGuid.PcdMinnowBoardDetectionRun|FALSE|BOOLEAN|0x00000001
+ gMinnowModuleTokenSpaceGuid.PcdMinnowBoardDetected|FALSE|BOOLEAN|0x00000002
+ gPlatformModuleTokenSpaceGuid.PcdScsiChunk|0x0|UINT32|0x80000002
+ gPlatformModuleTokenSpaceGuid.PcdUfsHcBar|0x0|UINT32|0x80000003
+ gPlatformModuleTokenSpaceGuid.PcdUfsInitStall|0x0|UINT32|0x80000004
+ gPlatformModuleTokenSpaceGuid.PcdIfwiZid|0xFFFFFFFF|UINT32|0x8000000c
+ gPlatformModuleTokenSpaceGuid.PcdBiosSetupLoaded|FALSE|BOOLEAN|0x80000009
+ ## This PCD defines minimum length(in bytes) of the system preboot TCG event log area(LAML).
+ # For PC Client Implementation spec up to and including 1.2 the minimum log size is 64KB.
+ # @Prompt Minimum length(in bytes) of the system preboot TCG event log area(LAML).
+ gEfiSecurityPkgTokenSpaceGuid.PcdTcgLogAreaMinLen|0x10000|UINT32|0x8000000d
+
+ ## This PCD defines length(in bytes) of the TCG2 Final event log area.
+ # @Prompt Length(in bytes) of the TCG2 Final event log area.
+ gEfiSecurityPkgTokenSpaceGuid.PcdTcg2FinalLogAreaLen|0x8000|UINT32|0x8000000e
+
+ gPlatformModuleTokenSpaceGuid.PcdDnxFastboot|FALSE|BOOLEAN|0x8000000b
+ gPlatformModuleTokenSpaceGuid.PcdConnectUSBKeyboardonWaitForKeyStroke|FALSE|BOOLEAN|0x80000005
+ gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc|0|UINT64|0x80000006
+ gPlatformModuleTokenSpaceGuid.PcdBoardId|0|UINT8|0x80000007
+ gPlatformModuleTokenSpaceGuid.PcdFabId|0|UINT8|0x80000008
+ gPlatformModuleTokenSpaceGuid.PcdUpdateFspmUpdFunc|0|UINT64|0x80000010
+ gPlatformModuleTokenSpaceGuid.PcdDramCreatePolicyDefaultsFunc|0|UINT64|0x80000011
+ gPlatformModuleTokenSpaceGuid.PcdGetBoardNameFunc|0|UINT64|0x80000012
+
+ ## MemoryCheck value for checking memory before boot OS.
+ ## To save the boot performance, the default MemoryCheck is set to 0.
+ gClientCommonModuleTokenSpaceGuid.PcdPlatformMemoryCheck|0|UINT8|0x40000005
+ gClientCommonModuleTokenSpaceGuid.PcdHiiDataExport|FALSE|BOOLEAN|0x00000036
+ ## The PCD is used to specify whether or not send HierarchyChangeAuth command for Platform Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyChangeAuthPlatform|TRUE|BOOLEAN|0x00010020
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Platform Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlPlatform|FALSE|BOOLEAN|0x00010024
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Endorsement Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlEndorsement|TRUE|BOOLEAN|0x00010025
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Storage Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlOwner|TRUE|BOOLEAN|0x00010026
+ ## The PCD is used to specify if TrEEPlatform module support TXT provision.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2TxtProvisionSupport|FALSE|BOOLEAN|0x00010027
+ ## The PCD is used to specify whether or not send ChangeEPS command to reprovision Endorsement Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2ChangeEps|FALSE|BOOLEAN|0x00010021
+ ## The PCD is used to specify whether or not send ChangePPS command to reprovision Platform Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2ChangePps|FALSE|BOOLEAN|0x00010022
+ ## The PCD is used to specify whether or not send Clear command to reprovision Storage Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2Clear|FALSE|BOOLEAN|0x00010023
+ ## The PCD is used to specify whether or not Tpm command will wait for Response to come back.
+ gClientCommonModuleTokenSpaceGuid.PcdTpmSkipResponseWait|FALSE|BOOLEAN|0x00010028
+
+[PcdsFeatureFlag] # 0x10000000
+ ## This PCD specifies whether StatusCode is reported via ISA Serial port.
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseIsaSerial|TRUE|BOOLEAN|0x00000020
+
+ ## This PCD specifies whether StatusCode is reported via USB Serial port.
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseUsbSerial|TRUE|BOOLEAN|0x00000021
+
+ ## This PCD specifies whether StatusCode is reported via RAM.
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam|FALSE|BOOLEAN|0x00000022
+ gPlatformModuleTokenSpaceGuid.PcdPs2MouseEnable |FALSE|BOOLEAN|0xF0000001
+ gPlatformModuleTokenSpaceGuid.PcdDeprecatedFunctionRemove |TRUE|BOOLEAN|0xF0000002
+ gPlatformModuleTokenSpaceGuid.PcdStatusCodeUseSerialPortPlatform|FALSE|BOOLEAN|0x00000033
+ gPlatformModuleTokenSpaceGuid.PcdStatusCodeUseBeep|TRUE|BOOLEAN|0x00000032
+ gPlatformModuleTokenSpaceGuid.PcdBdsDispatchAdditionalOprom|TRUE|BOOLEAN|0x00000024
+ gPlatformModuleTokenSpaceGuid.PcdVibratorFeature|TRUE|BOOLEAN|0x00000036
+ gPlatformModuleTokenSpaceGuid.PcdStatusCodeUsePostCode|TRUE|BOOLEAN|0x00000031
+
+ ## This PCD specifies whether unregister Serial Port StatusCode Handler
+ gPlatformModuleTokenSpaceGuid.PcdStatusCodeUnregisterSerialPort|TRUE|BOOLEAN|0x00000035
+
+[PcdsFixedAtBuild] # 0x20000000
+ gPlatformModuleTokenSpaceGuid.PcdFlashBaseAddress|0xFFD00000|UINT32|0x2000001B
+ gPlatformModuleTokenSpaceGuid.PcdFlashSize|0x00300000|UINT32|0x2000001C
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBBase |0xFF800000|UINT32|0x20000001
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBSize |0x00500000|UINT32|0x20000002
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBXBase|0xFF800000|UINT32|0x20000009
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBXSize|0x00500000|UINT32|0x2000000A
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBYBase|0xFF800000|UINT32|0x2000001E
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBYSize|0x00500000|UINT32|0x2000001F
+ gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
+ gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBRBase|0xFFFA0000|UINT32|0x20000013
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBRSize|0x00040000|UINT32|0x20000014
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBMBase|0xFFF80000|UINT32|0x20000004
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBMSize|0x00080000|UINT32|0x20000005
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBLBase|0xFFFFF000|UINT32|0x20000006
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBLSize|0x00001000|UINT32|0x20000003
+ gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageBase|0xFFF60000|UINT32|0x20000007
+ gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize|0x00010000|UINT32|0x20000008
+ gPlatformModuleTokenSpaceGuid.PcdFlashObbPayloadMappedBase|0xFFC82040|UINT32|0x2000000B
+ gPlatformModuleTokenSpaceGuid.PcdFlashObbPayloadSize|0x002DA000|UINT32|0x2000000C
+ gPlatformModuleTokenSpaceGuid.PcdFlashIbbRegionMappedBase|0xFF980000|UINT32|0x2000000D
+ gPlatformModuleTokenSpaceGuid.PcdFlashIbbRegionSize|0x0007A000|UINT32|0x2000000E
+ gPlatformModuleTokenSpaceGuid.PcdFlashObbRegionMappedBase|0xFFC82000|UINT32|0x2000000F
+ gPlatformModuleTokenSpaceGuid.PcdFlashObbRegionSize|0x002DB000|UINT32|0x20000010
+ gClientCommonModuleTokenSpaceGuid.PcdMaxConsoleDeviceNum|0x05|UINT8|0x10000007
+ gMinnowModuleTokenSpaceGuid.PcdDefaultFabId|0x03|UINT8|0x20000001
+ gEfiIchTokenSpaceGuid.PcdPeiIchEhciControllerMemoryBaseAddress|0xFD000000|UINT32|0x30000019
+ gPlatformModuleTokenSpaceGuid.PcdPBTNDisableInterval|0x01F4|UINT32|0x2000001A
+ gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress |0x0|UINT32|0x20000015
+ gPlatformModuleTokenSpaceGuid.PcdFlashMicroCode2Address|0x0|UINT32|0x20000017
+ gPlatformModuleTokenSpaceGuid.PcdIFWISigBaseAddress|0x0F00|UINT32|0x20000019
+
+ gClientSiliconPkgTokenSpaceGuid.PcdClientSiliconVersionMajor|00|UINT8|0x00000001
+ gClientSiliconPkgTokenSpaceGuid.PcdClientSiliconVersionMinor|02|UINT8|0x00000002
+ gClientSiliconPkgTokenSpaceGuid.PcdClientSiliconVersionRevision|00|UINT8|0x00000003
+ gClientSiliconPkgTokenSpaceGuid.PcdClientSiliconVersionBuild|00|UINT8|0x00000004
+
+ ## This PCD sepcifies the start index in CMOS, it will occupy 4 bytes space.
+ gClientCommonModuleTokenSpaceGuid.PcdSerialBaudRateCmosIndex|0x43|UINT8|0x10000002
+
+ gClientCommonModuleTokenSpaceGuid.PcdStatusCodeFlagsCmosIndex|0x5E|UINT8|0x0000002D
+
+ ## MemoryCheck value for checking memory before boot OS.
+ ## To save the boot performance, the default MemoryCheck is set to 0.
+ gClientCommonModuleTokenSpaceGuid.PcdPlatformMemoryCheck|0|UINT8|0x40000005
+
+ ## The PCD is used to specify whether or not send HierarchyChangeAuth command for Platform Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyChangeAuthPlatform|TRUE|BOOLEAN|0x00010020
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Platform Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlPlatform|FALSE|BOOLEAN|0x00010024
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Endorsement Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlEndorsement|TRUE|BOOLEAN|0x00010025
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Storage Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlOwner|TRUE|BOOLEAN|0x00010026
+ ## The PCD is used to specify if TrEEPlatform module support TXT provision.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2TxtProvisionSupport|FALSE|BOOLEAN|0x00010027
+
+ ##
+ ## SMBIOS defaults
+ ##
+ gClientCommonModuleTokenSpaceGuid.PcdSmbiosDefaultMaxSpeed|0x0|UINT16|0x00000306
+ gClientCommonModuleTokenSpaceGuid.PcdSmbiosDefaultSocketDesignation|"U3E1"|VOID*|0x00000307
+ gClientCommonModuleTokenSpaceGuid.PcdSmbiosDefaultSerialNumber|"To Be Filled By O.E.M."|VOID*|0x00000308
+ gClientCommonModuleTokenSpaceGuid.PcdSmbiosDefaultAssetTag|"To Be Filled By O.E.M."|VOID*|0x00000309
+ gClientCommonModuleTokenSpaceGuid.PcdSmbiosDefaultPartNumber|"To Be Filled By O.E.M."|VOID*|0x0000030A
+
+[PcdsPatchableInModule]
+
+ ## MemoryCheck value for checking memory before boot OS.
+ ## To save the boot performance, the default MemoryCheck is set to 0.
+ gClientCommonModuleTokenSpaceGuid.PcdPlatformMemoryCheck|0|UINT8|0x40000005
+ ## The PCD is used to specify whether or not send HierarchyChangeAuth command for Platform Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyChangeAuthPlatform|TRUE|BOOLEAN|0x00010020
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Platform Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlPlatform|FALSE|BOOLEAN|0x00010024
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Endorsement Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlEndorsement|TRUE|BOOLEAN|0x00010025
+ ## The PCD is used to specify send HierarchyControl command to enable or disable Storage Hierarchy.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlOwner|TRUE|BOOLEAN|0x00010026
+ ## The PCD is used to specify if TrEEPlatform module support TXT provision.
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2TxtProvisionSupport|FALSE|BOOLEAN|0x00010027
+
+[PcdsFixedAtBuild, PcdsPatchableInModule]
+ # @Prompt Temporary RAM base address.
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamBase|0xfef00000|UINT32|0x10001001
+ ## Specifies the temporary RAM size in bytes.
+ # @Prompt Temporary RAM size.
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamSize|0x2000|UINT32|0x10001002
+ # @Prompt Stack size in the temporary RAM.
+ gPlatformModuleTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003
+
+[PcdsFixedAtBuild]
+ ## Specifies maximum number of PPIs provided by SecCore.
+ # @Prompt Maximum number of PPIs provided by SecCore.
+ gPlatformModuleTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x10001010
diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
new file mode 100644
index 0000000000..b95bf59779
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf
@@ -0,0 +1,1112 @@
+## @file
+# FDF file of Platform.
+#
+# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+
+ !if $(EXT_BIOS_ENABLE) == FALSE
+ #==========================================================================================
+ # 3MB BIOS Layout Definition
+ #==========================================================================================
+ DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3MB FLASH Device.
+ DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3MB FLASH Device
+ DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3MB FLASH Device.
+ DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3MB FLASH Device.
+ !else
+ #==========================================================================================
+ # 5MB BIOS Layout Definition
+ #==========================================================================================
+ DEFINE FLASH_BASE = 0xFFB00000 #The base address of the 5MB FLASH Device.
+ DEFINE FLASH_SIZE = 0x00500000 #The flash size in bytes of the 5MB FLASH Device
+ DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 5MB FLASH Device.
+ DEFINE FLASH_NUM_BLOCKS = 0x500 #The number of blocks in 5MB FLASH Device.
+ !endif
+
+ DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
+ DEFINE FLASH_AREA_SIZE = 0x00800000
+
+ DEFINE FLASH_REGION_FV_IBBR_OFFSET = 0x00000000
+ DEFINE FLASH_REGION_FV_IBBR_SIZE = 0x00060000
+ DEFINE FLASH_REGION_OBB_OFFSET = $(FLASH_REGION_FV_IBBR_OFFSET) + $(FLASH_REGION_FV_IBBR_SIZE)
+ DEFINE FLASH_REGION_OBB_SIZE = 0x0007B000
+ DEFINE FLASH_REGION_OBBX_OFFSET = $(FLASH_REGION_OBB_OFFSET) + $(FLASH_REGION_OBB_SIZE)
+ !if $(EXT_BIOS_ENABLE) == FALSE
+ DEFINE FLASH_REGION_OBBX_SIZE = 0x00165000
+ !else
+ DEFINE FLASH_REGION_OBBX_SIZE = 0x002EC000
+ !endif
+
+ #
+ # Important: OBBX_SIZE + IBBR_SIZE + OBB_SIZE + OBBY_SIZE "must be" < FLASH_REGION_VPD_OFFSET
+ #
+ ## Use fixed starting point in FD for below FV regions
+ # - IBBL must be at end of FD
+ # - IBBM is best if next to IBBL for RBP
+ # - NvStorage is extracted by Build/Stitch scripts
+ # - FLASH_REGION_VPD_OFFSET should change if IBBM and IBBL move
+
+ ## FLASH_REGION_VPD_OFFSET cannot be less than 0x00220000
+ ## if it is, then TempRamBase will overlap onto IBB in CAR
+ !if $(EXT_BIOS_ENABLE) == FALSE
+ DEFINE FLASH_REGION_VPD_OFFSET = 0x00258000 # Reduced TempRamBase to get below 220000
+ !else
+ DEFINE FLASH_REGION_VPD_OFFSET = 0x0042A000 # Reduced TempRamBase to get below 220000
+ !endif
+
+ DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
+
+ DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = $(FLASH_REGION_VPD_OFFSET) + $(FLASH_REGION_VPD_SIZE)
+ DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
+
+ DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
+ DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
+
+ DEFINE FLASH_REGION_FV_IBBM_OFFSET = $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
+ DEFINE FLASH_REGION_FV_IBBL_SIZE = 0x00001000
+
+ DEFINE FLASH_REGION_FV_IBBM_SIZE = 0x00020000
+ DEFINE FLASH_REGION_FV_IBBL_OFFSET = $(FLASH_SIZE) - $(FLASH_REGION_FV_IBBL_SIZE)
+
+ DEFINE FLASH_FV_RECOVERY_BASE = 0xFFF80000
+ DEFINE FLASH_FV_RECOVERY_SIZE = 0x00080000
+
+ DEFINE FLASH_OBB_PAYLOAD_MAPPED_BASE = 0xFFC82040
+ DEFINE FLASH_OBB_PAYLOAD_SIZE = 0x002EA000
+
+ DEFINE FLASH_IBB_REGION_MAPPED_BASE = 0xFF980000
+ DEFINE FLASH_IBB_REGION_SIZE = 0x0007A000
+
+ DEFINE FLASH_OBB_REGION_MAPPED_BASE = 0xFFC82000
+ DEFINE FLASH_OBB_REGION_SIZE = 0x002EB000
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into the Flash Device Image. Each FD section
+# defines one flash "device" image. A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash" image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+[FD.SOC]
+ #
+ # This FD currently contains all FV regions needed full BIOS.rom
+ #
+ BaseAddress = $(FLASH_BASE) #The base address of the FLASH Device.
+ Size = $(FLASH_SIZE) #The flash size in bytes of the FLASH Device.
+ ErasePolarity = 1
+ BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the FLASH Device.
+ NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in the FLASH Device.
+
+ #
+ # Flash location override based on actual flash map
+ #
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashBaseAddress = $(FLASH_BASE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashSize = $(FLASH_SIZE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageBase = $(FLASH_BASE) + $(FLASH_REGION_VPD_OFFSET)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize = $(FLASH_REGION_VPD_SIZE) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE) + $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashObbPayloadMappedBase = $(FLASH_OBB_PAYLOAD_MAPPED_BASE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashObbPayloadSize = $(FLASH_OBB_PAYLOAD_SIZE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashIbbRegionMappedBase = $(FLASH_IBB_REGION_MAPPED_BASE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashIbbRegionSize = $(FLASH_IBB_REGION_SIZE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashObbRegionMappedBase = $(FLASH_OBB_REGION_MAPPED_BASE)
+ SET gPlatformModuleTokenSpaceGuid.PcdFlashObbRegionSize = $(FLASH_OBB_REGION_SIZE)
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
+#
+################################################################################
+
+ #
+ # FV IBBR#2
+ #
+ $(FLASH_REGION_FV_IBBR_OFFSET)|$(FLASH_REGION_FV_IBBR_SIZE)
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBRBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBRSize
+ FV = FVIBBR
+
+ #
+ # Main Block
+ #
+ $(FLASH_REGION_OBB_OFFSET)|$(FLASH_REGION_OBB_SIZE)
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBSize
+ FV = FVOBB
+
+ $(FLASH_REGION_OBBX_OFFSET)|$(FLASH_REGION_OBBX_SIZE)
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBXBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvOBBXSize
+ FV = FVOBBX
+
+
+ $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+ !if $(SECURE_BOOT_ENABLE)
+ FILE = $(WORKSPACE)/Platform/$(PLATFORM_PACKAGE_COMMON)/Binaries/Prebuild/X64/VpdBlockSecBoot.bin
+ !else
+ !if $(TOOL_CHAIN_TAG) != GCC47
+ FILE = $(WORKSPACE)/Platform/$(PLATFORM_PACKAGE_COMMON)/Binaries/Prebuild/X64/VpdBlock.bin
+ !else
+ #
+ # Temporary solution for not having FCE linux version
+ #
+ FILE = $(WORKSPACE)/Platform/$(PLATFORM_PACKAGE_COMMON)/Binaries/Prebuild/X64/VpdBlockVar.bin
+ !endif
+ !endif
+
+ $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+ #
+ # NV_FTW_WORKING
+ #
+ DATA = {
+ 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
+ 0xA0, 0xCE, 0x65, 0x00, 0xFD, 0x9F, 0x1B, 0x95,
+ # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
+ 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
+ # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
+ 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+ }
+
+ $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+
+
+ #
+ # FV IBBM
+ #
+ $(FLASH_REGION_FV_IBBM_OFFSET)|$(FLASH_REGION_FV_IBBM_SIZE)
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBMBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBMSize
+ FV = FVIBBM
+
+ #
+ # FV IBBL
+ #
+ $(FLASH_REGION_FV_IBBL_OFFSET)|$(FLASH_REGION_FV_IBBL_SIZE)
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBLBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBLSize
+ FV = FVIBBL
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file. This section also defines order the components and modules are positioned
+# within the image. The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+[FV.FVIBBR]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16 #FV alignment and FV attributes setting.
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
+
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
+
+ INF $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf
+!if $(PEI_DISPLAY_ENABLE) == TRUE
+ FILE FREEFORM = 7BB28B99-61BB-11D5-9A5D-0090273FC14D {
+ SECTION RAW = $(PLATFORM_PACKAGE_COMMON)/Binaries/Logo/Logo.bmp
+ }
+
+ FILE FREEFORM = E08CA6D5-8D02-43ae-ABB1-952CC787C933 {
+ SECTION RAW = $(PLATFORM_PACKAGE_COMMON)/Binaries/Vbt/VbtBxtEdp.bin
+ SECTION UI = "IntelGopVbt1"
+ }
+!endif
+
+ INF $(PLATFORM_SI_PACKAGE)/Cpu/SmmAccess/Pei/SmmAccess.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/SmmControl/Pei/SmmControl.inf
+ INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
+ INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
+ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+
+!if $(FTPM_ENABLE) == TRUE
+ INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
+!endif
+
+!if $(TPM12_ENABLE) == TRUE
+ INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
+!endif
+
+!if $(ACPI50_ENABLE) == TRUE
+ INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
+!endif
+
+!if $(INTEL_FPDT_ENABLE) == TRUE
+ INF $(PLATFORM_PACKAGE_COMMON)/FpdtPei/FpdtPei.inf
+!endif
+
+!if $(PERFORMANCE_ENABLE) == TRUE
+ INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
+!endif
+
+[FV.FVIBBM]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvBaseAddress = 0xFEF45000
+
+ FvAlignment = 16 #FV alignment and FV attributes setting.
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
+
+APRIORI PEI {
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformDebugPei/PlatformDebugPei.inf
+}
+
+ INF $(PLATFORM_SI_PACKAGE)/Cpu/SecCore/Vtf0SecCore.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Core/Pei/PeiMain.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+
+
+ INF $(PLATFORM_SI_PACKAGE)/VariableStorage/Pei/CseVariableStoragePei/CseVariableStoragePei.inf
+
+ INF $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformDebugPei/PlatformDebugPei.inf
+
+#
+# ----------------------------------------- IMPORTANT ---------------------------------------------
+# On BXT, ALL PEIM's that produce PPI's prior to MemoryInit, MUST register for Shadow callback.
+# This is because eMMC boot does not have SPI, and after L2 teardown, all preMem addrs are invalid.
+# -------------------------------------------------------------------------------------------------
+#
+ INF $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformPreMemPei/PlatformPreMemPei.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
+ INF RuleOverride = RESET_VECTOR USE = IA32 BroxtonSiPkg/Cpu/ResetVector/Vtf1/Bin/ResetVector.inf
+
+[FV.FVIBBL]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16 #FV alignment and FV attributes setting.
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+ FvNameGuid = 6699ECAF-3477-4c76-A4E9-D41F46928BE9
+ #
+ # RESET VECTOR
+ #
+ INF RuleOverride = RESET_VECTOR USE = IA32 BroxtonSiPkg/Cpu/ResetVector/Vtf0/Bin/ResetVector.inf
+
+[FV.FVMAIN]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+ FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
+
+APRIORI DXE {
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+ INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformStatusCodeHandler/RuntimeDxe/PlatformStatusCodeHandlerRuntimeDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformStatusCodeHandler/RuntimeDxe/PlatformPort80HandlerRuntimeDxe.inf
+ }
+
+ FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
+ SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(IA32_X64)/BiosId.bin
+ }
+
+ #
+ # EDK II Related Platform codes
+ #
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+!if $(ACPI50_ENABLE) == TRUE
+ INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
+!endif
+
+ INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+ INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformStatusCodeHandler/RuntimeDxe/PlatformStatusCodeHandlerRuntimeDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformStatusCodeHandler/RuntimeDxe/PlatformPort80HandlerRuntimeDxe.inf
+
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+ INF MdeModulePkg/Universal/Metronome/Metronome.inf
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
+
+!if $(DATAHUB_ENABLE) == TRUE
+ INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
+!endif
+
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/DptfDxe/DptfDxe.inf
+ INF $(PLATFORM_SI_PACKAGE)/Cpu/SmmAccess/Dxe/SmmAccess.inf
+
+ INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
+
+ INF $(PLATFORM_SI_PACKAGE)/SiInit/Dxe/SiInitDxe.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/Reset/RuntimeDxe/ScReset.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/ScInit/Dxe/ScInitDxe.inf
+ INF $(PLATFORM_SI_PACKAGE)/NorthCluster/PciHostBridge/Dxe/PciHostBridge.inf
+ INF $(PLATFORM_SI_PACKAGE)/NorthCluster/SaInit/Dxe/SaInit.inf
+ INF RuleOverride = ACPITABLE $(PLATFORM_SI_PACKAGE)/NorthCluster/AcpiTables/SaAcpiTables.inf
+
+ #
+ # EDK II Related Platform codes
+ #
+ INF $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformDxe/PlatformDxe.inf
+
+ INF RuleOverride = ACPITABLE $(PLATFORM_PACKAGE_COMMON)/Acpi/AcpiTablesPCAT/AcpiTables.inf
+ INF RuleOverride = ACPITABLE $(PLATFORM_PACKAGE_COMMON)/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
+
+ #
+ # PCI
+ #
+ INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+
+ #
+ # SDIO
+ #
+!if $(EMMC_DRIVER_ENABLE) == TRUE
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/Sdio/Dxe/MMC/MmcHostDxe/MmcHostDxe.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/Sdio/Dxe/MMC/MmcMediaDeviceDxe/MmcMediaDeviceDxe.inf
+!endif
+
+ INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
+
+ #
+ # IDE/SCSI/AHCI
+ #
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+
+ #
+ # FAT file system
+ #
+ FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
+ SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(IA32_X64_LC)/Fat.efi
+ }
+
+!if $(FTPM_ENABLE) == TRUE
+ INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
+!endif
+
+!if $(TPM12_ENABLE) == TRUE
+ INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
+!endif
+
+[FV.FVMAIN2]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+ FvNameGuid = 5968B09B-6C7E-4356-8720-AC897E800270
+
+!if $(ACPI50_ENABLE) == TRUE
+ INF MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf
+ INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
+!endif
+
+ INF $(PLATFORM_SI_PACKAGE)/Cpu/CpuInit/Dxe/CpuInitDxe.inf
+ INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
+
+
+ !if $(SMM_VARIABLE_ENABLE)
+ INF $(PLATFORM_SI_PACKAGE)/VariableStorage/Dxe/CseVariableStorageSmmRuntimeDxe/CseVariableStorageSmmRuntimeDxe.inf
+ !else
+ INF $(PLATFORM_SI_PACKAGE)/VariableStorage/Dxe/CseVariableStorageSmmRuntimeDxe/CseVariableStorageRuntimeDxe.inf
+ !endif
+
+
+!if $(SMM_VARIABLE_ENABLE)
+ INF $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
+ INF $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
+!else #SMM_VARIABLE_ENABLE
+ INF $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+!endif #SMM_VARIABLE_ENABLE
+
+ INF $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformSetupDxe/PlatformSetupDxe.inf
+
+ INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/SmmControl/RuntimeDxe/SmmControl.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/ScSmiDispatcher/Smm/ScSmiDispatcher.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/ScInit/Smm/ScInitSmm.inf
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/SampleCode/BiosWriteProtect/Smm/ScBiosWriteProtect.inf
+
+!if $(SEC_ENABLE) == TRUE
+ INF $(PLATFORM_SI_PACKAGE)/Txe/Heci/Dxe/Hecidrv.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/SeCPolicyInitDxe/SeCPolicyInitDxe.inf
+!endif
+
+!if $(FTPM_ENABLE) == TRUE
+ INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
+ INF RuleOverride = DRIVER_ACPITABLE $(PLATFORM_PACKAGE_COMMON)/SampleCode/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
+!endif
+
+!if $(TPM12_ENABLE) == TRUE
+ INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
+!endif
+
+ #
+ # EDK II Related Platform codes
+ #
+ INF $(PLATFORM_PACKAGE_COMMON)/PlatformSmm/PlatformSmm.inf
+ INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
+
+!if $(NVM_VARIABLE_ENABLE) == TRUE
+ INF $(PLATFORM_SI_PACKAGE)/Txe/Heci/Smm/HeciSmm.inf
+ INF $(PLATFORM_SI_PACKAGE)/Txe/Heci/Smm/HeciSmmRuntimeDxe.inf
+!endif
+
+ INF $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformInfoDxe/PlatformInfoDxe.inf
+ #INF $(TABLET_PLATFORM_PACKAGE)/PlatformCpuInfo/PlatformCpuInfoDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/SaveMemoryConfigDxe/SaveMemoryConfigDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Features/S3/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
+
+!if $(GOP_DRIVER_ENABLE) == TRUE
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/PlatformGopPolicyDxe/PlatformGopPolicyDxe.inf
+ FILE FREEFORM = E08CA6D5-8D02-43ae-ABB1-952CC787C933 {
+ SECTION RAW = $(PLATFORM_PACKAGE_COMMON)/Binaries/Vbt/VbtBxtEdp.bin
+ SECTION UI = "IntelGopVbt1"
+ }
+!endif
+
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+
+ FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
+ SECTION RAW = $(PLATFORM_PACKAGE_COMMON)/Binaries/Logo/Logo.bmp
+}
+
+ INF $(PLATFORM_PACKAGE_COMMON)/PnpDxe/PnpDxe.inf
+
+ #
+ # SMM
+ #
+ INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
+ INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
+ INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+ INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
+ INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
+ INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Compatibility/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Compatibility/SmmSxDispatch2OnSmmSxDispatchThunk/SmmSxDispatch2OnSmmSxDispatchThunk.inf
+
+!if $(PPM_ENABLE) == TRUE
+ INF $(PLATFORM_SI_PACKAGE)/Cpu/PowerManagement/Dxe/PowerMgmtDxe.inf
+
+ INF $(PLATFORM_SI_PACKAGE)/Cpu/PowerManagement/Smm/PowerMgmtSmm.inf
+
+ INF RuleOverride = ACPITABLE $(PLATFORM_SI_PACKAGE)/Cpu/AcpiTables/CpuAcpiTables.inf
+!endif
+
+ #
+ # ACPI
+ #
+ INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Features/S3/BootScriptSaveDxe/BootScriptSaveDxe.inf
+ INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
+ #
+ # ISA
+ #
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/Wpce791/SiO791.inf
+ INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
+ INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
+
+ #
+ # LPSS UART Serial
+ #
+!if $(SOURCE_DEBUG_ENABLE) == FALSE
+ INF $(PLATFORM_PACKAGE_COMMON)/Console/LpssUartSerialDxe/LpssUartSerialDxe.inf
+!endif
+
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+!if $(SATA_ENABLE) == TRUE
+ INF $(PLATFORM_SI_PACKAGE)/SouthCluster/SataController/Dxe/SataController.inf
+!endif
+ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+
+ #This needs to be renamed as its being used for UFS in BXT.
+!if $(SCSI_ENABLE) == TRUE
+ INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+!endif
+ INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
+ #
+ # Console
+ #
+ INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+ INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+
+ #
+ # USB
+ #
+!if $(USB_ENABLE) == TRUE && $(USB_NATIVE_ENABLE) == TRUE
+ INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
+ INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+!endif
+
+ #
+ # SMBIOS
+ #
+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ INF $(PLATFORM_PACKAGE_COMMON)/Features/Smbios/SmBiosMiscDxe/SmBiosMiscDxe.inf
+
+ #
+ # LAN/Network
+ #
+!if $(NETWORK_ENABLE) == TRUE
+ FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
+ SECTION PE32 = BroxtonPlatformPkg/Common/Binaries/UNDI/I210PcieUndiDxe/E7006X3.EFI
+ SECTION UI = "UNDI"
+ }
+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
+ INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
+ INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
+ INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
+ INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
+ INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
+ INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
+ INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
+
+ !if $(NETWORK_IP6_ENABLE) == TRUE
+ INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
+ INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
+ INF NetworkPkg/IpSecDxe/IpSecDxe.inf
+ INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
+ INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
+ !endif
+ !if $(NETWORK_IP6_ENABLE) == TRUE
+ INF NetworkPkg/TcpDxe/TcpDxe.inf
+ INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
+ !else
+ INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
+ INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
+ !endif
+ !if $(NETWORK_VLAN_ENABLE) == TRUE
+ INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
+ !endif
+ !if $(NETWORK_ISCSI_ENABLE) == TRUE
+ !if $(NETWORK_IP6_ENABLE) == TRUE
+ INF NetworkPkg/IScsiDxe/IScsiDxe.inf
+ !else
+ INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
+ !endif
+ !endif
+!endif
+
+ #
+ # UEFI Shell
+ #
+ FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
+ SECTION PE32 = ShellBinPkg/UefiShell/$(IA32_X64_LC)/Shell.efi
+ }
+
+ #
+ # USB TypeC
+ #
+ INF $(PLATFORM_PACKAGE_COMMON)/Acpi/UsbTypeCDxe/UsbTypeCDxe.inf
+
+[FV.FVOBB]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+
+FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+!if $(LZMA_ENABLE) == TRUE
+# LZMA Compress
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+!else
+ !if $(DXE_COMPRESS_ENABLE) == TRUE
+ # Tiano Compress
+ SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+ !else
+ # No Compress
+ SECTION COMPRESS PI_NONE {
+ SECTION FV_IMAGE = FVMAIN
+ }
+ !endif
+!endif
+}
+
+[FV.FVOBBX]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+
+FILE FV_IMAGE = 7F914768-5EB4-47b0-A125-64ED11338FA3 {
+!if $(LZMA_ENABLE) == TRUE
+# LZMA Compress
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN2
+ }
+!else
+ !if $(DXE_COMPRESS_ENABLE) == TRUE
+ # Tiano Compress
+ SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FVMAIN2
+ }
+ !else
+ # No Compress
+ SECTION COMPRESS PI_NONE {
+ SECTION FV_IMAGE = FVMAIN2
+ }
+ !endif
+!endif
+}
+
+[FV.SETUP_DATA]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ #NumBlocks = 0x10
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+
+[FV.Update_Data]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+
+FILE RAW = 88888888-8888-8888-8888-888888888888 {
+ FD = Soc
+}
+
+[FV.BiosUpdateCargo]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+
+[FV.BiosUpdate]
+ BlockSize = $(FLASH_BLOCK_SIZE)
+ FvAlignment = 16
+ ERASE_POLARITY = 1
+ MEMORY_MAPPED = TRUE
+ STICKY_WRITE = TRUE
+ LOCK_CAP = TRUE
+ LOCK_STATUS = TRUE
+ WRITE_DISABLED_CAP = TRUE
+ WRITE_ENABLED_CAP = TRUE
+ WRITE_STATUS = TRUE
+ WRITE_LOCK_CAP = TRUE
+ WRITE_LOCK_STATUS = TRUE
+ READ_DISABLED_CAP = TRUE
+ READ_ENABLED_CAP = TRUE
+ READ_STATUS = TRUE
+ READ_LOCK_CAP = TRUE
+ READ_LOCK_STATUS = TRUE
+
+[Capsule.Capsule_Boot]
+CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
+CAPSULE_FLAGS = PersistAcrossReset
+CAPSULE_HEADER_SIZE = 0x20
+
+FV = BiosUpdate
+
+[Capsule.Capsule_Reset]
+CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
+CAPSULE_FLAGS = PersistAcrossReset
+CAPSULE_HEADER_SIZE = 0x20
+
+FV = BiosUpdate
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+[Rule.Common.SEC]
+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+ TE TE |.efi
+ #UI STRING ="$(MODULE_NAME)" Optional
+ VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.SEC.RESET_VECTOR]
+ FILE RAW = $(NAMED_GUID) {
+ RAW RAW |.raw
+ }
+
+[Rule.Common.PEI_CORE]
+ FILE PEI_CORE = $(NAMED_GUID) {
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ #UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.PEIM]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ TE TE Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ #UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.PEIM.BIOSID]
+ FILE PEIM = $(NAMED_GUID) {
+ RAW BIN BiosId.bin
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.USER_DEFINED.APINIT]
+ FILE RAW = $(NAMED_GUID) Fixed Align=4K {
+ RAW SEC_BIN |.com
+ }
+
+[Rule.Common.USER_DEFINED.LEGACY16]
+ FILE FREEFORM = $(NAMED_GUID) {
+ UI STRING="$(MODULE_NAME)" Optional
+ RAW BIN |.bin
+ }
+
+[Rule.Common.USER_DEFINED.ASM16]
+ FILE FREEFORM = $(NAMED_GUID) {
+ UI STRING="$(MODULE_NAME)" Optional
+ RAW BIN |.com
+ }
+
+[Rule.Common.DXE_CORE]
+ FILE DXE_CORE = $(NAMED_GUID) {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.DXE_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ RAW ACPI Optional |.acpi
+ RAW ASL Optional |.aml
+ }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.DXE_SMM_DRIVER]
+ FILE SMM = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
+ FILE SMM = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ RAW ACPI Optional |.acpi
+ RAW ASL Optional |.aml
+ }
+
+[Rule.Common.SMM_CORE]
+ FILE SMM_CORE = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_APPLICATION]
+ FILE APPLICATION = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.USER_DEFINED]
+ FILE FREEFORM = $(NAMED_GUID) {
+ UI STRING="$(MODULE_NAME)" Optional
+ RAW BIN |.bin
+ }
+
+[Rule.Common.USER_DEFINED.ACPITABLE]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW ACPI Optional |.acpi
+ RAW ASL Optional |.aml
+ }
+
+[Rule.Common.USER_DEFINED.ACPITABLE2]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW ASL Optional |.aml
+ }
+
+[Rule.Common.PE32_PEIM]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.PE32_PEIM.BIOSID]
+ FILE PEIM = $(NAMED_GUID) {
+ RAW BIN BiosId.bin
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.BS_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.RT_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.APPLICATION]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.ACPITABLE]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW ACPI Optional |.acpi
+ RAW ASL Optional |.aml
+ }
+
+[Rule.Common.PE32_PEIM.Align32K]
+ FILE PEIM = $(NAMED_GUID) Align=32K {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.PE32_PEIM.Align64K]
+ FILE PEIM = $(NAMED_GUID) Align=64K {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.BS_DRIVER.NONECOMPRESS]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ COMPRESS PI_NONE {
+ PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+ }
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc b/Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc
new file mode 100644
index 0000000000..083e32b51e
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc
@@ -0,0 +1,179 @@
+## @file
+# Platform description.
+#
+# Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = BroxtonPlatformPkg
+ PLATFORM_GUID = 1D3686CF-D2CE-4B6E-9F59-28F61976CB73
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = IA32
+ BUILD_TARGETS = DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+
+ #
+ # Set platform specific package/folder names, same as passed from PREBUILD script.
+ # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package build folder
+ # The CORE_PACKAGES value could be set to '.' if Core packages get moved to Workspace root
+ #
+ DEFINE SILICON_NAME = BroxtonSoC
+ DEFINE PLATFORM_PACKAGE_COMMON = $(PLATFORM_NAME)/Common
+ DEFINE PLATFORM_SI_PACKAGE = $(SILICON_NAME)/BroxtonSiPkg
+
+ !include $(PLATFORM_NAME)/DefineAtBuildMacros.dsc
+ !include $(PLATFORM_NAME)/PlatformDsc/Defines.dsc
+
+################################################################################
+#
+# SKU Identification section - list of all SKU IDs supported by this Platform.
+#
+################################################################################
+[SkuIds]
+ 0|DEFAULT # The entry: 0|DEFAULT is reserved and always required.
+
+################################################################################
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+################################################################################
+[LibraryClasses.Common]
+ #
+ # RC Package
+ #
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
+ #
+ # Platform
+ #
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.dsc
+
+[LibraryClasses.IA32.SEC]
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ !endif
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+[LibraryClasses.common.SEC]
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+
+[LibraryClasses.IA32.PEIM, LibraryClasses.IA32.PEI_CORE, LibraryClasses.IA32.SEC]
+!if $(PERFORMANCE_ENABLE) == TRUE
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ PerformanceLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiFpdtPerformanceLib/PeiFpdtPerformanceLib.inf
+ !else
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ !endif
+!endif
+ #
+ # RC Package
+ #
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
+
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.IA32.PEI.dsc
+
+[LibraryClasses.IA32.PEIM, LibraryClasses.IA32.PEI_CORE]
+!if $(PERFORMANCE_ENABLE) == TRUE
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ PerformanceLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiFpdtPerformanceLib/PeiFpdtPerformanceLib.inf
+ !else
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ !endif
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+!endif
+
+[LibraryClasses.IA32.DXE_DRIVER]
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ !endif
+
+[LibraryClasses.Common.DXE_DRIVER, LibraryClasses.Common.DXE_CORE, LibraryClasses.Common.DXE_SMM_DRIVER, LibraryClasses.Common.SMM_CORE, LibraryClasses.Common.DXE_RUNTIME_DRIVER]
+ #
+ # RC Package
+ #
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
+
+[LibraryClasses.Common.DXE_DRIVER]
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ !endif
+
+[LibraryClasses.Common.DXE_CORE]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.DxeCore.dsc
+
+[LibraryClasses.Common.DXE_SMM_DRIVER]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.DxeSmmDriver.dsc
+
+[LibraryClasses.Common.SMM_CORE]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.SmmCore.dsc
+
+[LibraryClasses.Common.DXE_RUNTIME_DRIVER]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.DxeRuntimeDriver.dsc
+
+[LibraryClasses.Common.UEFI_APPLICATION]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+[PcdsFeatureFlag.Common]
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsFeatureFlag.dsc
+
+[PcdsFixedAtBuild.Common]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|0x9
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsFixedAtBuild.dsc
+
+[PcdsPatchableInModule.Common]
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x807B05FF
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x$(PLATFORM_PCIEXPRESS_BASE)
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|FALSE
+ ## Default Creator ID for ACPI table creation, override to "BRXT"
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x54585242
+
+[PcdsDynamicHii.Common.DEFAULT]
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsDynamicHii.Default.dsc
+
+[PcdsDynamicDefault.Common.DEFAULT]
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsDynamicDefault.Default.dsc
+
+[Components.IA32]
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc
+ !include $(PLATFORM_NAME)/PlatformDsc/Components.IA32.dsc
+ !include $(PLATFORM_NAME)/PlatformDsc/Components.dsc
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/ScInit/Dxe/ScInitDxe.inf
+
+################################################################################
+#
+# Build Options section - list of all Build Flags used by this Platform.
+#
+################################################################################
+#[BuildOptions.Common]
+
+[BuildOptions.Common.EDKII]
+ !include $(PLATFORM_NAME)/PlatformDsc/BuildOptions.EDKII.dsc
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc b/Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc
new file mode 100644
index 0000000000..19b8f349e7
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc
@@ -0,0 +1,181 @@
+## @file
+# Platform description.
+#
+# Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = BroxtonPlatformPkg
+ PLATFORM_GUID = 1D3686CF-D2CE-4B6E-9F59-28F61976CB73
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+
+ OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
+ SUPPORTED_ARCHITECTURES = IA32|X64
+ BUILD_TARGETS = DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+
+ #
+ # Set platform specific package/folder names, same as passed from PREBUILD script.
+ # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package build folder
+ # The CORE_PACKAGES value could be set to '.' if Core packages get moved to Workspace root
+ #
+ DEFINE SILICON_NAME = BroxtonSoC
+ DEFINE PLATFORM_PACKAGE_COMMON = $(PLATFORM_NAME)/Common
+ DEFINE PLATFORM_SI_PACKAGE = $(SILICON_NAME)/BroxtonSiPkg
+
+ !include $(PLATFORM_NAME)/DefineAtBuildMacros.dsc
+ !include $(PLATFORM_NAME)/PlatformDsc/Defines.dsc
+
+################################################################################
+#
+# SKU Identification section - list of all SKU IDs supported by this Platform.
+#
+################################################################################
+[SkuIds]
+ 0|DEFAULT # The entry: 0|DEFAULT is reserved and always required.
+
+################################################################################
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+################################################################################
+[LibraryClasses.Common]
+ #
+ # RC Package
+ #
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
+ #
+ # Platform
+ #
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.dsc
+
+[LibraryClasses.IA32.SEC]
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ !endif
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+[LibraryClasses.common.SEC]
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+
+[LibraryClasses.IA32.PEIM, LibraryClasses.IA32.PEI_CORE, LibraryClasses.IA32.SEC]
+!if $(PERFORMANCE_ENABLE) == TRUE
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ PerformanceLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiFpdtPerformanceLib/PeiFpdtPerformanceLib.inf
+ !else
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ !endif
+!endif
+ #
+ # RC Package
+ #
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
+
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.IA32.PEI.dsc
+
+[LibraryClasses.IA32.PEIM, LibraryClasses.IA32.PEI_CORE]
+!if $(PERFORMANCE_ENABLE) == TRUE
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ PerformanceLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiFpdtPerformanceLib/PeiFpdtPerformanceLib.inf
+ !else
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+ !endif
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+!endif
+
+[LibraryClasses.IA32.DXE_DRIVER]
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ !endif
+
+[LibraryClasses.Common.DXE_DRIVER, LibraryClasses.Common.DXE_CORE, LibraryClasses.Common.DXE_SMM_DRIVER, LibraryClasses.Common.SMM_CORE, LibraryClasses.Common.DXE_RUNTIME_DRIVER]
+ #
+ # RC Package
+ #
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc
+
+[LibraryClasses.Common.DXE_DRIVER]
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ !endif
+
+[LibraryClasses.Common.DXE_CORE]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.DxeCore.dsc
+
+[LibraryClasses.Common.DXE_SMM_DRIVER]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.DxeSmmDriver.dsc
+
+[LibraryClasses.Common.SMM_CORE]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.SmmCore.dsc
+
+[LibraryClasses.Common.DXE_RUNTIME_DRIVER]
+ !include $(PLATFORM_NAME)/PlatformDsc/LibraryClasses.DxeRuntimeDriver.dsc
+
+[LibraryClasses.Common.UEFI_APPLICATION]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+[PcdsFeatureFlag.Common]
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsFeatureFlag.dsc
+
+[PcdsFixedAtBuild.Common]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|0x9
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsFixedAtBuild.dsc
+
+[PcdsPatchableInModule.Common]
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x807B05FF
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x$(PLATFORM_PCIEXPRESS_BASE)
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|FALSE
+ ## Default Creator ID for ACPI table creation, override to "BRXT"
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x54585242
+
+[PcdsDynamicHii.Common.DEFAULT]
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsDynamicHii.Default.dsc
+
+[PcdsDynamicDefault.Common.DEFAULT]
+ !include $(PLATFORM_NAME)/PlatformDsc/PcdsDynamicDefault.Default.dsc
+
+[Components.IA32]
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc
+ !include $(PLATFORM_NAME)/PlatformDsc/Components.IA32.dsc
+
+[Components.X64]
+ !include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc
+ !include $(PLATFORM_NAME)/PlatformDsc/Components.dsc
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/ScInit/Dxe/ScInitDxe.inf
+
+################################################################################
+#
+# Build Options section - list of all Build Flags used by this Platform.
+#
+################################################################################
+#[BuildOptions.Common]
+
+[BuildOptions.Common.EDKII]
+ !include $(PLATFORM_NAME)/PlatformDsc/BuildOptions.EDKII.dsc
+
diff --git a/Platform/BroxtonPlatformPkg/cln.sh b/Platform/BroxtonPlatformPkg/cln.sh
new file mode 100644
index 0000000000..db6792cdf0
--- /dev/null
+++ b/Platform/BroxtonPlatformPkg/cln.sh
@@ -0,0 +1,63 @@
+echo
+echo Run build cleanall...
+echo
+
+echo
+echo Cleaning Directories...
+echo
+
+if [ -d "Build" ]; then
+ rm -r Build
+fi
+
+if [ -d "Conf/.cache" ]; then
+ rm -r Conf/.cache
+fi
+
+echo
+echo Cleaning remaining files...
+echo
+
+if [ -e $(pwd)/EDK2.log ]; then
+ rm $(pwd)/EDK2.log
+fi
+
+if [ -e $(pwd)/Unitool.log ]; then
+ rm $(pwd)/Unitool.log
+fi
+
+if [ -e $(pwd)/Conf/target.txt ]; then
+ rm $(pwd)/Conf/target.txt
+fi
+
+if [ -e $(pwd)/Conf/BiosId.env ]; then
+ rm $(pwd)/Conf/BiosId.env
+fi
+
+if [ -e $(pwd)/Conf/tools_def.txt ]; then
+ rm $(pwd)/Conf/tools_def.txt
+fi
+
+if [ -e $(pwd)/Conf/build_rule.txt ]; then
+ rm $(pwd)/Conf/build_rule.txt
+fi
+
+if [ -e $(pwd)/Conf/BuildEnv.sh ]; then
+ rm $(pwd)/Conf/BuildEnv.sh
+fi
+
+if [ -e $(pwd)/Platform/BxtPlatformPkg/DefineAtBuildMacros.dsc ]; then
+ rm $(pwd)/Platform/BxtPlatformPkg/DefineAtBuildMacros.dsc
+fi
+
+if [ -e $(pwd)/Platform/AplPlatSamplePkg/DefineAtBuildMacros.dsc ]; then
+ rm $(pwd)/Platform/AplPlatSamplePkg/DefineAtBuildMacros.dsc
+fi
+
+if [ -e $(pwd)/FlashMap.h ]; then
+ rm $(pwd)/FlashMap.h
+fi
+
+echo
+echo All done...
+echo \ No newline at end of file
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-01 08:49:31 +0000