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-rw-r--r--ArmPkg/Drivers/CpuDxe/CpuDxe.c2
-rw-r--r--ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c4
-rw-r--r--ArmPkg/Drivers/PL390Gic/PL390GicSec.c37
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc1
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf10
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc1
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf18
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc1
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h1
-rwxr-xr-xArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c2
-rw-r--r--ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.c4
-rwxr-xr-xArmPlatformPkg/PrePi/ModuleEntryPoint.S4
-rw-r--r--ArmPlatformPkg/PrePi/ModuleEntryPoint.asm4
-rw-r--r--BeagleBoardPkg/Bds/Bds.inf6
-rwxr-xr-xBeagleBoardPkg/BeagleBoardPkg-next.dsc41
-rw-r--r--BeagleBoardPkg/BeagleBoardPkg.dsc18
-rw-r--r--BeagleBoardPkg/BeagleBoardPkg.fdf1
-rw-r--r--BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c2
-rw-r--r--BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.inf2
-rwxr-xr-xBeagleBoardPkg/b.bat2
-rwxr-xr-xBeagleBoardPkg/build-next.sh2
21 files changed, 58 insertions, 105 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c
index f14a676383..337ab7cfb5 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.c
@@ -259,7 +259,7 @@ CpuDxeInitialize (
// If the platform is a MPCore system then install the Configuration Table describing the
// secondary core states
- if (ArmIsMPCore()) {
+ if (ArmIsMpCore()) {
PublishArmProcessorTable();
}
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c
index 09ef00b85f..55ff56e797 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicNonSec.c
@@ -27,7 +27,7 @@ ArmGicEnableInterruptInterface (
* Enable the CPU interface in Non-Secure world
* Note: The ICCICR register is banked when Security extensions are implemented
*/
- MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR,0x00000001);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
}
VOID
@@ -40,5 +40,5 @@ ArmGicEnableDistributor (
* Enable GIC distributor in Non-Secure world.
* Note: The ICDDCR register is banked when Security extensions are implemented
*/
- MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x00000001);
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
}
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 244f9ecf2a..57ae14150e 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -27,28 +27,31 @@ ArmGicSetupNonSecure (
IN INTN GicInterruptInterfaceBase
)
{
- UINTN CachedPriorityMask = MmioRead32(GicInterruptInterfaceBase + ARM_GIC_ICCPMR);
+ UINTN InterruptId;
+ UINTN CachedPriorityMask;
+
+ CachedPriorityMask = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR);
// Set priority Mask so that no interrupts get through to CPU
- MmioWrite32(GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0);
// Check if there are any pending interrupts
//TODO: could be extended to take Peripheral interrupts into consideration, but at the moment only SGI's are taken into consideration.
- while(0 != (MmioRead32(GicDistributorBase + ARM_GIC_ICDICPR) & 0xF)) {
+ while(0 != (MmioRead32 (GicDistributorBase + ARM_GIC_ICDICPR) & 0xF)) {
// Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal
- UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
+ InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
// Write to End of interrupt signal
- MmioWrite32(GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
}
// Ensure all GIC interrupts are Non-Secure
- MmioWrite32(GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff); // IRQs 0-31 are Non-Secure : Private Peripheral Interrupt[31:16] & Software Generated Interrupt[15:0]
- MmioWrite32(GicDistributorBase + ARM_GIC_ICDISR + 4, 0xffffffff); // IRQs 32-63 are Non-Secure : Shared Peripheral Interrupt
- MmioWrite32(GicDistributorBase + ARM_GIC_ICDISR + 8, 0xffffffff); // And another 32 in case we're on the testchip : Shared Peripheral Interrupt (2)
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff); // IRQs 0-31 are Non-Secure : Private Peripheral Interrupt[31:16] & Software Generated Interrupt[15:0]
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + 4, 0xffffffff); // IRQs 32-63 are Non-Secure : Shared Peripheral Interrupt
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + 8, 0xffffffff); // And another 32 in case we're on the testchip : Shared Peripheral Interrupt (2)
// Ensure all interrupts can get through the priority mask
- MmioWrite32(GicInterruptInterfaceBase + ARM_GIC_ICCPMR, CachedPriorityMask);
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, CachedPriorityMask);
}
VOID
@@ -57,14 +60,13 @@ ArmGicEnableInterruptInterface (
IN INTN GicInterruptInterfaceBase
)
{
- MmioWrite32(GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF); /* Set Priority Mask to allow interrupts */
+ // Set Priority Mask to allow interrupts
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF);
- /*
- * Enable CPU interface in Secure world
- * Enable CPU inteface in Non-secure World
- * Signal Secure Interrupts to CPU using FIQ line *
- */
- MmioWrite32(GicInterruptInterfaceBase + ARM_GIC_ICCICR,
+ // Enable CPU interface in Secure world
+ // Enable CPU inteface in Non-secure World
+ // Signal Secure Interrupts to CPU using FIQ line *
+ MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR,
ARM_GIC_ICCICR_ENABLE_SECURE |
ARM_GIC_ICCICR_ENABLE_NS |
ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ);
@@ -76,5 +78,6 @@ ArmGicEnableDistributor (
IN INTN GicDistributorBase
)
{
- MmioWrite32(GicDistributorBase + ARM_GIC_ICDDCR, 1); // turn on the GIC distributor
+ // Turn on the GIC distributor
+ MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
}
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
index a1fd9e2739..2c162edefd 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
@@ -97,7 +97,6 @@
# BDS Libraries
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
[LibraryClasses.common.SEC]
DebugSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
index cb130e0a17..ccc06db16c 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
@@ -171,9 +171,13 @@ READ_LOCK_STATUS = TRUE
INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
#
- # Semi-hosting filesystem
+
+!if $(EDK2_ARMVE_STANDALONE) != 1
+ #
+ # Semi-hosting filesystem (Required the Hardware Debugger to be connected)
#
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+!endif
#
# FAT filesystem + GPT/MBR partitioning
@@ -194,6 +198,10 @@ READ_LOCK_STATUS = TRUE
#
INF EmbeddedPkg/Ebl/Ebl.inf
+!if $(EDK2_ARMVE_UEFI2_SHELL) == 1
+ INF ShellPkg/Application/Shell/Shell.inf
+!endif
+
#
# Bds
#
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
index e381f1fb0c..f2a96cb968 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
@@ -278,7 +278,6 @@
# Application
#
EmbeddedPkg/Ebl/Ebl.inf
- ArmPkg/Application/VariableServicesTest/VariableServicesTest.inf
!ifdef $(EDK2_ARMVE_UEFI2_SHELL)
ShellPkg/Application/Shell/Shell.inf {
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
index 0333e442df..f54404bc45 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
@@ -157,31 +157,13 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
#
- # Multimedia Card Interface
- #
- INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
- INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
-
- #
# UEFI application (Shell Embedded Boot Loader)
#
INF EmbeddedPkg/Ebl/Ebl.inf
- #
- # UEFI application (Full EFI Shell)
- #
- FILE APPLICATION = PCD(gArmTokenSpaceGuid.PcdShellFile) {
- SECTION PE32 = EdkShellBinPkg/FullShell/Arm/ShellFull.efi
- SECTION UI = "ShellFull"
- }
-
!if $(EDK2_ARMVE_UEFI2_SHELL) == 1
INF ShellPkg/Application/Shell/Shell.inf
!endif
- #
- # UEFI application (Test Variable Services)
- #
- INF ArmPkg/Application/VariableServicesTest/VariableServicesTest.inf
#
# Bds
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
index 760e450423..6d8c828c76 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
@@ -99,7 +99,6 @@
# BDS Libraries
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
[LibraryClasses.common.SEC]
DebugSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h
index f9e03fb651..64191f32ea 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h
+++ b/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h
@@ -70,6 +70,7 @@
#define ARM_VE_SCC_BASE
// SP810 Controller
+#undef SP810_CTRL_BASE
#define SP810_CTRL_BASE 0x1C020000
// PL111 Colour LCD Controller
diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
index 1c44566700..c4d9917c80 100755
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
@@ -21,7 +21,7 @@
#include <Library/PrintLib.h>
#include <Library/SerialPortLib.h>
-#include <Chipset/ArmV7.h>
+#include <Chipset/ArmV7.h>
// When the firmware is built as not Standalone, the secondary cores need to wait the firmware
// entirely written into DRAM. It is the firmware from DRAM which will wake up the secondary cores.
diff --git a/ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.c b/ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.c
index fee7f52596..b75dbfbb6f 100644
--- a/ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.c
+++ b/ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.c
@@ -120,7 +120,7 @@ EblSymbolTable (
@param Argc Number of command arguments in Argv
@param Argv Array of strings that represent the parsed command line.
- Argv[0] is the comamnd name
+ Argv[0] is the command name
@return EFI_SUCCESS
@@ -202,7 +202,7 @@ STATIC CHAR8 *mTokenList[] = {
@param Argc Number of command arguments in Argv
@param Argv Array of strings that represent the parsed command line.
- Argv[0] is the comamnd name
+ Argv[0] is the command name
@return EFI_SUCCESS
diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
index d7c4e2e00d..e19102e72f 100755
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
@@ -21,7 +21,7 @@
GCC_ASM_IMPORT(CEntryPoint)
GCC_ASM_IMPORT(ArmReadMpidr)
-GCC_ASM_IMPORT(ArmIsMPCore)
+GCC_ASM_IMPORT(ArmIsMpCore)
GCC_ASM_EXPORT(_ModuleEntryPoint)
StartupAddr: .word CEntryPoint
@@ -77,7 +77,7 @@ _SetupStack:
_GetStackBase:
// Compute Base of Normal stacks for CPU Cores
// Is it MpCore system
- bl ArmIsMPCore
+ bl ArmIsMpCore
cmp r0, #0
// Case it is not an MP Core system. Just setup the primary core
beq _SetupUnicoreStack
diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
index 5b56e66b9b..e402e2657f 100644
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
@@ -20,7 +20,7 @@
IMPORT CEntryPoint
IMPORT ArmReadMpidr
- IMPORT ArmIsMPCore
+ IMPORT ArmIsMpCore
EXPORT _ModuleEntryPoint
PRESERVE8
@@ -78,7 +78,7 @@ _SetupStack
_GetStackBase
// Compute Base of Normal stacks for CPU Cores
// Is it MpCore system
- bl ArmIsMPCore
+ bl ArmIsMpCore
cmp r0, #0
// Case it is not an MP Core system. Just setup the primary core
beq _SetupUnicoreStack
diff --git a/BeagleBoardPkg/Bds/Bds.inf b/BeagleBoardPkg/Bds/Bds.inf
index cdfbeef999..1b37f0e2f4 100644
--- a/BeagleBoardPkg/Bds/Bds.inf
+++ b/BeagleBoardPkg/Bds/Bds.inf
@@ -61,11 +61,5 @@
gEfiUsbIoProtocolGuid
gEfiFirmwareVolume2ProtocolGuid
-
-[FeaturePcd]
-
-[FixedPcd]
- gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
-
[Depex]
TRUE
diff --git a/BeagleBoardPkg/BeagleBoardPkg-next.dsc b/BeagleBoardPkg/BeagleBoardPkg-next.dsc
index 357d93a73d..22eb06096d 100755
--- a/BeagleBoardPkg/BeagleBoardPkg-next.dsc
+++ b/BeagleBoardPkg/BeagleBoardPkg-next.dsc
@@ -122,7 +122,6 @@
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
[LibraryClasses.common.SEC]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
@@ -175,7 +174,6 @@
SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-
[LibraryClasses.common.UEFI_APPLICATION]
ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
@@ -207,18 +205,11 @@
[BuildOptions]
- XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7
- XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7
- XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7
- XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
- GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb
- GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a
- GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a
- RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb
- RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8
- RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A8
################################################################################
#
@@ -309,9 +300,6 @@
gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|0
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize|0
-
#
# Optional feature to help prevent EFI memory map fragments
# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
@@ -347,17 +335,6 @@
# Size of the region reserved for fixed address allocations (Reserved 32MB)
gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x02000000
- # Reserved to store the HobBase address (top of UEFI Memory Region)
- # = (PcdSystemMemoryBase + PcdSystemMemorySize) - sizeof(UINT32)
- gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x87FFFFFC
-
- #gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x80001000
- gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x87FE0000 # stack at top of memory
- gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x20000 # 128K stack
-
- gEmbeddedTokenSpaceGuid.PcdMemoryBase|0x80000000
- gEmbeddedTokenSpaceGuid.PcdMemorySize|0x10000000
-
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x80008000
gArmTokenSpaceGuid.PcdCpuResetAddress|0x80008000
@@ -392,14 +369,14 @@
################################################################################
[Components.common]
-#
-# SEC
-#
+ #
+ # SEC
+ #
ArmPlatformPkg/PrePi/PeiUniCore.inf
-#
-# DXE
-#
+ #
+ # DXE
+ #
MdeModulePkg/Core/Dxe/DxeMain.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc b/BeagleBoardPkg/BeagleBoardPkg.dsc
index 12b0bdcd0f..1410c41c69 100644
--- a/BeagleBoardPkg/BeagleBoardPkg.dsc
+++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
@@ -122,7 +122,6 @@
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
[LibraryClasses.common.SEC]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
@@ -202,18 +201,11 @@
[BuildOptions]
- XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7
- XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7
- XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7
- XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
-
- GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb
- GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a
- GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
-
- RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb
- RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8
- RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
+
+ GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a
+
+ RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A8
################################################################################
#
diff --git a/BeagleBoardPkg/BeagleBoardPkg.fdf b/BeagleBoardPkg/BeagleBoardPkg.fdf
index f265b7d802..18d3d34092 100644
--- a/BeagleBoardPkg/BeagleBoardPkg.fdf
+++ b/BeagleBoardPkg/BeagleBoardPkg.fdf
@@ -174,7 +174,6 @@ READ_LOCK_STATUS = TRUE
INF ArmPlatformPkg/Bds/Bds.inf
-
[FV.FVMAIN_COMPACT]
FvAlignment = 8
ERASE_POLARITY = 1
diff --git a/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c b/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c
index 0a2cb836e4..706a19b273 100644
--- a/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c
+++ b/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -125,7 +125,7 @@ LibResetSystem (
switch (ResetType) {
case EfiResetWarm:
//Perform warm reset of the system by jumping to the begining of the FV
- StartOfFv = (CALL_STUB)(UINTN)PcdGet32(PcdFlashFvMainBase);
+ StartOfFv = (CALL_STUB)(UINTN)PcdGet32(PcdFvBaseAddress);
StartOfFv ();
break;
case EfiResetCold:
diff --git a/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.inf b/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.inf
index afb03bd696..e198812554 100644
--- a/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.inf
+++ b/BeagleBoardPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -46,4 +46,4 @@
UefiBootServicesTableLib
[Pcd]
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
+ gArmTokenSpaceGuid.PcdFvBaseAddress
diff --git a/BeagleBoardPkg/b.bat b/BeagleBoardPkg/b.bat
index 7fa4ee6910..d7136b3846 100755
--- a/BeagleBoardPkg/b.bat
+++ b/BeagleBoardPkg/b.bat
@@ -32,7 +32,7 @@ SET TARGET=DEBUG
SET BUILD_ROOT=%WORKSPACE%\Build\BeagleBoard\%TARGET%_%TARGET_TOOLS%
@REM Build the Beagle Board firmware and creat an FD (FLASH Device) Image.
-CALL build -p BeagleBoardPkg\BeagleBoardPkg.dsc -a ARM -t RVCT31 -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
+CALL build -p BeagleBoardPkg\BeagleBoardPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
@if ERRORLEVEL 1 goto Exit
@if /I "%1"=="CLEAN" goto Clean
diff --git a/BeagleBoardPkg/build-next.sh b/BeagleBoardPkg/build-next.sh
index ab09284c70..780ef4ce6a 100755
--- a/BeagleBoardPkg/build-next.sh
+++ b/BeagleBoardPkg/build-next.sh
@@ -137,7 +137,7 @@ rm -f $FLASH_BOOT
# point looks so strange.
# OMAP 3430 TRM section 26.4.8 has Image header information. (missing in OMAP 3530 TRM)
#
-$GENERATE_IMAGE -D $WORKSPACE/BeagleBoardPkg/ConfigurationHeader.dat -E 0x80008208 -I $BUILD_ROOT/FV/BEAGLEBOARD_EFI.fd -O $FLASH_BOOT
+$GENERATE_IMAGE -D $WORKSPACE/BeagleBoardPkg/ConfigurationHeader.dat -E 0x80008000 -I $BUILD_ROOT/FV/BEAGLEBOARD_EFI.fd -O $FLASH_BOOT
echo Creating debugger scripts
process_debug_scripts $WORKSPACE/BeagleBoardPkg/Debugger_scripts