diff options
7 files changed, 13 insertions, 17 deletions
diff --git a/IntelFspPkg/FspSecCore/FspSecCore.inf b/IntelFspPkg/FspSecCore/FspSecCore.inf index 18c5e76a6b..8767170a97 100644 --- a/IntelFspPkg/FspSecCore/FspSecCore.inf +++ b/IntelFspPkg/FspSecCore/FspSecCore.inf @@ -14,11 +14,10 @@ [Defines]
INF_VERSION = 0x00010005
BASE_NAME = FspSecCore
- FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ FILE_GUID = 207CE046-0ADF-47c3-B9E3-844F12C398DD
MODULE_TYPE = SEC
VERSION_STRING = 1.0
-
#
# The following information is for reference only and not required by the build tools.
#
diff --git a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c index aaaeb8b97b..5c77962393 100644 --- a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c +++ b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c @@ -159,7 +159,7 @@ EfiRecoverCacheMtrr ( //
if (EnableMtrr) {
TempQword = AsmReadMsr64(EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE);
- TempQword |= (B_EFI_MSR_GLOBAL_MTRR_ENABLE | B_EFI_MSR_FIXED_MTRR_ENABLE);
+ TempQword |= (UINT64)(B_EFI_MSR_GLOBAL_MTRR_ENABLE | B_EFI_MSR_FIXED_MTRR_ENABLE);
} else {
TempQword = OldMtrr;
}
diff --git a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c index 467d59db0e..55a917b918 100644 --- a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c +++ b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c @@ -148,7 +148,7 @@ DebugAssertInternal ( //
// Generate the ASSERT() message in Ascii format
//
- AsciiStrCpy (Buffer, "-> EBP:0x00000000 EIP:0x00000000\n");
+ AsciiStrnCpy (Buffer, sizeof(Buffer), "-> EBP:0x00000000 EIP:0x00000000\n");
SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
while (Frame != NULL) {
FillHex ((UINT32)Frame, Buffer + 9);
diff --git a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformNotify.c b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformNotify.c index 3488fbc61c..ef4406bec5 100644 --- a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformNotify.c +++ b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformNotify.c @@ -141,7 +141,7 @@ FspWaitForNotify ( NotificatonCount = 0;
while (NotificatonCount < sizeof(mFspNotfifySequence) / sizeof(UINT32)) {
- Count = (NotificatonCount << 1) & 0x07;
+ Count = (UINT8)((NotificatonCount << 1) & 0x07);
SetFspMeasurePoint (FSP_PERF_ID_API_NOTIFY_POSTPCI_ENTRY + Count);
NotificatonValue = ((NOTIFY_PHASE_PARAMS *)(UINTN)GetFspApiParameter ())->Phase;
diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf b/IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf index fc221fc856..6689b83619 100644 --- a/IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf +++ b/IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf @@ -15,7 +15,7 @@ [Defines]
INF_VERSION = 0x00010005
BASE_NAME = FspWrapperSecCore
- FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
+ FILE_GUID = 4BAEF5C9-3247-4eab-801A-32A7F330D330
MODULE_TYPE = SEC
VERSION_STRING = 1.0
diff --git a/IntelFspWrapperPkg/IntelFspWrapperPkg.dec b/IntelFspWrapperPkg/IntelFspWrapperPkg.dec index 1422e568e8..85bc978b13 100644 --- a/IntelFspWrapperPkg/IntelFspWrapperPkg.dec +++ b/IntelFspWrapperPkg/IntelFspWrapperPkg.dec @@ -30,12 +30,6 @@ #
gFspWrapperTokenSpaceGuid = {0x2bc1c74a, 0x122f, 0x40b2, { 0xb2, 0x23, 0x8, 0x2b, 0x74, 0x65, 0x22, 0x5d } }
- # Guid define in FSP EAS
- gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }
- gFspBootLoaderTemporaryMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }
- gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
- gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }
-
[Ppis]
gFspInitDonePpiGuid = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }
gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
diff --git a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S index 3145a484a3..24bc36b9c4 100644 --- a/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S +++ b/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S @@ -22,6 +22,9 @@ #include "Fsp.h"
+ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase)
+ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize)
+
ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
ASM_PFX(_TEXT_REALMODE):
#----------------------------------------------------------------------------
@@ -103,7 +106,7 @@ ASM_PFX(_ModuleEntryPoint): # Transition to Flat 32 bit protected mode
# The jump to a far pointer causes the transition to 32 bit mode
#
- movl $ProtectedModeEntryLinearAddress, %esi
+ movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
jmp *%cs:(%si)
ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
@@ -134,8 +137,8 @@ ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint) ASM_PFX(ProtectedModeEntryPoint):
# Find the fsp info header
- movl PcdGet32 (PcdFlashFvFspBase), %edi
- movl PcdGet32 (PcdFlashFvFspSize), %ecx
+ movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase), %edi
+ movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize), %ecx
movl FVH_SIGINATURE_OFFSET(%edi), %eax
cmp $FVH_SIGINATURE_VALID_VALUE, %eax
@@ -224,7 +227,7 @@ FspApiFailed: .align 0x10
TempRamInitStack:
.long TempRamInitDone
- .long TempRamInitParams
+ .long ASM_PFX(TempRamInitParams)
#
# ROM-based Global-Descriptor Table for the Tiano PEI Phase
@@ -321,5 +324,5 @@ GdtDesc: # GDT descriptor ASM_PFX(ProtectedModeEntryLinearAddress):
ProtectedModeEntryLinearOffset:
- .long ProtectedModeEntryPoint # Offset of our 32 bit code
+ .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
.word LINEAR_CODE_SEL
|