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-rw-r--r--IntelFspPkg/Library/BaseCacheLib/CacheLib.c50
1 files changed, 2 insertions, 48 deletions
diff --git a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
index 40d404dd69..1a08918597 100644
--- a/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
+++ b/IntelFspPkg/Library/BaseCacheLib/CacheLib.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -18,17 +18,6 @@
#include "CacheLibInternal.h"
/**
- Calculate the maximum value which is a power of 2, but less the Input.
-
- @param[in] Input The number to pass in.
- @return The maximum value which is align to power of 2 and less the Input
-**/
-UINT32
-SetPower2 (
- IN UINT32 Input
- );
-
-/**
Search the memory cache type for specific memory from MTRR.
@param[in] MemoryAddress the address of target memory
@@ -236,11 +225,7 @@ Power2MaxMemory (
//
// Compute inital power of 2 size to return
//
- if (RShiftU64(MemoryLength, 32)) {
- Result = LShiftU64((UINT64)SetPower2((UINT32) RShiftU64(MemoryLength, 32)), 32);
- } else {
- Result = (UINT64)SetPower2((UINT32)MemoryLength);
- }
+ Result = GetPowerOfTwo64(MemoryLength);
//
// Special case base of 0 as all ranges are valid
@@ -296,37 +281,6 @@ CheckMtrrAlignment (
}
/**
- Calculate the maximum value which is a power of 2, but less the Input.
-
- @param[in] Input The number to pass in.
-
- @return The maximum value which is align to power of 2 and less the Input.
-**/
-UINT32
-SetPower2 (
- IN UINT32 Input
- )
-{
- UINT32 Result;
-
- Result = 0;
-#if defined(__GCC__)
- asm("bsr %1, \
- %%eax; \
- bts %%eax, \
- %0;" :"=r"(Result) :
- "r"(Input)
- );
-#elif defined(_MSC_VER)
- _asm {
- bsr eax, Input
- bts Result, eax
- }
-#endif
- return Result;
-}
-
-/**
Programs fixed MTRRs registers.
@param[in] MemoryCacheType The memory type to set.