3 files changed, 0 insertions, 17 deletions
diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc
index 430803c593..946c93e1b3 100644
--- a/Platform/Marvell/Armada/Armada70x0.dsc
+++ b/Platform/Marvell/Armada/Armada70x0.dsc
@@ -138,9 +138,5 @@
   gMarvellTokenSpaceGuid.PcdPciEAhci|{ 0x1, 0x0 }
   gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
 
-  #ResetLib
-  gMarvellTokenSpaceGuid.PcdResetRegAddress|0xf06f0084
-  gMarvellTokenSpaceGuid.PcdResetRegMask|0x1
-
   #RTC
   gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x1 }
diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec
index 78f5e536d4..434d6cb922 100644
--- a/Platform/Marvell/Marvell.dec
+++ b/Platform/Marvell/Marvell.dec
@@ -188,10 +188,6 @@
   gMarvellTokenSpaceGuid.PcdPciEAhci|{ 0x0 }|VOID*|0x3000034
   gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x0 }|VOID*|0x3000035
 
-#ResetLib
-  gMarvellTokenSpaceGuid.PcdResetRegAddress|0|UINT64|0x40000050
-  gMarvellTokenSpaceGuid.PcdResetRegMask|0|UINT32|0x4000051
-
 #RTC
   gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0 }|VOID*|0x40000052
 
diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
index 66ec918596..cbe3bed59c 100644
--- a/Silicon/Marvell/Documentation/PortingGuide.txt
+++ b/Silicon/Marvell/Documentation/PortingGuide.txt
@@ -383,15 +383,6 @@ Set pin 6 and 7 to 0xa function:
                  gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0xa, 0x0, 0x0 }
 
 
-MarvellResetSystemLib configuration
-===================================
-This simple library allows to mask given bits in given reg at UEFI 'reset'
-command call. These variables are configurable through PCDs:
-
-  - gMarvellTokenSpaceGuid.PcdResetRegAddress
-  - gMarvellTokenSpaceGuid.PcdResetRegMask
-
-
 Ramdisk configuration
 =====================
 There is one PCD available for Ramdisk configuration