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-rw-r--r--Platform/AMD/OverdriveBoard/OverdriveBoard.dsc3
-rw-r--r--Platform/LeMaker/CelloBoard/CelloBoard.dsc3
-rw-r--r--Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc3
-rw-r--r--Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf3
-rw-r--r--Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf3
-rw-r--r--Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c6
6 files changed, 1 insertions, 20 deletions
diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index 21edcc8798..48018abc69 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -282,9 +282,6 @@ DEFINE DO_CAPSULE = FALSE
################################################################################
[PcdsFeatureFlag.common]
- # All pages are cached by default
- gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-
# Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
diff --git a/Platform/LeMaker/CelloBoard/CelloBoard.dsc b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
index cf3df86514..2468583c0d 100644
--- a/Platform/LeMaker/CelloBoard/CelloBoard.dsc
+++ b/Platform/LeMaker/CelloBoard/CelloBoard.dsc
@@ -270,9 +270,6 @@ DEFINE DO_FLASHER = FALSE
################################################################################
[PcdsFeatureFlag.common]
- # All pages are cached by default
- gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-
# Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
index 0abec8120a..f0a7e97941 100644
--- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
+++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
@@ -272,9 +272,6 @@ DEFINE DO_FLASHER = FALSE
################################################################################
[PcdsFeatureFlag.common]
- # All pages are cached by default
- gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-
# Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
index 6b7481ec6d..3a38f294eb 100644
--- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
+++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf
@@ -53,9 +53,6 @@
[Ppis]
gArmMpCoreInfoPpiGuid
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
index b313d4baad..b24ffd469a 100644
--- a/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
+++ b/Silicon/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf
@@ -49,9 +49,6 @@
[Guids]
gAmdStyxMpCoreInfoGuid ## CONSUMER
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
[Ppis]
gArmMpCoreInfoPpiGuid
diff --git a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
index 3b82132d08..479a40627d 100644
--- a/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
+++ b/Silicon/AMD/Styx/Library/AmdStyxLib/StyxMem.c
@@ -78,11 +78,7 @@ ArmPlatformGetVirtualMemoryMap (
return;
}
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;
DEBUG ((EFI_D_ERROR, " Memory Map\n------------------------------------------------------------------------\n"));
DEBUG ((EFI_D_ERROR, "Description : START - END [ SIZE ] { ATTR }\n"));