1 files changed, 21 insertions, 4 deletions
diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h
index d00159b356..6cd93a1f54 100644
--- a/ArmPkg/Include/Library/ArmGicLib.h
+++ b/ArmPkg/Include/Library/ArmGicLib.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
 *
 *  This program and the accompanying materials
 *  are licensed and made available under the terms and conditions of the BSD License
@@ -30,7 +30,7 @@ typedef enum {
 #define ARM_GIC_ICDICTR         0x004 // Interrupt Controller Type Register
 #define ARM_GIC_ICDIIDR         0x008 // Implementer Identification Register
 
-// Each reg base below repeats for VE_NUM_ARM_GIC_REG_PER_INT_BITS (see GIC spec)
+// Each reg base below repeats for Number of interrupts / 4 (see GIC spec)
 #define ARM_GIC_ICDISR          0x080 // Interrupt Security Registers
 #define ARM_GIC_ICDISER         0x100 // Interrupt Set-Enable Registers
 #define ARM_GIC_ICDICER         0x180 // Interrupt Clear-Enable Registers
@@ -38,10 +38,10 @@ typedef enum {
 #define ARM_GIC_ICDICPR         0x280 // Interrupt Clear-Pending Registers
 #define ARM_GIC_ICDABR          0x300 // Active Bit Registers
 
-// Each reg base below repeats for VE_NUM_ARM_GIC_REG_PER_INT_BYTES
+// Each reg base below repeats for Number of interrupts / 4
 #define ARM_GIC_ICDIPR          0x400 // Interrupt Priority Registers
 
-// Each reg base below repeats for VE_NUM_ARM_GIC_INTERRUPTS
+// Each reg base below repeats for Number of interrupts
 #define ARM_GIC_ICDIPTR         0x800 // Interrupt Processor Target Registers
 #define ARM_GIC_ICDICFR         0xC00 // Interrupt Configuration Registers
 
@@ -50,6 +50,23 @@ typedef enum {
 // just one of these
 #define ARM_GIC_ICDSGIR         0xF00 // Software Generated Interrupt Register
 
+// GICv3 specific registers
+#define ARM_GICD_IROUTER        0x6100 // Interrupt Routing Registers
+
+//
+// GIC Redistributor
+//
+
+#define ARM_GICR_CTLR_FRAME_SIZE    SIZE_64KB
+#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
+
+// GIC Redistributor Control frame
+#define ARM_GICR_TYPER          0x0008  // Redistributor Type Register
+
+// GIC SGI & PPI Redistributor frame
+#define ARM_GICR_ISENABLER      0x0100  // Interrupt Set-Enable Registers
+#define ARM_GICR_ICENABLER      0x0180  // Interrupt Clear-Enable Registers
+
 //
 // GIC Cpu interface
 //