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-rw-r--r--ArmPlatformPkg/Sec/Arm/Helper.S4
-rw-r--r--ArmPlatformPkg/Sec/Arm/SecEntryPoint.S19
-rw-r--r--ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm19
3 files changed, 18 insertions, 24 deletions
diff --git a/ArmPlatformPkg/Sec/Arm/Helper.S b/ArmPlatformPkg/Sec/Arm/Helper.S
index 4eede5faba..c99987d3a1 100644
--- a/ArmPlatformPkg/Sec/Arm/Helper.S
+++ b/ArmPlatformPkg/Sec/Arm/Helper.S
@@ -1,10 +1,10 @@
#========================================================================================
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
-# http:#opensource.org/licenses/bsd-license.php
+# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
index 92035a1ffe..07fb71fdcc 100644
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
@@ -1,5 +1,5 @@
//
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -19,6 +19,7 @@
.align 3
GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_IMPORT(ArmPlatformSecBootAction)
GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
GCC_ASM_IMPORT(ArmDisableInterrupts)
@@ -45,13 +46,12 @@ ASM_PFX(_ModuleEntryPoint):
_IdentifyCpu:
// Identify CPU ID
bl ASM_PFX(ArmReadMpidr)
- // Get ID of this CPU in Multicore system
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r5, r0, r1
+ // Keep a copy of the MpId register value
+ mov r9, r0
// Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
- cmp r5, r3
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)
+ cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
@@ -74,9 +74,6 @@ _InitMem:
// Initialize Init Boot Memory
bl ASM_PFX(ArmPlatformSecBootMemoryInit)
- // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
-
_SetupPrimaryCoreStack:
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
@@ -97,7 +94,7 @@ _SetupSecondaryCoreStack:
add r1, r1, r2
// Get the Core Position (ClusterId * 4) + CoreId
- GetCorePositionFromMpId(r0, r5, r2)
+ GetCorePositionFromMpId(r0, r9, r2)
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
add r0, r0, #1
@@ -115,7 +112,7 @@ _PrepareArguments:
// Jump to SEC C code
// r0 = mp_id
// r1 = Boot Mode
- mov r0, r5
+ mov r0, r9
mov r1, r10
blx r3
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
index 9305e8e529..f89aefd2d6 100644
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
+++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
@@ -1,5 +1,5 @@
//
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -18,6 +18,7 @@
INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
+ IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmPlatformSecBootAction
IMPORT ArmPlatformSecBootMemoryInit
IMPORT ArmDisableInterrupts
@@ -47,13 +48,12 @@ _ModuleEntryPoint FUNCTION
_IdentifyCpu
// Identify CPU ID
bl ArmReadMpidr
- // Get ID of this CPU in Multicore system
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r5, r0, r1
+ // Keep a copy of the MpId register value
+ mov r9, r0
// Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
- cmp r5, r3
+ bl ArmPlatformIsPrimaryCore
+ cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
@@ -76,9 +76,6 @@ _InitMem
// Initialize Init Boot Memory
bl ArmPlatformSecBootMemoryInit
- // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
-
_SetupPrimaryCoreStack
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
@@ -99,7 +96,7 @@ _SetupSecondaryCoreStack
add r1, r1, r2
// Get the Core Position (ClusterId * 4) + CoreId
- GetCorePositionFromMpId(r0, r5, r2)
+ GetCorePositionFromMpId(r0, r9, r2)
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
add r0, r0, #1
@@ -117,7 +114,7 @@ _PrepareArguments
// Jump to SEC C code
// r0 = mp_id
// r1 = Boot Mode
- mov r0, r5
+ mov r0, r9
mov r1, r10
blx r3
ENDFUNC