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-rw-r--r--ArmPlatformPkg/Sec/Arm/Helper.S4
-rw-r--r--ArmPlatformPkg/Sec/Arm/Helper.asm2
-rw-r--r--ArmPlatformPkg/Sec/Arm/SecEntryPoint.S2
-rw-r--r--ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm2
4 files changed, 5 insertions, 5 deletions
diff --git a/ArmPlatformPkg/Sec/Arm/Helper.S b/ArmPlatformPkg/Sec/Arm/Helper.S
index 2e2801fe85..ac40102218 100644
--- a/ArmPlatformPkg/Sec/Arm/Helper.S
+++ b/ArmPlatformPkg/Sec/Arm/Helper.S
@@ -72,10 +72,10 @@ ASM_PFX(copy_cpsr_into_spsr):
# Set the Non Secure Mode
ASM_PFX(set_non_secure_mode):
push { r1 }
- and r0, r0, #0x1f @ Keep only the mode bits
+ and r0, r0, #0x1f @ Keep only the mode bits
mrs r1, spsr @ Read the spsr
bic r1, r1, #0x1f @ Clear all mode bits
- orr r1, r1, r0
+ orr r1, r1, r0
msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)
isb
pop { r1 }
diff --git a/ArmPlatformPkg/Sec/Arm/Helper.asm b/ArmPlatformPkg/Sec/Arm/Helper.asm
index febcdb18a1..8aa7d7840d 100644
--- a/ArmPlatformPkg/Sec/Arm/Helper.asm
+++ b/ArmPlatformPkg/Sec/Arm/Helper.asm
@@ -67,7 +67,7 @@ set_non_secure_mode
and r0, r0, #0x1f // Keep only the mode bits
mrs r1, spsr // Read the spsr
bic r1, r1, #0x1f // Clear all mode bits
- orr r1, r1, r0
+ orr r1, r1, r0
msr spsr_cxsf, r1 // write back spsr (may have caused a mode switch)
isb
pop { r1 }
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
index 158a08f5e3..51b91b965d 100644
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S
@@ -51,7 +51,7 @@ _IdentifyCpu:
mov r9, r0
// Is it the Primary Core ?
- bl ASM_PFX(ArmPlatformIsPrimaryCore)
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)
cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
index a97041d021..b30fab2141 100644
--- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
+++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm
@@ -53,7 +53,7 @@ _IdentifyCpu
mov r9, r0
// Is it the Primary Core ?
- bl ArmPlatformIsPrimaryCore
+ bl ArmPlatformIsPrimaryCore
cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem