diff options
Diffstat (limited to 'ArmPlatformPkg')
28 files changed, 327 insertions, 327 deletions
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h index f594d69881..5b8f5e2289 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h @@ -76,7 +76,7 @@ #define SP810_CTRL_BASE (ARM_EB_BOARD_PERIPH_BASE + 0x01000)
// SYSTRCL Register
-#define ARM_EB_SYSCTRL 0x10001000
+#define ARM_EB_SYSCTRL 0x10001000
// Dynamic Memory Controller Base
#define ARM_EB_DMC_BASE 0x10018000
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.S b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.S index f324105e6b..2978753c35 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.S +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.S @@ -29,10 +29,10 @@ GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) // IN UINTN MpId
// );
ASM_PFX(ArmPlatformGetCorePosition):
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.asm b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.asm index 6539470441..99a2ed4691 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.asm +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.asm @@ -30,10 +30,10 @@ // IN UINTN MpId
// );
ArmPlatformGetCorePosition FUNCTION
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
ENDFUNC
//UINTN
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c index 4962666cf1..4d0811cc5e 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpressFastBootDxe/ArmVExpressFastBoot.c @@ -200,9 +200,9 @@ ArmFastbootPlatformInit ( // Read the GPT partition entry array into memory so we can get the partition names
Status = ReadPartitionEntries (FlashBlockIo, &PartitionEntries);
if (EFI_ERROR (Status)) {
- DEBUG ((EFI_D_ERROR, "Warning: Failed to read partitions from Android NVM device (status: %r)\n", Status));
- // Failing to locate partitions should not prevent to do other Android FastBoot actions
- return EFI_SUCCESS;
+ DEBUG ((EFI_D_ERROR, "Warning: Failed to read partitions from Android NVM device (status: %r)\n", Status));
+ // Failing to locate partitions should not prevent to do other Android FastBoot actions
+ return EFI_SUCCESS;
}
// Get every Block IO protocol instance installed in the system
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S index e208a84ca2..20bfe52610 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S @@ -32,10 +32,10 @@ ASM_PFX(ArmPlatformPeiBootAction): // IN UINTN MpId
// );
ASM_PFX(ArmPlatformGetCorePosition):
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm index 2e323a1dd2..f377cf2e72 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm @@ -35,10 +35,10 @@ ArmPlatformPeiBootAction FUNCTION // IN UINTN MpId
// );
ArmPlatformGetCorePosition FUNCTION
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
ENDFUNC
//UINTN
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm index 86e1873e23..aa48ed730e 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm @@ -35,7 +35,7 @@ ArmPlatformGetPrimaryCoreMpId FUNCTION
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
ldr r0, [r0]
- bx lr
+ bx lr
ENDFUNC
//UINTN
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S index b24085cb24..50ff713917 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S @@ -61,10 +61,10 @@ ASM_PFX(ArmPlatformIsPrimaryCore): ldrh w1, [x1]
cmp w0, w1
b.ne 1f
- mov x0, #1
+ mov x0, #1
ret
1:
- mov x0, #0
+ mov x0, #0
ret
//UINTN
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S index 00a55e1db3..e739050b0d 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S @@ -101,7 +101,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore): cmp r0, r1
moveq r0, #1
movne r0, #0
- bx lr
+ bx lr
//UINTN
//ArmPlatformGetCorePosition (
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm index d786323f7b..f4ad51d36e 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm @@ -107,7 +107,7 @@ ArmPlatformIsPrimaryCore FUNCTION cmp r0, r1
moveq r0, #1
movne r0, #0
- bx lr
+ bx lr
ENDFUNC
//UINTN
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S index cc719c56b9..d963aec550 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Scripts/uefi-aarch64-bootstrap/model.lds.S @@ -55,23 +55,23 @@ INPUT(./boot3f.o) SECTIONS
{
- . = PHYS_OFFSET;
+ . = PHYS_OFFSET;
#ifdef BOOT1
- .text : { boot1.o }
+ .text : { boot1.o }
#endif
#ifdef BOOT2
- .text : { boot2.o }
+ .text : { boot2.o }
#endif
#ifdef BOOT3
- .text : { boot3.o }
+ .text : { boot3.o }
#endif
#ifdef BOOT3F
- .text : { boot3f.o }
+ .text : { boot3f.o }
#endif
- .data : { *(.data) }
- .bss : { *(.bss) }
+ .data : { *(.data) }
+ .bss : { *(.bss) }
}
diff --git a/ArmPlatformPkg/Bds/Bds.c b/ArmPlatformPkg/Bds/Bds.c index b84faf91b6..debc93218b 100644 --- a/ArmPlatformPkg/Bds/Bds.c +++ b/ArmPlatformPkg/Bds/Bds.c @@ -393,7 +393,7 @@ StartDefaultBootOnTimeout ( }
// Discard key in the buffer
do {
- Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
+ Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
} while(!EFI_ERROR(Status));
gBS->CloseEvent (WaitList[0]);
Print(L"\n\r");
@@ -408,8 +408,8 @@ StartDefaultBootOnTimeout ( UnicodeSPrint (BootVariableName, 9 * sizeof(CHAR16), L"Boot%04X", BootOrder[Index]);
Status = BdsStartBootOption (BootVariableName);
if(!EFI_ERROR(Status)){
- // Boot option returned successfully, hence don't need to start next boot option
- break;
+ // Boot option returned successfully, hence don't need to start next boot option
+ break;
}
// In case of success, we should not return from this call.
}
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c index 798f82819f..77f93cbb67 100644 --- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c +++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c @@ -778,21 +778,21 @@ EFI_STATUS EFIAPI
LcdGraphicsBlt (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
- IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL
- IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
- IN UINTN SourceX,
- IN UINTN SourceY,
- IN UINTN DestinationX,
- IN UINTN DestinationY,
- IN UINTN Width,
- IN UINTN Height,
- IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer
+ IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL
+ IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
+ IN UINTN SourceX,
+ IN UINTN SourceY,
+ IN UINTN DestinationX,
+ IN UINTN DestinationY,
+ IN UINTN Width,
+ IN UINTN Height,
+ IN UINTN Delta OPTIONAL // Number of BYTES in a row of the BltBuffer
)
{
- EFI_STATUS Status;
- UINT32 HorizontalResolution;
+ EFI_STATUS Status;
+ UINT32 HorizontalResolution;
UINT32 VerticalResolution;
- LCD_INSTANCE* Instance;
+ LCD_INSTANCE* Instance;
Instance = LCD_INSTANCE_FROM_GOP_THIS(This);
@@ -811,24 +811,24 @@ LcdGraphicsBlt ( BltOperation,DestinationX,DestinationY,Width,Height,HorizontalResolution,VerticalResolution));
// Check we have reasonable parameters
- if (Width == 0 || Height == 0) {
+ if (Width == 0 || Height == 0) {
DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid dimension: Zero size area.\n" ));
- Status = EFI_INVALID_PARAMETER;
- goto EXIT;
- }
-
- if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToBltBuffer)) {
- ASSERT( BltBuffer != NULL);
- }
-
- /*if ((DestinationX >= HorizontalResolution) || (DestinationY >= VerticalResolution)) {
- DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid destination.\n" ));
- Status = EFI_INVALID_PARAMETER;
- goto EXIT;
- }*/
-
- // If we are reading data out of the video buffer, check that the source area is within the display limits
- if ((BltOperation == EfiBltVideoToBltBuffer) || (BltOperation == EfiBltVideoToVideo)) {
+ Status = EFI_INVALID_PARAMETER;
+ goto EXIT;
+ }
+
+ if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToBltBuffer)) {
+ ASSERT( BltBuffer != NULL);
+ }
+
+ /*if ((DestinationX >= HorizontalResolution) || (DestinationY >= VerticalResolution)) {
+ DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid destination.\n" ));
+ Status = EFI_INVALID_PARAMETER;
+ goto EXIT;
+ }*/
+
+ // If we are reading data out of the video buffer, check that the source area is within the display limits
+ if ((BltOperation == EfiBltVideoToBltBuffer) || (BltOperation == EfiBltVideoToVideo)) {
if ((SourceY + Height > VerticalResolution) || (SourceX + Width > HorizontalResolution)) {
DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid source resolution.\n" ));
DEBUG((DEBUG_INFO, " - SourceY=%d + Height=%d > VerticalResolution=%d.\n", SourceY, Height, VerticalResolution ));
@@ -836,10 +836,10 @@ LcdGraphicsBlt ( Status = EFI_INVALID_PARAMETER;
goto EXIT;
}
- }
+ }
- // If we are writing data into the video buffer, that the destination area is within the display limits
- if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToVideo)) {
+ // If we are writing data into the video buffer, that the destination area is within the display limits
+ if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToVideo)) {
if ((DestinationY + Height > VerticalResolution) || (DestinationX + Width > HorizontalResolution)) {
DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid destination resolution.\n" ));
DEBUG((DEBUG_INFO, " - DestinationY=%d + Height=%d > VerticalResolution=%d.\n", DestinationY, Height, VerticalResolution ));
@@ -847,36 +847,36 @@ LcdGraphicsBlt ( Status = EFI_INVALID_PARAMETER;
goto EXIT;
}
- }
+ }
//
// Perform the Block Transfer Operation
//
- switch (BltOperation) {
- case EfiBltVideoFill:
- Status = BltVideoFill (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
- break;
+ switch (BltOperation) {
+ case EfiBltVideoFill:
+ Status = BltVideoFill (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
+ break;
- case EfiBltVideoToBltBuffer:
- Status = BltVideoToBltBuffer (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
+ case EfiBltVideoToBltBuffer:
+ Status = BltVideoToBltBuffer (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
break;
case EfiBltBufferToVideo:
Status = BltBufferToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
- break;
+ break;
- case EfiBltVideoToVideo:
- Status = BltVideoToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
- break;
+ case EfiBltVideoToVideo:
+ Status = BltVideoToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
+ break;
- case EfiGraphicsOutputBltOperationMax:
- default:
- DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: Invalid Operation\n"));
- Status = EFI_INVALID_PARAMETER;
- break;
- }
+ case EfiGraphicsOutputBltOperationMax:
+ default:
+ DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: Invalid Operation\n"));
+ Status = EFI_INVALID_PARAMETER;
+ break;
+ }
EXIT:
- return Status;
+ return Status;
}
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c index 0091c7597c..cbc2034349 100644 --- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c +++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c @@ -161,52 +161,52 @@ LcdGraphicsOutputDxeInitialize ( goto EXIT;
}
- // Install the Graphics Output Protocol and the Device Path
- Status = gBS->InstallMultipleProtocolInterfaces(
- &Instance->Handle,
- &gEfiGraphicsOutputProtocolGuid, &Instance->Gop,
- &gEfiDevicePathProtocolGuid, &Instance->DevicePath,
- NULL
- );
-
- if (EFI_ERROR(Status)) {
- DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the protocol. Exit Status=%r\n", Status));
- goto EXIT;
- }
-
- // Register for an ExitBootServicesEvent
- // When ExitBootServices starts, this function here will make sure that the graphics driver will shut down properly,
- // i.e. it will free up all allocated memory and perform any necessary hardware re-configuration.
- Status = gBS->CreateEvent (
- EVT_SIGNAL_EXIT_BOOT_SERVICES,
- TPL_NOTIFY,
- LcdGraphicsExitBootServicesEvent, NULL,
- &Instance->ExitBootServicesEvent
- );
-
- if (EFI_ERROR(Status)) {
- DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the ExitBootServicesEvent handler. Exit Status=%r\n", Status));
- goto EXIT_ERROR_UNINSTALL_PROTOCOL;
- }
-
- // To get here, everything must be fine, so just exit
- goto EXIT;
+ // Install the Graphics Output Protocol and the Device Path
+ Status = gBS->InstallMultipleProtocolInterfaces(
+ &Instance->Handle,
+ &gEfiGraphicsOutputProtocolGuid, &Instance->Gop,
+ &gEfiDevicePathProtocolGuid, &Instance->DevicePath,
+ NULL
+ );
+
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the protocol. Exit Status=%r\n", Status));
+ goto EXIT;
+ }
+
+ // Register for an ExitBootServicesEvent
+ // When ExitBootServices starts, this function here will make sure that the graphics driver will shut down properly,
+ // i.e. it will free up all allocated memory and perform any necessary hardware re-configuration.
+ Status = gBS->CreateEvent (
+ EVT_SIGNAL_EXIT_BOOT_SERVICES,
+ TPL_NOTIFY,
+ LcdGraphicsExitBootServicesEvent, NULL,
+ &Instance->ExitBootServicesEvent
+ );
+
+ if (EFI_ERROR(Status)) {
+ DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the ExitBootServicesEvent handler. Exit Status=%r\n", Status));
+ goto EXIT_ERROR_UNINSTALL_PROTOCOL;
+ }
+
+ // To get here, everything must be fine, so just exit
+ goto EXIT;
EXIT_ERROR_UNINSTALL_PROTOCOL:
- /* The following function could return an error message,
- * however, to get here something must have gone wrong already,
- * so preserve the original error, i.e. don't change
- * the Status variable, even it fails to uninstall the protocol.
- */
- gBS->UninstallMultipleProtocolInterfaces (
- Instance->Handle,
- &gEfiGraphicsOutputProtocolGuid, &Instance->Gop, // Uninstall Graphics Output protocol
- &gEfiDevicePathProtocolGuid, &Instance->DevicePath, // Uninstall device path
- NULL
- );
+ /* The following function could return an error message,
+ * however, to get here something must have gone wrong already,
+ * so preserve the original error, i.e. don't change
+ * the Status variable, even it fails to uninstall the protocol.
+ */
+ gBS->UninstallMultipleProtocolInterfaces (
+ Instance->Handle,
+ &gEfiGraphicsOutputProtocolGuid, &Instance->Gop, // Uninstall Graphics Output protocol
+ &gEfiDevicePathProtocolGuid, &Instance->DevicePath, // Uninstall device path
+ NULL
+ );
EXIT:
- return Status;
+ return Status;
}
@@ -239,15 +239,15 @@ EFI_STATUS EFIAPI
LcdGraphicsQueryMode (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
- IN UINT32 ModeNumber,
- OUT UINTN *SizeOfInfo,
- OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info
- )
+ IN UINT32 ModeNumber,
+ OUT UINTN *SizeOfInfo,
+ OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info
+ )
{
- EFI_STATUS Status = EFI_SUCCESS;
- LCD_INSTANCE *Instance;
+ EFI_STATUS Status = EFI_SUCCESS;
+ LCD_INSTANCE *Instance;
- Instance = LCD_INSTANCE_FROM_GOP_THIS(This);
+ Instance = LCD_INSTANCE_FROM_GOP_THIS(This);
// Setup the hardware if not already done
if( !mDisplayInitialized ) {
@@ -257,14 +257,14 @@ LcdGraphicsQueryMode ( }
}
- // Error checking
- if ( (This == NULL) || (Info == NULL) || (SizeOfInfo == NULL) || (ModeNumber >= This->Mode->MaxMode) ) {
- DEBUG((DEBUG_ERROR, "LcdGraphicsQueryMode: ERROR - For mode number %d : Invalid Parameter.\n", ModeNumber ));
- Status = EFI_INVALID_PARAMETER;
- goto EXIT;
- }
+ // Error checking
+ if ( (This == NULL) || (Info == NULL) || (SizeOfInfo == NULL) || (ModeNumber >= This->Mode->MaxMode) ) {
+ DEBUG((DEBUG_ERROR, "LcdGraphicsQueryMode: ERROR - For mode number %d : Invalid Parameter.\n", ModeNumber ));
+ Status = EFI_INVALID_PARAMETER;
+ goto EXIT;
+ }
- *Info = AllocatePool (sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION));
+ *Info = AllocatePool (sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION));
if (*Info == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto EXIT;
@@ -278,7 +278,7 @@ LcdGraphicsQueryMode ( }
EXIT:
- return Status;
+ return Status;
}
/***************************************
@@ -289,15 +289,15 @@ EFI_STATUS EFIAPI
LcdGraphicsSetMode (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
- IN UINT32 ModeNumber
- )
+ IN UINT32 ModeNumber
+ )
{
- EFI_STATUS Status = EFI_SUCCESS;
- EFI_GRAPHICS_OUTPUT_BLT_PIXEL FillColour;
- LCD_INSTANCE* Instance;
- LCD_BPP Bpp;
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL FillColour;
+ LCD_INSTANCE* Instance;
+ LCD_BPP Bpp;
- Instance = LCD_INSTANCE_FROM_GOP_THIS (This);
+ Instance = LCD_INSTANCE_FROM_GOP_THIS (This);
// Setup the hardware if not already done
if(!mDisplayInitialized) {
@@ -314,33 +314,33 @@ LcdGraphicsSetMode ( goto EXIT;
}
- // Set the oscillator frequency to support the new mode
+ // Set the oscillator frequency to support the new mode
Status = LcdPlatformSetMode (ModeNumber);
if (EFI_ERROR(Status)) {
Status = EFI_DEVICE_ERROR;
goto EXIT;
}
- // Update the UEFI mode information
- This->Mode->Mode = ModeNumber;
- LcdPlatformQueryMode (ModeNumber,&Instance->ModeInfo);
- Status = LcdPlatformGetBpp(ModeNumber, &Bpp);
- if (EFI_ERROR(Status)) {
- DEBUG ((DEBUG_ERROR, "LcdGraphicsSetMode: ERROR - Couldn't get bytes per pixel, status: %r\n", Status));
- goto EXIT;
- }
- This->Mode->FrameBufferSize = Instance->ModeInfo.VerticalResolution
- * Instance->ModeInfo.PixelsPerScanLine
- * GetBytesPerPixel(Bpp);
+ // Update the UEFI mode information
+ This->Mode->Mode = ModeNumber;
+ LcdPlatformQueryMode (ModeNumber,&Instance->ModeInfo);
+ Status = LcdPlatformGetBpp(ModeNumber, &Bpp);
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "LcdGraphicsSetMode: ERROR - Couldn't get bytes per pixel, status: %r\n", Status));
+ goto EXIT;
+ }
+ This->Mode->FrameBufferSize = Instance->ModeInfo.VerticalResolution
+ * Instance->ModeInfo.PixelsPerScanLine
+ * GetBytesPerPixel(Bpp);
// Set the hardware to the new mode
- Status = LcdSetMode (ModeNumber);
+ Status = LcdSetMode (ModeNumber);
if (EFI_ERROR(Status)) {
Status = EFI_DEVICE_ERROR;
goto EXIT;
}
- // The UEFI spec requires that we now clear the visible portions of the output display to black.
+ // The UEFI spec requires that we now clear the visible portions of the output display to black.
// Set the fill colour to black
SetMem (&FillColour, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL), 0x0);
@@ -359,7 +359,7 @@ LcdGraphicsSetMode ( 0);
EXIT:
- return Status;
+ return Status;
}
UINTN
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h index a6854aa3cc..801e6c46f6 100644 --- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h +++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h @@ -149,7 +149,7 @@ struct _NOR_FLASH_INSTANCE { EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
VOID* ShadowBuffer;
- NOR_FLASH_DEVICE_PATH DevicePath;
+ NOR_FLASH_DEVICE_PATH DevicePath;
};
EFI_STATUS
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c index a844025a1f..4f56bae330 100644 --- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c +++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c @@ -141,7 +141,7 @@ ValidateFvHeader ( EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
VARIABLE_STORE_HEADER *VariableStoreHeader;
UINTN VariableStoreLength;
- UINTN FvLength;
+ UINTN FvLength;
FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress;
diff --git a/ArmPlatformPkg/Include/Drivers/PL341Dmc.h b/ArmPlatformPkg/Include/Drivers/PL341Dmc.h index 268b6da5c0..caba8f445b 100644 --- a/ArmPlatformPkg/Include/Drivers/PL341Dmc.h +++ b/ArmPlatformPkg/Include/Drivers/PL341Dmc.h @@ -17,36 +17,36 @@ typedef struct {
- UINTN HasQos; // has QoS registers
- UINTN MaxChip; // number of memory chips accessible
- BOOLEAN IsUserCfg;
+ UINTN HasQos; // has QoS registers
+ UINTN MaxChip; // number of memory chips accessible
+ BOOLEAN IsUserCfg;
UINT32 User0Cfg;
UINT32 User2Cfg;
- UINT32 RefreshPeriod;
- UINT32 CasLatency;
- UINT32 WriteLatency;
- UINT32 t_mrd;
- UINT32 t_ras;
- UINT32 t_rc;
- UINT32 t_rcd;
- UINT32 t_rfc;
- UINT32 t_rp;
- UINT32 t_rrd;
- UINT32 t_wr;
- UINT32 t_wtr;
- UINT32 t_xp;
- UINT32 t_xsr;
- UINT32 t_esr;
- UINT32 MemoryCfg;
- UINT32 MemoryCfg2;
- UINT32 MemoryCfg3;
- UINT32 ChipCfg0;
- UINT32 ChipCfg1;
- UINT32 ChipCfg2;
- UINT32 ChipCfg3;
- UINT32 t_faw;
- UINT32 t_data_en;
- UINT32 t_wdata_en;
+ UINT32 RefreshPeriod;
+ UINT32 CasLatency;
+ UINT32 WriteLatency;
+ UINT32 t_mrd;
+ UINT32 t_ras;
+ UINT32 t_rc;
+ UINT32 t_rcd;
+ UINT32 t_rfc;
+ UINT32 t_rp;
+ UINT32 t_rrd;
+ UINT32 t_wr;
+ UINT32 t_wtr;
+ UINT32 t_xp;
+ UINT32 t_xsr;
+ UINT32 t_esr;
+ UINT32 MemoryCfg;
+ UINT32 MemoryCfg2;
+ UINT32 MemoryCfg3;
+ UINT32 ChipCfg0;
+ UINT32 ChipCfg1;
+ UINT32 ChipCfg2;
+ UINT32 ChipCfg3;
+ UINT32 t_faw;
+ UINT32 t_data_en;
+ UINT32 t_wdata_en;
UINT32 ModeReg;
UINT32 ExtModeReg;
} PL341_DMC_CONFIG;
@@ -107,7 +107,7 @@ typedef struct { #define DMC_MEMORY_CFG2_REG 0x4C
#define DMC_MEMORY_CFG3_REG 0x50
#define DMC_T_FAW_REG 0x54
-#define DMC_T_RDATA_EN 0x5C /* DFI read data enable register */
+#define DMC_T_RDATA_EN 0x5C /* DFI read data enable register */
#define DMC_T_WRLAT_DIFF 0x60 /* DFI write data enable register */
// Returns the state of the memory controller:
@@ -182,66 +182,66 @@ typedef struct { //
// PHY Register Settings
//
-#define PHY_PTM_DFI_CLK_RANGE 0xE00 // DDR2 PHY PTM register offset
-#define PHY_PTM_IOTERM 0xE04
-#define PHY_PTM_PLL_EN 0xe0c
-#define PHY_PTM_PLL_RANGE 0xe18
-#define PHY_PTM_FEEBACK_DIV 0xe1c
-#define PHY_PTM_RCLK_DIV 0xe20
-#define PHY_PTM_LOCK_STATUS 0xe28
-#define PHY_PTM_INIT_DONE 0xe34
-#define PHY_PTM_ADDCOM_IOSTR_OFF 0xec8
-#define PHY_PTM_SQU_TRAINING 0xee8
-#define PHY_PTM_SQU_STAT 0xeec
+#define PHY_PTM_DFI_CLK_RANGE 0xE00 // DDR2 PHY PTM register offset
+#define PHY_PTM_IOTERM 0xE04
+#define PHY_PTM_PLL_EN 0xe0c
+#define PHY_PTM_PLL_RANGE 0xe18
+#define PHY_PTM_FEEBACK_DIV 0xe1c
+#define PHY_PTM_RCLK_DIV 0xe20
+#define PHY_PTM_LOCK_STATUS 0xe28
+#define PHY_PTM_INIT_DONE 0xe34
+#define PHY_PTM_ADDCOM_IOSTR_OFF 0xec8
+#define PHY_PTM_SQU_TRAINING 0xee8
+#define PHY_PTM_SQU_STAT 0xeec
// ==============================================================================
// PIPD 40G DDR2/DDR3 PHY Register definitions
//
// Offsets from APB Base Address
// ==============================================================================
-#define PHY_BYTE0_OFFSET 0x000
-#define PHY_BYTE1_OFFSET 0x200
-#define PHY_BYTE2_OFFSET 0x400
-#define PHY_BYTE3_OFFSET 0x600
+#define PHY_BYTE0_OFFSET 0x000
+#define PHY_BYTE1_OFFSET 0x200
+#define PHY_BYTE2_OFFSET 0x400
+#define PHY_BYTE3_OFFSET 0x600
-#define PHY_BYTE0_COARSE_SQADJ_INIT 0x064 ;// Coarse squelch adjust
-#define PHY_BYTE1_COARSE_SQADJ_INIT 0x264 ;// Coarse squelch adjust
-#define PHY_BYTE2_COARSE_SQADJ_INIT 0x464 ;// Coarse squelch adjust
-#define PHY_BYTE3_COARSE_SQADJ_INIT 0x664 ;// Coarse squelch adjust
+#define PHY_BYTE0_COARSE_SQADJ_INIT 0x064 ;// Coarse squelch adjust
+#define PHY_BYTE1_COARSE_SQADJ_INIT 0x264 ;// Coarse squelch adjust
+#define PHY_BYTE2_COARSE_SQADJ_INIT 0x464 ;// Coarse squelch adjust
+#define PHY_BYTE3_COARSE_SQADJ_INIT 0x664 ;// Coarse squelch adjust
-#define PHY_BYTE0_IOSTR_OFFSET 0x004
-#define PHY_BYTE1_IOSTR_OFFSET 0x204
-#define PHY_BYTE2_IOSTR_OFFSET 0x404
-#define PHY_BYTE3_IOSTR_OFFSET 0x604
+#define PHY_BYTE0_IOSTR_OFFSET 0x004
+#define PHY_BYTE1_IOSTR_OFFSET 0x204
+#define PHY_BYTE2_IOSTR_OFFSET 0x404
+#define PHY_BYTE3_IOSTR_OFFSET 0x604
;//--------------------------------------------------------------------------
// DFI Clock ranges:
-#define PHY_PTM_DFI_CLK_RANGE_200MHz 0x0
-#define PHY_PTM_DFI_CLK_RANGE_201_267MHz 0x1
-#define PHY_PTM_DFI_CLK_RANGE_268_333MHz 0x2
-#define PHY_PTM_DFI_CLK_RANGE_334_400MHz 0x3
-#define PHY_PTM_DFI_CLK_RANGE_401_533MHz 0x4
-#define PHY_PTM_DFI_CLK_RANGE_534_667MHz 0x5
-#define PHY_PTM_DFI_CLK_RANGE_668_800MHz 0x6
+#define PHY_PTM_DFI_CLK_RANGE_200MHz 0x0
+#define PHY_PTM_DFI_CLK_RANGE_201_267MHz 0x1
+#define PHY_PTM_DFI_CLK_RANGE_268_333MHz 0x2
+#define PHY_PTM_DFI_CLK_RANGE_334_400MHz 0x3
+#define PHY_PTM_DFI_CLK_RANGE_401_533MHz 0x4
+#define PHY_PTM_DFI_CLK_RANGE_534_667MHz 0x5
+#define PHY_PTM_DFI_CLK_RANGE_668_800MHz 0x6
-#define PHY_PTM_DFI_CLK_RANGE_VAL PHY_PTM_DFI_CLK_RANGE_334_400MHz
+#define PHY_PTM_DFI_CLK_RANGE_VAL PHY_PTM_DFI_CLK_RANGE_334_400MHz
//--------------------------------------------------------------------------
// PLL Range
-#define PHY_PTM_PLL_RANGE_200_400MHz 0x0 // b0 = frequency >= 200 MHz and < 400 MHz
-#define PHY_PTM_PLL_RANGE_400_800MHz 0x1 // b1 = frequency >= 400 MHz.
-#define PHY_PTM_FEEBACK_DIV_200_400MHz 0x0 // b0 = frequency >= 200 MHz and < 400 MHz
-#define PHY_PTM_FEEBACK_DIV_400_800MHz 0x1 // b1 = frequency >= 400 MHz.
-#define PHY_PTM_REFCLK_DIV_200_400MHz 0x0
-#define PHY_PTM_REFCLK_DIV_400_800MHz 0x1
+#define PHY_PTM_PLL_RANGE_200_400MHz 0x0 // b0 = frequency >= 200 MHz and < 400 MHz
+#define PHY_PTM_PLL_RANGE_400_800MHz 0x1 // b1 = frequency >= 400 MHz.
+#define PHY_PTM_FEEBACK_DIV_200_400MHz 0x0 // b0 = frequency >= 200 MHz and < 400 MHz
+#define PHY_PTM_FEEBACK_DIV_400_800MHz 0x1 // b1 = frequency >= 400 MHz.
+#define PHY_PTM_REFCLK_DIV_200_400MHz 0x0
+#define PHY_PTM_REFCLK_DIV_400_800MHz 0x1
#define TC_UIOLHNC_MASK 0x000003C0
#define TC_UIOLHNC_SHIFT 0x6
@@ -252,18 +252,18 @@ typedef struct { #define TC_UIOHSTOP_SHIFT 0x0
#define TC_UIOLHXC_VALUE 0x4
-#define PHY_PTM_SQU_TRAINING_ENABLE 0x1
-#define PHY_PTM_SQU_TRAINING_DISABLE 0x0
+#define PHY_PTM_SQU_TRAINING_ENABLE 0x1
+#define PHY_PTM_SQU_TRAINING_DISABLE 0x0
//--------------------------------------
// JEDEC DDR2 Device Register definitions and settings
//--------------------------------------
-#define DDR_MODESET_SHFT 14
-#define DDR_MODESET_MR 0x0 ;// Mode register
-#define DDR_MODESET_EMR 0x1 ;// Extended Mode register
-#define DDR_MODESET_EMR2 0x2
-#define DDR_MODESET_EMR3 0x3
+#define DDR_MODESET_SHFT 14
+#define DDR_MODESET_MR 0x0 ;// Mode register
+#define DDR_MODESET_EMR 0x1 ;// Extended Mode register
+#define DDR_MODESET_EMR2 0x2
+#define DDR_MODESET_EMR3 0x3
//
// Extended Mode Register settings
@@ -290,21 +290,21 @@ typedef struct { #define DDR_EMR_ODS_VAL DDR_EMR_ODS_FULL
-#define DDR_SDRAM_START_ADDR 0x10000000
+#define DDR_SDRAM_START_ADDR 0x10000000
// ----------------------------------------
// PHY IOTERM values
// ----------------------------------------
-#define PHY_PTM_IOTERM_OFF 0x0
-#define PHY_PTM_IOTERM_150R 0x1
-#define PHY_PTM_IOTERM_75R 0x2
-#define PHY_PTM_IOTERM_50R 0x3
-
-#define PHY_BYTE_IOSTR_60OHM 0x0
-#define PHY_BYTE_IOSTR_40OHM 0x1
-#define PHY_BYTE_IOSTR_30OHM 0x2
-#define PHY_BYTE_IOSTR_30AOHM 0x3
+#define PHY_PTM_IOTERM_OFF 0x0
+#define PHY_PTM_IOTERM_150R 0x1
+#define PHY_PTM_IOTERM_75R 0x2
+#define PHY_PTM_IOTERM_50R 0x3
+
+#define PHY_BYTE_IOSTR_60OHM 0x0
+#define PHY_BYTE_IOSTR_40OHM 0x1
+#define PHY_BYTE_IOSTR_30OHM 0x2
+#define PHY_BYTE_IOSTR_30AOHM 0x3
#define DDR2_MR_BURST_LENGTH_4 (2)
#define DDR2_MR_BURST_LENGTH_8 (3)
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S index 0438d91f49..e52ea5afa2 100644 --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S @@ -33,10 +33,10 @@ ASM_PFX(ArmPlatformPeiBootAction): // IN UINTN MpId
// );
ASM_PFX(ArmPlatformGetCorePosition):
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm index aafa9c60d2..95704c100a 100644 --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm @@ -36,10 +36,10 @@ ArmPlatformPeiBootAction FUNCTION // IN UINTN MpId
// );
ArmPlatformGetCorePosition FUNCTION
- and r1, r0, #ARM_CORE_MASK
- and r0, r0, #ARM_CLUSTER_MASK
- add r0, r1, r0, LSR #7
- bx lr
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
ENDFUNC
//UINTN
diff --git a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm index e7fd4a06a8..99218cd10a 100644 --- a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm +++ b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm @@ -61,7 +61,7 @@ ArmPlatformStackSet FUNCTION // Restore the Link register
mov lr, r7
- beq ArmPlatformStackSetPrimary
+ beq ArmPlatformStackSetPrimary
bne ArmPlatformStackSetSecondary
ENDFUNC
@@ -73,19 +73,19 @@ ArmPlatformStackSet FUNCTION // IN UINTN SecondaryStackSize
// );
ArmPlatformStackSetPrimary FUNCTION
- mov r4, lr
+ mov r4, lr
// Add stack of primary stack to StackBase
- add r0, r0, r2
+ add r0, r0, r2
// Compute SecondaryCoresCount * SecondaryCoreStackSize
LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)
- ldr r1, [r1]
- sub r1, #1
- mul r3, r3, r1
+ ldr r1, [r1]
+ sub r1, #1
+ mul r3, r3, r1
// Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))
- add sp, r0, r3
+ add sp, r0, r3
bx r4
ENDFUNC
@@ -98,28 +98,28 @@ ArmPlatformStackSetPrimary FUNCTION // IN UINTN SecondaryStackSize
// );
ArmPlatformStackSetSecondary FUNCTION
- mov r4, lr
+ mov r4, lr
mov sp, r0
// Get Core Position
- mov r0, r1
+ mov r0, r1
bl ArmPlatformGetCorePosition
- mov r5, r0
+ mov r5, r0
// Get Primary Core Position
bl ArmPlatformGetPrimaryCoreMpId
bl ArmPlatformGetCorePosition
// Get Secondary Core Position. We should get consecutive secondary stack number from 1...(CoreCount-1)
- cmp r5, r0
+ cmp r5, r0
subhi r5, r5, #1
- add r5, r5, #1
+ add r5, r5, #1
// Compute top of the secondary stack
- mul r3, r3, r5
+ mul r3, r3, r5
// Set stack
- add sp, sp, r3
+ add sp, sp, r3
bx r4
ENDFUNC
diff --git a/ArmPlatformPkg/Library/EblCmdLib/Arm/EblCmdMmu.c b/ArmPlatformPkg/Library/EblCmdLib/Arm/EblCmdMmu.c index bc074de117..fe9d3eae14 100644 --- a/ArmPlatformPkg/Library/EblCmdLib/Arm/EblCmdMmu.c +++ b/ArmPlatformPkg/Library/EblCmdLib/Arm/EblCmdMmu.c @@ -26,41 +26,41 @@ #define GET_TT_LARGEPAGE_ATTRIBUTES(TTEntry) ((TTEntry) & 0xFFFF)
// Section
-#define TT_DESCRIPTOR_SECTION_STRONGLY_ORDER (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
- TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
- TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
- TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
- TT_DESCRIPTOR_SECTION_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED)
+#define TT_DESCRIPTOR_SECTION_STRONGLY_ORDER (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
+ TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
+ TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \
+ TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
+ TT_DESCRIPTOR_SECTION_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED)
// Small Page
-#define TT_DESCRIPTOR_PAGE_STRONGLY_ORDER (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED)
+#define TT_DESCRIPTOR_PAGE_STRONGLY_ORDER (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED)
// Large Page
-#define TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)
-#define TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
-#define TT_DESCRIPTOR_LARGEPAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)
-#define TT_DESCRIPTOR_LARGEPAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
- TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
- TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
- TT_DESCRIPTOR_PAGE_AP_RW_RW | \
- TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)
+#define TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)
+#define TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)
+#define TT_DESCRIPTOR_LARGEPAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)
+#define TT_DESCRIPTOR_LARGEPAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE | \
+ TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
+ TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
+ TT_DESCRIPTOR_PAGE_AP_RW_RW | \
+ TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)
typedef enum { Level0, Level1,Level2 } MMU_LEVEL;
@@ -296,7 +296,7 @@ DumpMmuLevel ( UINT32 Index = 0, Count;
MMU_ENTRY LastEntry, Entry;
- ASSERT((Level == Level1) || (Level == Level2));
+ ASSERT((Level == Level1) || (Level == Level2));
if (Level == Level1) Count = 4096;
else Count = 256;
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm index 9ac7500f19..edf479ff43 100644 --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm @@ -40,7 +40,7 @@ _ModuleEntryPoint mov r5, r0
// Is it the Primary Core ?
- bl ArmPlatformIsPrimaryCore
+ bl ArmPlatformIsPrimaryCore
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S index 4fe10addc1..f00960f166 100644 --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S @@ -69,13 +69,13 @@ _SetupStackPosition: //
// Calculate how much space there is between the top of the Firmware and the Top of the System Memory
- subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
- bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
- cmp r0, r4
- bge _SetupStack
+ subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
+ cmp r0, r4
+ bge _SetupStack
// Case the top of stacks is the FdBaseAddress
- mov r1, r2
+ mov r1, r2
_SetupStack:
// r1 contains the top of the stack (and the UEFI Memory)
@@ -109,18 +109,18 @@ _GetStackBase: // Stack for the secondary core = Number of Cores - 1
LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
- sub r0, r0, #1
+ sub r0, r0, #1
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
mul r1, r1, r0
sub r10, r10, r1
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
- mov r0, r10
- mov r1, r8
+ mov r0, r10
+ mov r1, r8
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
- bl ASM_PFX(ArmPlatformStackSet)
+ bl ASM_PFX(ArmPlatformStackSet)
// Is it the Primary Core ?
mov r0, r8
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm index 4e2bb16c99..cbb3a08008 100644 --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm @@ -71,13 +71,13 @@ _SetupStackPosition //
// Calculate how much space there is between the top of the Firmware and the Top of the System Memory
- subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
- bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
- cmp r0, r4
- bge _SetupStack
+ subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
+ cmp r0, r4
+ bge _SetupStack
// Case the top of stacks is the FdBaseAddress
- mov r1, r2
+ mov r1, r2
_SetupStack
// r1 contains the top of the stack (and the UEFI Memory)
@@ -111,18 +111,18 @@ _GetStackBase // Stack for the secondary core = Number of Cores - 1
LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
- sub r0, r0, #1
+ sub r0, r0, #1
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
mul r1, r1, r0
sub r10, r10, r1
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
- mov r0, r10
- mov r1, r8
+ mov r0, r10
+ mov r1, r8
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
- bl ArmPlatformStackSet
+ bl ArmPlatformStackSet
// Is it the Primary Core ?
mov r0, r8
diff --git a/ArmPlatformPkg/Sec/Arm/Helper.S b/ArmPlatformPkg/Sec/Arm/Helper.S index 2e2801fe85..ac40102218 100644 --- a/ArmPlatformPkg/Sec/Arm/Helper.S +++ b/ArmPlatformPkg/Sec/Arm/Helper.S @@ -72,10 +72,10 @@ ASM_PFX(copy_cpsr_into_spsr): # Set the Non Secure Mode
ASM_PFX(set_non_secure_mode):
push { r1 }
- and r0, r0, #0x1f @ Keep only the mode bits
+ and r0, r0, #0x1f @ Keep only the mode bits
mrs r1, spsr @ Read the spsr
bic r1, r1, #0x1f @ Clear all mode bits
- orr r1, r1, r0
+ orr r1, r1, r0
msr spsr_cxsf, r1 @ write back spsr (may have caused a mode switch)
isb
pop { r1 }
diff --git a/ArmPlatformPkg/Sec/Arm/Helper.asm b/ArmPlatformPkg/Sec/Arm/Helper.asm index febcdb18a1..8aa7d7840d 100644 --- a/ArmPlatformPkg/Sec/Arm/Helper.asm +++ b/ArmPlatformPkg/Sec/Arm/Helper.asm @@ -67,7 +67,7 @@ set_non_secure_mode and r0, r0, #0x1f // Keep only the mode bits
mrs r1, spsr // Read the spsr
bic r1, r1, #0x1f // Clear all mode bits
- orr r1, r1, r0
+ orr r1, r1, r0
msr spsr_cxsf, r1 // write back spsr (may have caused a mode switch)
isb
pop { r1 }
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S index 158a08f5e3..51b91b965d 100644 --- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S @@ -51,7 +51,7 @@ _IdentifyCpu: mov r9, r0
// Is it the Primary Core ?
- bl ASM_PFX(ArmPlatformIsPrimaryCore)
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)
cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm index a97041d021..b30fab2141 100644 --- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm +++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm @@ -53,7 +53,7 @@ _IdentifyCpu mov r9, r0
// Is it the Primary Core ?
- bl ArmPlatformIsPrimaryCore
+ bl ArmPlatformIsPrimaryCore
cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
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