67 files changed, 11349 insertions, 11349 deletions
diff --git a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
index 02778a807f..b6090431fd 100644
--- a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
@@ -1,357 +1,357 @@
-#
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-#
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
-  PLATFORM_NAME                  = ArmPlatform
-  PLATFORM_GUID                  = 4fe82b83-9315-4ff3-8cc0-ab77ca93cb7f 
-  PLATFORM_VERSION               = 0.1
-  DSC_SPECIFICATION              = 0x00010005
-  OUTPUT_DIRECTORY               = Build/$(PLATFORM_NAME)
-  SUPPORTED_ARCHITECTURES        = ARM
-  BUILD_TARGETS                  = DEBUG|RELEASE
-  SKUID_IDENTIFIER               = DEFAULT
-  FLASH_DEFINITION               = ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf
-
-[LibraryClasses.common]
-  ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
-  ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf
-  ArmPlatformLib|ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.inf
-
-!if $(TARGET) == RELEASE
-  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
-  UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
-!else
-  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
-  UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
-#  UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
-!endif
-  DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
-  
-  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
-  SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
-  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
-  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
-  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
-  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
-  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
-  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
-  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
-
-  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
-  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
-  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
-  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
-  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
-  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
-  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
-  UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
-  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
-  UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf  
-
-  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
-
-  #
-  # Assume everything is fixed at build
-  #
-  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
-  
-  # 1/123 faster than Stm or Vstm version
-  #BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
-  BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf
-
-  # ARM Architectural Libraries
-  CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
-  DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
-  CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
-  ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
-  DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
-  ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
-
-  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
-  TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
-  EfiResetSystemLib|EmbeddedPkg/Library/TemplateResetSystemLib/TemplateResetSystemLib.inf
-  RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
-
-  # EBL Related Libraries  
-  EblCmdLib|ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.inf
-  EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf
-  EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf
-  EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf
-  
-  #
-  # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window 
-  # in the debugger will show load and unload commands for symbols. You can cut and paste this
-  # into the command window to load symbols. We should be able to use a script to do this, but
-  # the version of RVD I have does not support scripts accessing system memory.
-  #
-  #PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
-  PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
-  #PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
-    
-  DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
-  DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
-
-  SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf  
-
-  # BDS Libraries
-  BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
-  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
-
-[LibraryClasses.common.SEC]
-  ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
-
-  ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf  
-  DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
-  
-  PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
-  ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
-  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
-  MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
-  HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
-  PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
-  PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
-  PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
-  MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
-
-[LibraryClasses.common.DXE_CORE]
-  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
-  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
-  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
-  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
-  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
-  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
-  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
-  PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
-
-[LibraryClasses.common.DXE_DRIVER]
-  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
-  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
-  SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
-  PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-  ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
-
-[LibraryClasses.common.UEFI_APPLICATION]
-  UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
-  PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
-
-[LibraryClasses.common.UEFI_DRIVER]
-  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
-  UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
-  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
-  PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-
-[LibraryClasses.common.DXE_RUNTIME_DRIVER]
-  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
-  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
-  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
-
-[LibraryClasses.ARM]
-  #
-  # It is not possible to prevent the ARM compiler for generic intrinsic functions.
-  # This library provides the instrinsic functions generate by a given compiler.
-  # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
-  #
-  NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
-
-[BuildOptions]
-  XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
-
-  GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a
-
-  RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A8
-
-################################################################################
-#
-# Pcd Section - list of all EDK II PCD Entries defined by this Platform
-#
-################################################################################
-
-[PcdsFeatureFlag.common]
-  gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE
-  gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
-  gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
-  gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
-  
-  #
-  # Control what commands are supported from the UI
-  # Turn these on and off to add features or save size
-  #  
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
-
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-  
-  # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
-  gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
-  
-  gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
-  
-  gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
-
-[PcdsFixedAtBuild.common]
-  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Platform"
-  
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmPlatform"
-  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32
-  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0
-  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
-  gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
-  gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
-  gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
-  gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
-  gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
-  gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
-  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
-
-  # DEBUG_ASSERT_ENABLED       0x01
-  # DEBUG_PRINT_ENABLED        0x02
-  # DEBUG_CODE_ENABLED         0x04
-  # CLEAR_MEMORY_ENABLED       0x08
-  # ASSERT_BREAKPOINT_ENABLED  0x10
-  # ASSERT_DEADLOOP_ENABLED    0x20
-!if $(TARGET) == RELEASE
-  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
-!else
-  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
-!endif
-
-  #  DEBUG_INIT      0x00000001  // Initialization
-  #  DEBUG_WARN      0x00000002  // Warnings
-  #  DEBUG_LOAD      0x00000004  // Load events
-  #  DEBUG_FS        0x00000008  // EFI File system
-  #  DEBUG_POOL      0x00000010  // Alloc & Free's
-  #  DEBUG_PAGE      0x00000020  // Alloc & Free's
-  #  DEBUG_INFO      0x00000040  // Verbose
-  #  DEBUG_DISPATCH  0x00000080  // PEI/DXE Dispatchers
-  #  DEBUG_VARIABLE  0x00000100  // Variable
-  #  DEBUG_BM        0x00000400  // Boot Manager
-  #  DEBUG_BLKIO     0x00001000  // BlkIo Driver
-  #  DEBUG_NET       0x00004000  // SNI Driver
-  #  DEBUG_UNDI      0x00010000  // UNDI Driver
-  #  DEBUG_LOADFILE  0x00020000  // UNDI Driver
-  #  DEBUG_EVENT     0x00080000  // Event messages
-  #  DEBUG_ERROR     0x80000000  // Error
-  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
-
-  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
-
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
-  
-  #
-  # Optional feature to help prevent EFI memory map fragments
-  # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
-  # Values are in EFI Pages (4K). DXE Core will make sure that 
-  # at least this much of each type of memory can be allocated 
-  # from a single memory range. This way you only end up with
-  # maximum of two fragements for each type in the memory map
-  # (the memory used, and the free memory that was prereserved
-  # but not used).
-  #
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|50
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|20
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
-    
-  #
-  # ARM Pcds
-  #
-  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000
-  
-  gArmTokenSpaceGuid.PcdSystemMemoryBase|0
-  gArmTokenSpaceGuid.PcdSystemMemorySize|0
-
-################################################################################
-#
-# Components Section - list of all EDK II Modules needed by this Platform
-#
-################################################################################
-[Components.common]
-  
-  #
-  # PEI Phase modules
-  #
-  ArmPlatformPkg/PrePi/PeiUniCore.inf
-
-  #
-  # DXE
-  #
-  MdeModulePkg/Core/Dxe/DxeMain.inf {
-    <LibraryClasses>
-      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
-      NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
-  }
-
-  #
-  # Architectural Protocols
-  #
-  ArmPkg/Drivers/CpuDxe/CpuDxe.inf  
-  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
-  EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf  
-  
-  EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
-  EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
-  EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-  
-  # Simple TextIn/TextOut for UEFI Terminal
-  EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
-  
-  #
-  #
-  # Semi-hosting filesystem
-  #
-  ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-  
-  #
-  # FAT filesystem + GPT/MBR partitioning
-  #
-  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
-  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
-  FatPkg/EnhancedFatDxe/Fat.inf
-  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-  
-  #
-  # Application
-  #  
-  EmbeddedPkg/Ebl/Ebl.inf
-
-  #
-  # Bds
-  #
-  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
-  ArmPlatformPkg/Bds/Bds.inf
-  
+#
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+  PLATFORM_NAME                  = ArmPlatform
+  PLATFORM_GUID                  = 4fe82b83-9315-4ff3-8cc0-ab77ca93cb7f 
+  PLATFORM_VERSION               = 0.1
+  DSC_SPECIFICATION              = 0x00010005
+  OUTPUT_DIRECTORY               = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES        = ARM
+  BUILD_TARGETS                  = DEBUG|RELEASE
+  SKUID_IDENTIFIER               = DEFAULT
+  FLASH_DEFINITION               = ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf
+
+[LibraryClasses.common]
+  ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+  ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf
+  ArmPlatformLib|ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.inf
+
+!if $(TARGET) == RELEASE
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+!else
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+  UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+#  UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
+!endif
+  DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+  
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+
+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+  UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+  UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf  
+
+  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+
+  #
+  # Assume everything is fixed at build
+  #
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  
+  # 1/123 faster than Stm or Vstm version
+  #BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf
+
+  # ARM Architectural Libraries
+  CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+  DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+  CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
+  ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
+  DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
+  ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
+
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+  TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
+  EfiResetSystemLib|EmbeddedPkg/Library/TemplateResetSystemLib/TemplateResetSystemLib.inf
+  RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
+
+  # EBL Related Libraries  
+  EblCmdLib|ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.inf
+  EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf
+  EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf
+  EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf
+  
+  #
+  # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window 
+  # in the debugger will show load and unload commands for symbols. You can cut and paste this
+  # into the command window to load symbols. We should be able to use a script to do this, but
+  # the version of RVD I have does not support scripts accessing system memory.
+  #
+  #PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
+  PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
+  #PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+    
+  DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+  DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
+
+  SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf  
+
+  # BDS Libraries
+  BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
+  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+
+[LibraryClasses.common.SEC]
+  ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
+
+  ArmPlatformSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf  
+  DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf
+  
+  PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+  ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+  MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
+  HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
+  PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
+  PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+  PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
+  MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+  PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
+
+[LibraryClasses.common.UEFI_APPLICATION]
+  UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+  PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+  UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+  PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+
+[LibraryClasses.ARM]
+  #
+  # It is not possible to prevent the ARM compiler for generic intrinsic functions.
+  # This library provides the instrinsic functions generate by a given compiler.
+  # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
+  #
+  NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+[BuildOptions]
+  XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7
+
+  GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a
+
+  RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A8
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsFeatureFlag.common]
+  gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE
+  gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
+  gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
+  gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
+  
+  #
+  # Control what commands are supported from the UI
+  # Turn these on and off to add features or save size
+  #  
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
+
+  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
+  
+  # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
+  gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
+  
+  gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
+  
+  gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
+
+[PcdsFixedAtBuild.common]
+  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Platform"
+  
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmPlatform"
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
+  gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
+  gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
+  gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
+  gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
+  gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
+  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
+
+  # DEBUG_ASSERT_ENABLED       0x01
+  # DEBUG_PRINT_ENABLED        0x02
+  # DEBUG_CODE_ENABLED         0x04
+  # CLEAR_MEMORY_ENABLED       0x08
+  # ASSERT_BREAKPOINT_ENABLED  0x10
+  # ASSERT_DEADLOOP_ENABLED    0x20
+!if $(TARGET) == RELEASE
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
+!else
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+!endif
+
+  #  DEBUG_INIT      0x00000001  // Initialization
+  #  DEBUG_WARN      0x00000002  // Warnings
+  #  DEBUG_LOAD      0x00000004  // Load events
+  #  DEBUG_FS        0x00000008  // EFI File system
+  #  DEBUG_POOL      0x00000010  // Alloc & Free's
+  #  DEBUG_PAGE      0x00000020  // Alloc & Free's
+  #  DEBUG_INFO      0x00000040  // Verbose
+  #  DEBUG_DISPATCH  0x00000080  // PEI/DXE Dispatchers
+  #  DEBUG_VARIABLE  0x00000100  // Variable
+  #  DEBUG_BM        0x00000400  // Boot Manager
+  #  DEBUG_BLKIO     0x00001000  // BlkIo Driver
+  #  DEBUG_NET       0x00004000  // SNI Driver
+  #  DEBUG_UNDI      0x00010000  // UNDI Driver
+  #  DEBUG_LOADFILE  0x00020000  // UNDI Driver
+  #  DEBUG_EVENT     0x00080000  // Event messages
+  #  DEBUG_ERROR     0x80000000  // Error
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
+
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
+  
+  #
+  # Optional feature to help prevent EFI memory map fragments
+  # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
+  # Values are in EFI Pages (4K). DXE Core will make sure that 
+  # at least this much of each type of memory can be allocated 
+  # from a single memory range. This way you only end up with
+  # maximum of two fragements for each type in the memory map
+  # (the memory used, and the free memory that was prereserved
+  # but not used).
+  #
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|50
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|20
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
+    
+  #
+  # ARM Pcds
+  #
+  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000
+  
+  gArmTokenSpaceGuid.PcdSystemMemoryBase|0
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+  
+  #
+  # PEI Phase modules
+  #
+  ArmPlatformPkg/PrePi/PeiUniCore.inf
+
+  #
+  # DXE
+  #
+  MdeModulePkg/Core/Dxe/DxeMain.inf {
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+      NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+  }
+
+  #
+  # Architectural Protocols
+  #
+  ArmPkg/Drivers/CpuDxe/CpuDxe.inf  
+  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
+  EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf  
+  
+  EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+  
+  # Simple TextIn/TextOut for UEFI Terminal
+  EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+  
+  #
+  #
+  # Semi-hosting filesystem
+  #
+  ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+  
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  FatPkg/EnhancedFatDxe/Fat.inf
+  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+  
+  #
+  # Application
+  #  
+  EmbeddedPkg/Ebl/Ebl.inf
+
+  #
+  # Bds
+  #
+  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  ArmPlatformPkg/Bds/Bds.inf
+  
diff --git a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf
index b669947125..a88818ecbd 100644
--- a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf
+++ b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf
@@ -1,245 +1,245 @@
-#
-#  Copyright (c) 2011, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into  the Flash Device Image.  Each FD section
-# defines one flash "device" image.  A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash"  image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.ArmPlatform_EFI]
-BaseAddress   = 0xEC200000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
-Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize     = 0x00001000
-NumBlocks     = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00200000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file.  This section also defines order the components and modules are positioned
-# within the image.  The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize          = 0x40
-NumBlocks          = 0         # This FV gets compressed so make it just big enough
-FvAlignment        = 8         # FV alignment and FV attributes setting.
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
-
-  #
-  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
-  #
-  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-  INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
-  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
-  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
-  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
-  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
-  # Simple TextIn/TextOut for UEFI Terminal
-  INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
-  
-  #
-  # Semi-hosting filesystem (Required the Hardware Debugger to be connected)
-  #
-  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-  
-  #
-  # FAT filesystem + GPT/MBR partitioning
-  #
-  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
-  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
-  INF FatPkg/EnhancedFatDxe/Fat.inf
-  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-  
-  #
-  # UEFI application (Shell Embedded Boot Loader) 
-  #  
-  INF EmbeddedPkg/Ebl/Ebl.inf
-    
-  #
-  # Bds
-  #
-  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
-  INF ArmPlatformPkg/Bds/Bds.inf
-
-
-[FV.FVMAIN_COMPACT]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF ArmPlatformPkg/PrePi/PeiUniCore.inf
-  
-  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
-    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
-      SECTION FV_IMAGE = FVMAIN
-    }
-  }
-
-
-################################################################################
-#
-# Rules are use with the [FV] section's module INF type to define
-# how an FFS file is created for a given INF file. The following Rule are the default
-# rules for the different module type. User can add the customized rules to define the
-# content of the FFS file.
-#
-################################################################################
-
-
-############################################################################
-# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
-############################################################################
-#
-#[Rule.Common.DXE_DRIVER]
-#  FILE DRIVER = $(NAMED_GUID) {
-#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-#    COMPRESS PI_STD {
-#      GUIDED {
-#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-#        UI       STRING="$(MODULE_NAME)" Optional
-#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-#      }
-#    }
-#  }
-#
-############################################################################
-
-[Rule.Common.SEC]
-  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
-    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.PEI_CORE]
-  FILE PEI_CORE = $(NAMED_GUID) {
-    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI     STRING ="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM]
-  FILE PEIM = $(NAMED_GUID) {
-     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
-     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
-     UI       STRING="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM.TIANOCOMPRESSED]
-  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
-    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
-    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
-      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-      UI        STRING="$(MODULE_NAME)" Optional
-    }
-  }
-
-[Rule.Common.DXE_CORE]
-  FILE DXE_CORE = $(NAMED_GUID) {
-    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI       STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_RUNTIME_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_APPLICATION]
-  FILE APPLICATION = $(NAMED_GUID) {
-    UI     STRING ="$(MODULE_NAME)" Optional         
-    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
+#
+#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into  the Flash Device Image.  Each FD section
+# defines one flash "device" image.  A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash"  image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.ArmPlatform_EFI]
+BaseAddress   = 0xEC200000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
+Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize     = 0x00001000
+NumBlocks     = 0x200
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x00200000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file.  This section also defines order the components and modules are positioned
+# within the image.  The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FvMain]
+BlockSize          = 0x40
+NumBlocks          = 0         # This FV gets compressed so make it just big enough
+FvAlignment        = 8         # FV alignment and FV attributes setting.
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
+
+  #
+  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
+  #
+  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
+  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+  # Simple TextIn/TextOut for UEFI Terminal
+  INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+  
+  #
+  # Semi-hosting filesystem (Required the Hardware Debugger to be connected)
+  #
+  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+  
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  INF FatPkg/EnhancedFatDxe/Fat.inf
+  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+  
+  #
+  # UEFI application (Shell Embedded Boot Loader) 
+  #  
+  INF EmbeddedPkg/Ebl/Ebl.inf
+    
+  #
+  # Bds
+  #
+  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  INF ArmPlatformPkg/Bds/Bds.inf
+
+
+[FV.FVMAIN_COMPACT]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF ArmPlatformPkg/PrePi/PeiUniCore.inf
+  
+  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+      SECTION FV_IMAGE = FVMAIN
+    }
+  }
+
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+#  FILE DRIVER = $(NAMED_GUID) {
+#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+#    COMPRESS PI_STD {
+#      GUIDED {
+#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+#        UI       STRING="$(MODULE_NAME)" Optional
+#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+#      }
+#    }
+#  }
+#
+############################################################################
+
+[Rule.Common.SEC]
+  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.PEI_CORE]
+  FILE PEI_CORE = $(NAMED_GUID) {
+    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI     STRING ="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM]
+  FILE PEIM = $(NAMED_GUID) {
+     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
+     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
+     UI       STRING="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+      UI        STRING="$(MODULE_NAME)" Optional
+    }
+  }
+
+[Rule.Common.DXE_CORE]
+  FILE DXE_CORE = $(NAMED_GUID) {
+    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI       STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_APPLICATION]
+  FILE APPLICATION = $(NAMED_GUID) {
+    UI     STRING ="$(MODULE_NAME)" Optional         
+    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
diff --git a/ArmPlatformPkg/ArmPlatformPkg.fdf b/ArmPlatformPkg/ArmPlatformPkg.fdf
index d829d4043e..be7dfa1879 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.fdf
+++ b/ArmPlatformPkg/ArmPlatformPkg.fdf
@@ -1,302 +1,302 @@
-#
-#  Copyright (c) 2011, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into  the Flash Device Image.  Each FD section
-# defines one flash "device" image.  A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash"  image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.Sec_ArmPlatform_EFI]
-BaseAddress   = 0xEC000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress  #The base address of the Secure FLASH Device.
-Size          = 0x00010000|gArmTokenSpaceGuid.PcdSecureFdSize         #The size in bytes of the Secure FLASH Device
-ErasePolarity = 1
-BlockSize     = 0x00001000
-NumBlocks     = 0x10
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00010000
-gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
-FV = FVMAIN_SEC
-
-
-[FD.ArmPlatform_EFI]
-BaseAddress   = 0xEC200000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
-Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize     = 0x00001000
-NumBlocks     = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00200000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file.  This section also defines order the components and modules are positioned
-# within the image.  The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FVMAIN_SEC]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF ArmPlatformPkg/Sec/Sec.inf
-
-
-[FV.FvMain]
-BlockSize          = 0x40
-NumBlocks          = 0         # This FV gets compressed so make it just big enough
-FvAlignment        = 8         # FV alignment and FV attributes setting.
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
-
-  #
-  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
-  #
-  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-  INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
-  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
-  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
-  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
-  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
-  # Simple TextIn/TextOut for UEFI Terminal
-  INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
-  
-  #
-  # Semi-hosting filesystem (Required the Hardware Debugger to be connected)
-  #
-  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-  
-  #
-  # FAT filesystem + GPT/MBR partitioning
-  #
-  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
-  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
-  INF FatPkg/EnhancedFatDxe/Fat.inf
-  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-  
-  #
-  # UEFI application (Shell Embedded Boot Loader) 
-  #  
-  INF EmbeddedPkg/Ebl/Ebl.inf
-    
-  #
-  # Bds
-  #
-  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
-  INF ArmPlatformPkg/Bds/Bds.inf
-
-
-[FV.FVMAIN_COMPACT]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
-  INF MdeModulePkg/Core/Pei/PeiMain.inf
-  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
-  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
-  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
-  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
-  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
-  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
-  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-  
-  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
-    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
-      SECTION FV_IMAGE = FVMAIN
-    }
-  }
-
-
-################################################################################
-#
-# Rules are use with the [FV] section's module INF type to define
-# how an FFS file is created for a given INF file. The following Rule are the default
-# rules for the different module type. User can add the customized rules to define the
-# content of the FFS file.
-#
-################################################################################
-
-
-############################################################################
-# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
-############################################################################
-#
-#[Rule.Common.DXE_DRIVER]
-#  FILE DRIVER = $(NAMED_GUID) {
-#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-#    COMPRESS PI_STD {
-#      GUIDED {
-#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-#        UI       STRING="$(MODULE_NAME)" Optional
-#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-#      }
-#    }
-#  }
-#
-############################################################################
-
-[Rule.Common.SEC]
-  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
-    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.PEI_CORE]
-  FILE PEI_CORE = $(NAMED_GUID) {
-    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI     STRING ="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM]
-  FILE PEIM = $(NAMED_GUID) {
-     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
-     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
-     UI       STRING="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM.TIANOCOMPRESSED]
-  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
-    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
-    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
-      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-      UI        STRING="$(MODULE_NAME)" Optional
-    }
-  }
-
-[Rule.Common.DXE_CORE]
-  FILE DXE_CORE = $(NAMED_GUID) {
-    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI       STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_RUNTIME_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_APPLICATION]
-  FILE APPLICATION = $(NAMED_GUID) {
-    UI     STRING ="$(MODULE_NAME)" Optional         
-    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
+#
+#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into  the Flash Device Image.  Each FD section
+# defines one flash "device" image.  A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash"  image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.Sec_ArmPlatform_EFI]
+BaseAddress   = 0xEC000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress  #The base address of the Secure FLASH Device.
+Size          = 0x00010000|gArmTokenSpaceGuid.PcdSecureFdSize         #The size in bytes of the Secure FLASH Device
+ErasePolarity = 1
+BlockSize     = 0x00001000
+NumBlocks     = 0x10
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x00010000
+gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
+FV = FVMAIN_SEC
+
+
+[FD.ArmPlatform_EFI]
+BaseAddress   = 0xEC200000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
+Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize     = 0x00001000
+NumBlocks     = 0x200
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x00200000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file.  This section also defines order the components and modules are positioned
+# within the image.  The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FVMAIN_SEC]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF ArmPlatformPkg/Sec/Sec.inf
+
+
+[FV.FvMain]
+BlockSize          = 0x40
+NumBlocks          = 0         # This FV gets compressed so make it just big enough
+FvAlignment        = 8         # FV alignment and FV attributes setting.
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
+
+  #
+  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
+  #
+  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
+  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+  # Simple TextIn/TextOut for UEFI Terminal
+  INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
+  
+  #
+  # Semi-hosting filesystem (Required the Hardware Debugger to be connected)
+  #
+  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+  
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  INF FatPkg/EnhancedFatDxe/Fat.inf
+  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+  
+  #
+  # UEFI application (Shell Embedded Boot Loader) 
+  #  
+  INF EmbeddedPkg/Ebl/Ebl.inf
+    
+  #
+  # Bds
+  #
+  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  INF ArmPlatformPkg/Bds/Bds.inf
+
+
+[FV.FVMAIN_COMPACT]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+  INF MdeModulePkg/Core/Pei/PeiMain.inf
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
+  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+  
+  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+      SECTION FV_IMAGE = FVMAIN
+    }
+  }
+
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+#  FILE DRIVER = $(NAMED_GUID) {
+#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+#    COMPRESS PI_STD {
+#      GUIDED {
+#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+#        UI       STRING="$(MODULE_NAME)" Optional
+#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+#      }
+#    }
+#  }
+#
+############################################################################
+
+[Rule.Common.SEC]
+  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.PEI_CORE]
+  FILE PEI_CORE = $(NAMED_GUID) {
+    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI     STRING ="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM]
+  FILE PEIM = $(NAMED_GUID) {
+     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
+     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
+     UI       STRING="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+      UI        STRING="$(MODULE_NAME)" Optional
+    }
+  }
+
+[Rule.Common.DXE_CORE]
+  FILE DXE_CORE = $(NAMED_GUID) {
+    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI       STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_APPLICATION]
+  FILE APPLICATION = $(NAMED_GUID) {
+    UI     STRING ="$(MODULE_NAME)" Optional         
+    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
index 558e304f52..70fc87bcf5 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
@@ -1,310 +1,310 @@
-# FLASH layout file for ARM VE.
-#
-#  Copyright (c) 2011, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into  the Flash Device Image.  Each FD section
-# defines one flash "device" image.  A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash"  image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-
-[FD.ArmRealViewEb_EFI]
-BaseAddress   = 0x40000000|gArmTokenSpaceGuid.PcdFdBaseAddress
-Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize
-ErasePolarity = 1
-BlockSize     = 0x00010000
-NumBlocks     = 0x20
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00050000
-gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
-FV = FVMAIN_SEC
-
-0x00050000|0x00100000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file.  This section also defines order the components and modules are positioned
-# within the image.  The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FVMAIN_SEC]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF ArmPlatformPkg/Sec/Sec.inf
-
-
-[FV.FvMain]
-BlockSize          = 0x40
-NumBlocks          = 0         # This FV gets compressed so make it just big enough
-FvAlignment        = 8         # FV alignment and FV attributes setting.
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
-
-  #
-  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
-  #
-  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
-  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
-  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
-  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
-  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
-  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
-  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
-
-  #
-  # Multiple Console IO support
-  #
-  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
-  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
-  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
-  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
-  INF EmbeddedPkg/SerialDxe/SerialDxe.inf
-  
-  INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
-  INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
-  
-  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
-
-  #
-  # Semi-hosting filesystem
-  #
-  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-  
-  #
-  # FAT filesystem + GPT/MBR partitioning
-  #
-  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
-  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
-  INF FatBinPkg/EnhancedFatDxe/Fat.inf
-  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
-  #
-  # UEFI application (Shell Embedded Boot Loader) 
-  #  
-  INF ShellBinPkg/UefiShell/UefiShell.inf 
-
-  #
-  # Bds
-  #
-  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
-  INF ArmPlatformPkg/Bds/Bds.inf
-
-
-[FV.FVMAIN_COMPACT]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-!if $(EDK2_SKIP_PEICORE) == 1
-  INF ArmPlatformPkg/PrePi/PeiMPCore.inf
-!else
-  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
-  INF MdeModulePkg/Core/Pei/PeiMain.inf
-  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
-  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
-  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
-  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
-  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
-  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
-  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-!endif
-
-  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
-    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
-      SECTION FV_IMAGE = FVMAIN
-    }
-  }
-
-################################################################################
-#
-# Rules are use with the [FV] section's module INF type to define
-# how an FFS file is created for a given INF file. The following Rule are the default
-# rules for the different module type. User can add the customized rules to define the
-# content of the FFS file.
-#
-################################################################################
-
-
-############################################################################
-# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
-############################################################################
-#
-#[Rule.Common.DXE_DRIVER]
-#  FILE DRIVER = $(NAMED_GUID) {
-#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-#    COMPRESS PI_STD {
-#      GUIDED {
-#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-#        UI       STRING="$(MODULE_NAME)" Optional
-#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-#      }
-#    }
-#  }
-#
-############################################################################
-
-[Rule.Common.SEC]
-  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
-    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.PEI_CORE]
-  FILE PEI_CORE = $(NAMED_GUID) {
-    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI     STRING ="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM]
-  FILE PEIM = $(NAMED_GUID) {
-     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
-     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
-     UI       STRING="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM.TIANOCOMPRESSED]
-  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
-    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
-    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
-      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-      UI        STRING="$(MODULE_NAME)" Optional
-    }
-  }
-
-[Rule.Common.DXE_CORE]
-  FILE DXE_CORE = $(NAMED_GUID) {
-    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI       STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_RUNTIME_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_APPLICATION]
-  FILE APPLICATION = $(NAMED_GUID) {
-    UI     STRING ="$(MODULE_NAME)" Optional         
-    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.UEFI_DRIVER.BINARY]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX DXE_DEPEX Optional      |.depex
-    PE32      PE32                    |.efi
-    UI        STRING="$(MODULE_NAME)" Optional
-    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-  }
-
-[Rule.Common.UEFI_APPLICATION.BINARY]
-  FILE APPLICATION = $(NAMED_GUID) {
-    PE32      PE32                    |.efi
-    UI        STRING="$(MODULE_NAME)" Optional
-    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-  }
+# FLASH layout file for ARM VE.
+#
+#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into  the Flash Device Image.  Each FD section
+# defines one flash "device" image.  A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash"  image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+
+[FD.ArmRealViewEb_EFI]
+BaseAddress   = 0x40000000|gArmTokenSpaceGuid.PcdFdBaseAddress
+Size          = 0x00200000|gArmTokenSpaceGuid.PcdFdSize
+ErasePolarity = 1
+BlockSize     = 0x00010000
+NumBlocks     = 0x20
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x00050000
+gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
+FV = FVMAIN_SEC
+
+0x00050000|0x00100000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file.  This section also defines order the components and modules are positioned
+# within the image.  The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FVMAIN_SEC]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF ArmPlatformPkg/Sec/Sec.inf
+
+
+[FV.FvMain]
+BlockSize          = 0x40
+NumBlocks          = 0         # This FV gets compressed so make it just big enough
+FvAlignment        = 8         # FV alignment and FV attributes setting.
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
+
+  #
+  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
+  #
+  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
+
+  #
+  # Multiple Console IO support
+  #
+  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+  INF EmbeddedPkg/SerialDxe/SerialDxe.inf
+  
+  INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+  INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
+  
+  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
+
+  #
+  # Semi-hosting filesystem
+  #
+  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+  
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  INF FatBinPkg/EnhancedFatDxe/Fat.inf
+  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+  #
+  # UEFI application (Shell Embedded Boot Loader) 
+  #  
+  INF ShellBinPkg/UefiShell/UefiShell.inf 
+
+  #
+  # Bds
+  #
+  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  INF ArmPlatformPkg/Bds/Bds.inf
+
+
+[FV.FVMAIN_COMPACT]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+!if $(EDK2_SKIP_PEICORE) == 1
+  INF ArmPlatformPkg/PrePi/PeiMPCore.inf
+!else
+  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+  INF MdeModulePkg/Core/Pei/PeiMain.inf
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
+  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+!endif
+
+  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+      SECTION FV_IMAGE = FVMAIN
+    }
+  }
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+#  FILE DRIVER = $(NAMED_GUID) {
+#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+#    COMPRESS PI_STD {
+#      GUIDED {
+#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+#        UI       STRING="$(MODULE_NAME)" Optional
+#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+#      }
+#    }
+#  }
+#
+############################################################################
+
+[Rule.Common.SEC]
+  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.PEI_CORE]
+  FILE PEI_CORE = $(NAMED_GUID) {
+    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI     STRING ="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM]
+  FILE PEIM = $(NAMED_GUID) {
+     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
+     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
+     UI       STRING="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+      UI        STRING="$(MODULE_NAME)" Optional
+    }
+  }
+
+[Rule.Common.DXE_CORE]
+  FILE DXE_CORE = $(NAMED_GUID) {
+    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI       STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_APPLICATION]
+  FILE APPLICATION = $(NAMED_GUID) {
+    UI     STRING ="$(MODULE_NAME)" Optional         
+    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX DXE_DEPEX Optional      |.depex
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+  FILE APPLICATION = $(NAMED_GUID) {
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c
index a5fb26a327..77d48acce1 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c
@@ -1,146 +1,146 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL341Dmc.h>
-#include <Drivers/SP804Timer.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-ARM_CORE_INFO mRealViewEbMpCoreInfoTable[] = {
-  {
-    // Cluster 0, Core 0
-    0x0, 0x0,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 1
-    0x0, 0x1,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  }
-};
-
-/**
-  Return the current Boot Mode
-
-  This function returns the boot reason on the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
-  VOID
-  )
-{
-  return BOOT_WITH_FULL_CONFIGURATION;
-}
-
-/**
-  Initialize controllers that must setup in the normal world
-
-  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
-  in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // Disable memory remapping and return to normal mapping
-  MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
-
-  // Configure periodic timer (TIMER0) for 1MHz operation
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
-  // Configure 1MHz clock
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
-  // configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
-  // Configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Initialize the system (or sometimes called permanent) memory
-
-  This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
-  VOID
-  )
-{
-  // We do not need to initialize the System Memory on RTSM
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
-  OUT UINTN                   *CoreCount,
-  OUT ARM_CORE_INFO           **ArmCoreTable
-  )
-{
-  if ((MmioRead32 (ARM_EB_SYS_PROCID0_REG) & ARM_EB_SYS_PROC_ID_MASK) == ARM_EB_SYS_PROC_ID_CORTEX_A9) {
-    *CoreCount    = sizeof(mRealViewEbMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
-    *ArmCoreTable = mRealViewEbMpCoreInfoTable;
-    return EFI_SUCCESS;
-  } else {
-    return EFI_UNSUPPORTED;
-  }
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
-  {
-    EFI_PEI_PPI_DESCRIPTOR_PPI,
-    &mArmMpCoreInfoPpiGuid,
-    &mMpCoreInfoPpi
-  }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
-  OUT UINTN                   *PpiListSize,
-  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
-  )
-{
-  *PpiListSize = sizeof(gPlatformPpiTable);
-  *PpiList = gPlatformPpiTable;
-}
-
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/PL341Dmc.h>
+#include <Drivers/SP804Timer.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+#include <ArmPlatform.h>
+
+ARM_CORE_INFO mRealViewEbMpCoreInfoTable[] = {
+  {
+    // Cluster 0, Core 0
+    0x0, 0x0,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 1
+    0x0, 0x1,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  }
+};
+
+/**
+  Return the current Boot Mode
+
+  This function returns the boot reason on the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+  VOID
+  )
+{
+  return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+/**
+  Initialize controllers that must setup in the normal world
+
+  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+  in the PEI phase.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // Disable memory remapping and return to normal mapping
+  MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
+
+  // Configure periodic timer (TIMER0) for 1MHz operation
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+  // Configure 1MHz clock
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+  // configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+  // Configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Initialize the system (or sometimes called permanent) memory
+
+  This memory is generally represented by the DRAM.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+  VOID
+  )
+{
+  // We do not need to initialize the System Memory on RTSM
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+  OUT UINTN                   *CoreCount,
+  OUT ARM_CORE_INFO           **ArmCoreTable
+  )
+{
+  if ((MmioRead32 (ARM_EB_SYS_PROCID0_REG) & ARM_EB_SYS_PROC_ID_MASK) == ARM_EB_SYS_PROC_ID_CORTEX_A9) {
+    *CoreCount    = sizeof(mRealViewEbMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
+    *ArmCoreTable = mRealViewEbMpCoreInfoTable;
+    return EFI_SUCCESS;
+  } else {
+    return EFI_UNSUPPORTED;
+  }
+}
+
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
+  {
+    EFI_PEI_PPI_DESCRIPTOR_PPI,
+    &mArmMpCoreInfoPpiGuid,
+    &mMpCoreInfoPpi
+  }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  *PpiListSize = sizeof(gPlatformPpiTable);
+  *PpiList = gPlatformPpiTable;
+}
+
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c
index 10dcef92ad..033c9d7ea0 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c
@@ -1,76 +1,76 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmLib.h>
-#include <Library/ArmPlatformSecLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL341Dmc.h>
-#include <Drivers/SP804Timer.h>
-
-#include <ArmPlatform.h>
-
-/**
-  Initialize the Secure peripherals and memory regions
-
-  If Trustzone is supported by your platform then this function makes the required initialization
-  of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
-  IN  UINTN                     MpId
-  )
-{
-  ASSERT(FALSE);
-}
-
-/**
-  Initialize controllers that must setup at the early stage
-
-  Some peripherals must be initialized in Secure World.
-  For example, some L2x0 requires to be initialized in Secure World
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  // If it is not the primary core then there is nothing to do
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // Do nothing yet
-  return RETURN_SUCCESS;
-}
-
-/**
-  Call before jumping to Normal World
-
-  This function allows the firmware platform to do extra actions before
-  jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
-  IN  UINTN         MpId,
-  OUT UINTN*        JumpAddress
-  )
-{
-  *JumpAddress = PcdGet32(PcdFvBaseAddress);
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformSecLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/PL341Dmc.h>
+#include <Drivers/SP804Timer.h>
+
+#include <ArmPlatform.h>
+
+/**
+  Initialize the Secure peripherals and memory regions
+
+  If Trustzone is supported by your platform then this function makes the required initialization
+  of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+  IN  UINTN                     MpId
+  )
+{
+  ASSERT(FALSE);
+}
+
+/**
+  Initialize controllers that must setup at the early stage
+
+  Some peripherals must be initialized in Secure World.
+  For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  // If it is not the primary core then there is nothing to do
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // Do nothing yet
+  return RETURN_SUCCESS;
+}
+
+/**
+  Call before jumping to Normal World
+
+  This function allows the firmware platform to do extra actions before
+  jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+  IN  UINTN         MpId,
+  OUT UINTN*        JumpAddress
+  )
+{
+  *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/NorFlashArmRealViewEbLib/NorFlashArmRealViewEbLib.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/NorFlashArmRealViewEbLib/NorFlashArmRealViewEbLib.inf
index 9a68da96ac..48dd960cf6 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/NorFlashArmRealViewEbLib/NorFlashArmRealViewEbLib.inf
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/NorFlashArmRealViewEbLib/NorFlashArmRealViewEbLib.inf
@@ -1,35 +1,35 @@
-#/** @file
-#  
-#  Component description file for NorFlashArmRealViewEbLib module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = NorFlashArmRealViewEbLib
-  FILE_GUID                      = a3a49a60-7597-11e0-b07c-0002a5d5c51b
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = NorFlashPlatformLib
-  
-[Sources.common]
-  NorFlashArmRealViewEb.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  IoLib
+#/** @file
+#  
+#  Component description file for NorFlashArmRealViewEbLib module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = NorFlashArmRealViewEbLib
+  FILE_GUID                      = a3a49a60-7597-11e0-b07c-0002a5d5c51b
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NorFlashPlatformLib
+  
+[Sources.common]
+  NorFlashArmRealViewEb.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  IoLib
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf
index fda59de7fd..b44e868c04 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEbLib.inf
@@ -1,65 +1,65 @@
-#/** @file
-#  
-#  Component description file for ArmRealViewGraphicsDxe module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PL111LcdArmRealViewEbLib
-  FILE_GUID                      = 51396ee0-4973-11e0-868a-0002a5d5c51b
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = PL111LcdPlatformLib
-  
-[Sources.common]
-  PL111LcdArmRealViewEb.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  IoLib
-
-[Guids]
-
-[Protocols]
-  gEfiEdidDiscoveredProtocolGuid                # Produced
-  gEfiEdidActiveProtocolGuid                    # Produced
-
-[FixedPcd.common]
-
-  #
-  # The following modes are supported by PL111
-  #
-  #    0 :  640 x 480 x 24 bpp
-  #    1 :  800 x 600 x 24 bpp
-  #    2 : 1024 x 768 x 24 bpp
-  #    3 :  640 x 480 x 16 bpp (565 RGB Mode)
-  #    4 :  800 x 600 x 16 bpp (565 RGB Mode) 
-  #    5 : 1024 x 768 x 16 bpp (565 RGB Mode)
-  #    6 :  640 x 480 x 15 bpp (555 RGB Mode)
-  #    7 :  800 x 600 x 15 bpp (555 RGB Mode) 
-  #    8 : 1024 x 768 x 15 bpp (555 RGB Mode)
-  #    9 : 1024 x 768 x 15 bpp (555 RGB Mode) - Linux driver settings
-  #   10 :  640 x 480 x 12 bpp (444 RGB Mode)
-  #   11 :  800 x 600 x 12 bpp (444 RGB Mode) 
-  #   12 : 1024 x 768 x 12 bpp (444 RGB Mode)
-  #
-
-[Pcd.common]
-
-[Depex]
- # gEfiCpuArchProtocolGuid
+#/** @file
+#  
+#  Component description file for ArmRealViewGraphicsDxe module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PL111LcdArmRealViewEbLib
+  FILE_GUID                      = 51396ee0-4973-11e0-868a-0002a5d5c51b
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PL111LcdPlatformLib
+  
+[Sources.common]
+  PL111LcdArmRealViewEb.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  IoLib
+
+[Guids]
+
+[Protocols]
+  gEfiEdidDiscoveredProtocolGuid                # Produced
+  gEfiEdidActiveProtocolGuid                    # Produced
+
+[FixedPcd.common]
+
+  #
+  # The following modes are supported by PL111
+  #
+  #    0 :  640 x 480 x 24 bpp
+  #    1 :  800 x 600 x 24 bpp
+  #    2 : 1024 x 768 x 24 bpp
+  #    3 :  640 x 480 x 16 bpp (565 RGB Mode)
+  #    4 :  800 x 600 x 16 bpp (565 RGB Mode) 
+  #    5 : 1024 x 768 x 16 bpp (565 RGB Mode)
+  #    6 :  640 x 480 x 15 bpp (555 RGB Mode)
+  #    7 :  800 x 600 x 15 bpp (555 RGB Mode) 
+  #    8 : 1024 x 768 x 15 bpp (555 RGB Mode)
+  #    9 : 1024 x 768 x 15 bpp (555 RGB Mode) - Linux driver settings
+  #   10 :  640 x 480 x 12 bpp (444 RGB Mode)
+  #   11 :  800 x 600 x 12 bpp (444 RGB Mode) 
+  #   12 : 1024 x 768 x 12 bpp (444 RGB Mode)
+  #
+
+[Pcd.common]
+
+[Depex]
+ # gEfiCpuArchProtocolGuid
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/SysConfigArmRealViewEbLib/SysConfigArmRealViewEbLib.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/SysConfigArmRealViewEbLib/SysConfigArmRealViewEbLib.inf
index b45c20b5b0..e1a735345e 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/SysConfigArmRealViewEbLib/SysConfigArmRealViewEbLib.inf
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/SysConfigArmRealViewEbLib/SysConfigArmRealViewEbLib.inf
@@ -1,34 +1,34 @@
-#/** @file
-#  
-#  Component description file for SysConfigArmRealViewEbLib module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SysConfigArmRealViewEbLib
-  FILE_GUID                      = 46eddfa0-8de0-11e0-944b-0002a5d5c51b
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = ArmPlatformSysConfigLib
-  
-[Sources.common]
-  SysConfigArmRealViewEb.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
+#/** @file
+#  
+#  Component description file for SysConfigArmRealViewEbLib module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = SysConfigArmRealViewEbLib
+  FILE_GUID                      = 46eddfa0-8de0-11e0-944b-0002a5d5c51b
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformSysConfigLib
+  
+[Sources.common]
+  SysConfigArmRealViewEb.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
index 4be620c3f3..c961897d00 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
@@ -1,318 +1,318 @@
-# FLASH layout file for ARM VE.
-#
-#  Copyright (c) 2011, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into  the Flash Device Image.  Each FD section
-# defines one flash "device" image.  A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash"  image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.RTSM_VE_Cortex-A15_EFI]
-BaseAddress   = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
-Size          = 0x00280000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize     = 0x00001000
-NumBlocks     = 0x280
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00080000
-gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
-FV = FVMAIN_SEC
-
-0x00080000|0x00280000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file.  This section also defines order the components and modules are positioned
-# within the image.  The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FVMAIN_SEC]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF ArmPlatformPkg/Sec/Sec.inf
-
-
-[FV.FvMain]
-BlockSize          = 0x40
-NumBlocks          = 0         # This FV gets compressed so make it just big enough
-FvAlignment        = 8         # FV alignment and FV attributes setting.
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
-
-  #
-  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
-  #
-  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
-  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
-  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
-  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
-  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
-  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-  
-  #
-  # Multiple Console IO support
-  #
-  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
-  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
-  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
-  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
-  INF EmbeddedPkg/SerialDxe/SerialDxe.inf
-
-  INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
-  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
-  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
-  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
-
-  #
-  # Semi-hosting filesystem
-  #
-  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-  
-  #
-  # FAT filesystem + GPT/MBR partitioning
-  #
-  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
-  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
-  INF FatBinPkg/EnhancedFatDxe/Fat.inf
-  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
-  #
-  # Multimedia Card Interface
-  #
-  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
-  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
-
-  #
-  # UEFI application (Shell Embedded Boot Loader) 
-  #  
-  INF ShellBinPkg/UefiShell/UefiShell.inf 
-  
-  #
-  # Bds
-  #
-  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
-  INF ArmPlatformPkg/Bds/Bds.inf
-
-
-[FV.FVMAIN_COMPACT]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-!if $(EDK2_SKIP_PEICORE) == 1
-  INF ArmPlatformPkg/PrePi/PeiUniCore.inf
-!else
-  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
-  INF MdeModulePkg/Core/Pei/PeiMain.inf
-  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
-  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
-  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
-  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
-  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
-  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
-  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-!endif
-  
-  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
-    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
-      SECTION FV_IMAGE = FVMAIN
-    }
-  }
-
-
-################################################################################
-#
-# Rules are use with the [FV] section's module INF type to define
-# how an FFS file is created for a given INF file. The following Rule are the default
-# rules for the different module type. User can add the customized rules to define the
-# content of the FFS file.
-#
-################################################################################
-
-
-############################################################################
-# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
-############################################################################
-#
-#[Rule.Common.DXE_DRIVER]
-#  FILE DRIVER = $(NAMED_GUID) {
-#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-#    COMPRESS PI_STD {
-#      GUIDED {
-#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-#        UI       STRING="$(MODULE_NAME)" Optional
-#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-#      }
-#    }
-#  }
-#
-############################################################################
-
-[Rule.Common.SEC]
-  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
-    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.PEI_CORE]
-  FILE PEI_CORE = $(NAMED_GUID) {
-    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI     STRING ="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM]
-  FILE PEIM = $(NAMED_GUID) {
-     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
-     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
-     UI       STRING="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM.TIANOCOMPRESSED]
-  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
-    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
-    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
-      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-      UI        STRING="$(MODULE_NAME)" Optional
-    }
-  }
-
-[Rule.Common.DXE_CORE]
-  FILE DXE_CORE = $(NAMED_GUID) {
-    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI       STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_RUNTIME_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_APPLICATION]
-  FILE APPLICATION = $(NAMED_GUID) {
-    UI     STRING ="$(MODULE_NAME)" Optional         
-    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.UEFI_DRIVER.BINARY]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX DXE_DEPEX Optional      |.depex
-    PE32      PE32                    |.efi
-    UI        STRING="$(MODULE_NAME)" Optional
-    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-  }
-
-[Rule.Common.UEFI_APPLICATION.BINARY]
-  FILE APPLICATION = $(NAMED_GUID) {
-    PE32      PE32                    |.efi
-    UI        STRING="$(MODULE_NAME)" Optional
-    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-  }
+# FLASH layout file for ARM VE.
+#
+#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into  the Flash Device Image.  Each FD section
+# defines one flash "device" image.  A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash"  image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.RTSM_VE_Cortex-A15_EFI]
+BaseAddress   = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
+Size          = 0x00280000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize     = 0x00001000
+NumBlocks     = 0x280
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x00080000
+gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
+FV = FVMAIN_SEC
+
+0x00080000|0x00280000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file.  This section also defines order the components and modules are positioned
+# within the image.  The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FVMAIN_SEC]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF ArmPlatformPkg/Sec/Sec.inf
+
+
+[FV.FvMain]
+BlockSize          = 0x40
+NumBlocks          = 0         # This FV gets compressed so make it just big enough
+FvAlignment        = 8         # FV alignment and FV attributes setting.
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
+
+  #
+  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
+  #
+  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+  
+  #
+  # Multiple Console IO support
+  #
+  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+  INF EmbeddedPkg/SerialDxe/SerialDxe.inf
+
+  INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
+  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
+  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+
+  #
+  # Semi-hosting filesystem
+  #
+  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+  
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  INF FatBinPkg/EnhancedFatDxe/Fat.inf
+  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+  #
+  # Multimedia Card Interface
+  #
+  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
+  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
+
+  #
+  # UEFI application (Shell Embedded Boot Loader) 
+  #  
+  INF ShellBinPkg/UefiShell/UefiShell.inf 
+  
+  #
+  # Bds
+  #
+  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  INF ArmPlatformPkg/Bds/Bds.inf
+
+
+[FV.FVMAIN_COMPACT]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+!if $(EDK2_SKIP_PEICORE) == 1
+  INF ArmPlatformPkg/PrePi/PeiUniCore.inf
+!else
+  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+  INF MdeModulePkg/Core/Pei/PeiMain.inf
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
+  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+!endif
+  
+  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+      SECTION FV_IMAGE = FVMAIN
+    }
+  }
+
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+#  FILE DRIVER = $(NAMED_GUID) {
+#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+#    COMPRESS PI_STD {
+#      GUIDED {
+#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+#        UI       STRING="$(MODULE_NAME)" Optional
+#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+#      }
+#    }
+#  }
+#
+############################################################################
+
+[Rule.Common.SEC]
+  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.PEI_CORE]
+  FILE PEI_CORE = $(NAMED_GUID) {
+    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI     STRING ="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM]
+  FILE PEIM = $(NAMED_GUID) {
+     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
+     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
+     UI       STRING="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+      UI        STRING="$(MODULE_NAME)" Optional
+    }
+  }
+
+[Rule.Common.DXE_CORE]
+  FILE DXE_CORE = $(NAMED_GUID) {
+    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI       STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_APPLICATION]
+  FILE APPLICATION = $(NAMED_GUID) {
+    UI     STRING ="$(MODULE_NAME)" Optional         
+    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX DXE_DEPEX Optional      |.depex
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+  FILE APPLICATION = $(NAMED_GUID) {
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
index 4718c18595..58170490ac 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
@@ -1,318 +1,318 @@
-# FLASH layout file for ARM VE.
-#
-#  Copyright (c) 2011, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into  the Flash Device Image.  Each FD section
-# defines one flash "device" image.  A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash"  image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-[FD.RTSM_VE_Cortex-A15_MPCore_EFI]
-BaseAddress   = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
-Size          = 0x00280000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
-ErasePolarity = 1
-
-# This one is tricky, it must be: BlockSize * NumBlocks = Size
-BlockSize     = 0x00001000
-NumBlocks     = 0x280
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00080000
-gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
-FV = FVMAIN_SEC
-
-0x00080000|0x00280000
-gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
-FV = FVMAIN_COMPACT
-
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file.  This section also defines order the components and modules are positioned
-# within the image.  The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FVMAIN_SEC]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF ArmPlatformPkg/Sec/Sec.inf
-
-
-[FV.FvMain]
-BlockSize          = 0x40
-NumBlocks          = 0         # This FV gets compressed so make it just big enough
-FvAlignment        = 8         # FV alignment and FV attributes setting.
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
-
-  #
-  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
-  #
-  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
-  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
-  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
-  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
-  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
-  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
-  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
-  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
-  
-  #
-  # Multiple Console IO support
-  #
-  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
-  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
-  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
-  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
-  INF EmbeddedPkg/SerialDxe/SerialDxe.inf
-
-  INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
-  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
-  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
-  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
-
-  #
-  # Semi-hosting filesystem
-  #
-  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-  
-  #
-  # FAT filesystem + GPT/MBR partitioning
-  #
-  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
-  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
-  INF FatBinPkg/EnhancedFatDxe/Fat.inf
-  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
-  #
-  # Multimedia Card Interface
-  #
-  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
-  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
-
-  #
-  # UEFI application (Shell Embedded Boot Loader) 
-  #  
-  INF ShellBinPkg/UefiShell/UefiShell.inf 
-  
-  #
-  # Bds
-  #
-  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
-  INF ArmPlatformPkg/Bds/Bds.inf
-
-
-[FV.FVMAIN_COMPACT]
-FvAlignment        = 8
-ERASE_POLARITY     = 1
-MEMORY_MAPPED      = TRUE
-STICKY_WRITE       = TRUE
-LOCK_CAP           = TRUE
-LOCK_STATUS        = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP  = TRUE
-WRITE_STATUS       = TRUE
-WRITE_LOCK_CAP     = TRUE
-WRITE_LOCK_STATUS  = TRUE
-READ_DISABLED_CAP  = TRUE
-READ_ENABLED_CAP   = TRUE
-READ_STATUS        = TRUE
-READ_LOCK_CAP      = TRUE
-READ_LOCK_STATUS   = TRUE
-
-!if $(EDK2_SKIP_PEICORE) == 1
-  INF ArmPlatformPkg/PrePi/PeiMPCore.inf
-!else
-  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
-  INF MdeModulePkg/Core/Pei/PeiMain.inf
-  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
-  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
-  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
-  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
-  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
-  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
-  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-!endif
-  
-  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
-    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
-      SECTION FV_IMAGE = FVMAIN
-    }
-  }
-
-
-################################################################################
-#
-# Rules are use with the [FV] section's module INF type to define
-# how an FFS file is created for a given INF file. The following Rule are the default
-# rules for the different module type. User can add the customized rules to define the
-# content of the FFS file.
-#
-################################################################################
-
-
-############################################################################
-# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
-############################################################################
-#
-#[Rule.Common.DXE_DRIVER]
-#  FILE DRIVER = $(NAMED_GUID) {
-#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-#    COMPRESS PI_STD {
-#      GUIDED {
-#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-#        UI       STRING="$(MODULE_NAME)" Optional
-#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-#      }
-#    }
-#  }
-#
-############################################################################
-
-[Rule.Common.SEC]
-  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
-    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.PEI_CORE]
-  FILE PEI_CORE = $(NAMED_GUID) {
-    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI     STRING ="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM]
-  FILE PEIM = $(NAMED_GUID) {
-     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
-     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
-     UI       STRING="$(MODULE_NAME)" Optional         
-  }
-
-[Rule.Common.PEIM.TIANOCOMPRESSED]
-  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
-    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
-    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
-      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
-      UI        STRING="$(MODULE_NAME)" Optional
-    }
-  }
-
-[Rule.Common.DXE_CORE]
-  FILE DXE_CORE = $(NAMED_GUID) {
-    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI       STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.DXE_RUNTIME_DRIVER]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
-    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
-    UI           STRING="$(MODULE_NAME)" Optional
-  }
-
-[Rule.Common.UEFI_APPLICATION]
-  FILE APPLICATION = $(NAMED_GUID) {
-    UI     STRING ="$(MODULE_NAME)" Optional         
-    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
-  }
-
-[Rule.Common.UEFI_DRIVER.BINARY]
-  FILE DRIVER = $(NAMED_GUID) {
-    DXE_DEPEX DXE_DEPEX Optional      |.depex
-    PE32      PE32                    |.efi
-    UI        STRING="$(MODULE_NAME)" Optional
-    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-  }
-
-[Rule.Common.UEFI_APPLICATION.BINARY]
-  FILE APPLICATION = $(NAMED_GUID) {
-    PE32      PE32                    |.efi
-    UI        STRING="$(MODULE_NAME)" Optional
-    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-  }
+# FLASH layout file for ARM VE.
+#
+#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+################################################################################
+#
+# FD Section
+# The [FD] Section is made up of the definition statements and a
+# description of what goes into  the Flash Device Image.  Each FD section
+# defines one flash "device" image.  A flash device image may be one of
+# the following: Removable media bootable image (like a boot floppy
+# image,) an Option ROM image (that would be "flashed" into an add-in
+# card,) a System "Flash"  image (that would be burned into a system's
+# flash) or an Update ("Capsule") image that will be used to update and
+# existing system flash.
+#
+################################################################################
+
+[FD.RTSM_VE_Cortex-A15_MPCore_EFI]
+BaseAddress   = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
+Size          = 0x00280000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
+ErasePolarity = 1
+
+# This one is tricky, it must be: BlockSize * NumBlocks = Size
+BlockSize     = 0x00001000
+NumBlocks     = 0x280
+
+################################################################################
+#
+# Following are lists of FD Region layout which correspond to the locations of different
+# images within the flash device.
+#
+# Regions must be defined in ascending order and may not overlap.
+#
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
+# the pipe "|" character, followed by the size of the region, also in hex with the leading
+# "0x" characters. Like:
+# Offset|Size
+# PcdOffsetCName|PcdSizeCName
+# RegionType <FV, DATA, or FILE>
+#
+################################################################################
+
+0x00000000|0x00080000
+gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
+FV = FVMAIN_SEC
+
+0x00080000|0x00280000
+gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
+FV = FVMAIN_COMPACT
+
+
+################################################################################
+#
+# FV Section
+#
+# [FV] section is used to define what components or modules are placed within a flash
+# device file.  This section also defines order the components and modules are positioned
+# within the image.  The [FV] section consists of define statements, set statements and
+# module statements.
+#
+################################################################################
+
+[FV.FVMAIN_SEC]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF ArmPlatformPkg/Sec/Sec.inf
+
+
+[FV.FvMain]
+BlockSize          = 0x40
+NumBlocks          = 0         # This FV gets compressed so make it just big enough
+FvAlignment        = 8         # FV alignment and FV attributes setting.
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+  INF MdeModulePkg/Core/Dxe/DxeMain.inf 
+
+  #
+  # PI DXE Drivers producing Architectural Protocols (EFI Services) 
+  #
+  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
+  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+  INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+  INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
+  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+
+  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+  
+  #
+  # Multiple Console IO support
+  #
+  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+  INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+  INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+  INF EmbeddedPkg/SerialDxe/SerialDxe.inf
+
+  INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
+  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
+  INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
+  INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
+  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+
+  #
+  # Semi-hosting filesystem
+  #
+  INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
+  
+  #
+  # FAT filesystem + GPT/MBR partitioning
+  #
+  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  INF FatBinPkg/EnhancedFatDxe/Fat.inf
+  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+
+  #
+  # Multimedia Card Interface
+  #
+  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
+  INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
+
+  #
+  # UEFI application (Shell Embedded Boot Loader) 
+  #  
+  INF ShellBinPkg/UefiShell/UefiShell.inf 
+  
+  #
+  # Bds
+  #
+  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+  INF ArmPlatformPkg/Bds/Bds.inf
+
+
+[FV.FVMAIN_COMPACT]
+FvAlignment        = 8
+ERASE_POLARITY     = 1
+MEMORY_MAPPED      = TRUE
+STICKY_WRITE       = TRUE
+LOCK_CAP           = TRUE
+LOCK_STATUS        = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP  = TRUE
+WRITE_STATUS       = TRUE
+WRITE_LOCK_CAP     = TRUE
+WRITE_LOCK_STATUS  = TRUE
+READ_DISABLED_CAP  = TRUE
+READ_ENABLED_CAP   = TRUE
+READ_STATUS        = TRUE
+READ_LOCK_CAP      = TRUE
+READ_LOCK_STATUS   = TRUE
+
+!if $(EDK2_SKIP_PEICORE) == 1
+  INF ArmPlatformPkg/PrePi/PeiMPCore.inf
+!else
+  INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+  INF MdeModulePkg/Core/Pei/PeiMain.inf
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
+  INF ArmPkg/Drivers/CpuPei/CpuPei.inf
+  INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+  INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
+  INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+  INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+!endif
+  
+  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+      SECTION FV_IMAGE = FVMAIN
+    }
+  }
+
+
+################################################################################
+#
+# Rules are use with the [FV] section's module INF type to define
+# how an FFS file is created for a given INF file. The following Rule are the default
+# rules for the different module type. User can add the customized rules to define the
+# content of the FFS file.
+#
+################################################################################
+
+
+############################################################################
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   # 
+############################################################################
+#
+#[Rule.Common.DXE_DRIVER]
+#  FILE DRIVER = $(NAMED_GUID) {
+#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+#    COMPRESS PI_STD {
+#      GUIDED {
+#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+#        UI       STRING="$(MODULE_NAME)" Optional
+#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+#      }
+#    }
+#  }
+#
+############################################################################
+
+[Rule.Common.SEC]
+  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.PEI_CORE]
+  FILE PEI_CORE = $(NAMED_GUID) {
+    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI     STRING ="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM]
+  FILE PEIM = $(NAMED_GUID) {
+     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
+     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
+     UI       STRING="$(MODULE_NAME)" Optional         
+  }
+
+[Rule.Common.PEIM.TIANOCOMPRESSED]
+  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
+    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
+      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
+      UI        STRING="$(MODULE_NAME)" Optional
+    }
+  }
+
+[Rule.Common.DXE_CORE]
+  FILE DXE_CORE = $(NAMED_GUID) {
+    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI       STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
+    UI           STRING="$(MODULE_NAME)" Optional
+  }
+
+[Rule.Common.UEFI_APPLICATION]
+  FILE APPLICATION = $(NAMED_GUID) {
+    UI     STRING ="$(MODULE_NAME)" Optional         
+    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
+  }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+  FILE DRIVER = $(NAMED_GUID) {
+    DXE_DEPEX DXE_DEPEX Optional      |.depex
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+  FILE APPLICATION = $(NAMED_GUID) {
+    PE32      PE32                    |.efi
+    UI        STRING="$(MODULE_NAME)" Optional
+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+  }
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
index f20db58d6a..a255c40b3e 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
@@ -1,55 +1,55 @@
-#/* @file
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-#*/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = CTA9x4ArmVExpressLib
-  FILE_GUID                      = b16c63a0-f417-11df-b3af-0002a5d5c51b
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = ArmPlatformLib
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  IoLib
-  ArmLib
-  ArmTrustZoneLib
-  MemoryAllocationLib
-  PL341DmcLib
-  PL301AxiLib
-  L2X0CacheLib
-  SerialPortLib
-
-[Sources.common]
-  CTA9x4.c
-  CTA9x4Mem.c
-
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-  gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdTrustzoneSupport
-  gArmTokenSpaceGuid.PcdSystemMemoryBase
-  gArmTokenSpaceGuid.PcdSystemMemorySize
-
-  gArmTokenSpaceGuid.PcdL2x0ControllerBase
-
-  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
-  gArmTokenSpaceGuid.PcdArmPrimaryCore
+#/* @file
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#*/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = CTA9x4ArmVExpressLib
+  FILE_GUID                      = b16c63a0-f417-11df-b3af-0002a5d5c51b
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  IoLib
+  ArmLib
+  ArmTrustZoneLib
+  MemoryAllocationLib
+  PL341DmcLib
+  PL301AxiLib
+  L2X0CacheLib
+  SerialPortLib
+
+[Sources.common]
+  CTA9x4.c
+  CTA9x4Mem.c
+
+[FeaturePcd]
+  gEmbeddedTokenSpaceGuid.PcdCacheEnable
+  gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdTrustzoneSupport
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
+  gArmTokenSpaceGuid.PcdSystemMemorySize
+
+  gArmTokenSpaceGuid.PcdL2x0ControllerBase
+
+  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+  gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
index b7e7b37000..862a51aaf1 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c
@@ -1,214 +1,214 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/SerialPortLib.h>
-
-#include <Drivers/PL341Dmc.h>
-#include <Drivers/PL301Axi.h>
-#include <Drivers/SP804Timer.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-#define SerialPrint(txt)  SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1);
-
-ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = {
-  {
-    // Cluster 0, Core 0
-    0x0, 0x0,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 1
-    0x0, 0x1,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 2
-    0x0, 0x2,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 3
-    0x0, 0x3,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  }
-};
-
-// DDR2 timings
-PL341_DMC_CONFIG DDRTimings = {
-  .MaxChip   = 1,
-  .IsUserCfg = TRUE,
-  .User0Cfg = 0x7C924924,
-  .User2Cfg = (TC_UIOLHXC_VALUE << TC_UIOLHNC_SHIFT) | (TC_UIOLHXC_VALUE << TC_UIOLHPC_SHIFT) | (0x1 << TC_UIOHOCT_SHIFT) | (0x1 << TC_UIOHSTOP_SHIFT),
-  .HasQos    = TRUE,
-  .RefreshPeriod  = 0x3D0,
-  .CasLatency  = 0x8,
-  .WriteLatency  = 0x3,
-  .t_mrd    = 0x2,
-  .t_ras    = 0xA,
-  .t_rc   = 0xE,
-  .t_rcd    = 0x104,
-  .t_rfc    = 0x2f32,
-  .t_rp   = 0x14,
-  .t_rrd    = 0x2,
-  .t_wr   = 0x4,
-  .t_wtr    = 0x2,
-  .t_xp   = 0x2,
-  .t_xsr    = 0xC8,
-  .t_esr    = 0x14,
-  .MemoryCfg   = DMC_MEMORY_CONFIG_ACTIVE_CHIP_1 | DMC_MEMORY_CONFIG_BURST_4 |
-                        DMC_MEMORY_CONFIG_ROW_ADDRESS_15 | DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10,
-  .MemoryCfg2  = DMC_MEMORY_CFG2_DQM_INIT | DMC_MEMORY_CFG2_CKE_INIT |
-            DMC_MEMORY_CFG2_BANK_BITS_3 | DMC_MEMORY_CFG2_MEM_WIDTH_32,
-  .MemoryCfg3  = 0x00000001,
-  .ChipCfg0    = 0x00010000,
-  .t_faw    = 0x00000A0D,
-  .ModeReg = DDR2_MR_BURST_LENGTH_4 | DDR2_MR_CAS_LATENCY_4 | DDR2_MR_WR_CYCLES_4,
-  .ExtModeReg = DDR_EMR_RTT_50R | (DDR_EMR_ODS_VAL << DDR_EMR_ODS_MASK),
-};
-
-/**
-  Return the current Boot Mode
-
-  This function returns the boot reason on the platform
-
-  @return   Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
-  VOID
-  )
-{
-  if (MmioRead32(ARM_VE_SYS_FLAGS_NV_REG) == 0) {
-    return BOOT_WITH_FULL_CONFIGURATION;
-  } else {
-    return BOOT_ON_S2_RESUME;
-  }
-}
-
-/**
-  Initialize controllers that must setup in the normal world
-
-  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
-  in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // Configure periodic timer (TIMER0) for 1MHz operation
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
-  // Configure 1MHz clock
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
-  // configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
-  // Configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Initialize the system (or sometimes called permanent) memory
-
-  This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
-  VOID
-  )
-{
-  UINT32 Value;
-
-  // Memory Map remapping
-  if (FeaturePcdGet(PcdNorFlashRemapping)) {
-    SerialPrint ("Secure ROM at 0x0\n\r");
-  } else {
-    Value = MmioRead32(ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1
-    // Remap the DRAM to 0x0
-    MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);
-  }
-
-  PL341DmcInit(ARM_VE_DMC_BASE, &DDRTimings);
-  PL301AxiInit(ARM_VE_FAXI_BASE);
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
-  OUT UINTN                   *CoreCount,
-  OUT ARM_CORE_INFO           **ArmCoreTable
-  )
-{
-  *CoreCount    = sizeof(mVersatileExpressMpCoreInfoCTA9x4) / sizeof(ARM_CORE_INFO);
-  *ArmCoreTable = mVersatileExpressMpCoreInfoCTA9x4;
-
-  return EFI_SUCCESS;
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
-  {
-    EFI_PEI_PPI_DESCRIPTOR_PPI,
-    &mArmMpCoreInfoPpiGuid,
-    &mMpCoreInfoPpi
-  }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
-  OUT UINTN                   *PpiListSize,
-  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
-  )
-{
-  *PpiListSize = sizeof(gPlatformPpiTable);
-  *PpiList = gPlatformPpiTable;
-}
-
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+
+#include <Drivers/PL341Dmc.h>
+#include <Drivers/PL301Axi.h>
+#include <Drivers/SP804Timer.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+#include <ArmPlatform.h>
+
+#define SerialPrint(txt)  SerialPortWrite ((UINT8*)(txt), AsciiStrLen(txt)+1);
+
+ARM_CORE_INFO mVersatileExpressMpCoreInfoCTA9x4[] = {
+  {
+    // Cluster 0, Core 0
+    0x0, 0x0,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 1
+    0x0, 0x1,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 2
+    0x0, 0x2,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 3
+    0x0, 0x3,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  }
+};
+
+// DDR2 timings
+PL341_DMC_CONFIG DDRTimings = {
+  .MaxChip   = 1,
+  .IsUserCfg = TRUE,
+  .User0Cfg = 0x7C924924,
+  .User2Cfg = (TC_UIOLHXC_VALUE << TC_UIOLHNC_SHIFT) | (TC_UIOLHXC_VALUE << TC_UIOLHPC_SHIFT) | (0x1 << TC_UIOHOCT_SHIFT) | (0x1 << TC_UIOHSTOP_SHIFT),
+  .HasQos    = TRUE,
+  .RefreshPeriod  = 0x3D0,
+  .CasLatency  = 0x8,
+  .WriteLatency  = 0x3,
+  .t_mrd    = 0x2,
+  .t_ras    = 0xA,
+  .t_rc   = 0xE,
+  .t_rcd    = 0x104,
+  .t_rfc    = 0x2f32,
+  .t_rp   = 0x14,
+  .t_rrd    = 0x2,
+  .t_wr   = 0x4,
+  .t_wtr    = 0x2,
+  .t_xp   = 0x2,
+  .t_xsr    = 0xC8,
+  .t_esr    = 0x14,
+  .MemoryCfg   = DMC_MEMORY_CONFIG_ACTIVE_CHIP_1 | DMC_MEMORY_CONFIG_BURST_4 |
+                        DMC_MEMORY_CONFIG_ROW_ADDRESS_15 | DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10,
+  .MemoryCfg2  = DMC_MEMORY_CFG2_DQM_INIT | DMC_MEMORY_CFG2_CKE_INIT |
+            DMC_MEMORY_CFG2_BANK_BITS_3 | DMC_MEMORY_CFG2_MEM_WIDTH_32,
+  .MemoryCfg3  = 0x00000001,
+  .ChipCfg0    = 0x00010000,
+  .t_faw    = 0x00000A0D,
+  .ModeReg = DDR2_MR_BURST_LENGTH_4 | DDR2_MR_CAS_LATENCY_4 | DDR2_MR_WR_CYCLES_4,
+  .ExtModeReg = DDR_EMR_RTT_50R | (DDR_EMR_ODS_VAL << DDR_EMR_ODS_MASK),
+};
+
+/**
+  Return the current Boot Mode
+
+  This function returns the boot reason on the platform
+
+  @return   Return the current Boot Mode of the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+  VOID
+  )
+{
+  if (MmioRead32(ARM_VE_SYS_FLAGS_NV_REG) == 0) {
+    return BOOT_WITH_FULL_CONFIGURATION;
+  } else {
+    return BOOT_ON_S2_RESUME;
+  }
+}
+
+/**
+  Initialize controllers that must setup in the normal world
+
+  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+  in the PEI phase.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // Configure periodic timer (TIMER0) for 1MHz operation
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+  // Configure 1MHz clock
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+  // configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+  // Configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Initialize the system (or sometimes called permanent) memory
+
+  This memory is generally represented by the DRAM.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+  VOID
+  )
+{
+  UINT32 Value;
+
+  // Memory Map remapping
+  if (FeaturePcdGet(PcdNorFlashRemapping)) {
+    SerialPrint ("Secure ROM at 0x0\n\r");
+  } else {
+    Value = MmioRead32(ARM_VE_SYS_CFGRW1_REG); //Scc - CFGRW1
+    // Remap the DRAM to 0x0
+    MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (Value & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);
+  }
+
+  PL341DmcInit(ARM_VE_DMC_BASE, &DDRTimings);
+  PL301AxiInit(ARM_VE_FAXI_BASE);
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+  OUT UINTN                   *CoreCount,
+  OUT ARM_CORE_INFO           **ArmCoreTable
+  )
+{
+  *CoreCount    = sizeof(mVersatileExpressMpCoreInfoCTA9x4) / sizeof(ARM_CORE_INFO);
+  *ArmCoreTable = mVersatileExpressMpCoreInfoCTA9x4;
+
+  return EFI_SUCCESS;
+}
+
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
+  {
+    EFI_PEI_PPI_DESCRIPTOR_PPI,
+    &mArmMpCoreInfoPpiGuid,
+    &mMpCoreInfoPpi
+  }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  *PpiListSize = sizeof(gPlatformPpiTable);
+  *PpiList = gPlatformPpiTable;
+}
+
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
index 69ffd45fdf..f055608abc 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
@@ -1,163 +1,163 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-#include <ArmPlatform.h>
-
-UINTN
-ArmGetCpuCountPerCluster (
-  VOID
-  );
-
-ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
-  {
-    // Cluster 0, Core 0
-    0x0, 0x0,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 1
-    0x0, 0x1,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 2
-    0x0, 0x2,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 3
-    0x0, 0x3,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
-    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
-    (UINT64)0xFFFFFFFF
-  }
-};
-
-/**
-  Return the current Boot Mode
-
-  This function returns the boot reason on the platform
-
-  @return   Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
-  VOID
-  )
-{
-  return BOOT_WITH_FULL_CONFIGURATION;
-}
-
-/**
-  Initialize controllers that must setup in the normal world
-
-  This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
-  in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // Disable memory remapping and return to normal mapping
-  MmioOr32 (SP810_CTRL_BASE, BIT8);
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Initialize the system (or sometimes called permanent) memory
-
-  This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
-  VOID
-  )
-{
-  // Nothing to do here
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
-  OUT UINTN                   *CoreCount,
-  OUT ARM_CORE_INFO           **ArmCoreTable
-  )
-{
-  UINT32   ProcType;
-
-  ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
-  if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
-    // Only support one cluster
-    *CoreCount    = ArmGetCpuCountPerCluster ();
-    *ArmCoreTable = mVersatileExpressMpCoreInfoTable;
-    return EFI_SUCCESS;
-  } else {
-    return EFI_UNSUPPORTED;
-  }
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
-  {
-    EFI_PEI_PPI_DESCRIPTOR_PPI,
-    &mArmMpCoreInfoPpiGuid,
-    &mMpCoreInfoPpi
-  }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
-  OUT UINTN                   *PpiListSize,
-  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
-  )
-{
-  *PpiListSize = sizeof(gPlatformPpiTable);
-  *PpiList = gPlatformPpiTable;
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+#include <ArmPlatform.h>
+
+UINTN
+ArmGetCpuCountPerCluster (
+  VOID
+  );
+
+ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
+  {
+    // Cluster 0, Core 0
+    0x0, 0x0,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 1
+    0x0, 0x1,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 2
+    0x0, 0x2,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 3
+    0x0, 0x3,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
+    (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
+    (UINT64)0xFFFFFFFF
+  }
+};
+
+/**
+  Return the current Boot Mode
+
+  This function returns the boot reason on the platform
+
+  @return   Return the current Boot Mode of the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+  VOID
+  )
+{
+  return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+/**
+  Initialize controllers that must setup in the normal world
+
+  This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
+  in the PEI phase.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // Disable memory remapping and return to normal mapping
+  MmioOr32 (SP810_CTRL_BASE, BIT8);
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Initialize the system (or sometimes called permanent) memory
+
+  This memory is generally represented by the DRAM.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+  VOID
+  )
+{
+  // Nothing to do here
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+  OUT UINTN                   *CoreCount,
+  OUT ARM_CORE_INFO           **ArmCoreTable
+  )
+{
+  UINT32   ProcType;
+
+  ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
+  if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
+    // Only support one cluster
+    *CoreCount    = ArmGetCpuCountPerCluster ();
+    *ArmCoreTable = mVersatileExpressMpCoreInfoTable;
+    return EFI_SUCCESS;
+  } else {
+    return EFI_UNSUPPORTED;
+  }
+}
+
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
+  {
+    EFI_PEI_PPI_DESCRIPTOR_PPI,
+    &mArmMpCoreInfoPpiGuid,
+    &mMpCoreInfoPpi
+  }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  *PpiListSize = sizeof(gPlatformPpiTable);
+  *PpiList = gPlatformPpiTable;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
index f3e8cafc0f..cb6376f65e 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
@@ -103,7 +103,7 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_PERIPH_BASE;
   VirtualMemoryTable[Index].Length       = 2 * ARM_VE_SMB_PERIPH_SZ;
-  VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+  VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
 
 //TODO:This should be enabled for final release. Right now, ARM VE RTSM crashes.
 //  // If a Logic Tile is connected to The ARM Versatile Express Motherboard
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
index ce9bc8b271..228a0fb0f8 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c
@@ -1,148 +1,148 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/ArmPlatformSysConfigLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/ArmTrustzone.h>
-#include <Drivers/PL310L2Cache.h>
-
-#include <ArmPlatform.h>
-
-/**
-  Initialize the Secure peripherals and memory regions
-
-  If Trustzone is supported by your platform then this function makes the required initialization
-  of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
-  IN  UINTN                     MpId
-  )
-{
-  // Nothing to do
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return;
-  }
-
-  //
-  // Setup TZ Protection Controller
-  //
-
-  if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
-    ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
-  } else {
-    ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
-  }
-
-  // Set Non Secure access for all devices
-  TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
-  TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
-  TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF);
-
-  // Remove Non secure access to secure devices
-  TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0,
-       ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC);
-
-  TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2,
-       ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK);
-
-  //
-  // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
-  //
-
-  // NOR Flash 0 non secure (BootMon)
-  TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED,
-      ARM_VE_SMB_NOR0_BASE,0,
-      TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-
-  // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
-  if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
-    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
-    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
-        ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
-        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
-  } else {
-    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
-        ARM_VE_SMB_NOR1_BASE,0,
-        TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-  }
-
-  // Base of SRAM. Only half of SRAM in Non Secure world
-  // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
-  if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
-    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
-    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
-        ARM_VE_SMB_SRAM_BASE,0,
-        TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
-  } else {
-    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
-        ARM_VE_SMB_SRAM_BASE,0,
-        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
-  }
-
-  // Memory Mapped Peripherals. All in non secure world
-  TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,
-      ARM_VE_SMB_PERIPH_BASE,0,
-      TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
-
-  // MotherBoard Peripherals and On-chip peripherals.
-  TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED,
-      ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0,
-      TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW);
-}
-
-/**
-  Initialize controllers that must setup at the early stage
-
-  Some peripherals must be initialized in Secure World.
-  For example, some L2x0 requires to be initialized in Secure World
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  // If it is not the primary core then there is nothing to do
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // The L2x0 controller must be intialize in Secure World
-  L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase),
-      PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
-      PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
-      0,~0, // Use default setting for the Auxiliary Control Register
-      FALSE);
-
-  // Initialize the System Configuration
-  ArmPlatformSysConfigInitialize ();
-
-  // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
-  // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
-  if ((FeaturePcdGet (PcdSystemMemoryInitializeInSec)) || (FeaturePcdGet (PcdStandalone) == FALSE)) {
-    // If it is not a standalone build ensure the PcdSystemMemoryInitializeInSec has been set
-    ASSERT(FeaturePcdGet (PcdSystemMemoryInitializeInSec) == TRUE);
-
-    // Initialize system memory (DRAM)
-    ArmPlatformInitializeSystemMemory ();
-  }
-
-  return RETURN_SUCCESS;
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/ArmPlatformSysConfigLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/ArmTrustzone.h>
+#include <Drivers/PL310L2Cache.h>
+
+#include <ArmPlatform.h>
+
+/**
+  Initialize the Secure peripherals and memory regions
+
+  If Trustzone is supported by your platform then this function makes the required initialization
+  of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+  IN  UINTN                     MpId
+  )
+{
+  // Nothing to do
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return;
+  }
+
+  //
+  // Setup TZ Protection Controller
+  //
+
+  if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
+    ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
+  } else {
+    ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
+  }
+
+  // Set Non Secure access for all devices
+  TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
+  TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
+  TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2, 0xFFFFFFFF);
+
+  // Remove Non secure access to secure devices
+  TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0,
+       ARM_VE_DECPROT_BIT_TZPC | ARM_VE_DECPROT_BIT_DMC_TZASC | ARM_VE_DECPROT_BIT_NMC_TZASC | ARM_VE_DECPROT_BIT_SMC_TZASC);
+
+  TZPCClearDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_2,
+       ARM_VE_DECPROT_BIT_EXT_MAST_TZ | ARM_VE_DECPROT_BIT_DMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_NMC_TZASC_LOCK | ARM_VE_DECPROT_BIT_SMC_TZASC_LOCK);
+
+  //
+  // Setup TZ Address Space Controller for the SMC. Create 5 Non Secure regions (NOR0, NOR1, SRAM, SMC Peripheral regions)
+  //
+
+  // NOR Flash 0 non secure (BootMon)
+  TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED,
+      ARM_VE_SMB_NOR0_BASE,0,
+      TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+  // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin)
+  if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0,
+        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+  } else {
+    TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_NOR1_BASE,0,
+        TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+  }
+
+  // Base of SRAM. Only half of SRAM in Non Secure world
+  // First half non secure (16MB) + Second Half secure (16MB) = 32MB of SRAM
+  if (PcdGetBool (PcdTrustzoneSupport) == TRUE) {
+    //Note: Your OS Kernel must be aware of the secure regions before to enable this region
+    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_SRAM_BASE,0,
+        TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW);
+  } else {
+    TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED,
+        ARM_VE_SMB_SRAM_BASE,0,
+        TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW);
+  }
+
+  // Memory Mapped Peripherals. All in non secure world
+  TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED,
+      ARM_VE_SMB_PERIPH_BASE,0,
+      TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW);
+
+  // MotherBoard Peripherals and On-chip peripherals.
+  TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED,
+      ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0,
+      TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW);
+}
+
+/**
+  Initialize controllers that must setup at the early stage
+
+  Some peripherals must be initialized in Secure World.
+  For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  // If it is not the primary core then there is nothing to do
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // The L2x0 controller must be intialize in Secure World
+  L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase),
+      PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
+      PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES),
+      0,~0, // Use default setting for the Auxiliary Control Register
+      FALSE);
+
+  // Initialize the System Configuration
+  ArmPlatformSysConfigInitialize ();
+
+  // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
+  // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
+  if ((FeaturePcdGet (PcdSystemMemoryInitializeInSec)) || (FeaturePcdGet (PcdStandalone) == FALSE)) {
+    // If it is not a standalone build ensure the PcdSystemMemoryInitializeInSec has been set
+    ASSERT(FeaturePcdGet (PcdSystemMemoryInitializeInSec) == TRUE);
+
+    // Initialize system memory (DRAM)
+    ArmPlatformInitializeSystemMemory ();
+  }
+
+  return RETURN_SUCCESS;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
index 4a1e056af0..ff8476718f 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf
@@ -1,52 +1,52 @@
-#/* @file
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-#*/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = RTSMArmVExpressSecLib
-  FILE_GUID                      = 1fdaabb0-ab7d-480c-91ff-428dc1546f3a
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = ArmPlatformSecLib
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  IoLib
-  ArmLib
-  SerialPortLib
-
-[Sources.common]
-  RTSMSec.c
-
-[Sources.ARM]
-  Arm/RTSMBoot.asm     | RVCT
-  Arm/RTSMBoot.S       | GCC
-  Arm/RTSMHelper.asm   | RVCT
-  Arm/RTSMHelper.S     | GCC
-
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdCacheEnable
-  gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
-  gArmPlatformTokenSpaceGuid.PcdStandalone
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdFvBaseAddress
-
-  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
-  gArmTokenSpaceGuid.PcdArmPrimaryCore
+#/* @file
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#*/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = RTSMArmVExpressSecLib
+  FILE_GUID                      = 1fdaabb0-ab7d-480c-91ff-428dc1546f3a
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformSecLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  IoLib
+  ArmLib
+  SerialPortLib
+
+[Sources.common]
+  RTSMSec.c
+
+[Sources.ARM]
+  Arm/RTSMBoot.asm     | RVCT
+  Arm/RTSMBoot.S       | GCC
+  Arm/RTSMHelper.asm   | RVCT
+  Arm/RTSMHelper.S     | GCC
+
+[FeaturePcd]
+  gEmbeddedTokenSpaceGuid.PcdCacheEnable
+  gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
+  gArmPlatformTokenSpaceGuid.PcdStandalone
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdFvBaseAddress
+
+  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+  gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
index 4ae6301603..92df56cd57 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
@@ -1,83 +1,83 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/IoLib.h>
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-#include <Drivers/PL310L2Cache.h>
-#include <Drivers/SP804Timer.h>
-
-#include <ArmPlatform.h>
-
-/**
-  Initialize the Secure peripherals and memory regions
-
-  If Trustzone is supported by your platform then this function makes the required initialization
-  of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
-  IN  UINTN                     MpId
-  )
-{
-  // No TZPC or TZASC on RTSM to initialize
-}
-
-/**
-  Initialize controllers that must setup at the early stage
-
-  Some peripherals must be initialized in Secure World.
-  For example, some L2x0 requires to be initialized in Secure World
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  // If it is not the primary core then there is nothing to do
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // Configure periodic timer (TIMER0) for 1MHz operation
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
-  // Configure 1MHz clock
-  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
-  // Configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
-  // Configure SP810 to use 1MHz clock and disable
-  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Call before jumping to Normal World
-
-  This function allows the firmware platform to do extra actions before
-  jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
-  IN  UINTN         MpId,
-  OUT UINTN*        JumpAddress
-  )
-{
-  *JumpAddress = PcdGet32(PcdFvBaseAddress);
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/IoLib.h>
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+#include <Drivers/PL310L2Cache.h>
+#include <Drivers/SP804Timer.h>
+
+#include <ArmPlatform.h>
+
+/**
+  Initialize the Secure peripherals and memory regions
+
+  If Trustzone is supported by your platform then this function makes the required initialization
+  of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+  IN  UINTN                     MpId
+  )
+{
+  // No TZPC or TZASC on RTSM to initialize
+}
+
+/**
+  Initialize controllers that must setup at the early stage
+
+  Some peripherals must be initialized in Secure World.
+  For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  // If it is not the primary core then there is nothing to do
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // Configure periodic timer (TIMER0) for 1MHz operation
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
+  // Configure 1MHz clock
+  MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
+  // Configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
+  // Configure SP810 to use 1MHz clock and disable
+  MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Call before jumping to Normal World
+
+  This function allows the firmware platform to do extra actions before
+  jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+  IN  UINTN         MpId,
+  OUT UINTN*        JumpAddress
+  )
+{
+  *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
index 3dfa756ddb..8d4f52c52e 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
@@ -1,35 +1,35 @@
-#/** @file
-#  
-#  Component description file for ArmVExpressSysConfigLib module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmVExpressSysConfigLib
-  FILE_GUID                      = a05b5cc0-82d2-11e0-82cb-0002a5d5c51b
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = ArmPlatformSysConfigLib
-  
-[Sources.common]
-  ArmVExpressSysConfig.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  IoLib
+#/** @file
+#  
+#  Component description file for ArmVExpressSysConfigLib module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmVExpressSysConfigLib
+  FILE_GUID                      = a05b5cc0-82d2-11e0-82cb-0002a5d5c51b
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformSysConfigLib
+  
+[Sources.common]
+  ArmVExpressSysConfig.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  IoLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
index 73a17fb818..6a1814e095 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
@@ -41,4 +41,4 @@ HdLcdArmVExpress.c
 
 [Pcd]
   gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
-  gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
-\ No newline at end of file
+  gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
+\ No newline at end of file
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
index 45af92126b..af227d5e65 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
@@ -1,32 +1,32 @@
-#/** @file
-#  
-#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = NorFlashArmVExpressLib
-  FILE_GUID                      = c0f5dfa0-7599-11e0-9665-0002a5d5c51b
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = NorFlashPlatformLib
-  
-[Sources.common]
-  NorFlashArmVExpress.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  IoLib
+#/** @file
+#  
+#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = NorFlashArmVExpressLib
+  FILE_GUID                      = c0f5dfa0-7599-11e0-9665-0002a5d5c51b
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = NorFlashPlatformLib
+  
+[Sources.common]
+  NorFlashArmVExpress.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  IoLib
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
index c9b6a98c2c..2440ea99cf 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
@@ -1,43 +1,43 @@
-#/** @file
-#  
-#  Component description file for ArmVeGraphicsDxe module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PL111LcdArmVExpressLib
-  FILE_GUID                      = b7f06f20-496f-11e0-a8e8-0002a5d5c51b
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = LcdPlatformLib
-  
-[Sources.common]
-  PL111LcdArmVExpress.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  ArmPlatformSysConfigLib
-
-[Protocols]
-  gEfiEdidDiscoveredProtocolGuid                # Produced
-  gEfiEdidActiveProtocolGuid                    # Produced
-
-[Pcd]
-  gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
-  gArmVExpressTokenSpaceGuid.PcdPL111LcdVideoModeOscId
+#/** @file
+#  
+#  Component description file for ArmVeGraphicsDxe module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PL111LcdArmVExpressLib
+  FILE_GUID                      = b7f06f20-496f-11e0-a8e8-0002a5d5c51b
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = LcdPlatformLib
+  
+[Sources.common]
+  PL111LcdArmVExpress.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  ArmPlatformSysConfigLib
+
+[Protocols]
+  gEfiEdidDiscoveredProtocolGuid                # Produced
+  gEfiEdidActiveProtocolGuid                    # Produced
+
+[Pcd]
+  gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
+  gArmVExpressTokenSpaceGuid.PcdPL111LcdVideoModeOscId
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c
index a471eb2602..f858317550 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -1,81 +1,81 @@
-/** @file
-  Template library implementation to support ResetSystem Runtime call.
-  
-  Fill in the templates with what ever makes you system reset.
-
-
-  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/EfiResetSystemLib.h>
-#include <Library/ArmPlatformSysConfigLib.h>
-
-#include <ArmPlatform.h>
-
-/**
-  Resets the entire platform.
-
-  @param  ResetType             The type of reset to perform.
-  @param  ResetStatus           The status code for the reset.
-  @param  DataSize              The size, in bytes, of WatchdogData.
-  @param  ResetData             For a ResetType of EfiResetCold, EfiResetWarm, or
-                                EfiResetShutdown the data buffer starts with a Null-terminated
-                                Unicode string, optionally followed by additional binary data.
-
-**/
-EFI_STATUS
-EFIAPI
-LibResetSystem (
-  IN EFI_RESET_TYPE   ResetType,
-  IN EFI_STATUS       ResetStatus,
-  IN UINTN            DataSize,
-  IN CHAR16           *ResetData OPTIONAL
-  )
-{
-  switch (ResetType) {
-  case EfiResetWarm:
-    // Map a warm reset into a cold reset
-  case EfiResetCold:
-  case EfiResetShutdown:
-    // Send the REBOOT function to the platform microcontroller
-    ArmPlatformSysConfigSet (SYS_CFG_REBOOT, 0);
-
-    // We should never be here
-    while(1);
-  }
-
-  ASSERT(FALSE);
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  Initialize any infrastructure required for LibResetSystem () to function.
-
-  @param  ImageHandle   The firmware allocated handle for the EFI image.
-  @param  SystemTable   A pointer to the EFI System Table.
-  
-  @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.
-
-**/
-EFI_STATUS
-EFIAPI
-LibInitializeResetSystem (
-  IN EFI_HANDLE        ImageHandle,
-  IN EFI_SYSTEM_TABLE  *SystemTable
-  )
-{
-  return EFI_SUCCESS;
-}
+/** @file
+  Template library implementation to support ResetSystem Runtime call.
+  
+  Fill in the templates with what ever makes you system reset.
+
+
+  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+  
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/EfiResetSystemLib.h>
+#include <Library/ArmPlatformSysConfigLib.h>
+
+#include <ArmPlatform.h>
+
+/**
+  Resets the entire platform.
+
+  @param  ResetType             The type of reset to perform.
+  @param  ResetStatus           The status code for the reset.
+  @param  DataSize              The size, in bytes, of WatchdogData.
+  @param  ResetData             For a ResetType of EfiResetCold, EfiResetWarm, or
+                                EfiResetShutdown the data buffer starts with a Null-terminated
+                                Unicode string, optionally followed by additional binary data.
+
+**/
+EFI_STATUS
+EFIAPI
+LibResetSystem (
+  IN EFI_RESET_TYPE   ResetType,
+  IN EFI_STATUS       ResetStatus,
+  IN UINTN            DataSize,
+  IN CHAR16           *ResetData OPTIONAL
+  )
+{
+  switch (ResetType) {
+  case EfiResetWarm:
+    // Map a warm reset into a cold reset
+  case EfiResetCold:
+  case EfiResetShutdown:
+    // Send the REBOOT function to the platform microcontroller
+    ArmPlatformSysConfigSet (SYS_CFG_REBOOT, 0);
+
+    // We should never be here
+    while(1);
+  }
+
+  ASSERT(FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Initialize any infrastructure required for LibResetSystem () to function.
+
+  @param  ImageHandle   The firmware allocated handle for the EFI image.
+  @param  SystemTable   A pointer to the EFI System Table.
+  
+  @retval EFI_SUCCESS   The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+LibInitializeResetSystem (
+  IN EFI_HANDLE        ImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
+  )
+{
+  return EFI_SUCCESS;
+}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf
index 3965e211ec..8dbd1c869b 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -1,35 +1,35 @@
-#/** @file
-# Reset System lib to make it easy to port new platforms
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution. The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmVeResetSystemLib
-  FILE_GUID                      = 36885202-0854-4373-bfd2-95d229b44d44 
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = EfiResetSystemLib
-
-[Sources.common]
-  ResetSystemLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  DebugLib
-  BaseLib
-  ArmPlatformSysConfigLib
+#/** @file
+# Reset System lib to make it easy to port new platforms
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmVeResetSystemLib
+  FILE_GUID                      = 36885202-0854-4373-bfd2-95d229b44d44 
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = EfiResetSystemLib
+
+[Sources.common]
+  ResetSystemLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  BaseLib
+  ArmPlatformSysConfigLib
diff --git a/ArmPlatformPkg/Bds/Bds.inf b/ArmPlatformPkg/Bds/Bds.inf
index 164e2ae526..5027041211 100644
--- a/ArmPlatformPkg/Bds/Bds.inf
+++ b/ArmPlatformPkg/Bds/Bds.inf
@@ -1,75 +1,75 @@
-#/** @file
-#  
-#  Component description file for Bds module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmPlatformBds
-  FILE_GUID                      = 5a50aa81-c3ae-4608-a0e3-41a2e69baf94 
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-
-  ENTRY_POINT                    = BdsInitialize
-
-[Sources.common]
-  Bds.c
-  BdsHelper.c
-  BootMenu.c
-  BootOption.c
-  BootOptionSupport.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BdsLib
-  TimerLib
-  PerformanceLib
-  UefiBootServicesTableLib
-  DxeServicesTableLib
-  UefiDriverEntryPoint
-  DebugLib
-  PrintLib
-  BaseLib
-  
-[Guids]
-  gEfiFileSystemInfoGuid
-  
-[Protocols]
-  gEfiBdsArchProtocolGuid
-  gEfiBlockIoProtocolGuid
-  gEfiSimpleTextInProtocolGuid
-  gEfiPxeBaseCodeProtocolGuid
-  gEfiSimpleNetworkProtocolGuid
-  gEfiDevicePathToTextProtocolGuid
-
-[Pcd]
-  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor
-  gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription
-  gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath
-  gArmPlatformTokenSpaceGuid.PcdDefaultBootInitrdPath
-  gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument
-  gArmPlatformTokenSpaceGuid.PcdDefaultBootType
-  gArmPlatformTokenSpaceGuid.PcdFdtDevicePath
-  gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut
-  gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths
-  gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths
-  
-[Depex]
-  TRUE
+#/** @file
+#  
+#  Component description file for Bds module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmPlatformBds
+  FILE_GUID                      = 5a50aa81-c3ae-4608-a0e3-41a2e69baf94 
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+
+  ENTRY_POINT                    = BdsInitialize
+
+[Sources.common]
+  Bds.c
+  BdsHelper.c
+  BootMenu.c
+  BootOption.c
+  BootOptionSupport.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BdsLib
+  TimerLib
+  PerformanceLib
+  UefiBootServicesTableLib
+  DxeServicesTableLib
+  UefiDriverEntryPoint
+  DebugLib
+  PrintLib
+  BaseLib
+  
+[Guids]
+  gEfiFileSystemInfoGuid
+  
+[Protocols]
+  gEfiBdsArchProtocolGuid
+  gEfiBlockIoProtocolGuid
+  gEfiSimpleTextInProtocolGuid
+  gEfiPxeBaseCodeProtocolGuid
+  gEfiSimpleNetworkProtocolGuid
+  gEfiDevicePathToTextProtocolGuid
+
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor
+  gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription
+  gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath
+  gArmPlatformTokenSpaceGuid.PcdDefaultBootInitrdPath
+  gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument
+  gArmPlatformTokenSpaceGuid.PcdDefaultBootType
+  gArmPlatformTokenSpaceGuid.PcdFdtDevicePath
+  gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut
+  gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths
+  gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths
+  
+[Depex]
+  TRUE
diff --git a/ArmPlatformPkg/Bds/BdsHelper.c b/ArmPlatformPkg/Bds/BdsHelper.c
index 28d02c6620..459ebc39fc 100644
--- a/ArmPlatformPkg/Bds/BdsHelper.c
+++ b/ArmPlatformPkg/Bds/BdsHelper.c
@@ -1,317 +1,317 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include "BdsInternal.h"
-
-EFI_STATUS
-EditHIInputStr (
-  IN OUT CHAR16  *CmdLine,
-  IN     UINTN   MaxCmdLine
-  )
-{
-  UINTN           CmdLineIndex;
-  UINTN           WaitIndex;
-  CHAR8           Char;
-  EFI_INPUT_KEY   Key;
-  EFI_STATUS      Status;
-
-  Print (CmdLine);
-
-  for (CmdLineIndex = StrLen (CmdLine); CmdLineIndex < MaxCmdLine; ) {
-    Status = gBS->WaitForEvent (1, &gST->ConIn->WaitForKey, &WaitIndex);
-    ASSERT_EFI_ERROR (Status);
-
-    Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
-    ASSERT_EFI_ERROR (Status);
-
-    // Unicode character is valid when Scancode is NUll
-    if (Key.ScanCode == SCAN_NULL) {
-      // Scan code is NUll, hence read Unicode character
-      Char = (CHAR8)Key.UnicodeChar;
-    } else {
-      Char = CHAR_NULL;
-    }
-
-    if ((Char == CHAR_LINEFEED) || (Char == CHAR_CARRIAGE_RETURN) || (Char == 0x7f)) {
-      CmdLine[CmdLineIndex] = '\0';
-      Print (L"\n\r");
-
-      return EFI_SUCCESS;
-    } else if ((Key.UnicodeChar == L'\b') || (Key.ScanCode == SCAN_LEFT) || (Key.ScanCode == SCAN_DELETE)){
-      if (CmdLineIndex != 0) {
-        CmdLineIndex--;
-        Print (L"\b \b");
-      }
-    } else if ((Key.ScanCode == SCAN_ESC) || (Char == 0x1B) || (Char == 0x0)) {
-      return EFI_INVALID_PARAMETER;
-    } else {
-      CmdLine[CmdLineIndex++] = Key.UnicodeChar;
-      Print (L"%c", Key.UnicodeChar);
-    }
-  }
-
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-GetHIInputStr (
-  IN OUT CHAR16  *CmdLine,
-  IN     UINTN   MaxCmdLine
-  )
-{
-  EFI_STATUS  Status;
-
-  // For a new input just passed an empty string
-  CmdLine[0] = L'\0';
-
-  Status = EditHIInputStr (CmdLine, MaxCmdLine);
-
-  return Status;
-}
-
-EFI_STATUS
-EditHIInputAscii (
-  IN OUT CHAR8   *CmdLine,
-  IN     UINTN   MaxCmdLine
-  )
-{
-  CHAR16*     Str;
-  EFI_STATUS  Status;
-
-  Str = (CHAR16*)AllocatePool (MaxCmdLine * sizeof(CHAR16));
-  AsciiStrToUnicodeStr (CmdLine, Str);
-
-  Status = EditHIInputStr (Str, MaxCmdLine);
-  if (!EFI_ERROR(Status)) {
-    UnicodeStrToAsciiStr (Str, CmdLine);
-  }
-  FreePool (Str);
-
-  return Status;
-}
-
-EFI_STATUS
-GetHIInputAscii (
-  IN OUT CHAR8   *CmdLine,
-  IN     UINTN   MaxCmdLine
-  )
-{
-  // For a new input just passed an empty string
-  CmdLine[0] = '\0';
-
-  return EditHIInputAscii (CmdLine,MaxCmdLine);
-}
-
-EFI_STATUS
-GetHIInputInteger (
-  OUT UINTN   *Integer
-  )
-{
-  CHAR16      CmdLine[255];
-  EFI_STATUS  Status;
-
-  CmdLine[0] = '\0';
-  Status = EditHIInputStr (CmdLine, 255);
-  if (!EFI_ERROR(Status)) {
-    *Integer = StrDecimalToUintn (CmdLine);
-  }
-
-  return Status;
-}
-
-EFI_STATUS
-GetHIInputIP (
-  OUT EFI_IP_ADDRESS   *Ip
-  )
-{
-  CHAR16  CmdLine[255];
-  CHAR16  *Str;
-  EFI_STATUS  Status;
-
-  CmdLine[0] = '\0';
-  Status = EditHIInputStr (CmdLine,255);
-  if (!EFI_ERROR(Status)) {
-    Str = CmdLine;
-    Ip->v4.Addr[0] = (UINT8)StrDecimalToUintn (Str);
-
-    Str = StrStr (Str, L".");
-    if (Str == NULL) {
-      return EFI_INVALID_PARAMETER;
-    }
-
-    Ip->v4.Addr[1] = (UINT8)StrDecimalToUintn (++Str);
-
-    Str = StrStr (Str, L".");
-    if (Str == NULL) {
-      return EFI_INVALID_PARAMETER;
-    }
-
-    Ip->v4.Addr[2] = (UINT8)StrDecimalToUintn (++Str);
-
-    Str = StrStr (Str, L".");
-    if (Str == NULL) {
-      return EFI_INVALID_PARAMETER;
-    }
-
-    Ip->v4.Addr[3] = (UINT8)StrDecimalToUintn (++Str);
-  }
-
-  return Status;
-}
-
-EFI_STATUS
-GetHIInputBoolean (
-  OUT BOOLEAN *Value
-  )
-{
-  CHAR16      CmdBoolean[2];
-  EFI_STATUS  Status;
-
-  while(1) {
-    Print (L"[y/n] ");
-    Status = GetHIInputStr (CmdBoolean, 2);
-    if (EFI_ERROR(Status)) {
-      return Status;
-    } else if ((CmdBoolean[0] == L'y') || (CmdBoolean[0] == L'Y')) {
-      if (Value) *Value = TRUE;
-      return EFI_SUCCESS;
-    } else if ((CmdBoolean[0] == L'n') || (CmdBoolean[0] == L'N')) {
-      if (Value) *Value = FALSE;
-      return EFI_SUCCESS;
-    }
-  }
-}
-
-BOOLEAN
-HasFilePathEfiExtension (
-  IN CHAR16* FilePath
-  )
-{
-  return (StrCmp (FilePath + (StrSize(FilePath)/sizeof(CHAR16)) - 5, L".efi") == 0);
-}
-
-// Return the last non end-type Device Path Node from a Device Path
-EFI_DEVICE_PATH*
-GetLastDevicePathNode (
-  IN EFI_DEVICE_PATH*  DevicePath
-  )
-{
-  EFI_DEVICE_PATH*     PrevDevicePathNode;
-
-  PrevDevicePathNode = DevicePath;
-  while (!IsDevicePathEndType (DevicePath)) {
-    PrevDevicePathNode = DevicePath;
-    DevicePath = NextDevicePathNode (DevicePath);
-  }
-
-  return PrevDevicePathNode;
-}
-
-EFI_STATUS
-GenerateDeviceDescriptionName (
-  IN  EFI_HANDLE  Handle,
-  IN OUT CHAR16*  Description
-  )
-{
-  EFI_STATUS                        Status;
-  EFI_COMPONENT_NAME_PROTOCOL*      ComponentName2Protocol;
-  EFI_DEVICE_PATH_TO_TEXT_PROTOCOL* DevicePathToTextProtocol;
-  EFI_DEVICE_PATH_PROTOCOL*         DevicePathProtocol;
-  CHAR16*                           DriverName;
-  CHAR16*                           DevicePathTxt;
-  EFI_DEVICE_PATH*                  DevicePathNode;
-
-  ComponentName2Protocol = NULL;
-  Status = gBS->HandleProtocol (Handle, &gEfiComponentName2ProtocolGuid, (VOID **)&ComponentName2Protocol);
-  if (!EFI_ERROR(Status)) {
-    //TODO: Fixme. we must find the best langague
-    Status = ComponentName2Protocol->GetDriverName (ComponentName2Protocol,"en",&DriverName);
-    if (!EFI_ERROR(Status)) {
-      StrnCpy (Description, DriverName, BOOT_DEVICE_DESCRIPTION_MAX);
-    }
-  }
-
-  if (EFI_ERROR(Status)) {
-    // Use the lastest non null entry of the Device path as a description
-    Status = gBS->HandleProtocol (Handle, &gEfiDevicePathProtocolGuid, (VOID **)&DevicePathProtocol);
-    if (EFI_ERROR(Status)) {
-      return Status;
-    }
-
-    // Convert the last non end-type Device Path Node in text for the description
-    DevicePathNode = GetLastDevicePathNode (DevicePathProtocol);
-    Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **)&DevicePathToTextProtocol);
-    ASSERT_EFI_ERROR(Status);
-    DevicePathTxt = DevicePathToTextProtocol->ConvertDevicePathToText (DevicePathNode, TRUE, TRUE);
-    StrnCpy (Description, DevicePathTxt, BOOT_DEVICE_DESCRIPTION_MAX);
-    FreePool (DevicePathTxt);
-  }
-
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-BdsStartBootOption (
-  IN CHAR16* BootOption
-  )
-{
-  EFI_STATUS          Status;
-  BDS_LOAD_OPTION     *BdsLoadOption;
-
-  Status = BootOptionFromLoadOptionVariable (BootOption, &BdsLoadOption);
-  if (!EFI_ERROR(Status)) {
-    Status = BootOptionStart (BdsLoadOption);
-    FreePool (BdsLoadOption);
-
-    if (!EFI_ERROR(Status)) {
-      Status = EFI_SUCCESS;
-    } else {
-      Status = EFI_NOT_STARTED;
-    }
-  } else {
-    Status = EFI_NOT_FOUND;
-  }
-  return Status;
-}
-
-UINTN
-GetUnalignedDevicePathSize (
-  IN EFI_DEVICE_PATH* DevicePath
-  )
-{
-  UINTN Size;
-  EFI_DEVICE_PATH* AlignedDevicePath;
-
-  if ((UINTN)DevicePath & 0x1) {
-    AlignedDevicePath = DuplicateDevicePath (DevicePath);
-    Size = GetDevicePathSize (AlignedDevicePath);
-    FreePool (AlignedDevicePath);
-  } else {
-    Size = GetDevicePathSize (DevicePath);
-  }
-  return Size;
-}
-
-EFI_DEVICE_PATH*
-GetAlignedDevicePath (
-  IN EFI_DEVICE_PATH* DevicePath
-  )
-{
-  if ((UINTN)DevicePath & 0x1) {
-    return DuplicateDevicePath (DevicePath);
-  } else {
-    return DevicePath;
-  }
-}
-
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include "BdsInternal.h"
+
+EFI_STATUS
+EditHIInputStr (
+  IN OUT CHAR16  *CmdLine,
+  IN     UINTN   MaxCmdLine
+  )
+{
+  UINTN           CmdLineIndex;
+  UINTN           WaitIndex;
+  CHAR8           Char;
+  EFI_INPUT_KEY   Key;
+  EFI_STATUS      Status;
+
+  Print (CmdLine);
+
+  for (CmdLineIndex = StrLen (CmdLine); CmdLineIndex < MaxCmdLine; ) {
+    Status = gBS->WaitForEvent (1, &gST->ConIn->WaitForKey, &WaitIndex);
+    ASSERT_EFI_ERROR (Status);
+
+    Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);
+    ASSERT_EFI_ERROR (Status);
+
+    // Unicode character is valid when Scancode is NUll
+    if (Key.ScanCode == SCAN_NULL) {
+      // Scan code is NUll, hence read Unicode character
+      Char = (CHAR8)Key.UnicodeChar;
+    } else {
+      Char = CHAR_NULL;
+    }
+
+    if ((Char == CHAR_LINEFEED) || (Char == CHAR_CARRIAGE_RETURN) || (Char == 0x7f)) {
+      CmdLine[CmdLineIndex] = '\0';
+      Print (L"\n\r");
+
+      return EFI_SUCCESS;
+    } else if ((Key.UnicodeChar == L'\b') || (Key.ScanCode == SCAN_LEFT) || (Key.ScanCode == SCAN_DELETE)){
+      if (CmdLineIndex != 0) {
+        CmdLineIndex--;
+        Print (L"\b \b");
+      }
+    } else if ((Key.ScanCode == SCAN_ESC) || (Char == 0x1B) || (Char == 0x0)) {
+      return EFI_INVALID_PARAMETER;
+    } else {
+      CmdLine[CmdLineIndex++] = Key.UnicodeChar;
+      Print (L"%c", Key.UnicodeChar);
+    }
+  }
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+GetHIInputStr (
+  IN OUT CHAR16  *CmdLine,
+  IN     UINTN   MaxCmdLine
+  )
+{
+  EFI_STATUS  Status;
+
+  // For a new input just passed an empty string
+  CmdLine[0] = L'\0';
+
+  Status = EditHIInputStr (CmdLine, MaxCmdLine);
+
+  return Status;
+}
+
+EFI_STATUS
+EditHIInputAscii (
+  IN OUT CHAR8   *CmdLine,
+  IN     UINTN   MaxCmdLine
+  )
+{
+  CHAR16*     Str;
+  EFI_STATUS  Status;
+
+  Str = (CHAR16*)AllocatePool (MaxCmdLine * sizeof(CHAR16));
+  AsciiStrToUnicodeStr (CmdLine, Str);
+
+  Status = EditHIInputStr (Str, MaxCmdLine);
+  if (!EFI_ERROR(Status)) {
+    UnicodeStrToAsciiStr (Str, CmdLine);
+  }
+  FreePool (Str);
+
+  return Status;
+}
+
+EFI_STATUS
+GetHIInputAscii (
+  IN OUT CHAR8   *CmdLine,
+  IN     UINTN   MaxCmdLine
+  )
+{
+  // For a new input just passed an empty string
+  CmdLine[0] = '\0';
+
+  return EditHIInputAscii (CmdLine,MaxCmdLine);
+}
+
+EFI_STATUS
+GetHIInputInteger (
+  OUT UINTN   *Integer
+  )
+{
+  CHAR16      CmdLine[255];
+  EFI_STATUS  Status;
+
+  CmdLine[0] = '\0';
+  Status = EditHIInputStr (CmdLine, 255);
+  if (!EFI_ERROR(Status)) {
+    *Integer = StrDecimalToUintn (CmdLine);
+  }
+
+  return Status;
+}
+
+EFI_STATUS
+GetHIInputIP (
+  OUT EFI_IP_ADDRESS   *Ip
+  )
+{
+  CHAR16  CmdLine[255];
+  CHAR16  *Str;
+  EFI_STATUS  Status;
+
+  CmdLine[0] = '\0';
+  Status = EditHIInputStr (CmdLine,255);
+  if (!EFI_ERROR(Status)) {
+    Str = CmdLine;
+    Ip->v4.Addr[0] = (UINT8)StrDecimalToUintn (Str);
+
+    Str = StrStr (Str, L".");
+    if (Str == NULL) {
+      return EFI_INVALID_PARAMETER;
+    }
+
+    Ip->v4.Addr[1] = (UINT8)StrDecimalToUintn (++Str);
+
+    Str = StrStr (Str, L".");
+    if (Str == NULL) {
+      return EFI_INVALID_PARAMETER;
+    }
+
+    Ip->v4.Addr[2] = (UINT8)StrDecimalToUintn (++Str);
+
+    Str = StrStr (Str, L".");
+    if (Str == NULL) {
+      return EFI_INVALID_PARAMETER;
+    }
+
+    Ip->v4.Addr[3] = (UINT8)StrDecimalToUintn (++Str);
+  }
+
+  return Status;
+}
+
+EFI_STATUS
+GetHIInputBoolean (
+  OUT BOOLEAN *Value
+  )
+{
+  CHAR16      CmdBoolean[2];
+  EFI_STATUS  Status;
+
+  while(1) {
+    Print (L"[y/n] ");
+    Status = GetHIInputStr (CmdBoolean, 2);
+    if (EFI_ERROR(Status)) {
+      return Status;
+    } else if ((CmdBoolean[0] == L'y') || (CmdBoolean[0] == L'Y')) {
+      if (Value) *Value = TRUE;
+      return EFI_SUCCESS;
+    } else if ((CmdBoolean[0] == L'n') || (CmdBoolean[0] == L'N')) {
+      if (Value) *Value = FALSE;
+      return EFI_SUCCESS;
+    }
+  }
+}
+
+BOOLEAN
+HasFilePathEfiExtension (
+  IN CHAR16* FilePath
+  )
+{
+  return (StrCmp (FilePath + (StrSize(FilePath)/sizeof(CHAR16)) - 5, L".efi") == 0);
+}
+
+// Return the last non end-type Device Path Node from a Device Path
+EFI_DEVICE_PATH*
+GetLastDevicePathNode (
+  IN EFI_DEVICE_PATH*  DevicePath
+  )
+{
+  EFI_DEVICE_PATH*     PrevDevicePathNode;
+
+  PrevDevicePathNode = DevicePath;
+  while (!IsDevicePathEndType (DevicePath)) {
+    PrevDevicePathNode = DevicePath;
+    DevicePath = NextDevicePathNode (DevicePath);
+  }
+
+  return PrevDevicePathNode;
+}
+
+EFI_STATUS
+GenerateDeviceDescriptionName (
+  IN  EFI_HANDLE  Handle,
+  IN OUT CHAR16*  Description
+  )
+{
+  EFI_STATUS                        Status;
+  EFI_COMPONENT_NAME_PROTOCOL*      ComponentName2Protocol;
+  EFI_DEVICE_PATH_TO_TEXT_PROTOCOL* DevicePathToTextProtocol;
+  EFI_DEVICE_PATH_PROTOCOL*         DevicePathProtocol;
+  CHAR16*                           DriverName;
+  CHAR16*                           DevicePathTxt;
+  EFI_DEVICE_PATH*                  DevicePathNode;
+
+  ComponentName2Protocol = NULL;
+  Status = gBS->HandleProtocol (Handle, &gEfiComponentName2ProtocolGuid, (VOID **)&ComponentName2Protocol);
+  if (!EFI_ERROR(Status)) {
+    //TODO: Fixme. we must find the best langague
+    Status = ComponentName2Protocol->GetDriverName (ComponentName2Protocol,"en",&DriverName);
+    if (!EFI_ERROR(Status)) {
+      StrnCpy (Description, DriverName, BOOT_DEVICE_DESCRIPTION_MAX);
+    }
+  }
+
+  if (EFI_ERROR(Status)) {
+    // Use the lastest non null entry of the Device path as a description
+    Status = gBS->HandleProtocol (Handle, &gEfiDevicePathProtocolGuid, (VOID **)&DevicePathProtocol);
+    if (EFI_ERROR(Status)) {
+      return Status;
+    }
+
+    // Convert the last non end-type Device Path Node in text for the description
+    DevicePathNode = GetLastDevicePathNode (DevicePathProtocol);
+    Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **)&DevicePathToTextProtocol);
+    ASSERT_EFI_ERROR(Status);
+    DevicePathTxt = DevicePathToTextProtocol->ConvertDevicePathToText (DevicePathNode, TRUE, TRUE);
+    StrnCpy (Description, DevicePathTxt, BOOT_DEVICE_DESCRIPTION_MAX);
+    FreePool (DevicePathTxt);
+  }
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+BdsStartBootOption (
+  IN CHAR16* BootOption
+  )
+{
+  EFI_STATUS          Status;
+  BDS_LOAD_OPTION     *BdsLoadOption;
+
+  Status = BootOptionFromLoadOptionVariable (BootOption, &BdsLoadOption);
+  if (!EFI_ERROR(Status)) {
+    Status = BootOptionStart (BdsLoadOption);
+    FreePool (BdsLoadOption);
+
+    if (!EFI_ERROR(Status)) {
+      Status = EFI_SUCCESS;
+    } else {
+      Status = EFI_NOT_STARTED;
+    }
+  } else {
+    Status = EFI_NOT_FOUND;
+  }
+  return Status;
+}
+
+UINTN
+GetUnalignedDevicePathSize (
+  IN EFI_DEVICE_PATH* DevicePath
+  )
+{
+  UINTN Size;
+  EFI_DEVICE_PATH* AlignedDevicePath;
+
+  if ((UINTN)DevicePath & 0x1) {
+    AlignedDevicePath = DuplicateDevicePath (DevicePath);
+    Size = GetDevicePathSize (AlignedDevicePath);
+    FreePool (AlignedDevicePath);
+  } else {
+    Size = GetDevicePathSize (DevicePath);
+  }
+  return Size;
+}
+
+EFI_DEVICE_PATH*
+GetAlignedDevicePath (
+  IN EFI_DEVICE_PATH* DevicePath
+  )
+{
+  if ((UINTN)DevicePath & 0x1) {
+    return DuplicateDevicePath (DevicePath);
+  } else {
+    return DevicePath;
+  }
+}
+
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
index 3c267df4da..e998a195ff 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
@@ -1,882 +1,882 @@
-/** @file
-
- Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution.  The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- **/
-
-#include <PiDxe.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-#include <Guid/GlobalVariable.h>
-
-#include "LcdGraphicsOutputDxe.h"
-
-extern BOOLEAN mDisplayInitialized;
-
-//
-// Function Definitions
-//
-
-STATIC
-EFI_STATUS
-VideoCopyNoHorizontalOverlap (
-  IN UINTN          BitsPerPixel,
-  IN volatile VOID  *FrameBufferBase,
-  IN UINT32         HorizontalResolution,
-  IN UINTN          SourceX,
-  IN UINTN          SourceY,
-  IN UINTN          DestinationX,
-  IN UINTN          DestinationY,
-  IN UINTN          Width,
-  IN UINTN          Height
-)
-{
-  EFI_STATUS    Status = EFI_SUCCESS;
-  UINTN         SourceLine;
-  UINTN         DestinationLine;
-  UINTN         WidthInBytes;
-  UINTN         LineCount;
-  INTN          Step;
-  VOID          *SourceAddr;
-  VOID          *DestinationAddr;
-
-  if( DestinationY <= SourceY ) {
-    // scrolling up (or horizontally but without overlap)
-    SourceLine       = SourceY;
-    DestinationLine  = DestinationY;
-    Step             = 1;
-  } else {
-    // scrolling down
-    SourceLine       = SourceY + Height;
-    DestinationLine  = DestinationY + Height;
-    Step             = -1;
-  }
-
-  switch (BitsPerPixel) {
-
-  case LCD_BITS_PER_PIXEL_24:
-
-    WidthInBytes = Width * 4;
-
-    for( LineCount = 0; LineCount < Height; LineCount++ ) {
-      // Update the start addresses of source & destination using 32bit pointer arithmetic
-      SourceAddr      = (VOID *)((UINT32 *)FrameBufferBase + SourceLine      * HorizontalResolution + SourceX     );
-      DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);
-
-      // Copy the entire line Y from video ram to the temp buffer
-      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
-
-      // Update the line numbers
-      SourceLine      += Step;
-      DestinationLine += Step;
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_16_555:
-  case LCD_BITS_PER_PIXEL_16_565:
-  case LCD_BITS_PER_PIXEL_12_444:
-
-    WidthInBytes = Width * 2;
-
-    for( LineCount = 0; LineCount < Height; LineCount++ ) {
-      // Update the start addresses of source & destination using 16bit pointer arithmetic
-      SourceAddr      = (VOID *)((UINT16 *)FrameBufferBase + SourceLine      * HorizontalResolution + SourceX     );
-      DestinationAddr = (VOID *)((UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);
-
-      // Copy the entire line Y from video ram to the temp buffer
-      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
-
-      // Update the line numbers
-      SourceLine      += Step;
-      DestinationLine += Step;
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-  default:
-    // Can't handle this case
-    DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
-    Status = EFI_INVALID_PARAMETER;
-    goto EXIT;
-    // break;
-
-  }
-
-  EXIT:
-  return Status;
-}
-
-STATIC
-EFI_STATUS
-VideoCopyHorizontalOverlap (
-  IN UINTN          BitsPerPixel,
-  IN volatile VOID  *FrameBufferBase,
-  UINT32            HorizontalResolution,
-  IN UINTN          SourceX,
-  IN UINTN          SourceY,
-  IN UINTN          DestinationX,
-  IN UINTN          DestinationY,
-  IN UINTN          Width,
-  IN UINTN          Height
-)
-{
-  EFI_STATUS      Status = EFI_SUCCESS;
-
-  UINT32 *PixelBuffer32bit;
-  UINT32 *SourcePixel32bit;
-  UINT32 *DestinationPixel32bit;
-
-  UINT16 *PixelBuffer16bit;
-  UINT16 *SourcePixel16bit;
-  UINT16 *DestinationPixel16bit;
-
-  UINT32          SourcePixelY;
-  UINT32          DestinationPixelY;
-  UINTN           SizeIn32Bits;
-  UINTN           SizeIn16Bits;
-
-  switch (BitsPerPixel) {
-
-  case LCD_BITS_PER_PIXEL_24:
-    // Allocate a temporary buffer
-
-    PixelBuffer32bit = (UINT32 *) AllocatePool((Height * Width) * sizeof(UINT32));
-
-    if (PixelBuffer32bit == NULL) {
-      Status = EFI_OUT_OF_RESOURCES;
-      goto EXIT;
-    }
-
-    SizeIn32Bits = Width * 4;
-
-    // Copy from the video ram (source region) to a temp buffer
-    for (SourcePixelY = SourceY, DestinationPixel32bit = PixelBuffer32bit;
-         SourcePixelY < SourceY + Height;
-         SourcePixelY++, DestinationPixel32bit += Width)
-    {
-      // Update the start address of line Y (source)
-      SourcePixel32bit = (UINT32 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;
-
-      // Copy the entire line Y from video ram to the temp buffer
-      CopyMem( (VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);
-    }
-
-    // Copy from the temp buffer to the video ram (destination region)
-    for (DestinationPixelY = DestinationY, SourcePixel32bit = PixelBuffer32bit;
-         DestinationPixelY < DestinationY + Height;
-         DestinationPixelY++, SourcePixel32bit += Width)
-    {
-      // Update the start address of line Y (target)
-      DestinationPixel32bit = (UINT32 *)FrameBufferBase + DestinationPixelY * HorizontalResolution + DestinationX;
-
-      // Copy the entire line Y from the temp buffer to video ram
-      CopyMem( (VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);
-    }
-
-    // Free up the allocated memory
-    FreePool((VOID *) PixelBuffer32bit);
-
-    break;
-
-
-  case LCD_BITS_PER_PIXEL_16_555:
-  case LCD_BITS_PER_PIXEL_16_565:
-  case LCD_BITS_PER_PIXEL_12_444:
-    // Allocate a temporary buffer
-    PixelBuffer16bit = (UINT16 *) AllocatePool((Height * Width) * sizeof(UINT16));
-
-    if (PixelBuffer16bit == NULL) {
-      Status = EFI_OUT_OF_RESOURCES;
-      goto EXIT;
-    }
-
-    // Access each pixel inside the source area of the Video Memory and copy it to the temp buffer
-
-    SizeIn16Bits = Width * 2;
-
-    for (SourcePixelY = SourceY, DestinationPixel16bit = PixelBuffer16bit;
-         SourcePixelY < SourceY + Height;
-         SourcePixelY++, DestinationPixel16bit += Width)
-    {
-      // Calculate the source address:
-      SourcePixel16bit = (UINT16 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;
-
-      // Copy the entire line Y from Video to the temp buffer
-      CopyMem( (VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);
-    }
-
-    // Copy from the temp buffer into the destination area of the Video Memory
-
-    for (DestinationPixelY = DestinationY, SourcePixel16bit = PixelBuffer16bit;
-         DestinationPixelY < DestinationY + Height;
-         DestinationPixelY++, SourcePixel16bit += Width)
-    {
-      // Calculate the target address:
-      DestinationPixel16bit = (UINT16 *)FrameBufferBase + (DestinationPixelY * HorizontalResolution + DestinationX);
-
-      // Copy the entire line Y from the temp buffer to Video
-      CopyMem( (VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);
-    }
-
-    // Free the allocated memory
-    FreePool((VOID *) PixelBuffer16bit);
-
-    break;
-
-
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-  default:
-    // Can't handle this case
-    DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
-    Status = EFI_INVALID_PARAMETER;
-    goto EXIT;
-    // break;
-
-  }
-
-EXIT:
-  return Status;
-}
-
-STATIC
-EFI_STATUS
-BltVideoFill (
-  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
-  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *EfiSourcePixel,     OPTIONAL
-  IN UINTN                               SourceX,
-  IN UINTN                               SourceY,
-  IN UINTN                               DestinationX,
-  IN UINTN                               DestinationY,
-  IN UINTN                               Width,
-  IN UINTN                               Height,
-  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
-  )
-{
-  EFI_PIXEL_BITMASK*  PixelInformation;
-  EFI_STATUS         Status;
-  UINT32             HorizontalResolution;
-  LCD_BPP            BitsPerPixel;
-  VOID            *FrameBufferBase;
-  VOID            *DestinationAddr;
-  UINT16          *DestinationPixel16bit;
-  UINT16          Pixel16bit;
-  UINT32          DestinationPixelX;
-  UINT32          DestinationLine;
-  UINTN           WidthInBytes;
-
-  Status           = EFI_SUCCESS;
-  PixelInformation = &This->Mode->Info->PixelInformation;
-  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
-  HorizontalResolution = This->Mode->Info->HorizontalResolution;
-
-  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
-
-  switch (BitsPerPixel) {
-  case LCD_BITS_PER_PIXEL_24:
-    WidthInBytes = Width * 4;
-
-    // Copy the SourcePixel into every pixel inside the target rectangle
-    for (DestinationLine = DestinationY;
-         DestinationLine < DestinationY + Height;
-         DestinationLine++)
-    {
-      // Calculate the target address using 32bit pointer arithmetic:
-      DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution  + DestinationX);
-
-      // Fill the entire line
-      SetMemN( DestinationAddr, WidthInBytes, *((UINTN *)EfiSourcePixel));
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_16_555:
-    // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
-    Pixel16bit = (UINT16) (
-        ( (EfiSourcePixel->Red      <<  7) & PixelInformation->RedMask      )
-      | ( (EfiSourcePixel->Green    <<  2) & PixelInformation->GreenMask    )
-      | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
-//      | ( 0                           & PixelInformation->ReservedMask )
-     );
-
-    // Copy the SourcePixel into every pixel inside the target rectangle
-    for (DestinationLine = DestinationY;
-         DestinationLine < DestinationY + Height;
-         DestinationLine++)
-    {
-      for (DestinationPixelX = DestinationX;
-           DestinationPixelX < DestinationX + Width;
-           DestinationPixelX++)
-      {
-        // Calculate the target address:
-        DestinationPixel16bit =  (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
-
-        // Copy the pixel into the new target
-        *DestinationPixel16bit = Pixel16bit;
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_16_565:
-    // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
-    Pixel16bit = (UINT16) (
-        ( (EfiSourcePixel->Red      <<  8) & PixelInformation->RedMask      )
-      | ( (EfiSourcePixel->Green    <<  3) & PixelInformation->GreenMask    )
-      | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
-     );
-
-    // Copy the SourcePixel into every pixel inside the target rectangle
-    for (DestinationLine = DestinationY;
-         DestinationLine < DestinationY + Height;
-         DestinationLine++)
-    {
-      for (DestinationPixelX = DestinationX;
-           DestinationPixelX < DestinationX + Width;
-           DestinationPixelX++)
-      {
-        // Calculate the target address:
-        DestinationPixel16bit =  (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution  + DestinationPixelX;
-
-        // Copy the pixel into the new target
-        *DestinationPixel16bit = Pixel16bit;
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_12_444:
-    // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
-    Pixel16bit = (UINT16) (
-        ( (EfiSourcePixel->Red      >> 4) & PixelInformation->RedMask      )
-      | ( (EfiSourcePixel->Green        ) & PixelInformation->GreenMask    )
-      | ( (EfiSourcePixel->Blue     << 4) & PixelInformation->BlueMask     )
-     );
-
-    // Copy the SourcePixel into every pixel inside the target rectangle
-    for (DestinationLine = DestinationY;
-         DestinationLine < DestinationY + Height;
-         DestinationLine++)
-    {
-      for (DestinationPixelX = DestinationX;
-           DestinationPixelX < DestinationX + Width;
-           DestinationPixelX++)
-      {
-        // Calculate the target address:
-        DestinationPixel16bit =  (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution  + DestinationPixelX;
-
-        // Copy the pixel into the new target
-        *DestinationPixel16bit = Pixel16bit;
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-  default:
-    // Can't handle this case
-    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoFill: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
-    Status = EFI_INVALID_PARAMETER;
-    break;
-  }
-
-  return Status;
-}
-
-STATIC
-EFI_STATUS
-BltVideoToBltBuffer (
-  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
-  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
-  IN UINTN                               SourceX,
-  IN UINTN                               SourceY,
-  IN UINTN                               DestinationX,
-  IN UINTN                               DestinationY,
-  IN UINTN                               Width,
-  IN UINTN                               Height,
-  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
-  )
-{
-  EFI_STATUS         Status;
-  UINT32             HorizontalResolution;
-  LCD_BPP            BitsPerPixel;
-  EFI_PIXEL_BITMASK  *PixelInformation;
-  EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiDestinationPixel;
-  VOID   *FrameBufferBase;
-  VOID            *SourceAddr;
-  VOID            *DestinationAddr;
-  UINT16 *SourcePixel16bit;
-  UINT16          Pixel16bit;
-  UINT32          SourcePixelX;
-  UINT32          SourceLine;
-  UINT32          DestinationPixelX;
-  UINT32          DestinationLine;
-  UINT32          BltBufferHorizontalResolution;
-  UINTN           WidthInBytes;
-
-  Status = EFI_SUCCESS;
-  PixelInformation = &This->Mode->Info->PixelInformation;
-  HorizontalResolution = This->Mode->Info->HorizontalResolution;
-  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
-
-  if(( Delta != 0 ) && ( Delta != Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
-    // Delta is not zero and it is different from the width.
-    // Divide it by the size of a pixel to find out the buffer's horizontal resolution.
-    BltBufferHorizontalResolution = (UINT32) (Delta / sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
-  } else {
-    BltBufferHorizontalResolution = Width;
-  }
-
-  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
-
-  switch (BitsPerPixel) {
-  case LCD_BITS_PER_PIXEL_24:
-    WidthInBytes = Width * 4;
-
-    // Access each line inside the Video Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-         SourceLine < SourceY + Height;
-         SourceLine++, DestinationLine++)
-    {
-      // Calculate the source and target addresses using 32bit pointer arithmetic:
-      SourceAddr      = (VOID *)((UINT32 *)FrameBufferBase + SourceLine      * HorizontalResolution          + SourceX     );
-      DestinationAddr = (VOID *)((UINT32 *)BltBuffer       + DestinationLine * BltBufferHorizontalResolution + DestinationX);
-
-      // Copy the entire line
-      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_16_555:
-    // Access each pixel inside the Video Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-         SourceLine < SourceY + Height;
-         SourceLine++, DestinationLine++)
-    {
-      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
-           SourcePixelX < SourceX + Width;
-           SourcePixelX++, DestinationPixelX++)
-      {
-        // Calculate the source and target addresses:
-        SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;
-        EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;
-
-        // Snapshot the pixel from the video buffer once, to speed up the operation.
-        // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.
-        Pixel16bit = *SourcePixel16bit;
-
-        // Copy the pixel into the new target
-        EfiDestinationPixel->Red      = (UINT8) ( (Pixel16bit & PixelInformation->RedMask     ) >>  7 );
-        EfiDestinationPixel->Green    = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask   ) >>  2);
-        EfiDestinationPixel->Blue     = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask    ) <<  3 );
-        // EfiDestinationPixel->Reserved = (UINT8) 0;
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_16_565:
-    // Access each pixel inside the Video Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-         SourceLine < SourceY + Height;
-         SourceLine++, DestinationLine++)
-    {
-      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
-           SourcePixelX < SourceX + Width;
-           SourcePixelX++, DestinationPixelX++)
-      {
-        // Calculate the source and target addresses:
-        SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;
-        EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;
-
-        // Snapshot the pixel from the video buffer once, to speed up the operation.
-        // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.
-        Pixel16bit = *SourcePixel16bit;
-
-        // Copy the pixel into the new target
-        // There is no info for the Reserved byte, so we set it to zero
-        EfiDestinationPixel->Red      = (UINT8) ( (Pixel16bit & PixelInformation->RedMask     ) >> 8 );
-        EfiDestinationPixel->Green    = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask   ) >> 3);
-        EfiDestinationPixel->Blue     = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask    ) << 3 );
-        // EfiDestinationPixel->Reserved = (UINT8) 0;
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_12_444:
-    // Access each pixel inside the Video Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-         SourceLine < SourceY + Height;
-         SourceLine++, DestinationLine++)
-    {
-      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
-           SourcePixelX < SourceX + Width;
-           SourcePixelX++, DestinationPixelX++)
-      {
-        // Calculate the source and target addresses:
-        SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;
-        EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;
-
-        // Snapshot the pixel from the video buffer once, to speed up the operation.
-        // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.
-        Pixel16bit = *SourcePixel16bit;
-
-        // Copy the pixel into the new target
-        EfiDestinationPixel->Red      = (UINT8) ( (Pixel16bit & PixelInformation->RedMask     ) >> 4 );
-        EfiDestinationPixel->Green    = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask   )     );
-        EfiDestinationPixel->Blue     = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask    ) << 4 );
-        // EfiDestinationPixel->Reserved = (UINT8) 0;
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-  default:
-    // Can't handle this case
-    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoToBltBuffer: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
-    Status = EFI_INVALID_PARAMETER;
-    break;
-  }
-  return Status;
-}
-
-STATIC
-EFI_STATUS
-BltBufferToVideo (
-  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
-  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
-  IN UINTN                               SourceX,
-  IN UINTN                               SourceY,
-  IN UINTN                               DestinationX,
-  IN UINTN                               DestinationY,
-  IN UINTN                               Width,
-  IN UINTN                               Height,
-  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
-  )
-{
-  EFI_STATUS         Status;
-  UINT32             HorizontalResolution;
-  LCD_BPP            BitsPerPixel;
-  EFI_PIXEL_BITMASK  *PixelInformation;
-  EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiSourcePixel;
-  VOID   *FrameBufferBase;
-  VOID            *SourceAddr;
-  VOID            *DestinationAddr;
-  UINT16 *DestinationPixel16bit;
-  UINT32          SourcePixelX;
-  UINT32          SourceLine;
-  UINT32          DestinationPixelX;
-  UINT32          DestinationLine;
-  UINT32          BltBufferHorizontalResolution;
-  UINTN           WidthInBytes;
-
-  Status = EFI_SUCCESS;
-  PixelInformation = &This->Mode->Info->PixelInformation;
-  HorizontalResolution = This->Mode->Info->HorizontalResolution;
-  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
-
-  if(( Delta != 0 ) && ( Delta != Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
-    // Delta is not zero and it is different from the width.
-    // Divide it by the size of a pixel to find out the buffer's horizontal resolution.
-    BltBufferHorizontalResolution = (UINT32) (Delta / sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
-  } else {
-    BltBufferHorizontalResolution = Width;
-  }
-
-  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
-
-  switch (BitsPerPixel) {
-  case LCD_BITS_PER_PIXEL_24:
-    WidthInBytes = Width * 4;
-
-    // Access each pixel inside the BltBuffer Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-       SourceLine < SourceY + Height;
-       SourceLine++, DestinationLine++)
-    {
-      // Calculate the source and target addresses using 32bit pointer arithmetic:
-      SourceAddr      = (VOID *)((UINT32 *)BltBuffer       + SourceLine      * BltBufferHorizontalResolution + SourceX     );
-      DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution          + DestinationX);
-
-      // Copy the entire row Y
-      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_16_555:
-    // Access each pixel inside the BltBuffer Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-       SourceLine < SourceY + Height;
-       SourceLine++, DestinationLine++) {
-
-      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
-           SourcePixelX < SourceX + Width;
-           SourcePixelX++, DestinationPixelX++)
-      {
-        // Calculate the source and target addresses:
-        EfiSourcePixel  = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;
-        DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
-
-        // Copy the pixel into the new target
-        // Only the most significant bits will be copied across:
-        // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits
-        *DestinationPixel16bit = (UINT16) (
-              ( (EfiSourcePixel->Red      <<  7) & PixelInformation->RedMask      )
-            | ( (EfiSourcePixel->Green    <<  2) & PixelInformation->GreenMask    )
-            | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
-      //            | ( 0                                & PixelInformation->ReservedMask )
-            );
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_16_565:
-    // Access each pixel inside the BltBuffer Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-         SourceLine < SourceY + Height;
-         SourceLine++, DestinationLine++) {
-
-      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
-           SourcePixelX < SourceX + Width;
-           SourcePixelX++, DestinationPixelX++)
-      {
-        // Calculate the source and target addresses:
-        EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;
-        DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
-
-        // Copy the pixel into the new target
-        // Only the most significant bits will be copied across:
-        // To convert from 8 bits to 5 or 6 bits per pixel we throw away the 3 or 2  least significant bits
-        // There is no room for the Reserved byte so we ignore that completely
-        *DestinationPixel16bit = (UINT16) (
-              ( (EfiSourcePixel->Red      <<  8) & PixelInformation->RedMask      )
-            | ( (EfiSourcePixel->Green    <<  3) & PixelInformation->GreenMask    )
-            | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
-           );
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_12_444:
-    // Access each pixel inside the BltBuffer Memory
-    for (SourceLine = SourceY, DestinationLine = DestinationY;
-         SourceLine < SourceY + Height;
-         SourceLine++, DestinationLine++) {
-
-      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
-           SourcePixelX < SourceX + Width;
-           SourcePixelX++, DestinationPixelX++)
-      {
-        // Calculate the source and target addresses:
-        EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;
-        DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
-
-        // Copy the pixel into the new target
-        // Only the most significant bits will be copied across:
-        // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits
-        *DestinationPixel16bit = (UINT16) (
-              ( (EfiSourcePixel->Red      << 4) & PixelInformation->RedMask      )
-            | ( (EfiSourcePixel->Green        ) & PixelInformation->GreenMask    )
-            | ( (EfiSourcePixel->Blue     >> 4) & PixelInformation->BlueMask     )
-  //            | ( 0                               & PixelInformation->ReservedMask )
-           );
-      }
-    }
-    break;
-
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-  default:
-    // Can't handle this case
-    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltBufferToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
-    Status = EFI_INVALID_PARAMETER;
-    break;
-  }
-  return Status;
-}
-
-STATIC
-EFI_STATUS
-BltVideoToVideo (
-  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
-  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
-  IN UINTN                               SourceX,
-  IN UINTN                               SourceY,
-  IN UINTN                               DestinationX,
-  IN UINTN                               DestinationY,
-  IN UINTN                               Width,
-  IN UINTN                               Height,
-  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
-  )
-{
-  EFI_STATUS         Status;
-  UINT32             HorizontalResolution;
-  LCD_BPP            BitsPerPixel;
-  VOID   *FrameBufferBase;
-
-  HorizontalResolution = This->Mode->Info->HorizontalResolution;
-  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
-
-  //
-  // BltVideo to BltVideo:
-  //
-  //  Source is the Video Memory,
-  //  Destination is the Video Memory
-
-  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
-  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
-
-  // The UEFI spec currently states:
-  // "There is no limitation on the overlapping of the source and destination rectangles"
-  // Therefore, we must be careful to avoid overwriting the source data
-  if( SourceY == DestinationY ) {
-    // Copying within the same height, e.g. horizontal shift
-    if( SourceX == DestinationX ) {
-      // Nothing to do
-      Status = EFI_SUCCESS;
-    } else if( ((SourceX>DestinationX)?(SourceX - DestinationX):(DestinationX - SourceX)) < Width ) {
-      // There is overlap
-      Status = VideoCopyHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );
-    } else {
-      // No overlap
-      Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );
-    }
-  } else {
-    // Copying from different heights
-    Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );
-  }
-
-  return Status;
-}
-
-/***************************************
- * GraphicsOutput Protocol function, mapping to
- * EFI_GRAPHICS_OUTPUT_PROTOCOL.Blt
- *
- * PRESUMES: 1 pixel = 4 bytes (32bits)
- *  ***************************************/
-EFI_STATUS
-EFIAPI
-LcdGraphicsBlt (
-  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
-	IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
-	IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION   BltOperation,
-	IN UINTN                               SourceX,
-	IN UINTN                               SourceY,
-	IN UINTN                               DestinationX,
-	IN UINTN                               DestinationY,
-	IN UINTN                               Width,
-	IN UINTN                               Height,
-	IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
-  )
-{
-	EFI_STATUS         Status;
-	UINT32             HorizontalResolution;
-  UINT32             VerticalResolution;
-	LCD_INSTANCE*      Instance;
-
-  Instance = LCD_INSTANCE_FROM_GOP_THIS(This);
-
-  // Setup the hardware if not already done
-  if (!mDisplayInitialized) {
-    Status = InitializeDisplay (Instance);
-    if (EFI_ERROR(Status)) {
-      goto EXIT;
-    }
-  }
-
-  HorizontalResolution = This->Mode->Info->HorizontalResolution;
-  VerticalResolution   = This->Mode->Info->VerticalResolution;
-
-  DEBUG((DEBUG_INFO, "LcdGraphicsBlt (BltOperation:%d,DestX:%d,DestY:%d,Width:%d,Height:%d) res(%d,%d)\n",
-      BltOperation,DestinationX,DestinationY,Width,Height,HorizontalResolution,VerticalResolution));
-
-  // Check we have reasonable parameters
-	if (Width == 0 || Height == 0) {
-    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid dimension: Zero size area.\n" ));
-		Status = EFI_INVALID_PARAMETER;
-		goto EXIT;
-	}
-
-	if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToBltBuffer)) {
-	  ASSERT( BltBuffer != NULL);
-	}
-
-	/*if ((DestinationX >= HorizontalResolution) || (DestinationY >= VerticalResolution)) {
-	  DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid destination.\n" ));
-	  Status = EFI_INVALID_PARAMETER;
-	  goto EXIT;
-	}*/
-
-	// If we are reading data out of the video buffer, check that the source area is within the display limits
-	if ((BltOperation == EfiBltVideoToBltBuffer) || (BltOperation == EfiBltVideoToVideo)) {
-    if ((SourceY + Height > VerticalResolution) || (SourceX + Width > HorizontalResolution)) {
-      DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid source resolution.\n" ));
-      DEBUG((DEBUG_INFO, "                      - SourceY=%d + Height=%d > VerticalResolution=%d.\n", SourceY, Height, VerticalResolution ));
-      DEBUG((DEBUG_INFO, "                      - SourceX=%d + Width=%d > HorizontalResolution=%d.\n", SourceX, Width, HorizontalResolution ));
-      Status = EFI_INVALID_PARAMETER;
-      goto EXIT;
-    }
-	}
-
-	// If we are writing data into the video buffer, that the destination area is within the display limits
-	if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToVideo)) {
-    if ((DestinationY + Height > VerticalResolution) || (DestinationX + Width > HorizontalResolution)) {
-      DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid destination resolution.\n" ));
-      DEBUG((DEBUG_INFO, "                      - DestinationY=%d + Height=%d > VerticalResolution=%d.\n", DestinationY, Height, VerticalResolution ));
-      DEBUG((DEBUG_INFO, "                      - DestinationX=%d + Width=%d > HorizontalResolution=%d.\n", DestinationX, Width, HorizontalResolution ));
-      Status = EFI_INVALID_PARAMETER;
-      goto EXIT;
-    }
-	}
-
-  //
-  // Perform the Block Transfer Operation
-  //
-
-	switch (BltOperation) {
-	case EfiBltVideoFill:
-	  Status = BltVideoFill (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
-		break;
-
-	case EfiBltVideoToBltBuffer:
-	  Status = BltVideoToBltBuffer (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
-    break;
-
-  case EfiBltBufferToVideo:
-    Status = BltBufferToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
-		break;
-
-	case EfiBltVideoToVideo:
-	  Status = BltVideoToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
-		break;
-
-	case EfiGraphicsOutputBltOperationMax:
-	default:
-		DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: Invalid Operation\n"));
-		Status = EFI_INVALID_PARAMETER;
-		break;
-	}
-
-EXIT:
-	return Status;
-}
+/** @file
+
+ Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution.  The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#include <PiDxe.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/MemoryAllocationLib.h>
+
+#include <Guid/GlobalVariable.h>
+
+#include "LcdGraphicsOutputDxe.h"
+
+extern BOOLEAN mDisplayInitialized;
+
+//
+// Function Definitions
+//
+
+STATIC
+EFI_STATUS
+VideoCopyNoHorizontalOverlap (
+  IN UINTN          BitsPerPixel,
+  IN volatile VOID  *FrameBufferBase,
+  IN UINT32         HorizontalResolution,
+  IN UINTN          SourceX,
+  IN UINTN          SourceY,
+  IN UINTN          DestinationX,
+  IN UINTN          DestinationY,
+  IN UINTN          Width,
+  IN UINTN          Height
+)
+{
+  EFI_STATUS    Status = EFI_SUCCESS;
+  UINTN         SourceLine;
+  UINTN         DestinationLine;
+  UINTN         WidthInBytes;
+  UINTN         LineCount;
+  INTN          Step;
+  VOID          *SourceAddr;
+  VOID          *DestinationAddr;
+
+  if( DestinationY <= SourceY ) {
+    // scrolling up (or horizontally but without overlap)
+    SourceLine       = SourceY;
+    DestinationLine  = DestinationY;
+    Step             = 1;
+  } else {
+    // scrolling down
+    SourceLine       = SourceY + Height;
+    DestinationLine  = DestinationY + Height;
+    Step             = -1;
+  }
+
+  switch (BitsPerPixel) {
+
+  case LCD_BITS_PER_PIXEL_24:
+
+    WidthInBytes = Width * 4;
+
+    for( LineCount = 0; LineCount < Height; LineCount++ ) {
+      // Update the start addresses of source & destination using 32bit pointer arithmetic
+      SourceAddr      = (VOID *)((UINT32 *)FrameBufferBase + SourceLine      * HorizontalResolution + SourceX     );
+      DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);
+
+      // Copy the entire line Y from video ram to the temp buffer
+      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
+
+      // Update the line numbers
+      SourceLine      += Step;
+      DestinationLine += Step;
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_16_555:
+  case LCD_BITS_PER_PIXEL_16_565:
+  case LCD_BITS_PER_PIXEL_12_444:
+
+    WidthInBytes = Width * 2;
+
+    for( LineCount = 0; LineCount < Height; LineCount++ ) {
+      // Update the start addresses of source & destination using 16bit pointer arithmetic
+      SourceAddr      = (VOID *)((UINT16 *)FrameBufferBase + SourceLine      * HorizontalResolution + SourceX     );
+      DestinationAddr = (VOID *)((UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationX);
+
+      // Copy the entire line Y from video ram to the temp buffer
+      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
+
+      // Update the line numbers
+      SourceLine      += Step;
+      DestinationLine += Step;
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_8:
+  case LCD_BITS_PER_PIXEL_4:
+  case LCD_BITS_PER_PIXEL_2:
+  case LCD_BITS_PER_PIXEL_1:
+  default:
+    // Can't handle this case
+    DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
+    Status = EFI_INVALID_PARAMETER;
+    goto EXIT;
+    // break;
+
+  }
+
+  EXIT:
+  return Status;
+}
+
+STATIC
+EFI_STATUS
+VideoCopyHorizontalOverlap (
+  IN UINTN          BitsPerPixel,
+  IN volatile VOID  *FrameBufferBase,
+  UINT32            HorizontalResolution,
+  IN UINTN          SourceX,
+  IN UINTN          SourceY,
+  IN UINTN          DestinationX,
+  IN UINTN          DestinationY,
+  IN UINTN          Width,
+  IN UINTN          Height
+)
+{
+  EFI_STATUS      Status = EFI_SUCCESS;
+
+  UINT32 *PixelBuffer32bit;
+  UINT32 *SourcePixel32bit;
+  UINT32 *DestinationPixel32bit;
+
+  UINT16 *PixelBuffer16bit;
+  UINT16 *SourcePixel16bit;
+  UINT16 *DestinationPixel16bit;
+
+  UINT32          SourcePixelY;
+  UINT32          DestinationPixelY;
+  UINTN           SizeIn32Bits;
+  UINTN           SizeIn16Bits;
+
+  switch (BitsPerPixel) {
+
+  case LCD_BITS_PER_PIXEL_24:
+    // Allocate a temporary buffer
+
+    PixelBuffer32bit = (UINT32 *) AllocatePool((Height * Width) * sizeof(UINT32));
+
+    if (PixelBuffer32bit == NULL) {
+      Status = EFI_OUT_OF_RESOURCES;
+      goto EXIT;
+    }
+
+    SizeIn32Bits = Width * 4;
+
+    // Copy from the video ram (source region) to a temp buffer
+    for (SourcePixelY = SourceY, DestinationPixel32bit = PixelBuffer32bit;
+         SourcePixelY < SourceY + Height;
+         SourcePixelY++, DestinationPixel32bit += Width)
+    {
+      // Update the start address of line Y (source)
+      SourcePixel32bit = (UINT32 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;
+
+      // Copy the entire line Y from video ram to the temp buffer
+      CopyMem( (VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);
+    }
+
+    // Copy from the temp buffer to the video ram (destination region)
+    for (DestinationPixelY = DestinationY, SourcePixel32bit = PixelBuffer32bit;
+         DestinationPixelY < DestinationY + Height;
+         DestinationPixelY++, SourcePixel32bit += Width)
+    {
+      // Update the start address of line Y (target)
+      DestinationPixel32bit = (UINT32 *)FrameBufferBase + DestinationPixelY * HorizontalResolution + DestinationX;
+
+      // Copy the entire line Y from the temp buffer to video ram
+      CopyMem( (VOID *)DestinationPixel32bit, (CONST VOID *)SourcePixel32bit, SizeIn32Bits);
+    }
+
+    // Free up the allocated memory
+    FreePool((VOID *) PixelBuffer32bit);
+
+    break;
+
+
+  case LCD_BITS_PER_PIXEL_16_555:
+  case LCD_BITS_PER_PIXEL_16_565:
+  case LCD_BITS_PER_PIXEL_12_444:
+    // Allocate a temporary buffer
+    PixelBuffer16bit = (UINT16 *) AllocatePool((Height * Width) * sizeof(UINT16));
+
+    if (PixelBuffer16bit == NULL) {
+      Status = EFI_OUT_OF_RESOURCES;
+      goto EXIT;
+    }
+
+    // Access each pixel inside the source area of the Video Memory and copy it to the temp buffer
+
+    SizeIn16Bits = Width * 2;
+
+    for (SourcePixelY = SourceY, DestinationPixel16bit = PixelBuffer16bit;
+         SourcePixelY < SourceY + Height;
+         SourcePixelY++, DestinationPixel16bit += Width)
+    {
+      // Calculate the source address:
+      SourcePixel16bit = (UINT16 *)FrameBufferBase + SourcePixelY * HorizontalResolution + SourceX;
+
+      // Copy the entire line Y from Video to the temp buffer
+      CopyMem( (VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);
+    }
+
+    // Copy from the temp buffer into the destination area of the Video Memory
+
+    for (DestinationPixelY = DestinationY, SourcePixel16bit = PixelBuffer16bit;
+         DestinationPixelY < DestinationY + Height;
+         DestinationPixelY++, SourcePixel16bit += Width)
+    {
+      // Calculate the target address:
+      DestinationPixel16bit = (UINT16 *)FrameBufferBase + (DestinationPixelY * HorizontalResolution + DestinationX);
+
+      // Copy the entire line Y from the temp buffer to Video
+      CopyMem( (VOID *)DestinationPixel16bit, (CONST VOID *)SourcePixel16bit, SizeIn16Bits);
+    }
+
+    // Free the allocated memory
+    FreePool((VOID *) PixelBuffer16bit);
+
+    break;
+
+
+  case LCD_BITS_PER_PIXEL_8:
+  case LCD_BITS_PER_PIXEL_4:
+  case LCD_BITS_PER_PIXEL_2:
+  case LCD_BITS_PER_PIXEL_1:
+  default:
+    // Can't handle this case
+    DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
+    Status = EFI_INVALID_PARAMETER;
+    goto EXIT;
+    // break;
+
+  }
+
+EXIT:
+  return Status;
+}
+
+STATIC
+EFI_STATUS
+BltVideoFill (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
+  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *EfiSourcePixel,     OPTIONAL
+  IN UINTN                               SourceX,
+  IN UINTN                               SourceY,
+  IN UINTN                               DestinationX,
+  IN UINTN                               DestinationY,
+  IN UINTN                               Width,
+  IN UINTN                               Height,
+  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
+  )
+{
+  EFI_PIXEL_BITMASK*  PixelInformation;
+  EFI_STATUS         Status;
+  UINT32             HorizontalResolution;
+  LCD_BPP            BitsPerPixel;
+  VOID            *FrameBufferBase;
+  VOID            *DestinationAddr;
+  UINT16          *DestinationPixel16bit;
+  UINT16          Pixel16bit;
+  UINT32          DestinationPixelX;
+  UINT32          DestinationLine;
+  UINTN           WidthInBytes;
+
+  Status           = EFI_SUCCESS;
+  PixelInformation = &This->Mode->Info->PixelInformation;
+  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
+  HorizontalResolution = This->Mode->Info->HorizontalResolution;
+
+  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
+
+  switch (BitsPerPixel) {
+  case LCD_BITS_PER_PIXEL_24:
+    WidthInBytes = Width * 4;
+
+    // Copy the SourcePixel into every pixel inside the target rectangle
+    for (DestinationLine = DestinationY;
+         DestinationLine < DestinationY + Height;
+         DestinationLine++)
+    {
+      // Calculate the target address using 32bit pointer arithmetic:
+      DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution  + DestinationX);
+
+      // Fill the entire line
+      SetMemN( DestinationAddr, WidthInBytes, *((UINTN *)EfiSourcePixel));
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_16_555:
+    // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
+    Pixel16bit = (UINT16) (
+        ( (EfiSourcePixel->Red      <<  7) & PixelInformation->RedMask      )
+      | ( (EfiSourcePixel->Green    <<  2) & PixelInformation->GreenMask    )
+      | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
+//      | ( 0                           & PixelInformation->ReservedMask )
+     );
+
+    // Copy the SourcePixel into every pixel inside the target rectangle
+    for (DestinationLine = DestinationY;
+         DestinationLine < DestinationY + Height;
+         DestinationLine++)
+    {
+      for (DestinationPixelX = DestinationX;
+           DestinationPixelX < DestinationX + Width;
+           DestinationPixelX++)
+      {
+        // Calculate the target address:
+        DestinationPixel16bit =  (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
+
+        // Copy the pixel into the new target
+        *DestinationPixel16bit = Pixel16bit;
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_16_565:
+    // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
+    Pixel16bit = (UINT16) (
+        ( (EfiSourcePixel->Red      <<  8) & PixelInformation->RedMask      )
+      | ( (EfiSourcePixel->Green    <<  3) & PixelInformation->GreenMask    )
+      | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
+     );
+
+    // Copy the SourcePixel into every pixel inside the target rectangle
+    for (DestinationLine = DestinationY;
+         DestinationLine < DestinationY + Height;
+         DestinationLine++)
+    {
+      for (DestinationPixelX = DestinationX;
+           DestinationPixelX < DestinationX + Width;
+           DestinationPixelX++)
+      {
+        // Calculate the target address:
+        DestinationPixel16bit =  (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution  + DestinationPixelX;
+
+        // Copy the pixel into the new target
+        *DestinationPixel16bit = Pixel16bit;
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_12_444:
+    // Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
+    Pixel16bit = (UINT16) (
+        ( (EfiSourcePixel->Red      >> 4) & PixelInformation->RedMask      )
+      | ( (EfiSourcePixel->Green        ) & PixelInformation->GreenMask    )
+      | ( (EfiSourcePixel->Blue     << 4) & PixelInformation->BlueMask     )
+     );
+
+    // Copy the SourcePixel into every pixel inside the target rectangle
+    for (DestinationLine = DestinationY;
+         DestinationLine < DestinationY + Height;
+         DestinationLine++)
+    {
+      for (DestinationPixelX = DestinationX;
+           DestinationPixelX < DestinationX + Width;
+           DestinationPixelX++)
+      {
+        // Calculate the target address:
+        DestinationPixel16bit =  (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution  + DestinationPixelX;
+
+        // Copy the pixel into the new target
+        *DestinationPixel16bit = Pixel16bit;
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_8:
+  case LCD_BITS_PER_PIXEL_4:
+  case LCD_BITS_PER_PIXEL_2:
+  case LCD_BITS_PER_PIXEL_1:
+  default:
+    // Can't handle this case
+    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoFill: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
+    Status = EFI_INVALID_PARAMETER;
+    break;
+  }
+
+  return Status;
+}
+
+STATIC
+EFI_STATUS
+BltVideoToBltBuffer (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
+  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
+  IN UINTN                               SourceX,
+  IN UINTN                               SourceY,
+  IN UINTN                               DestinationX,
+  IN UINTN                               DestinationY,
+  IN UINTN                               Width,
+  IN UINTN                               Height,
+  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
+  )
+{
+  EFI_STATUS         Status;
+  UINT32             HorizontalResolution;
+  LCD_BPP            BitsPerPixel;
+  EFI_PIXEL_BITMASK  *PixelInformation;
+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiDestinationPixel;
+  VOID   *FrameBufferBase;
+  VOID            *SourceAddr;
+  VOID            *DestinationAddr;
+  UINT16 *SourcePixel16bit;
+  UINT16          Pixel16bit;
+  UINT32          SourcePixelX;
+  UINT32          SourceLine;
+  UINT32          DestinationPixelX;
+  UINT32          DestinationLine;
+  UINT32          BltBufferHorizontalResolution;
+  UINTN           WidthInBytes;
+
+  Status = EFI_SUCCESS;
+  PixelInformation = &This->Mode->Info->PixelInformation;
+  HorizontalResolution = This->Mode->Info->HorizontalResolution;
+  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
+
+  if(( Delta != 0 ) && ( Delta != Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
+    // Delta is not zero and it is different from the width.
+    // Divide it by the size of a pixel to find out the buffer's horizontal resolution.
+    BltBufferHorizontalResolution = (UINT32) (Delta / sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+  } else {
+    BltBufferHorizontalResolution = Width;
+  }
+
+  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
+
+  switch (BitsPerPixel) {
+  case LCD_BITS_PER_PIXEL_24:
+    WidthInBytes = Width * 4;
+
+    // Access each line inside the Video Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+         SourceLine < SourceY + Height;
+         SourceLine++, DestinationLine++)
+    {
+      // Calculate the source and target addresses using 32bit pointer arithmetic:
+      SourceAddr      = (VOID *)((UINT32 *)FrameBufferBase + SourceLine      * HorizontalResolution          + SourceX     );
+      DestinationAddr = (VOID *)((UINT32 *)BltBuffer       + DestinationLine * BltBufferHorizontalResolution + DestinationX);
+
+      // Copy the entire line
+      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_16_555:
+    // Access each pixel inside the Video Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+         SourceLine < SourceY + Height;
+         SourceLine++, DestinationLine++)
+    {
+      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
+           SourcePixelX < SourceX + Width;
+           SourcePixelX++, DestinationPixelX++)
+      {
+        // Calculate the source and target addresses:
+        SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;
+        EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;
+
+        // Snapshot the pixel from the video buffer once, to speed up the operation.
+        // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.
+        Pixel16bit = *SourcePixel16bit;
+
+        // Copy the pixel into the new target
+        EfiDestinationPixel->Red      = (UINT8) ( (Pixel16bit & PixelInformation->RedMask     ) >>  7 );
+        EfiDestinationPixel->Green    = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask   ) >>  2);
+        EfiDestinationPixel->Blue     = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask    ) <<  3 );
+        // EfiDestinationPixel->Reserved = (UINT8) 0;
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_16_565:
+    // Access each pixel inside the Video Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+         SourceLine < SourceY + Height;
+         SourceLine++, DestinationLine++)
+    {
+      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
+           SourcePixelX < SourceX + Width;
+           SourcePixelX++, DestinationPixelX++)
+      {
+        // Calculate the source and target addresses:
+        SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;
+        EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;
+
+        // Snapshot the pixel from the video buffer once, to speed up the operation.
+        // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.
+        Pixel16bit = *SourcePixel16bit;
+
+        // Copy the pixel into the new target
+        // There is no info for the Reserved byte, so we set it to zero
+        EfiDestinationPixel->Red      = (UINT8) ( (Pixel16bit & PixelInformation->RedMask     ) >> 8 );
+        EfiDestinationPixel->Green    = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask   ) >> 3);
+        EfiDestinationPixel->Blue     = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask    ) << 3 );
+        // EfiDestinationPixel->Reserved = (UINT8) 0;
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_12_444:
+    // Access each pixel inside the Video Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+         SourceLine < SourceY + Height;
+         SourceLine++, DestinationLine++)
+    {
+      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
+           SourcePixelX < SourceX + Width;
+           SourcePixelX++, DestinationPixelX++)
+      {
+        // Calculate the source and target addresses:
+        SourcePixel16bit = (UINT16 *)FrameBufferBase + SourceLine * HorizontalResolution + SourcePixelX;
+        EfiDestinationPixel = BltBuffer + DestinationLine * BltBufferHorizontalResolution + DestinationPixelX;
+
+        // Snapshot the pixel from the video buffer once, to speed up the operation.
+        // If we were dereferencing the pointer, as it is volatile, we would perform 3 memory read operations.
+        Pixel16bit = *SourcePixel16bit;
+
+        // Copy the pixel into the new target
+        EfiDestinationPixel->Red      = (UINT8) ( (Pixel16bit & PixelInformation->RedMask     ) >> 4 );
+        EfiDestinationPixel->Green    = (UINT8) ( (Pixel16bit & PixelInformation->GreenMask   )     );
+        EfiDestinationPixel->Blue     = (UINT8) ( (Pixel16bit & PixelInformation->BlueMask    ) << 4 );
+        // EfiDestinationPixel->Reserved = (UINT8) 0;
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_8:
+  case LCD_BITS_PER_PIXEL_4:
+  case LCD_BITS_PER_PIXEL_2:
+  case LCD_BITS_PER_PIXEL_1:
+  default:
+    // Can't handle this case
+    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoToBltBuffer: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
+    Status = EFI_INVALID_PARAMETER;
+    break;
+  }
+  return Status;
+}
+
+STATIC
+EFI_STATUS
+BltBufferToVideo (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
+  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
+  IN UINTN                               SourceX,
+  IN UINTN                               SourceY,
+  IN UINTN                               DestinationX,
+  IN UINTN                               DestinationY,
+  IN UINTN                               Width,
+  IN UINTN                               Height,
+  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
+  )
+{
+  EFI_STATUS         Status;
+  UINT32             HorizontalResolution;
+  LCD_BPP            BitsPerPixel;
+  EFI_PIXEL_BITMASK  *PixelInformation;
+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL *EfiSourcePixel;
+  VOID   *FrameBufferBase;
+  VOID            *SourceAddr;
+  VOID            *DestinationAddr;
+  UINT16 *DestinationPixel16bit;
+  UINT32          SourcePixelX;
+  UINT32          SourceLine;
+  UINT32          DestinationPixelX;
+  UINT32          DestinationLine;
+  UINT32          BltBufferHorizontalResolution;
+  UINTN           WidthInBytes;
+
+  Status = EFI_SUCCESS;
+  PixelInformation = &This->Mode->Info->PixelInformation;
+  HorizontalResolution = This->Mode->Info->HorizontalResolution;
+  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
+
+  if(( Delta != 0 ) && ( Delta != Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
+    // Delta is not zero and it is different from the width.
+    // Divide it by the size of a pixel to find out the buffer's horizontal resolution.
+    BltBufferHorizontalResolution = (UINT32) (Delta / sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+  } else {
+    BltBufferHorizontalResolution = Width;
+  }
+
+  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
+
+  switch (BitsPerPixel) {
+  case LCD_BITS_PER_PIXEL_24:
+    WidthInBytes = Width * 4;
+
+    // Access each pixel inside the BltBuffer Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+       SourceLine < SourceY + Height;
+       SourceLine++, DestinationLine++)
+    {
+      // Calculate the source and target addresses using 32bit pointer arithmetic:
+      SourceAddr      = (VOID *)((UINT32 *)BltBuffer       + SourceLine      * BltBufferHorizontalResolution + SourceX     );
+      DestinationAddr = (VOID *)((UINT32 *)FrameBufferBase + DestinationLine * HorizontalResolution          + DestinationX);
+
+      // Copy the entire row Y
+      CopyMem( DestinationAddr, SourceAddr, WidthInBytes);
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_16_555:
+    // Access each pixel inside the BltBuffer Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+       SourceLine < SourceY + Height;
+       SourceLine++, DestinationLine++) {
+
+      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
+           SourcePixelX < SourceX + Width;
+           SourcePixelX++, DestinationPixelX++)
+      {
+        // Calculate the source and target addresses:
+        EfiSourcePixel  = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;
+        DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
+
+        // Copy the pixel into the new target
+        // Only the most significant bits will be copied across:
+        // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits
+        *DestinationPixel16bit = (UINT16) (
+              ( (EfiSourcePixel->Red      <<  7) & PixelInformation->RedMask      )
+            | ( (EfiSourcePixel->Green    <<  2) & PixelInformation->GreenMask    )
+            | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
+      //            | ( 0                                & PixelInformation->ReservedMask )
+            );
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_16_565:
+    // Access each pixel inside the BltBuffer Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+         SourceLine < SourceY + Height;
+         SourceLine++, DestinationLine++) {
+
+      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
+           SourcePixelX < SourceX + Width;
+           SourcePixelX++, DestinationPixelX++)
+      {
+        // Calculate the source and target addresses:
+        EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;
+        DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
+
+        // Copy the pixel into the new target
+        // Only the most significant bits will be copied across:
+        // To convert from 8 bits to 5 or 6 bits per pixel we throw away the 3 or 2  least significant bits
+        // There is no room for the Reserved byte so we ignore that completely
+        *DestinationPixel16bit = (UINT16) (
+              ( (EfiSourcePixel->Red      <<  8) & PixelInformation->RedMask      )
+            | ( (EfiSourcePixel->Green    <<  3) & PixelInformation->GreenMask    )
+            | ( (EfiSourcePixel->Blue     >>  3) & PixelInformation->BlueMask     )
+           );
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_12_444:
+    // Access each pixel inside the BltBuffer Memory
+    for (SourceLine = SourceY, DestinationLine = DestinationY;
+         SourceLine < SourceY + Height;
+         SourceLine++, DestinationLine++) {
+
+      for (SourcePixelX = SourceX, DestinationPixelX = DestinationX;
+           SourcePixelX < SourceX + Width;
+           SourcePixelX++, DestinationPixelX++)
+      {
+        // Calculate the source and target addresses:
+        EfiSourcePixel = BltBuffer + SourceLine * BltBufferHorizontalResolution + SourcePixelX;
+        DestinationPixel16bit = (UINT16 *)FrameBufferBase + DestinationLine * HorizontalResolution + DestinationPixelX;
+
+        // Copy the pixel into the new target
+        // Only the most significant bits will be copied across:
+        // To convert from 8 bits to 5 bits per pixel we throw away the 3 least significant bits
+        *DestinationPixel16bit = (UINT16) (
+              ( (EfiSourcePixel->Red      << 4) & PixelInformation->RedMask      )
+            | ( (EfiSourcePixel->Green        ) & PixelInformation->GreenMask    )
+            | ( (EfiSourcePixel->Blue     >> 4) & PixelInformation->BlueMask     )
+  //            | ( 0                               & PixelInformation->ReservedMask )
+           );
+      }
+    }
+    break;
+
+  case LCD_BITS_PER_PIXEL_8:
+  case LCD_BITS_PER_PIXEL_4:
+  case LCD_BITS_PER_PIXEL_2:
+  case LCD_BITS_PER_PIXEL_1:
+  default:
+    // Can't handle this case
+    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltBufferToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
+    Status = EFI_INVALID_PARAMETER;
+    break;
+  }
+  return Status;
+}
+
+STATIC
+EFI_STATUS
+BltVideoToVideo (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
+  IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
+  IN UINTN                               SourceX,
+  IN UINTN                               SourceY,
+  IN UINTN                               DestinationX,
+  IN UINTN                               DestinationY,
+  IN UINTN                               Width,
+  IN UINTN                               Height,
+  IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
+  )
+{
+  EFI_STATUS         Status;
+  UINT32             HorizontalResolution;
+  LCD_BPP            BitsPerPixel;
+  VOID   *FrameBufferBase;
+
+  HorizontalResolution = This->Mode->Info->HorizontalResolution;
+  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
+
+  //
+  // BltVideo to BltVideo:
+  //
+  //  Source is the Video Memory,
+  //  Destination is the Video Memory
+
+  LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);
+  FrameBufferBase = (UINTN *)((UINTN)(This->Mode->FrameBufferBase));
+
+  // The UEFI spec currently states:
+  // "There is no limitation on the overlapping of the source and destination rectangles"
+  // Therefore, we must be careful to avoid overwriting the source data
+  if( SourceY == DestinationY ) {
+    // Copying within the same height, e.g. horizontal shift
+    if( SourceX == DestinationX ) {
+      // Nothing to do
+      Status = EFI_SUCCESS;
+    } else if( ((SourceX>DestinationX)?(SourceX - DestinationX):(DestinationX - SourceX)) < Width ) {
+      // There is overlap
+      Status = VideoCopyHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );
+    } else {
+      // No overlap
+      Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );
+    }
+  } else {
+    // Copying from different heights
+    Status = VideoCopyNoHorizontalOverlap (BitsPerPixel, FrameBufferBase, HorizontalResolution, SourceX, SourceY, DestinationX, DestinationY, Width, Height );
+  }
+
+  return Status;
+}
+
+/***************************************
+ * GraphicsOutput Protocol function, mapping to
+ * EFI_GRAPHICS_OUTPUT_PROTOCOL.Blt
+ *
+ * PRESUMES: 1 pixel = 4 bytes (32bits)
+ *  ***************************************/
+EFI_STATUS
+EFIAPI
+LcdGraphicsBlt (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL        *This,
+	IN OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL   *BltBuffer,     OPTIONAL
+	IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION   BltOperation,
+	IN UINTN                               SourceX,
+	IN UINTN                               SourceY,
+	IN UINTN                               DestinationX,
+	IN UINTN                               DestinationY,
+	IN UINTN                               Width,
+	IN UINTN                               Height,
+	IN UINTN                               Delta           OPTIONAL   // Number of BYTES in a row of the BltBuffer
+  )
+{
+	EFI_STATUS         Status;
+	UINT32             HorizontalResolution;
+  UINT32             VerticalResolution;
+	LCD_INSTANCE*      Instance;
+
+  Instance = LCD_INSTANCE_FROM_GOP_THIS(This);
+
+  // Setup the hardware if not already done
+  if (!mDisplayInitialized) {
+    Status = InitializeDisplay (Instance);
+    if (EFI_ERROR(Status)) {
+      goto EXIT;
+    }
+  }
+
+  HorizontalResolution = This->Mode->Info->HorizontalResolution;
+  VerticalResolution   = This->Mode->Info->VerticalResolution;
+
+  DEBUG((DEBUG_INFO, "LcdGraphicsBlt (BltOperation:%d,DestX:%d,DestY:%d,Width:%d,Height:%d) res(%d,%d)\n",
+      BltOperation,DestinationX,DestinationY,Width,Height,HorizontalResolution,VerticalResolution));
+
+  // Check we have reasonable parameters
+	if (Width == 0 || Height == 0) {
+    DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid dimension: Zero size area.\n" ));
+		Status = EFI_INVALID_PARAMETER;
+		goto EXIT;
+	}
+
+	if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToBltBuffer)) {
+	  ASSERT( BltBuffer != NULL);
+	}
+
+	/*if ((DestinationX >= HorizontalResolution) || (DestinationY >= VerticalResolution)) {
+	  DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: ERROR - Invalid destination.\n" ));
+	  Status = EFI_INVALID_PARAMETER;
+	  goto EXIT;
+	}*/
+
+	// If we are reading data out of the video buffer, check that the source area is within the display limits
+	if ((BltOperation == EfiBltVideoToBltBuffer) || (BltOperation == EfiBltVideoToVideo)) {
+    if ((SourceY + Height > VerticalResolution) || (SourceX + Width > HorizontalResolution)) {
+      DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid source resolution.\n" ));
+      DEBUG((DEBUG_INFO, "                      - SourceY=%d + Height=%d > VerticalResolution=%d.\n", SourceY, Height, VerticalResolution ));
+      DEBUG((DEBUG_INFO, "                      - SourceX=%d + Width=%d > HorizontalResolution=%d.\n", SourceX, Width, HorizontalResolution ));
+      Status = EFI_INVALID_PARAMETER;
+      goto EXIT;
+    }
+	}
+
+	// If we are writing data into the video buffer, that the destination area is within the display limits
+	if ((BltOperation == EfiBltVideoFill) || (BltOperation == EfiBltBufferToVideo) || (BltOperation == EfiBltVideoToVideo)) {
+    if ((DestinationY + Height > VerticalResolution) || (DestinationX + Width > HorizontalResolution)) {
+      DEBUG((DEBUG_INFO, "LcdGraphicsBlt: ERROR - Invalid destination resolution.\n" ));
+      DEBUG((DEBUG_INFO, "                      - DestinationY=%d + Height=%d > VerticalResolution=%d.\n", DestinationY, Height, VerticalResolution ));
+      DEBUG((DEBUG_INFO, "                      - DestinationX=%d + Width=%d > HorizontalResolution=%d.\n", DestinationX, Width, HorizontalResolution ));
+      Status = EFI_INVALID_PARAMETER;
+      goto EXIT;
+    }
+	}
+
+  //
+  // Perform the Block Transfer Operation
+  //
+
+	switch (BltOperation) {
+	case EfiBltVideoFill:
+	  Status = BltVideoFill (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
+		break;
+
+	case EfiBltVideoToBltBuffer:
+	  Status = BltVideoToBltBuffer (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
+    break;
+
+  case EfiBltBufferToVideo:
+    Status = BltBufferToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
+		break;
+
+	case EfiBltVideoToVideo:
+	  Status = BltVideoToVideo (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
+		break;
+
+	case EfiGraphicsOutputBltOperationMax:
+	default:
+		DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: Invalid Operation\n"));
+		Status = EFI_INVALID_PARAMETER;
+		break;
+	}
+
+EXIT:
+	return Status;
+}
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
index 229d2a6aa2..34a56b3d8d 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
@@ -1,376 +1,376 @@
-/** @file
-
- Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution.  The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- **/
-
-#include <PiDxe.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DevicePathLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-#include <Library/MemoryAllocationLib.h>
-
-#include <Guid/GlobalVariable.h>
-
-#include "LcdGraphicsOutputDxe.h"
-
-/**********************************************************************
- *
- *  This file implements the Graphics Output protocol on ArmVersatileExpress
- *  using the Lcd controller
- *
- **********************************************************************/
-
-//
-// Global variables
-//
-
-BOOLEAN mDisplayInitialized = FALSE;
-
-LCD_INSTANCE mLcdTemplate = {
-  LCD_INSTANCE_SIGNATURE,
-  NULL, // Handle
-  { // ModeInfo
-    0, // Version
-    0, // HorizontalResolution
-    0, // VerticalResolution
-    PixelBltOnly, // PixelFormat
-    0, // PixelInformation
-    0, // PixelsPerScanLine
-  },
-  {
-    0, // MaxMode;
-    0, // Mode;
-    NULL, // Info;
-    0, // SizeOfInfo;
-    0, // FrameBufferBase;
-    0 // FrameBufferSize;
-  },
-  { // Gop
-    LcdGraphicsQueryMode,  // QueryMode
-    LcdGraphicsSetMode,    // SetMode
-    LcdGraphicsBlt,        // Blt
-    NULL                     // *Mode
-  },
-  { // DevicePath
-    {
-      {
-        HARDWARE_DEVICE_PATH, HW_VENDOR_DP,
-        (UINT8) (sizeof(VENDOR_DEVICE_PATH)),
-        (UINT8) ((sizeof(VENDOR_DEVICE_PATH)) >> 8),
-      },
-      // Hardware Device Path for Lcd
-      EFI_CALLER_ID_GUID // Use the driver's GUID
-    },
-
-    {
-      END_DEVICE_PATH_TYPE,
-      END_ENTIRE_DEVICE_PATH_SUBTYPE,
-      sizeof(EFI_DEVICE_PATH_PROTOCOL),
-      0
-    }
-  },
-  (EFI_EVENT) NULL // ExitBootServicesEvent
-};
-
-EFI_STATUS
-LcdInstanceContructor (
-  OUT LCD_INSTANCE** NewInstance
-  )
-{
-  LCD_INSTANCE* Instance;
-
-  Instance = AllocateCopyPool (sizeof(LCD_INSTANCE), &mLcdTemplate);
-  if (Instance == NULL) {
-    return EFI_OUT_OF_RESOURCES;
-  }
-
-  Instance->Gop.Mode          = &Instance->Mode;
-  Instance->Gop.Mode->MaxMode = LcdPlatformGetMaxMode ();
-  Instance->Mode.Info         = &Instance->ModeInfo;
-
-  *NewInstance = Instance;
-  return EFI_SUCCESS;
-}
-
-//
-// Function Definitions
-//
-
-EFI_STATUS
-InitializeDisplay (
-  IN LCD_INSTANCE* Instance
-  )
-{
-  EFI_STATUS             Status = EFI_SUCCESS;
-  EFI_PHYSICAL_ADDRESS   VramBaseAddress;
-  UINTN                  VramSize;
-
-  Status = LcdPlatformGetVram (&VramBaseAddress, &VramSize);
-  if (EFI_ERROR(Status)) {
-    return Status;
-  }
-
-  // Setup the LCD
-  Status = LcdInitialize (VramBaseAddress);
-  if (EFI_ERROR(Status)) {
-    goto EXIT_ERROR_LCD_SHUTDOWN;
-  }
-
-  Status = LcdPlatformInitializeDisplay (Instance->Handle);
-  if (EFI_ERROR(Status)) {
-    goto EXIT_ERROR_LCD_SHUTDOWN;
-  }
-
-  // Setup all the relevant mode information
-  Instance->Gop.Mode->SizeOfInfo      = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
-  Instance->Gop.Mode->FrameBufferBase = VramBaseAddress;
-  Instance->Gop.Mode->FrameBufferSize = VramSize;
-
-  // Set the flag before changing the mode, to avoid infinite loops
-  mDisplayInitialized = TRUE;
-
-  // All is ok, so don't deal with any errors
-  goto EXIT;
-
-EXIT_ERROR_LCD_SHUTDOWN:
-  DEBUG((DEBUG_ERROR, "InitializeDisplay: ERROR - Can not initialise the display. Exit Status=%r\n", Status));
-  LcdShutdown ();
-
-EXIT:
-  return Status;
-}
-
-EFI_STATUS
-EFIAPI
-LcdGraphicsOutputDxeInitialize (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
-  )
-{
-  EFI_STATUS  Status = EFI_SUCCESS;
-  LCD_INSTANCE* Instance;
-
-  Status = LcdInstanceContructor (&Instance);
-  if (EFI_ERROR(Status)) {
-    goto EXIT;
-  }
-
-	// Install the Graphics Output Protocol and the Device Path
-	Status = gBS->InstallMultipleProtocolInterfaces(
-			&Instance->Handle,
-			&gEfiGraphicsOutputProtocolGuid, &Instance->Gop,
-			&gEfiDevicePathProtocolGuid,     &Instance->DevicePath,
-			NULL
-	   );
-
-	if (EFI_ERROR(Status)) {
-	  DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the protocol. Exit Status=%r\n", Status));
-		goto EXIT;
-	}
-
-	// Register for an ExitBootServicesEvent
-	// When ExitBootServices starts, this function here will make sure that the graphics driver will shut down properly,
-	// i.e. it will free up all allocated memory and perform any necessary hardware re-configuration.
-	Status = gBS->CreateEvent (
-	    EVT_SIGNAL_EXIT_BOOT_SERVICES,
-	    TPL_NOTIFY,
-	    LcdGraphicsExitBootServicesEvent, NULL,
-			&Instance->ExitBootServicesEvent
-			);
-
-	if (EFI_ERROR(Status)) {
-	  DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the ExitBootServicesEvent handler. Exit Status=%r\n", Status));
-		goto EXIT_ERROR_UNINSTALL_PROTOCOL;
-	}
-
-	// To get here, everything must be fine, so just exit
-	goto EXIT;
-
-EXIT_ERROR_UNINSTALL_PROTOCOL:
-	/* The following function could return an error message,
-	 * however, to get here something must have gone wrong already,
-	 * so preserve the original error, i.e. don't change
-	 * the Status variable, even it fails to uninstall the protocol.
-	 */
-	gBS->UninstallMultipleProtocolInterfaces (
-	    Instance->Handle,
-	    &gEfiGraphicsOutputProtocolGuid, &Instance->Gop, // Uninstall Graphics Output protocol
-	    &gEfiDevicePathProtocolGuid,     &Instance->DevicePath,     // Uninstall device path
-	    NULL
-	    );
-
-EXIT:
-	return Status;
-
-}
-
-/***************************************
- * This function should be called
- * on Event: ExitBootServices
- * to free up memory, stop the driver
- * and uninstall the protocols
- ***************************************/
-VOID
-LcdGraphicsExitBootServicesEvent (
-  IN EFI_EVENT  Event,
-  IN VOID       *Context
-  )
-{
-	//TODO: Implement me
-}
-
-/***************************************
- * GraphicsOutput Protocol function, mapping to
- * EFI_GRAPHICS_OUTPUT_PROTOCOL.QueryMode
- ***************************************/
-EFI_STATUS
-EFIAPI
-LcdGraphicsQueryMode (
-  IN EFI_GRAPHICS_OUTPUT_PROTOCOL            *This,
-	IN UINT32                                  ModeNumber,
-	OUT UINTN                                  *SizeOfInfo,
-	OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION   **Info
-	)
-{
-	EFI_STATUS Status = EFI_SUCCESS;
-	LCD_INSTANCE *Instance;
-
-	Instance = LCD_INSTANCE_FROM_GOP_THIS(This);
-
-  // Setup the hardware if not already done
-  if( !mDisplayInitialized ) {
-    Status = InitializeDisplay(Instance);
-    if (EFI_ERROR(Status)) {
-      goto EXIT;
-    }
-  }
-
-	// Error checking
-	if ( (This == NULL) || (Info == NULL) || (SizeOfInfo == NULL) || (ModeNumber >= This->Mode->MaxMode) ) {
-	  DEBUG((DEBUG_ERROR, "LcdGraphicsQueryMode: ERROR - For mode number %d : Invalid Parameter.\n", ModeNumber ));
-		Status = EFI_INVALID_PARAMETER;
-		goto EXIT;
-	}
-
-	*Info = AllocatePool (sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION));
-  if (*Info == NULL) {
-    Status = EFI_OUT_OF_RESOURCES;
-    goto EXIT;
-  }
-
-  *SizeOfInfo = sizeof( EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
-
-  Status = LcdPlatformQueryMode (ModeNumber,*Info);
-  if (EFI_ERROR(Status)) {
-    FreePool(*Info);
-  }
-
-EXIT:
-	return Status;
-}
-
-/***************************************
- * GraphicsOutput Protocol function, mapping to
- * EFI_GRAPHICS_OUTPUT_PROTOCOL.SetMode
- ***************************************/
-EFI_STATUS
-EFIAPI
-LcdGraphicsSetMode (
-  IN EFI_GRAPHICS_OUTPUT_PROTOCOL   *This,
-	IN UINT32                         ModeNumber
-	)
-{
-	EFI_STATUS                      Status               = EFI_SUCCESS;
-	EFI_GRAPHICS_OUTPUT_BLT_PIXEL   FillColour;
-	LCD_INSTANCE* Instance;
-
-	Instance = LCD_INSTANCE_FROM_GOP_THIS (This);
-
-  // Setup the hardware if not already done
-  if(!mDisplayInitialized) {
-    Status = InitializeDisplay (Instance);
-    if (EFI_ERROR(Status)) {
-      goto EXIT;
-    }
-  }
-
-  // Check if this mode is supported
-  if( ModeNumber >= This->Mode->MaxMode ) {
-    DEBUG((DEBUG_ERROR, "LcdGraphicsSetMode: ERROR - Unsupported mode number %d .\n", ModeNumber ));
-    Status = EFI_UNSUPPORTED;
-    goto EXIT;
-  }
-
-	// Set the oscillator frequency to support the new mode
-  Status = LcdPlatformSetMode (ModeNumber);
-  if (EFI_ERROR(Status)) {
-    Status = EFI_DEVICE_ERROR;
-    goto EXIT;
-  }
-
-	// Update the UEFI mode information
-	This->Mode->Mode = ModeNumber;
-	LcdPlatformQueryMode (ModeNumber,&Instance->ModeInfo);
-
-  // Set the hardware to the new mode
-	Status = LcdSetMode (ModeNumber);
-  if (EFI_ERROR(Status)) {
-    Status = EFI_DEVICE_ERROR;
-    goto EXIT;
-  }
-
-	// The UEFI spec requires that we now clear the visible portions of the output display to black.
-
-  // Set the fill colour to black
-  SetMem (&FillColour, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL), 0x0);
-
-  // Fill the entire visible area with the same colour.
-  Status = This->Blt (
-      This,
-      &FillColour,
-      EfiBltVideoFill,
-      0,
-      0,
-      0,
-      0,
-      This->Mode->Info->HorizontalResolution,
-      This->Mode->Info->VerticalResolution,
-      0);
-
-EXIT:
-	return Status;
-}
-
-UINTN
-GetBytesPerPixel (
-  IN  LCD_BPP       Bpp
-  )
-{
-  switch(Bpp) {
-  case LCD_BITS_PER_PIXEL_24:
-    return 4;
-
-  case LCD_BITS_PER_PIXEL_16_565:
-  case LCD_BITS_PER_PIXEL_16_555:
-  case LCD_BITS_PER_PIXEL_12_444:
-    return 2;
-
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-    return 1;
-
-  default:
-    return 0;
-  }
-}
+/** @file
+
+ Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution.  The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#include <PiDxe.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/MemoryAllocationLib.h>
+
+#include <Guid/GlobalVariable.h>
+
+#include "LcdGraphicsOutputDxe.h"
+
+/**********************************************************************
+ *
+ *  This file implements the Graphics Output protocol on ArmVersatileExpress
+ *  using the Lcd controller
+ *
+ **********************************************************************/
+
+//
+// Global variables
+//
+
+BOOLEAN mDisplayInitialized = FALSE;
+
+LCD_INSTANCE mLcdTemplate = {
+  LCD_INSTANCE_SIGNATURE,
+  NULL, // Handle
+  { // ModeInfo
+    0, // Version
+    0, // HorizontalResolution
+    0, // VerticalResolution
+    PixelBltOnly, // PixelFormat
+    0, // PixelInformation
+    0, // PixelsPerScanLine
+  },
+  {
+    0, // MaxMode;
+    0, // Mode;
+    NULL, // Info;
+    0, // SizeOfInfo;
+    0, // FrameBufferBase;
+    0 // FrameBufferSize;
+  },
+  { // Gop
+    LcdGraphicsQueryMode,  // QueryMode
+    LcdGraphicsSetMode,    // SetMode
+    LcdGraphicsBlt,        // Blt
+    NULL                     // *Mode
+  },
+  { // DevicePath
+    {
+      {
+        HARDWARE_DEVICE_PATH, HW_VENDOR_DP,
+        (UINT8) (sizeof(VENDOR_DEVICE_PATH)),
+        (UINT8) ((sizeof(VENDOR_DEVICE_PATH)) >> 8),
+      },
+      // Hardware Device Path for Lcd
+      EFI_CALLER_ID_GUID // Use the driver's GUID
+    },
+
+    {
+      END_DEVICE_PATH_TYPE,
+      END_ENTIRE_DEVICE_PATH_SUBTYPE,
+      sizeof(EFI_DEVICE_PATH_PROTOCOL),
+      0
+    }
+  },
+  (EFI_EVENT) NULL // ExitBootServicesEvent
+};
+
+EFI_STATUS
+LcdInstanceContructor (
+  OUT LCD_INSTANCE** NewInstance
+  )
+{
+  LCD_INSTANCE* Instance;
+
+  Instance = AllocateCopyPool (sizeof(LCD_INSTANCE), &mLcdTemplate);
+  if (Instance == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  Instance->Gop.Mode          = &Instance->Mode;
+  Instance->Gop.Mode->MaxMode = LcdPlatformGetMaxMode ();
+  Instance->Mode.Info         = &Instance->ModeInfo;
+
+  *NewInstance = Instance;
+  return EFI_SUCCESS;
+}
+
+//
+// Function Definitions
+//
+
+EFI_STATUS
+InitializeDisplay (
+  IN LCD_INSTANCE* Instance
+  )
+{
+  EFI_STATUS             Status = EFI_SUCCESS;
+  EFI_PHYSICAL_ADDRESS   VramBaseAddress;
+  UINTN                  VramSize;
+
+  Status = LcdPlatformGetVram (&VramBaseAddress, &VramSize);
+  if (EFI_ERROR(Status)) {
+    return Status;
+  }
+
+  // Setup the LCD
+  Status = LcdInitialize (VramBaseAddress);
+  if (EFI_ERROR(Status)) {
+    goto EXIT_ERROR_LCD_SHUTDOWN;
+  }
+
+  Status = LcdPlatformInitializeDisplay (Instance->Handle);
+  if (EFI_ERROR(Status)) {
+    goto EXIT_ERROR_LCD_SHUTDOWN;
+  }
+
+  // Setup all the relevant mode information
+  Instance->Gop.Mode->SizeOfInfo      = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
+  Instance->Gop.Mode->FrameBufferBase = VramBaseAddress;
+  Instance->Gop.Mode->FrameBufferSize = VramSize;
+
+  // Set the flag before changing the mode, to avoid infinite loops
+  mDisplayInitialized = TRUE;
+
+  // All is ok, so don't deal with any errors
+  goto EXIT;
+
+EXIT_ERROR_LCD_SHUTDOWN:
+  DEBUG((DEBUG_ERROR, "InitializeDisplay: ERROR - Can not initialise the display. Exit Status=%r\n", Status));
+  LcdShutdown ();
+
+EXIT:
+  return Status;
+}
+
+EFI_STATUS
+EFIAPI
+LcdGraphicsOutputDxeInitialize (
+  IN EFI_HANDLE         ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  EFI_STATUS  Status = EFI_SUCCESS;
+  LCD_INSTANCE* Instance;
+
+  Status = LcdInstanceContructor (&Instance);
+  if (EFI_ERROR(Status)) {
+    goto EXIT;
+  }
+
+	// Install the Graphics Output Protocol and the Device Path
+	Status = gBS->InstallMultipleProtocolInterfaces(
+			&Instance->Handle,
+			&gEfiGraphicsOutputProtocolGuid, &Instance->Gop,
+			&gEfiDevicePathProtocolGuid,     &Instance->DevicePath,
+			NULL
+	   );
+
+	if (EFI_ERROR(Status)) {
+	  DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the protocol. Exit Status=%r\n", Status));
+		goto EXIT;
+	}
+
+	// Register for an ExitBootServicesEvent
+	// When ExitBootServices starts, this function here will make sure that the graphics driver will shut down properly,
+	// i.e. it will free up all allocated memory and perform any necessary hardware re-configuration.
+	Status = gBS->CreateEvent (
+	    EVT_SIGNAL_EXIT_BOOT_SERVICES,
+	    TPL_NOTIFY,
+	    LcdGraphicsExitBootServicesEvent, NULL,
+			&Instance->ExitBootServicesEvent
+			);
+
+	if (EFI_ERROR(Status)) {
+	  DEBUG((DEBUG_ERROR, "GraphicsOutputDxeInitialize: Can not install the ExitBootServicesEvent handler. Exit Status=%r\n", Status));
+		goto EXIT_ERROR_UNINSTALL_PROTOCOL;
+	}
+
+	// To get here, everything must be fine, so just exit
+	goto EXIT;
+
+EXIT_ERROR_UNINSTALL_PROTOCOL:
+	/* The following function could return an error message,
+	 * however, to get here something must have gone wrong already,
+	 * so preserve the original error, i.e. don't change
+	 * the Status variable, even it fails to uninstall the protocol.
+	 */
+	gBS->UninstallMultipleProtocolInterfaces (
+	    Instance->Handle,
+	    &gEfiGraphicsOutputProtocolGuid, &Instance->Gop, // Uninstall Graphics Output protocol
+	    &gEfiDevicePathProtocolGuid,     &Instance->DevicePath,     // Uninstall device path
+	    NULL
+	    );
+
+EXIT:
+	return Status;
+
+}
+
+/***************************************
+ * This function should be called
+ * on Event: ExitBootServices
+ * to free up memory, stop the driver
+ * and uninstall the protocols
+ ***************************************/
+VOID
+LcdGraphicsExitBootServicesEvent (
+  IN EFI_EVENT  Event,
+  IN VOID       *Context
+  )
+{
+	//TODO: Implement me
+}
+
+/***************************************
+ * GraphicsOutput Protocol function, mapping to
+ * EFI_GRAPHICS_OUTPUT_PROTOCOL.QueryMode
+ ***************************************/
+EFI_STATUS
+EFIAPI
+LcdGraphicsQueryMode (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL            *This,
+	IN UINT32                                  ModeNumber,
+	OUT UINTN                                  *SizeOfInfo,
+	OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION   **Info
+	)
+{
+	EFI_STATUS Status = EFI_SUCCESS;
+	LCD_INSTANCE *Instance;
+
+	Instance = LCD_INSTANCE_FROM_GOP_THIS(This);
+
+  // Setup the hardware if not already done
+  if( !mDisplayInitialized ) {
+    Status = InitializeDisplay(Instance);
+    if (EFI_ERROR(Status)) {
+      goto EXIT;
+    }
+  }
+
+	// Error checking
+	if ( (This == NULL) || (Info == NULL) || (SizeOfInfo == NULL) || (ModeNumber >= This->Mode->MaxMode) ) {
+	  DEBUG((DEBUG_ERROR, "LcdGraphicsQueryMode: ERROR - For mode number %d : Invalid Parameter.\n", ModeNumber ));
+		Status = EFI_INVALID_PARAMETER;
+		goto EXIT;
+	}
+
+	*Info = AllocatePool (sizeof (EFI_GRAPHICS_OUTPUT_MODE_INFORMATION));
+  if (*Info == NULL) {
+    Status = EFI_OUT_OF_RESOURCES;
+    goto EXIT;
+  }
+
+  *SizeOfInfo = sizeof( EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
+
+  Status = LcdPlatformQueryMode (ModeNumber,*Info);
+  if (EFI_ERROR(Status)) {
+    FreePool(*Info);
+  }
+
+EXIT:
+	return Status;
+}
+
+/***************************************
+ * GraphicsOutput Protocol function, mapping to
+ * EFI_GRAPHICS_OUTPUT_PROTOCOL.SetMode
+ ***************************************/
+EFI_STATUS
+EFIAPI
+LcdGraphicsSetMode (
+  IN EFI_GRAPHICS_OUTPUT_PROTOCOL   *This,
+	IN UINT32                         ModeNumber
+	)
+{
+	EFI_STATUS                      Status               = EFI_SUCCESS;
+	EFI_GRAPHICS_OUTPUT_BLT_PIXEL   FillColour;
+	LCD_INSTANCE* Instance;
+
+	Instance = LCD_INSTANCE_FROM_GOP_THIS (This);
+
+  // Setup the hardware if not already done
+  if(!mDisplayInitialized) {
+    Status = InitializeDisplay (Instance);
+    if (EFI_ERROR(Status)) {
+      goto EXIT;
+    }
+  }
+
+  // Check if this mode is supported
+  if( ModeNumber >= This->Mode->MaxMode ) {
+    DEBUG((DEBUG_ERROR, "LcdGraphicsSetMode: ERROR - Unsupported mode number %d .\n", ModeNumber ));
+    Status = EFI_UNSUPPORTED;
+    goto EXIT;
+  }
+
+	// Set the oscillator frequency to support the new mode
+  Status = LcdPlatformSetMode (ModeNumber);
+  if (EFI_ERROR(Status)) {
+    Status = EFI_DEVICE_ERROR;
+    goto EXIT;
+  }
+
+	// Update the UEFI mode information
+	This->Mode->Mode = ModeNumber;
+	LcdPlatformQueryMode (ModeNumber,&Instance->ModeInfo);
+
+  // Set the hardware to the new mode
+	Status = LcdSetMode (ModeNumber);
+  if (EFI_ERROR(Status)) {
+    Status = EFI_DEVICE_ERROR;
+    goto EXIT;
+  }
+
+	// The UEFI spec requires that we now clear the visible portions of the output display to black.
+
+  // Set the fill colour to black
+  SetMem (&FillColour, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL), 0x0);
+
+  // Fill the entire visible area with the same colour.
+  Status = This->Blt (
+      This,
+      &FillColour,
+      EfiBltVideoFill,
+      0,
+      0,
+      0,
+      0,
+      This->Mode->Info->HorizontalResolution,
+      This->Mode->Info->VerticalResolution,
+      0);
+
+EXIT:
+	return Status;
+}
+
+UINTN
+GetBytesPerPixel (
+  IN  LCD_BPP       Bpp
+  )
+{
+  switch(Bpp) {
+  case LCD_BITS_PER_PIXEL_24:
+    return 4;
+
+  case LCD_BITS_PER_PIXEL_16_565:
+  case LCD_BITS_PER_PIXEL_16_555:
+  case LCD_BITS_PER_PIXEL_12_444:
+    return 2;
+
+  case LCD_BITS_PER_PIXEL_8:
+  case LCD_BITS_PER_PIXEL_4:
+  case LCD_BITS_PER_PIXEL_2:
+  case LCD_BITS_PER_PIXEL_1:
+    return 1;
+
+  default:
+    return 0;
+  }
+}
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
index a267a538cd..5387e53c4a 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
@@ -1,56 +1,56 @@
-#/** @file
-#  
-#  Component description file for PL111LcdGraphicsOutputDxe module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PL111LcdGraphicsDxe
-  FILE_GUID                      = 407B4008-BF5B-11DF-9547-CF16E0D72085
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  ENTRY_POINT                    = LcdGraphicsOutputDxeInitialize
-
-[Sources.common]
-  LcdGraphicsOutputDxe.c
-  LcdGraphicsOutputBlt.c
-  PL111Lcd.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  ArmLib
-  UefiLib
-  BaseLib
-  DebugLib
-  TimerLib
-  UefiDriverEntryPoint
-  UefiBootServicesTableLib
-  IoLib
-  BaseMemoryLib
-  LcdPlatformLib
-
-[Protocols]
-  gEfiDevicePathProtocolGuid
-  gEfiGraphicsOutputProtocolGuid
-
-[FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdPL111LcdBase
-
-[Depex]
-  gEfiCpuArchProtocolGuid
+#/** @file
+#  
+#  Component description file for PL111LcdGraphicsOutputDxe module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PL111LcdGraphicsDxe
+  FILE_GUID                      = 407B4008-BF5B-11DF-9547-CF16E0D72085
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = LcdGraphicsOutputDxeInitialize
+
+[Sources.common]
+  LcdGraphicsOutputDxe.c
+  LcdGraphicsOutputBlt.c
+  PL111Lcd.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  ArmLib
+  UefiLib
+  BaseLib
+  DebugLib
+  TimerLib
+  UefiDriverEntryPoint
+  UefiBootServicesTableLib
+  IoLib
+  BaseMemoryLib
+  LcdPlatformLib
+
+[Protocols]
+  gEfiDevicePathProtocolGuid
+  gEfiGraphicsOutputProtocolGuid
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdPL111LcdBase
+
+[Depex]
+  gEfiCpuArchProtocolGuid
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c
index d4dabeaefe..21fceac1dc 100644
--- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c
+++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c
@@ -1,119 +1,119 @@
-/** @file  NorFlashBlockIoDxe.c
-
-  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/BaseMemoryLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#include "NorFlashDxe.h"
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReset (
-  IN EFI_BLOCK_IO_PROTOCOL  *This,
-  IN BOOLEAN                ExtendedVerification
-  )
-{
-  NOR_FLASH_INSTANCE *Instance;
-
-  Instance = INSTANCE_FROM_BLKIO_THIS(This);
-
-  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoReset(MediaId=0x%x)\n", This->Media->MediaId));
-
-  return NorFlashReset (Instance);
-}
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReadBlocks (
-  IN  EFI_BLOCK_IO_PROTOCOL   *This,
-  IN  UINT32                  MediaId,
-  IN  EFI_LBA                 Lba,
-  IN  UINTN                   BufferSizeInBytes,
-  OUT VOID                    *Buffer
-  )
-{
-  NOR_FLASH_INSTANCE  *Instance;
-  EFI_STATUS          Status;
-
-  Instance = INSTANCE_FROM_BLKIO_THIS(This);
-
-  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoReadBlocks(MediaId=0x%x, Lba=%ld, BufferSize=0x%x bytes (%d kB), BufferPtr @ 0x%08x)\n", MediaId, Lba, BufferSizeInBytes, Buffer));
-
-  if( !This->Media->MediaPresent ) {
-    Status = EFI_NO_MEDIA;
-  } else if( This->Media->MediaId != MediaId ) {
-    Status = EFI_MEDIA_CHANGED;
-  } else {
-    Status = NorFlashReadBlocks (Instance,Lba,BufferSizeInBytes,Buffer);
-  }
-
-  return Status;
-}
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoWriteBlocks (
-  IN  EFI_BLOCK_IO_PROTOCOL   *This,
-  IN  UINT32                  MediaId,
-  IN  EFI_LBA                 Lba,
-  IN  UINTN                   BufferSizeInBytes,
-  IN  VOID                    *Buffer
-  )
-{
-  NOR_FLASH_INSTANCE  *Instance;
-  EFI_STATUS          Status;
-
-  Instance = INSTANCE_FROM_BLKIO_THIS(This);
-
-  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoWriteBlocks(MediaId=0x%x, Lba=%ld, BufferSize=0x%x bytes (%d kB), BufferPtr @ 0x%08x)\n", MediaId, Lba, BufferSizeInBytes, Buffer));
-
-  if( !This->Media->MediaPresent ) {
-    Status = EFI_NO_MEDIA;
-  } else if( This->Media->MediaId != MediaId ) {
-    Status = EFI_MEDIA_CHANGED;
-  } else if( This->Media->ReadOnly ) {
-    Status = EFI_WRITE_PROTECTED;
-  } else {
-    Status = NorFlashWriteBlocks (Instance,Lba,BufferSizeInBytes,Buffer);
-  }
-
-  return Status;
-}
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoFlushBlocks (
-  IN EFI_BLOCK_IO_PROTOCOL  *This
-  )
-{
-  // No Flush required for the NOR Flash driver
-  // because cache operations are not permitted.
-
-  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoFlushBlocks: Function NOT IMPLEMENTED (not required).\n"));
-
-  // Nothing to do so just return without error
-  return EFI_SUCCESS;
-}
+/** @file  NorFlashBlockIoDxe.c
+
+  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include "NorFlashDxe.h"
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoReset (
+  IN EFI_BLOCK_IO_PROTOCOL  *This,
+  IN BOOLEAN                ExtendedVerification
+  )
+{
+  NOR_FLASH_INSTANCE *Instance;
+
+  Instance = INSTANCE_FROM_BLKIO_THIS(This);
+
+  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoReset(MediaId=0x%x)\n", This->Media->MediaId));
+
+  return NorFlashReset (Instance);
+}
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoReadBlocks (
+  IN  EFI_BLOCK_IO_PROTOCOL   *This,
+  IN  UINT32                  MediaId,
+  IN  EFI_LBA                 Lba,
+  IN  UINTN                   BufferSizeInBytes,
+  OUT VOID                    *Buffer
+  )
+{
+  NOR_FLASH_INSTANCE  *Instance;
+  EFI_STATUS          Status;
+
+  Instance = INSTANCE_FROM_BLKIO_THIS(This);
+
+  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoReadBlocks(MediaId=0x%x, Lba=%ld, BufferSize=0x%x bytes (%d kB), BufferPtr @ 0x%08x)\n", MediaId, Lba, BufferSizeInBytes, Buffer));
+
+  if( !This->Media->MediaPresent ) {
+    Status = EFI_NO_MEDIA;
+  } else if( This->Media->MediaId != MediaId ) {
+    Status = EFI_MEDIA_CHANGED;
+  } else {
+    Status = NorFlashReadBlocks (Instance,Lba,BufferSizeInBytes,Buffer);
+  }
+
+  return Status;
+}
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoWriteBlocks (
+  IN  EFI_BLOCK_IO_PROTOCOL   *This,
+  IN  UINT32                  MediaId,
+  IN  EFI_LBA                 Lba,
+  IN  UINTN                   BufferSizeInBytes,
+  IN  VOID                    *Buffer
+  )
+{
+  NOR_FLASH_INSTANCE  *Instance;
+  EFI_STATUS          Status;
+
+  Instance = INSTANCE_FROM_BLKIO_THIS(This);
+
+  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoWriteBlocks(MediaId=0x%x, Lba=%ld, BufferSize=0x%x bytes (%d kB), BufferPtr @ 0x%08x)\n", MediaId, Lba, BufferSizeInBytes, Buffer));
+
+  if( !This->Media->MediaPresent ) {
+    Status = EFI_NO_MEDIA;
+  } else if( This->Media->MediaId != MediaId ) {
+    Status = EFI_MEDIA_CHANGED;
+  } else if( This->Media->ReadOnly ) {
+    Status = EFI_WRITE_PROTECTED;
+  } else {
+    Status = NorFlashWriteBlocks (Instance,Lba,BufferSizeInBytes,Buffer);
+  }
+
+  return Status;
+}
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoFlushBlocks (
+  IN EFI_BLOCK_IO_PROTOCOL  *This
+  )
+{
+  // No Flush required for the NOR Flash driver
+  // because cache operations are not permitted.
+
+  DEBUG ((DEBUG_BLKIO, "NorFlashBlockIoFlushBlocks: Function NOT IMPLEMENTED (not required).\n"));
+
+  // Nothing to do so just return without error
+  return EFI_SUCCESS;
+}
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c
index 8464a98fd1..d1506c7217 100644
--- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -1,52 +1,52 @@
-/** @file  NorFlashDxe.c
-
-  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/UefiLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/PcdLib.h>
-
-#include "NorFlashDxe.h"
-
-
-//
-// Global variable declarations
-//
-NOR_FLASH_INSTANCE **mNorFlashInstances;
-
-NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
-  NOR_FLASH_SIGNATURE, // Signature
-  NULL, // Handle ... NEED TO BE FILLED
-
-  FALSE, // Initialized
-  NULL, // Initialize
-
-  0, // DeviceBaseAddress ... NEED TO BE FILLED
-  0, // RegionBaseAddress ... NEED TO BE FILLED
-  0, // Size ... NEED TO BE FILLED
-  0, // StartLba
-
+/** @file  NorFlashDxe.c
+
+  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/UefiLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/PcdLib.h>
+
+#include "NorFlashDxe.h"
+
+
+//
+// Global variable declarations
+//
+NOR_FLASH_INSTANCE **mNorFlashInstances;
+
+NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
+  NOR_FLASH_SIGNATURE, // Signature
+  NULL, // Handle ... NEED TO BE FILLED
+
+  FALSE, // Initialized
+  NULL, // Initialize
+
+  0, // DeviceBaseAddress ... NEED TO BE FILLED
+  0, // RegionBaseAddress ... NEED TO BE FILLED
+  0, // Size ... NEED TO BE FILLED
+  0, // StartLba
+
   {
     EFI_BLOCK_IO_PROTOCOL_REVISION2, // Revision
     NULL, // Media ... NEED TO BE FILLED
     NorFlashBlockIoReset, // Reset;
-    NorFlashBlockIoReadBlocks,          // ReadBlocks
-    NorFlashBlockIoWriteBlocks,         // WriteBlocks
+    NorFlashBlockIoReadBlocks,          // ReadBlocks
+    NorFlashBlockIoWriteBlocks,         // WriteBlocks
     NorFlashBlockIoFlushBlocks          // FlushBlocks
-  }, // BlockIoProtocol
-
+  }, // BlockIoProtocol
+
   {
     0, // MediaId ... NEED TO BE FILLED
     FALSE, // RemovableMedia
@@ -59,767 +59,767 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
     0, // LastBlock ... NEED TO BE FILLED
     0, // LowestAlignedLba
     1, // LogicalBlocksPerPhysicalBlock
-  }, //Media;
-
-  FALSE, // SupportFvb ... NEED TO BE FILLED
+  }, //Media;
+
+  FALSE, // SupportFvb ... NEED TO BE FILLED
   {
-    FvbGetAttributes, // GetAttributes
-    FvbSetAttributes, // SetAttributes
-    FvbGetPhysicalAddress,  // GetPhysicalAddress
-    FvbGetBlockSize,  // GetBlockSize
-    FvbRead,  // Read
-    FvbWrite, // Write
+    FvbGetAttributes, // GetAttributes
+    FvbSetAttributes, // SetAttributes
+    FvbGetPhysicalAddress,  // GetPhysicalAddress
+    FvbGetBlockSize,  // GetBlockSize
+    FvbRead,  // Read
+    FvbWrite, // Write
     FvbEraseBlocks, // EraseBlocks
     NULL, //ParentHandle
-  }, //  FvbProtoccol;
-
-  {
-    {
-      {
-        HARDWARE_DEVICE_PATH,
-        HW_VENDOR_DP,
-        (UINT8)( sizeof(VENDOR_DEVICE_PATH)      ),
-        (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8),
-      },
-      { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, // GUID ... NEED TO BE FILLED
-    },
-    {
-      END_DEVICE_PATH_TYPE,
-      END_ENTIRE_DEVICE_PATH_SUBTYPE,
-      sizeof (EFI_DEVICE_PATH_PROTOCOL),
-      0
-    }
-    } // DevicePath
-};
-
-EFI_STATUS
-NorFlashCreateInstance (
-  IN UINTN                  NorFlashDeviceBase,
-  IN UINTN                  NorFlashRegionBase,
-  IN UINTN                  NorFlashSize,
-  IN UINT32                 MediaId,
-  IN UINT32                 BlockSize,
-  IN BOOLEAN                SupportFvb,
-  IN CONST GUID             *NorFlashGuid,
-  OUT NOR_FLASH_INSTANCE**  NorFlashInstance
-  )
-{
-  EFI_STATUS Status;
-  NOR_FLASH_INSTANCE* Instance;
-
-  ASSERT(NorFlashInstance != NULL);
-
-  Instance = AllocateCopyPool (sizeof(NOR_FLASH_INSTANCE),&mNorFlashInstanceTemplate);
-  if (Instance == NULL) {
-    return EFI_OUT_OF_RESOURCES;
-  }
-
-  Instance->DeviceBaseAddress = NorFlashDeviceBase;
-  Instance->RegionBaseAddress = NorFlashRegionBase;
-  Instance->Size = NorFlashSize;
-
-  Instance->BlockIoProtocol.Media = &Instance->Media;
-  Instance->Media.MediaId = MediaId;
-  Instance->Media.BlockSize = BlockSize;
-  Instance->Media.LastBlock = (NorFlashSize / BlockSize)-1;
+  }, //  FvbProtoccol;
+
+  {
+    {
+      {
+        HARDWARE_DEVICE_PATH,
+        HW_VENDOR_DP,
+        (UINT8)( sizeof(VENDOR_DEVICE_PATH)      ),
+        (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8),
+      },
+      { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, // GUID ... NEED TO BE FILLED
+    },
+    {
+      END_DEVICE_PATH_TYPE,
+      END_ENTIRE_DEVICE_PATH_SUBTYPE,
+      sizeof (EFI_DEVICE_PATH_PROTOCOL),
+      0
+    }
+    } // DevicePath
+};
+
+EFI_STATUS
+NorFlashCreateInstance (
+  IN UINTN                  NorFlashDeviceBase,
+  IN UINTN                  NorFlashRegionBase,
+  IN UINTN                  NorFlashSize,
+  IN UINT32                 MediaId,
+  IN UINT32                 BlockSize,
+  IN BOOLEAN                SupportFvb,
+  IN CONST GUID             *NorFlashGuid,
+  OUT NOR_FLASH_INSTANCE**  NorFlashInstance
+  )
+{
+  EFI_STATUS Status;
+  NOR_FLASH_INSTANCE* Instance;
+
+  ASSERT(NorFlashInstance != NULL);
+
+  Instance = AllocateCopyPool (sizeof(NOR_FLASH_INSTANCE),&mNorFlashInstanceTemplate);
+  if (Instance == NULL) {
+    return EFI_OUT_OF_RESOURCES;
+  }
+
+  Instance->DeviceBaseAddress = NorFlashDeviceBase;
+  Instance->RegionBaseAddress = NorFlashRegionBase;
+  Instance->Size = NorFlashSize;
+
+  Instance->BlockIoProtocol.Media = &Instance->Media;
+  Instance->Media.MediaId = MediaId;
+  Instance->Media.BlockSize = BlockSize;
+  Instance->Media.LastBlock = (NorFlashSize / BlockSize)-1;
 
   CopyGuid (&Instance->DevicePath.Vendor.Guid,NorFlashGuid);
-
-  if (SupportFvb) {
-    Instance->SupportFvb = TRUE;
-    Instance->Initialize = NorFlashFvbInitialize;
-
-    Status = gBS->InstallMultipleProtocolInterfaces (
-                  &Instance->Handle,
-                  &gEfiDevicePathProtocolGuid, &Instance->DevicePath,
-                  &gEfiBlockIoProtocolGuid,  &Instance->BlockIoProtocol,
-                  &gEfiFirmwareVolumeBlockProtocolGuid, &Instance->FvbProtocol,
-                  NULL
-                  );
-    if (EFI_ERROR(Status)) {
-      FreePool(Instance);
-      return Status;
-    }
-  } else {
-    Instance->Initialized = TRUE;
-
-    Status = gBS->InstallMultipleProtocolInterfaces (
-                    &Instance->Handle,
-                    &gEfiDevicePathProtocolGuid, &Instance->DevicePath,
-                    &gEfiBlockIoProtocolGuid,  &Instance->BlockIoProtocol,
-                    NULL
-                    );
-    if (EFI_ERROR(Status)) {
-      FreePool(Instance);
-      return Status;
-    }
-  }
+
+  if (SupportFvb) {
+    Instance->SupportFvb = TRUE;
+    Instance->Initialize = NorFlashFvbInitialize;
+
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                  &Instance->Handle,
+                  &gEfiDevicePathProtocolGuid, &Instance->DevicePath,
+                  &gEfiBlockIoProtocolGuid,  &Instance->BlockIoProtocol,
+                  &gEfiFirmwareVolumeBlockProtocolGuid, &Instance->FvbProtocol,
+                  NULL
+                  );
+    if (EFI_ERROR(Status)) {
+      FreePool(Instance);
+      return Status;
+    }
+  } else {
+    Instance->Initialized = TRUE;
+
+    Status = gBS->InstallMultipleProtocolInterfaces (
+                    &Instance->Handle,
+                    &gEfiDevicePathProtocolGuid, &Instance->DevicePath,
+                    &gEfiBlockIoProtocolGuid,  &Instance->BlockIoProtocol,
+                    NULL
+                    );
+    if (EFI_ERROR(Status)) {
+      FreePool(Instance);
+      return Status;
+    }
+  }
 
   *NorFlashInstance = Instance;
-  return Status;
-}
-
-UINT32
-NorFlashReadStatusRegister (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  SR_Address
-  )
-{
-  // Prepare to read the status register
-  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_STATUS_REGISTER);
-  return MmioRead32 (Instance->DeviceBaseAddress);
-}
-
-
-BOOLEAN
-NorFlashBlockIsLocked (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  BlockAddress
-  )
-{
-  UINT32                LockStatus;
-  BOOLEAN               BlockIsLocked;
-
-  BlockIsLocked = TRUE;
-
-  // Send command for reading device id
-  SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
-
-  // Read block lock status
-  LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));
-
-  // Decode block lock status
-  LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
-
-  if ((LockStatus & 0x2) != 0) {
-    DEBUG((EFI_D_ERROR, "NorFlashBlockIsLocked: WARNING: Block LOCKED DOWN\n"));
-  }
-
-  if ((LockStatus & 0x1) == 0) {
-    // This means the block is unlocked
-    DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: Block 0x%08x unlocked\n", BlockAddress));
-    BlockIsLocked = FALSE;
-  }
-
-  return BlockIsLocked;
-}
-
-
-EFI_STATUS
-NorFlashUnlockSingleBlock (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  BlockAddress
-  )
-{
-  EFI_STATUS            Status = EFI_SUCCESS;
-  UINT32                LockStatus;
-
-  // Raise the Task Priority Level to TPL_NOTIFY to serialise all its operations
-  // and to protect shared data structures.
-
-  if (FeaturePcdGet (PcdNorFlashCheckBlockLocked) == TRUE) {
-    do {
-      // Request a lock setup
-      SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
-
-      // Request an unlock
-      SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
-
-      // Send command for reading device id
-      SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
-
-      // Read block lock status
-      LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));
-
-      // Decode block lock status
-      LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
-    } while ((LockStatus & 0x1) == 1);
-  } else {
-    // Request a lock setup
-    SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
-
-    // Request an unlock
-    SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
-
-    // Wait until the status register gives us the all clear
-    do {
-      LockStatus = NorFlashReadStatusRegister (Instance, BlockAddress);
-    } while ((LockStatus & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
-  }
-
-  // Put device back into Read Array mode
-  SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_READ_ARRAY);
-
-  DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: BlockAddress=0x%08x, Exit Status = \"%r\".\n", BlockAddress, Status));
-
-  return Status;
-}
-
-
-EFI_STATUS
-NorFlashUnlockSingleBlockIfNecessary (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  BlockAddress
-  )
-{
-  EFI_STATUS Status = EFI_SUCCESS;
-
-  if (NorFlashBlockIsLocked (Instance, BlockAddress) == TRUE) {
-    Status = NorFlashUnlockSingleBlock (Instance, BlockAddress);
-  }
-
-  return Status;
-}
-
-
-/**
- * The following function presumes that the block has already been unlocked.
- **/
-EFI_STATUS
-NorFlashEraseSingleBlock (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  BlockAddress
-  )
-{
-  EFI_STATUS            Status;
-  UINT32                StatusRegister;
-
-  Status = EFI_SUCCESS;
-
-  // Request a block erase and then confirm it
-  SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP);
-  SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM);
-
-  // Wait until the status register gives us the all clear
-  do {
-    StatusRegister = NorFlashReadStatusRegister (Instance, BlockAddress);
-  } while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
-
-  if (StatusRegister & P30_SR_BIT_VPP) {
-    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: VPP Range Error\n", BlockAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if ((StatusRegister & (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) == (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) {
-    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Command Sequence Error\n", BlockAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (StatusRegister & P30_SR_BIT_ERASE) {
-    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Erase Error StatusRegister:0x%X\n", BlockAddress, StatusRegister));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
-    // The debug level message has been reduced because a device lock might happen. In this case we just retry it ...
-    DEBUG((EFI_D_INFO,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error\n", BlockAddress));
-    Status = EFI_WRITE_PROTECTED;
-  }
-
-  if (EFI_ERROR(Status)) {
-    // Clear the Status Register
-    SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
-  }
-
-  // Put device back into Read Array mode
-  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
-
-  return Status;
-}
-
-/**
- * The following function presumes that the block has already been unlocked.
- **/
-EFI_STATUS
-NorFlashUnlockAndEraseSingleBlock (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  BlockAddress
-  )
-{
-  EFI_STATUS      Status;
-  UINTN           Index;
-  EFI_TPL         OriginalTPL;
-
-  // Raise TPL to TPL_HIGH to stop anyone from interrupting us.
-  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
-
-  Index = 0;
-  // The block erase might fail a first time (SW bug ?). Retry it ...
-  do {
-    // Unlock the block if we have to
-    Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);
-    if (!EFI_ERROR(Status)) {
-      Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
-    }
-    Index++;
-  } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
-
-  if (Index == NOR_FLASH_ERASE_RETRY) {
-    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress,Index));
-  }
-
-  // Interruptions can resume.
-  gBS->RestoreTPL (OriginalTPL);
-
-  return Status;
-}
-
-
-EFI_STATUS
-NorFlashWriteSingleWord (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  WordAddress,
-  IN UINT32                 WriteData
-  )
-{
-  EFI_STATUS            Status;
-  UINT32                StatusRegister;
-
-  Status = EFI_SUCCESS;
-
-  // Request a write single word command
-  SEND_NOR_COMMAND(WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP);
-
-  // Store the word into NOR Flash;
-  MmioWrite32 (WordAddress, WriteData);
-
-  // Wait for the write to complete and then check for any errors; i.e. check the Status Register
-  do {
-    // Prepare to read the status register
-    StatusRegister = NorFlashReadStatusRegister (Instance, WordAddress);
-    // The chip is busy while the WRITE bit is not asserted
-  } while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
-
-
-  // Perform a full status check:
-  // Mask the relevant bits of Status Register.
-  // Everything should be zero, if not, we have a problem
-
-  if (StatusRegister & P30_SR_BIT_VPP) {
-    DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): VPP Range Error\n",WordAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (StatusRegister & P30_SR_BIT_PROGRAM) {
-    DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Program Error\n",WordAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
-    DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Device Protect Error\n",WordAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (!EFI_ERROR(Status)) {
-    // Clear the Status Register
-    SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
-  }
-
-  // Put device back into Read Array mode
-  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
-
-  return Status;
-}
-
-/*
- * Writes data to the NOR Flash using the Buffered Programming method.
- *
- * The maximum size of the on-chip buffer is 32-words, because of hardware restrictions.
- * Therefore this function will only handle buffers up to 32 words or 128 bytes.
- * To deal with larger buffers, call this function again.
- *
- * This function presumes that both the TargetAddress and the TargetAddress+BufferSize
- * exist entirely within the NOR Flash. Therefore these conditions will not be checked here.
- *
- * In buffered programming, if the target address not at the beginning of a 32-bit word boundary,
- * then programming time is doubled and power consumption is increased.
- * Therefore, it is a requirement to align buffer writes to 32-bit word boundaries.
- * i.e. the last 4 bits of the target start address must be zero: 0x......00
- */
-EFI_STATUS
-NorFlashWriteBuffer (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  TargetAddress,
-  IN UINTN                  BufferSizeInBytes,
-  IN UINT32                 *Buffer
-  )
-{
-  EFI_STATUS            Status;
-  UINTN                 BufferSizeInWords;
-  UINTN                 Count;
-  volatile UINT32       *Data;
-  UINTN                 WaitForBuffer;
-  BOOLEAN               BufferAvailable;
-  UINT32                StatusRegister;
-
-  WaitForBuffer   = MAX_BUFFERED_PROG_ITERATIONS;
-  BufferAvailable = FALSE;
-
-  // Check that the target address does not cross a 32-word boundary.
-  if ((TargetAddress & BOUNDARY_OF_32_WORDS) != 0) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  // Check there are some data to program
-  if (BufferSizeInBytes == 0) {
-    return EFI_BUFFER_TOO_SMALL;
-  }
-
-  // Check that the buffer size does not exceed the maximum hardware buffer size on chip.
-  if (BufferSizeInBytes > P30_MAX_BUFFER_SIZE_IN_BYTES) {
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // Check that the buffer size is a multiple of 32-bit words
-  if ((BufferSizeInBytes % 4) != 0) {
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // Pre-programming conditions checked, now start the algorithm.
-
-  // Prepare the data destination address
-  Data = (UINT32 *)TargetAddress;
-
-  // Check the availability of the buffer
-  do {
-    // Issue the Buffered Program Setup command
-    SEND_NOR_COMMAND(TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_SETUP);
-
-    // Read back the status register bit#7 from the same address
-    if (((*Data) & P30_SR_BIT_WRITE) == P30_SR_BIT_WRITE) {
-      BufferAvailable = TRUE;
-    }
-
-    // Update the loop counter
-    WaitForBuffer--;
-
-  } while ((WaitForBuffer > 0) && (BufferAvailable == FALSE));
-
-  // The buffer was not available for writing
-  if (WaitForBuffer == 0) {
-    Status = EFI_DEVICE_ERROR;
-    goto EXIT;
-  }
-
-  // From now on we work in 32-bit words
-  BufferSizeInWords = BufferSizeInBytes / (UINTN)4;
-
-  // Write the word count, which is (buffer_size_in_words - 1),
-  // because word count 0 means one word.
-  SEND_NOR_COMMAND(TargetAddress, 0, (BufferSizeInWords - 1));
-
-  // Write the data to the NOR Flash, advancing each address by 4 bytes
-  for(Count=0; Count < BufferSizeInWords; Count++, Data++, Buffer++) {
-    *Data = *Buffer;
-  }
-
-  // Issue the Buffered Program Confirm command, to start the programming operation
-  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_BUFFERED_PROGRAM_CONFIRM);
-
-  // Wait for the write to complete and then check for any errors; i.e. check the Status Register
-  do {
-    StatusRegister = NorFlashReadStatusRegister (Instance, TargetAddress);
-    // The chip is busy while the WRITE bit is not asserted
-  } while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
-
-
-  // Perform a full status check:
-  // Mask the relevant bits of Status Register.
-  // Everything should be zero, if not, we have a problem
-
-  Status          = EFI_SUCCESS;
-
-  if (StatusRegister & P30_SR_BIT_VPP) {
-    DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): VPP Range Error\n", TargetAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (StatusRegister & P30_SR_BIT_PROGRAM) {
-    DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Program Error\n", TargetAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
-    DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Device Protect Error\n",TargetAddress));
-    Status = EFI_DEVICE_ERROR;
-  }
-
-  if (!EFI_ERROR(Status)) {
-    // Clear the Status Register
-    SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
-  }
-
-EXIT:
-  // Put device back into Read Array mode
-  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
-
-  return Status;
-}
-
-EFI_STATUS
-NorFlashWriteSingleBlock (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN EFI_LBA                Lba,
-  IN UINT32                 *DataBuffer,
-  IN UINT32                 BlockSizeInWords
-  )
-{
-  EFI_STATUS    Status;
-  UINTN         WordAddress;
-  UINT32        WordIndex;
-  UINTN         BufferIndex;
-  UINTN         BlockAddress;
-  UINTN         BuffersInBlock;
-  UINTN         RemainingWords;
-  EFI_TPL       OriginalTPL;
-
-  Status = EFI_SUCCESS;
-
-  // Get the physical address of the block
-  BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba, BlockSizeInWords * 4);
-
-  // Start writing from the first address at the start of the block
-  WordAddress = BlockAddress;
-
-  // Raise TPL to TPL_HIGH to stop anyone from interrupting us.
-  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
-
-  Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
-  if (EFI_ERROR(Status)) {
-    DEBUG((EFI_D_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));
-    goto EXIT;
-  }
-
-  // To speed up the programming operation, NOR Flash is programmed using the Buffered Programming method.
-
-  // Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero
-  if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {
-
-    // First, break the entire block into buffer-sized chunks.
-    BuffersInBlock = (UINTN)BlockSizeInWords / P30_MAX_BUFFER_SIZE_IN_BYTES;
-
-    // Then feed each buffer chunk to the NOR Flash
-    for(BufferIndex=0;
-         BufferIndex < BuffersInBlock;
-         BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS
-      ) {
-      Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer);
-      if (EFI_ERROR(Status)) {
-        goto EXIT;
-      }
-    }
-
-    // Finally, finish off any remaining words that are less than the maximum size of the buffer
-    RemainingWords = BlockSizeInWords % P30_MAX_BUFFER_SIZE_IN_WORDS;
-
-    if(RemainingWords != 0) {
-      Status = NorFlashWriteBuffer (Instance, WordAddress, (RemainingWords * 4), DataBuffer);
-      if (EFI_ERROR(Status)) {
-        goto EXIT;
-      }
-    }
-
-  } else {
-    // For now, use the single word programming algorithm
-    // It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,
-    // i.e. which ends in the range 0x......01 - 0x......7F.
-    for(WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {
-      Status = NorFlashWriteSingleWord (Instance, WordAddress, *DataBuffer);
-      if (EFI_ERROR(Status)) {
-        goto EXIT;
-      }
-    }
-  }
-
-EXIT:
-  // Interruptions can resume.
-  gBS->RestoreTPL (OriginalTPL);
-
-  if (EFI_ERROR(Status)) {
-    DEBUG((EFI_D_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));
-  }
-  return Status;
-}
-
-
-EFI_STATUS
-NorFlashWriteBlocks (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN EFI_LBA                Lba,
-  IN UINTN                  BufferSizeInBytes,
-  IN VOID                   *Buffer
-  )
-{
-  UINT32          *pWriteBuffer;
-  EFI_STATUS      Status = EFI_SUCCESS;
-  EFI_LBA         CurrentBlock;
-  UINT32          BlockSizeInWords;
-  UINT32          NumBlocks;
-  UINT32          BlockCount;
-
-  // The buffer must be valid
-  if (Buffer == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if(Instance->Media.ReadOnly == TRUE) {
-    return EFI_WRITE_PROTECTED;
-  }
-
-  // We must have some bytes to read
-  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BufferSizeInBytes=0x%x\n", BufferSizeInBytes));
-  if(BufferSizeInBytes == 0) {
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // The size of the buffer must be a multiple of the block size
-  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BlockSize in bytes =0x%x\n", Instance->Media.BlockSize));
-  if ((BufferSizeInBytes % Instance->Media.BlockSize) != 0) {
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // All blocks must be within the device
-  NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize ;
-
-  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld.\n", NumBlocks, Instance->Media.LastBlock, Lba));
-
-  if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {
-    DEBUG((EFI_D_ERROR, "NorFlashWriteBlocks: ERROR - Write will exceed last block.\n"));
-    return EFI_INVALID_PARAMETER;
-  }
-
-  BlockSizeInWords = Instance->Media.BlockSize / 4;
-
-  // Because the target *Buffer is a pointer to VOID, we must put all the data into a pointer
-  // to a proper data type, so use *ReadBuffer
-  pWriteBuffer = (UINT32 *)Buffer;
-
-  CurrentBlock = Lba;
-  for (BlockCount=0; BlockCount < NumBlocks; BlockCount++, CurrentBlock++, pWriteBuffer = pWriteBuffer + BlockSizeInWords) {
-
-    DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock));
-
-    Status = NorFlashWriteSingleBlock (Instance, CurrentBlock, pWriteBuffer, BlockSizeInWords);
-
-    if (EFI_ERROR(Status)) {
-      break;
-    }
-  }
-
-  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Exit Status = \"%r\".\n", Status));
-  return Status;
-}
-
-EFI_STATUS
-NorFlashReadBlocks (
-  IN NOR_FLASH_INSTANCE   *Instance,
-  IN EFI_LBA              Lba,
-  IN UINTN                BufferSizeInBytes,
-  OUT VOID                *Buffer
-  )
-{
-  UINT32              NumBlocks;
-  UINTN               StartAddress;
-
-  // The buffer must be valid
-  if (Buffer == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  // We must have some bytes to read
-  DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BufferSize=0x%x bytes.\n", BufferSizeInBytes));
-  if(BufferSizeInBytes == 0) {
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // The size of the buffer must be a multiple of the block size
-  DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BlockSize=0x%x bytes.\n", Instance->Media.BlockSize));
-  if ((BufferSizeInBytes % Instance->Media.BlockSize) != 0) {
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // All blocks must be within the device
-  NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize ;
-
-  DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld\n", NumBlocks, Instance->Media.LastBlock, Lba));
-
-  if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {
-    DEBUG((EFI_D_ERROR, "NorFlashReadBlocks: ERROR - Read will exceed last block\n"));
-    return EFI_INVALID_PARAMETER;
-  }
-
-  // Get the address to start reading from
-  StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,
-                                        Lba,
-                                        Instance->Media.BlockSize
-                                       );
-
-  // Put the device into Read Array mode
-  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
-
-  // Readout the data
-  CopyMem(Buffer, (UINTN *)StartAddress, BufferSizeInBytes);
-
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-NorFlashReset (
-  IN  NOR_FLASH_INSTANCE *Instance
-  )
-{
-  // As there is no specific RESET to perform, ensure that the devices is in the default Read Array mode
-  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-EFIAPI
-NorFlashInitialise (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
-  )
-{
-  EFI_STATUS              Status;
-  UINT32                  Index;
-  NOR_FLASH_DESCRIPTION*  NorFlashDevices;
-  UINT32                  NorFlashDeviceCount;
-  BOOLEAN                 ContainVariableStorage;
-
-  Status = NorFlashPlatformInitialization ();
-  if (EFI_ERROR(Status)) {
-    DEBUG((EFI_D_ERROR,"NorFlashInitialise: Fail to initialize Nor Flash devices\n"));
-    return Status;
-  }
-
-  Status = NorFlashPlatformGetDevices (&NorFlashDevices,&NorFlashDeviceCount);
-  if (EFI_ERROR(Status)) {
-    DEBUG((EFI_D_ERROR,"NorFlashInitialise: Fail to get Nor Flash devices\n"));
-    return Status;
-  }
-
-  mNorFlashInstances = AllocatePool (sizeof(NOR_FLASH_INSTANCE*) * NorFlashDeviceCount);
-
-  for (Index = 0; Index < NorFlashDeviceCount; Index++) {
-    // Check if this NOR Flash device contain the variable storage region
-    ContainVariableStorage =
-        (NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
-        (PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
-
-    Status = NorFlashCreateInstance (
-      NorFlashDevices[Index].DeviceBaseAddress,
-      NorFlashDevices[Index].RegionBaseAddress,
-      NorFlashDevices[Index].Size,
-      Index,
-      NorFlashDevices[Index].BlockSize,
-      ContainVariableStorage,
-      &NorFlashDevices[Index].Guid,
-      &mNorFlashInstances[Index]
-    );
-    if (EFI_ERROR(Status)) {
-      DEBUG((EFI_D_ERROR,"NorFlashInitialise: Fail to create instance for NorFlash[%d]\n",Index));
-    }
-  }
-
-  return Status;
-}
+  return Status;
+}
+
+UINT32
+NorFlashReadStatusRegister (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  SR_Address
+  )
+{
+  // Prepare to read the status register
+  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_STATUS_REGISTER);
+  return MmioRead32 (Instance->DeviceBaseAddress);
+}
+
+
+BOOLEAN
+NorFlashBlockIsLocked (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  BlockAddress
+  )
+{
+  UINT32                LockStatus;
+  BOOLEAN               BlockIsLocked;
+
+  BlockIsLocked = TRUE;
+
+  // Send command for reading device id
+  SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
+
+  // Read block lock status
+  LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));
+
+  // Decode block lock status
+  LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
+
+  if ((LockStatus & 0x2) != 0) {
+    DEBUG((EFI_D_ERROR, "NorFlashBlockIsLocked: WARNING: Block LOCKED DOWN\n"));
+  }
+
+  if ((LockStatus & 0x1) == 0) {
+    // This means the block is unlocked
+    DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: Block 0x%08x unlocked\n", BlockAddress));
+    BlockIsLocked = FALSE;
+  }
+
+  return BlockIsLocked;
+}
+
+
+EFI_STATUS
+NorFlashUnlockSingleBlock (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  BlockAddress
+  )
+{
+  EFI_STATUS            Status = EFI_SUCCESS;
+  UINT32                LockStatus;
+
+  // Raise the Task Priority Level to TPL_NOTIFY to serialise all its operations
+  // and to protect shared data structures.
+
+  if (FeaturePcdGet (PcdNorFlashCheckBlockLocked) == TRUE) {
+    do {
+      // Request a lock setup
+      SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
+
+      // Request an unlock
+      SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
+
+      // Send command for reading device id
+      SEND_NOR_COMMAND (BlockAddress, 2, P30_CMD_READ_DEVICE_ID);
+
+      // Read block lock status
+      LockStatus = MmioRead32 (CREATE_NOR_ADDRESS(BlockAddress, 2));
+
+      // Decode block lock status
+      LockStatus = FOLD_32BIT_INTO_16BIT(LockStatus);
+    } while ((LockStatus & 0x1) == 1);
+  } else {
+    // Request a lock setup
+    SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_LOCK_BLOCK_SETUP);
+
+    // Request an unlock
+    SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_UNLOCK_BLOCK);
+
+    // Wait until the status register gives us the all clear
+    do {
+      LockStatus = NorFlashReadStatusRegister (Instance, BlockAddress);
+    } while ((LockStatus & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
+  }
+
+  // Put device back into Read Array mode
+  SEND_NOR_COMMAND (BlockAddress, 0, P30_CMD_READ_ARRAY);
+
+  DEBUG((DEBUG_BLKIO, "UnlockSingleBlock: BlockAddress=0x%08x, Exit Status = \"%r\".\n", BlockAddress, Status));
+
+  return Status;
+}
+
+
+EFI_STATUS
+NorFlashUnlockSingleBlockIfNecessary (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  BlockAddress
+  )
+{
+  EFI_STATUS Status = EFI_SUCCESS;
+
+  if (NorFlashBlockIsLocked (Instance, BlockAddress) == TRUE) {
+    Status = NorFlashUnlockSingleBlock (Instance, BlockAddress);
+  }
+
+  return Status;
+}
+
+
+/**
+ * The following function presumes that the block has already been unlocked.
+ **/
+EFI_STATUS
+NorFlashEraseSingleBlock (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  BlockAddress
+  )
+{
+  EFI_STATUS            Status;
+  UINT32                StatusRegister;
+
+  Status = EFI_SUCCESS;
+
+  // Request a block erase and then confirm it
+  SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_SETUP);
+  SEND_NOR_COMMAND(BlockAddress, 0, P30_CMD_BLOCK_ERASE_CONFIRM);
+
+  // Wait until the status register gives us the all clear
+  do {
+    StatusRegister = NorFlashReadStatusRegister (Instance, BlockAddress);
+  } while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
+
+  if (StatusRegister & P30_SR_BIT_VPP) {
+    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: VPP Range Error\n", BlockAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if ((StatusRegister & (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) == (P30_SR_BIT_ERASE | P30_SR_BIT_PROGRAM)) {
+    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Command Sequence Error\n", BlockAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (StatusRegister & P30_SR_BIT_ERASE) {
+    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Erase Error StatusRegister:0x%X\n", BlockAddress, StatusRegister));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
+    // The debug level message has been reduced because a device lock might happen. In this case we just retry it ...
+    DEBUG((EFI_D_INFO,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error\n", BlockAddress));
+    Status = EFI_WRITE_PROTECTED;
+  }
+
+  if (EFI_ERROR(Status)) {
+    // Clear the Status Register
+    SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
+  }
+
+  // Put device back into Read Array mode
+  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
+
+  return Status;
+}
+
+/**
+ * The following function presumes that the block has already been unlocked.
+ **/
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  BlockAddress
+  )
+{
+  EFI_STATUS      Status;
+  UINTN           Index;
+  EFI_TPL         OriginalTPL;
+
+  // Raise TPL to TPL_HIGH to stop anyone from interrupting us.
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+  Index = 0;
+  // The block erase might fail a first time (SW bug ?). Retry it ...
+  do {
+    // Unlock the block if we have to
+    Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);
+    if (!EFI_ERROR(Status)) {
+      Status = NorFlashEraseSingleBlock (Instance, BlockAddress);
+    }
+    Index++;
+  } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));
+
+  if (Index == NOR_FLASH_ERASE_RETRY) {
+    DEBUG((EFI_D_ERROR,"EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error (try to erase %d times)\n", BlockAddress,Index));
+  }
+
+  // Interruptions can resume.
+  gBS->RestoreTPL (OriginalTPL);
+
+  return Status;
+}
+
+
+EFI_STATUS
+NorFlashWriteSingleWord (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  WordAddress,
+  IN UINT32                 WriteData
+  )
+{
+  EFI_STATUS            Status;
+  UINT32                StatusRegister;
+
+  Status = EFI_SUCCESS;
+
+  // Request a write single word command
+  SEND_NOR_COMMAND(WordAddress, 0, P30_CMD_WORD_PROGRAM_SETUP);
+
+  // Store the word into NOR Flash;
+  MmioWrite32 (WordAddress, WriteData);
+
+  // Wait for the write to complete and then check for any errors; i.e. check the Status Register
+  do {
+    // Prepare to read the status register
+    StatusRegister = NorFlashReadStatusRegister (Instance, WordAddress);
+    // The chip is busy while the WRITE bit is not asserted
+  } while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
+
+
+  // Perform a full status check:
+  // Mask the relevant bits of Status Register.
+  // Everything should be zero, if not, we have a problem
+
+  if (StatusRegister & P30_SR_BIT_VPP) {
+    DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): VPP Range Error\n",WordAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (StatusRegister & P30_SR_BIT_PROGRAM) {
+    DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Program Error\n",WordAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
+    DEBUG((EFI_D_ERROR,"NorFlashWriteSingleWord(WordAddress:0x%X): Device Protect Error\n",WordAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (!EFI_ERROR(Status)) {
+    // Clear the Status Register
+    SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
+  }
+
+  // Put device back into Read Array mode
+  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
+
+  return Status;
+}
+
+/*
+ * Writes data to the NOR Flash using the Buffered Programming method.
+ *
+ * The maximum size of the on-chip buffer is 32-words, because of hardware restrictions.
+ * Therefore this function will only handle buffers up to 32 words or 128 bytes.
+ * To deal with larger buffers, call this function again.
+ *
+ * This function presumes that both the TargetAddress and the TargetAddress+BufferSize
+ * exist entirely within the NOR Flash. Therefore these conditions will not be checked here.
+ *
+ * In buffered programming, if the target address not at the beginning of a 32-bit word boundary,
+ * then programming time is doubled and power consumption is increased.
+ * Therefore, it is a requirement to align buffer writes to 32-bit word boundaries.
+ * i.e. the last 4 bits of the target start address must be zero: 0x......00
+ */
+EFI_STATUS
+NorFlashWriteBuffer (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  TargetAddress,
+  IN UINTN                  BufferSizeInBytes,
+  IN UINT32                 *Buffer
+  )
+{
+  EFI_STATUS            Status;
+  UINTN                 BufferSizeInWords;
+  UINTN                 Count;
+  volatile UINT32       *Data;
+  UINTN                 WaitForBuffer;
+  BOOLEAN               BufferAvailable;
+  UINT32                StatusRegister;
+
+  WaitForBuffer   = MAX_BUFFERED_PROG_ITERATIONS;
+  BufferAvailable = FALSE;
+
+  // Check that the target address does not cross a 32-word boundary.
+  if ((TargetAddress & BOUNDARY_OF_32_WORDS) != 0) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // Check there are some data to program
+  if (BufferSizeInBytes == 0) {
+    return EFI_BUFFER_TOO_SMALL;
+  }
+
+  // Check that the buffer size does not exceed the maximum hardware buffer size on chip.
+  if (BufferSizeInBytes > P30_MAX_BUFFER_SIZE_IN_BYTES) {
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // Check that the buffer size is a multiple of 32-bit words
+  if ((BufferSizeInBytes % 4) != 0) {
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // Pre-programming conditions checked, now start the algorithm.
+
+  // Prepare the data destination address
+  Data = (UINT32 *)TargetAddress;
+
+  // Check the availability of the buffer
+  do {
+    // Issue the Buffered Program Setup command
+    SEND_NOR_COMMAND(TargetAddress, 0, P30_CMD_BUFFERED_PROGRAM_SETUP);
+
+    // Read back the status register bit#7 from the same address
+    if (((*Data) & P30_SR_BIT_WRITE) == P30_SR_BIT_WRITE) {
+      BufferAvailable = TRUE;
+    }
+
+    // Update the loop counter
+    WaitForBuffer--;
+
+  } while ((WaitForBuffer > 0) && (BufferAvailable == FALSE));
+
+  // The buffer was not available for writing
+  if (WaitForBuffer == 0) {
+    Status = EFI_DEVICE_ERROR;
+    goto EXIT;
+  }
+
+  // From now on we work in 32-bit words
+  BufferSizeInWords = BufferSizeInBytes / (UINTN)4;
+
+  // Write the word count, which is (buffer_size_in_words - 1),
+  // because word count 0 means one word.
+  SEND_NOR_COMMAND(TargetAddress, 0, (BufferSizeInWords - 1));
+
+  // Write the data to the NOR Flash, advancing each address by 4 bytes
+  for(Count=0; Count < BufferSizeInWords; Count++, Data++, Buffer++) {
+    *Data = *Buffer;
+  }
+
+  // Issue the Buffered Program Confirm command, to start the programming operation
+  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_BUFFERED_PROGRAM_CONFIRM);
+
+  // Wait for the write to complete and then check for any errors; i.e. check the Status Register
+  do {
+    StatusRegister = NorFlashReadStatusRegister (Instance, TargetAddress);
+    // The chip is busy while the WRITE bit is not asserted
+  } while ((StatusRegister & P30_SR_BIT_WRITE) != P30_SR_BIT_WRITE);
+
+
+  // Perform a full status check:
+  // Mask the relevant bits of Status Register.
+  // Everything should be zero, if not, we have a problem
+
+  Status          = EFI_SUCCESS;
+
+  if (StatusRegister & P30_SR_BIT_VPP) {
+    DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): VPP Range Error\n", TargetAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (StatusRegister & P30_SR_BIT_PROGRAM) {
+    DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Program Error\n", TargetAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (StatusRegister & P30_SR_BIT_BLOCK_LOCKED) {
+    DEBUG((EFI_D_ERROR,"NorFlashWriteBuffer(TargetAddress:0x%X): Device Protect Error\n",TargetAddress));
+    Status = EFI_DEVICE_ERROR;
+  }
+
+  if (!EFI_ERROR(Status)) {
+    // Clear the Status Register
+    SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_CLEAR_STATUS_REGISTER);
+  }
+
+EXIT:
+  // Put device back into Read Array mode
+  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
+
+  return Status;
+}
+
+EFI_STATUS
+NorFlashWriteSingleBlock (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN EFI_LBA                Lba,
+  IN UINT32                 *DataBuffer,
+  IN UINT32                 BlockSizeInWords
+  )
+{
+  EFI_STATUS    Status;
+  UINTN         WordAddress;
+  UINT32        WordIndex;
+  UINTN         BufferIndex;
+  UINTN         BlockAddress;
+  UINTN         BuffersInBlock;
+  UINTN         RemainingWords;
+  EFI_TPL       OriginalTPL;
+
+  Status = EFI_SUCCESS;
+
+  // Get the physical address of the block
+  BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba, BlockSizeInWords * 4);
+
+  // Start writing from the first address at the start of the block
+  WordAddress = BlockAddress;
+
+  // Raise TPL to TPL_HIGH to stop anyone from interrupting us.
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+  Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
+  if (EFI_ERROR(Status)) {
+    DEBUG((EFI_D_ERROR, "WriteSingleBlock: ERROR - Failed to Unlock and Erase the single block at 0x%X\n", BlockAddress));
+    goto EXIT;
+  }
+
+  // To speed up the programming operation, NOR Flash is programmed using the Buffered Programming method.
+
+  // Check that the address starts at a 32-word boundary, i.e. last 7 bits must be zero
+  if ((WordAddress & BOUNDARY_OF_32_WORDS) == 0x00) {
+
+    // First, break the entire block into buffer-sized chunks.
+    BuffersInBlock = (UINTN)BlockSizeInWords / P30_MAX_BUFFER_SIZE_IN_BYTES;
+
+    // Then feed each buffer chunk to the NOR Flash
+    for(BufferIndex=0;
+         BufferIndex < BuffersInBlock;
+         BufferIndex++, WordAddress += P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer += P30_MAX_BUFFER_SIZE_IN_WORDS
+      ) {
+      Status = NorFlashWriteBuffer (Instance, WordAddress, P30_MAX_BUFFER_SIZE_IN_BYTES, DataBuffer);
+      if (EFI_ERROR(Status)) {
+        goto EXIT;
+      }
+    }
+
+    // Finally, finish off any remaining words that are less than the maximum size of the buffer
+    RemainingWords = BlockSizeInWords % P30_MAX_BUFFER_SIZE_IN_WORDS;
+
+    if(RemainingWords != 0) {
+      Status = NorFlashWriteBuffer (Instance, WordAddress, (RemainingWords * 4), DataBuffer);
+      if (EFI_ERROR(Status)) {
+        goto EXIT;
+      }
+    }
+
+  } else {
+    // For now, use the single word programming algorithm
+    // It is unlikely that the NOR Flash will exist in an address which falls within a 32 word boundary range,
+    // i.e. which ends in the range 0x......01 - 0x......7F.
+    for(WordIndex=0; WordIndex<BlockSizeInWords; WordIndex++, DataBuffer++, WordAddress = WordAddress + 4) {
+      Status = NorFlashWriteSingleWord (Instance, WordAddress, *DataBuffer);
+      if (EFI_ERROR(Status)) {
+        goto EXIT;
+      }
+    }
+  }
+
+EXIT:
+  // Interruptions can resume.
+  gBS->RestoreTPL (OriginalTPL);
+
+  if (EFI_ERROR(Status)) {
+    DEBUG((EFI_D_ERROR, "NOR FLASH Programming [WriteSingleBlock] failed at address 0x%08x. Exit Status = \"%r\".\n", WordAddress, Status));
+  }
+  return Status;
+}
+
+
+EFI_STATUS
+NorFlashWriteBlocks (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN EFI_LBA                Lba,
+  IN UINTN                  BufferSizeInBytes,
+  IN VOID                   *Buffer
+  )
+{
+  UINT32          *pWriteBuffer;
+  EFI_STATUS      Status = EFI_SUCCESS;
+  EFI_LBA         CurrentBlock;
+  UINT32          BlockSizeInWords;
+  UINT32          NumBlocks;
+  UINT32          BlockCount;
+
+  // The buffer must be valid
+  if (Buffer == NULL) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  if(Instance->Media.ReadOnly == TRUE) {
+    return EFI_WRITE_PROTECTED;
+  }
+
+  // We must have some bytes to read
+  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BufferSizeInBytes=0x%x\n", BufferSizeInBytes));
+  if(BufferSizeInBytes == 0) {
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // The size of the buffer must be a multiple of the block size
+  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: BlockSize in bytes =0x%x\n", Instance->Media.BlockSize));
+  if ((BufferSizeInBytes % Instance->Media.BlockSize) != 0) {
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // All blocks must be within the device
+  NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize ;
+
+  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld.\n", NumBlocks, Instance->Media.LastBlock, Lba));
+
+  if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {
+    DEBUG((EFI_D_ERROR, "NorFlashWriteBlocks: ERROR - Write will exceed last block.\n"));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  BlockSizeInWords = Instance->Media.BlockSize / 4;
+
+  // Because the target *Buffer is a pointer to VOID, we must put all the data into a pointer
+  // to a proper data type, so use *ReadBuffer
+  pWriteBuffer = (UINT32 *)Buffer;
+
+  CurrentBlock = Lba;
+  for (BlockCount=0; BlockCount < NumBlocks; BlockCount++, CurrentBlock++, pWriteBuffer = pWriteBuffer + BlockSizeInWords) {
+
+    DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Writing block #%d\n", (UINTN)CurrentBlock));
+
+    Status = NorFlashWriteSingleBlock (Instance, CurrentBlock, pWriteBuffer, BlockSizeInWords);
+
+    if (EFI_ERROR(Status)) {
+      break;
+    }
+  }
+
+  DEBUG((DEBUG_BLKIO, "NorFlashWriteBlocks: Exit Status = \"%r\".\n", Status));
+  return Status;
+}
+
+EFI_STATUS
+NorFlashReadBlocks (
+  IN NOR_FLASH_INSTANCE   *Instance,
+  IN EFI_LBA              Lba,
+  IN UINTN                BufferSizeInBytes,
+  OUT VOID                *Buffer
+  )
+{
+  UINT32              NumBlocks;
+  UINTN               StartAddress;
+
+  // The buffer must be valid
+  if (Buffer == NULL) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // We must have some bytes to read
+  DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BufferSize=0x%x bytes.\n", BufferSizeInBytes));
+  if(BufferSizeInBytes == 0) {
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // The size of the buffer must be a multiple of the block size
+  DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: BlockSize=0x%x bytes.\n", Instance->Media.BlockSize));
+  if ((BufferSizeInBytes % Instance->Media.BlockSize) != 0) {
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // All blocks must be within the device
+  NumBlocks = ((UINT32)BufferSizeInBytes) / Instance->Media.BlockSize ;
+
+  DEBUG((DEBUG_BLKIO, "NorFlashReadBlocks: NumBlocks=%d, LastBlock=%ld, Lba=%ld\n", NumBlocks, Instance->Media.LastBlock, Lba));
+
+  if ((Lba + NumBlocks) > (Instance->Media.LastBlock + 1)) {
+    DEBUG((EFI_D_ERROR, "NorFlashReadBlocks: ERROR - Read will exceed last block\n"));
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // Get the address to start reading from
+  StartAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress,
+                                        Lba,
+                                        Instance->Media.BlockSize
+                                       );
+
+  // Put the device into Read Array mode
+  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
+
+  // Readout the data
+  CopyMem(Buffer, (UINTN *)StartAddress, BufferSizeInBytes);
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+NorFlashReset (
+  IN  NOR_FLASH_INSTANCE *Instance
+  )
+{
+  // As there is no specific RESET to perform, ensure that the devices is in the default Read Array mode
+  SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+NorFlashInitialise (
+  IN EFI_HANDLE         ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  EFI_STATUS              Status;
+  UINT32                  Index;
+  NOR_FLASH_DESCRIPTION*  NorFlashDevices;
+  UINT32                  NorFlashDeviceCount;
+  BOOLEAN                 ContainVariableStorage;
+
+  Status = NorFlashPlatformInitialization ();
+  if (EFI_ERROR(Status)) {
+    DEBUG((EFI_D_ERROR,"NorFlashInitialise: Fail to initialize Nor Flash devices\n"));
+    return Status;
+  }
+
+  Status = NorFlashPlatformGetDevices (&NorFlashDevices,&NorFlashDeviceCount);
+  if (EFI_ERROR(Status)) {
+    DEBUG((EFI_D_ERROR,"NorFlashInitialise: Fail to get Nor Flash devices\n"));
+    return Status;
+  }
+
+  mNorFlashInstances = AllocatePool (sizeof(NOR_FLASH_INSTANCE*) * NorFlashDeviceCount);
+
+  for (Index = 0; Index < NorFlashDeviceCount; Index++) {
+    // Check if this NOR Flash device contain the variable storage region
+    ContainVariableStorage =
+        (NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
+        (PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
+
+    Status = NorFlashCreateInstance (
+      NorFlashDevices[Index].DeviceBaseAddress,
+      NorFlashDevices[Index].RegionBaseAddress,
+      NorFlashDevices[Index].Size,
+      Index,
+      NorFlashDevices[Index].BlockSize,
+      ContainVariableStorage,
+      &NorFlashDevices[Index].Guid,
+      &mNorFlashInstances[Index]
+    );
+    if (EFI_ERROR(Status)) {
+      DEBUG((EFI_D_ERROR,"NorFlashInitialise: Fail to create instance for NorFlash[%d]\n",Index));
+    }
+  }
+
+  return Status;
+}
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h
index a284c151a9..959c0c1905 100644
--- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h
+++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.h
@@ -1,316 +1,316 @@
-/** @file  NorFlashDxe.h
-
-  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __NOR_FLASH_DXE_H__
-#define __NOR_FLASH_DXE_H__
-
-
-#include <Base.h>
-#include <PiDxe.h>
-
-#include <Protocol/BlockIo.h>
-#include <Protocol/FirmwareVolumeBlock.h>
-
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/NorFlashPlatformLib.h>
-#include <Library/UefiLib.h>
-
-#define NOR_FLASH_ERASE_RETRY                     10
-
-// Device access macros
-// These are necessary because we use 2 x 16bit parts to make up 32bit data
-
-#define HIGH_16_BITS                              0xFFFF0000
-#define LOW_16_BITS                               0x0000FFFF
-#define LOW_8_BITS                                0x000000FF
-
-#define FOLD_32BIT_INTO_16BIT(value)              ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
-
-#define GET_LOW_BYTE(value)                       ( value & LOW_8_BITS )
-#define GET_HIGH_BYTE(value)                      ( GET_LOW_BYTE( value >> 16 ) )
-
-// Each command must be sent simultaneously to both chips,
-// i.e. at the lower 16 bits AND at the higher 16 bits
-#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr)   ((BaseAddr) + ((OffsetAddr) << 2))
-#define CREATE_DUAL_CMD(Cmd)                      ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
-#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
-#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
-
-// Status Register Bits
-#define P30_SR_BIT_WRITE                          (BIT7 << 16 | BIT7)
-#define P30_SR_BIT_ERASE_SUSPEND                  (BIT6 << 16 | BIT6)
-#define P30_SR_BIT_ERASE                          (BIT5 << 16 | BIT5)
-#define P30_SR_BIT_PROGRAM                        (BIT4 << 16 | BIT4)
-#define P30_SR_BIT_VPP                            (BIT3 << 16 | BIT3)
-#define P30_SR_BIT_PROGRAM_SUSPEND                (BIT2 << 16 | BIT2)
-#define P30_SR_BIT_BLOCK_LOCKED                   (BIT1 << 16 | BIT1)
-#define P30_SR_BIT_BEFP                           (BIT0 << 16 | BIT0)
-
-// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
-
-// On chip buffer size for buffered programming operations
-// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
-// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
-#define P30_MAX_BUFFER_SIZE_IN_BYTES              ((UINTN)128)
-#define P30_MAX_BUFFER_SIZE_IN_WORDS              (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
-#define MAX_BUFFERED_PROG_ITERATIONS              10000000
-#define BOUNDARY_OF_32_WORDS                      0x7F
-
-// CFI Addresses
-#define P30_CFI_ADDR_QUERY_UNIQUE_QRY             0x10
-#define P30_CFI_ADDR_VENDOR_ID                    0x13
-
-// CFI Data
-#define CFI_QRY                                   0x00595251
-
-// READ Commands
-#define P30_CMD_READ_DEVICE_ID                    0x0090
-#define P30_CMD_READ_STATUS_REGISTER              0x0070
-#define P30_CMD_CLEAR_STATUS_REGISTER             0x0050
-#define P30_CMD_READ_ARRAY                        0x00FF
-#define P30_CMD_READ_CFI_QUERY                    0x0098
-
-// WRITE Commands
-#define P30_CMD_WORD_PROGRAM_SETUP                0x0040
-#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP      0x0010
-#define P30_CMD_BUFFERED_PROGRAM_SETUP            0x00E8
-#define P30_CMD_BUFFERED_PROGRAM_CONFIRM          0x00D0
-#define P30_CMD_BEFP_SETUP                        0x0080
-#define P30_CMD_BEFP_CONFIRM                      0x00D0
-
-// ERASE Commands
-#define P30_CMD_BLOCK_ERASE_SETUP                 0x0020
-#define P30_CMD_BLOCK_ERASE_CONFIRM               0x00D0
-
-// SUSPEND Commands
-#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND          0x00B0
-#define P30_CMD_SUSPEND_RESUME                    0x00D0
-
-// BLOCK LOCKING / UNLOCKING Commands
-#define P30_CMD_LOCK_BLOCK_SETUP                  0x0060
-#define P30_CMD_LOCK_BLOCK                        0x0001
-#define P30_CMD_UNLOCK_BLOCK                      0x00D0
-#define P30_CMD_LOCK_DOWN_BLOCK                   0x002F
-
-// PROTECTION Commands
-#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
-
-// CONFIGURATION Commands
-#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
-#define P30_CMD_READ_CONFIGURATION_REGISTER       0x0003
-
-#define NOR_FLASH_SIGNATURE                       SIGNATURE_32('n', 'o', 'r', '0')
-#define INSTANCE_FROM_FVB_THIS(a)                 CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
-#define INSTANCE_FROM_BLKIO_THIS(a)               CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
-
-typedef struct _NOR_FLASH_INSTANCE                NOR_FLASH_INSTANCE;
-
-typedef EFI_STATUS (*NOR_FLASH_INITIALIZE)        (NOR_FLASH_INSTANCE* Instance);
-
-typedef struct {
-  VENDOR_DEVICE_PATH                  Vendor;
-  EFI_DEVICE_PATH_PROTOCOL            End;
-} NOR_FLASH_DEVICE_PATH;
-
-struct _NOR_FLASH_INSTANCE {
-  UINT32                              Signature;
-  EFI_HANDLE                          Handle;
-
-  BOOLEAN                             Initialized;
-  NOR_FLASH_INITIALIZE                Initialize;
-
-  UINTN                               DeviceBaseAddress;
-  UINTN                               RegionBaseAddress;
-  UINTN                               Size;
-  EFI_LBA                             StartLba;
-
-  EFI_BLOCK_IO_PROTOCOL               BlockIoProtocol;
-  EFI_BLOCK_IO_MEDIA                  Media;
-
-  BOOLEAN                             SupportFvb;
-  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
-
-  NOR_FLASH_DEVICE_PATH	              DevicePath;
-};
-
-EFI_STATUS
-NorFlashReadCfiData (
-  IN  UINTN                   DeviceBaseAddress,
-  IN  UINTN                   CFI_Offset,
-  IN  UINT32                  NumberOfBytes,
-  OUT UINT32                  *Data
-  );
-
-EFI_STATUS
-NorFlashWriteBuffer (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  TargetAddress,
-  IN UINTN                  BufferSizeInBytes,
-  IN UINT32                 *Buffer
-  );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReset (
-  IN EFI_BLOCK_IO_PROTOCOL    *This,
-  IN BOOLEAN                  ExtendedVerification
-  );
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoReadBlocks (
-  IN  EFI_BLOCK_IO_PROTOCOL   *This,
-  IN  UINT32                  MediaId,
-  IN  EFI_LBA                 Lba,
-  IN  UINTN                   BufferSizeInBytes,
-  OUT VOID                    *Buffer
-);
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoWriteBlocks (
-  IN  EFI_BLOCK_IO_PROTOCOL   *This,
-  IN  UINT32                  MediaId,
-  IN  EFI_LBA                 Lba,
-  IN  UINTN                   BufferSizeInBytes,
-  IN  VOID                    *Buffer
-);
-
-//
-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
-//
-EFI_STATUS
-EFIAPI
-NorFlashBlockIoFlushBlocks (
-  IN EFI_BLOCK_IO_PROTOCOL    *This
-);
-
-
-//
-// NorFlashFvbDxe.c
-//
-
-EFI_STATUS
-EFIAPI
-NorFlashFvbInitialize (
-  IN NOR_FLASH_INSTANCE*                            Instance
-  );
-
-EFI_STATUS
-EFIAPI
-FvbGetAttributes(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
-  OUT       EFI_FVB_ATTRIBUTES_2                    *Attributes
-  );
-
-EFI_STATUS
-EFIAPI
-FvbSetAttributes(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
-  IN OUT    EFI_FVB_ATTRIBUTES_2                    *Attributes
-  );
-
-EFI_STATUS
-EFIAPI
-FvbGetPhysicalAddress(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
-  OUT       EFI_PHYSICAL_ADDRESS                    *Address
-  );
-
-EFI_STATUS
-EFIAPI
-FvbGetBlockSize(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
-  IN        EFI_LBA                                 Lba,
-  OUT       UINTN                                   *BlockSize,
-  OUT       UINTN                                   *NumberOfBlocks
-  );
-
-EFI_STATUS
-EFIAPI
-FvbRead(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
-  IN        EFI_LBA                                 Lba,
-  IN        UINTN                                   Offset,
-  IN OUT    UINTN                                   *NumBytes,
-  IN OUT    UINT8                                   *Buffer
-  );
-
-EFI_STATUS
-EFIAPI
-FvbWrite(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
-  IN        EFI_LBA                                 Lba,
-  IN        UINTN                                   Offset,
-  IN OUT    UINTN                                   *NumBytes,
-  IN        UINT8                                   *Buffer
-  );
-
-EFI_STATUS
-EFIAPI
-FvbEraseBlocks(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
-  ...
-  );
-
-//
-// NorFlashDxe.c
-//
-
-EFI_STATUS
-NorFlashUnlockAndEraseSingleBlock (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN UINTN                  BlockAddress
-  );
-
-EFI_STATUS
-NorFlashWriteSingleBlock (
-  IN NOR_FLASH_INSTANCE     *Instance,
-  IN EFI_LBA                Lba,
-  IN UINT32                 *DataBuffer,
-  IN UINT32                 BlockSizeInWords
-  );
-
-EFI_STATUS
-NorFlashWriteBlocks (
-  IN  NOR_FLASH_INSTANCE *Instance,
-  IN  EFI_LBA           Lba,
-  IN  UINTN             BufferSizeInBytes,
-  IN  VOID              *Buffer
-  );
-
-EFI_STATUS
-NorFlashReadBlocks (
-  IN NOR_FLASH_INSTANCE   *Instance,
-  IN EFI_LBA              Lba,
-  IN UINTN                BufferSizeInBytes,
-  OUT VOID                *Buffer
-  );
-
-EFI_STATUS
-NorFlashReset (
-  IN  NOR_FLASH_INSTANCE *Instance
-  );
-
-#endif /* __NOR_FLASH_DXE_H__ */
+/** @file  NorFlashDxe.h
+
+  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __NOR_FLASH_DXE_H__
+#define __NOR_FLASH_DXE_H__
+
+
+#include <Base.h>
+#include <PiDxe.h>
+
+#include <Protocol/BlockIo.h>
+#include <Protocol/FirmwareVolumeBlock.h>
+
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/NorFlashPlatformLib.h>
+#include <Library/UefiLib.h>
+
+#define NOR_FLASH_ERASE_RETRY                     10
+
+// Device access macros
+// These are necessary because we use 2 x 16bit parts to make up 32bit data
+
+#define HIGH_16_BITS                              0xFFFF0000
+#define LOW_16_BITS                               0x0000FFFF
+#define LOW_8_BITS                                0x000000FF
+
+#define FOLD_32BIT_INTO_16BIT(value)              ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
+
+#define GET_LOW_BYTE(value)                       ( value & LOW_8_BITS )
+#define GET_HIGH_BYTE(value)                      ( GET_LOW_BYTE( value >> 16 ) )
+
+// Each command must be sent simultaneously to both chips,
+// i.e. at the lower 16 bits AND at the higher 16 bits
+#define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr)   ((BaseAddr) + ((OffsetAddr) << 2))
+#define CREATE_DUAL_CMD(Cmd)                      ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
+#define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
+#define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
+
+// Status Register Bits
+#define P30_SR_BIT_WRITE                          (BIT7 << 16 | BIT7)
+#define P30_SR_BIT_ERASE_SUSPEND                  (BIT6 << 16 | BIT6)
+#define P30_SR_BIT_ERASE                          (BIT5 << 16 | BIT5)
+#define P30_SR_BIT_PROGRAM                        (BIT4 << 16 | BIT4)
+#define P30_SR_BIT_VPP                            (BIT3 << 16 | BIT3)
+#define P30_SR_BIT_PROGRAM_SUSPEND                (BIT2 << 16 | BIT2)
+#define P30_SR_BIT_BLOCK_LOCKED                   (BIT1 << 16 | BIT1)
+#define P30_SR_BIT_BEFP                           (BIT0 << 16 | BIT0)
+
+// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
+
+// On chip buffer size for buffered programming operations
+// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
+// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
+#define P30_MAX_BUFFER_SIZE_IN_BYTES              ((UINTN)128)
+#define P30_MAX_BUFFER_SIZE_IN_WORDS              (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
+#define MAX_BUFFERED_PROG_ITERATIONS              10000000
+#define BOUNDARY_OF_32_WORDS                      0x7F
+
+// CFI Addresses
+#define P30_CFI_ADDR_QUERY_UNIQUE_QRY             0x10
+#define P30_CFI_ADDR_VENDOR_ID                    0x13
+
+// CFI Data
+#define CFI_QRY                                   0x00595251
+
+// READ Commands
+#define P30_CMD_READ_DEVICE_ID                    0x0090
+#define P30_CMD_READ_STATUS_REGISTER              0x0070
+#define P30_CMD_CLEAR_STATUS_REGISTER             0x0050
+#define P30_CMD_READ_ARRAY                        0x00FF
+#define P30_CMD_READ_CFI_QUERY                    0x0098
+
+// WRITE Commands
+#define P30_CMD_WORD_PROGRAM_SETUP                0x0040
+#define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP      0x0010
+#define P30_CMD_BUFFERED_PROGRAM_SETUP            0x00E8
+#define P30_CMD_BUFFERED_PROGRAM_CONFIRM          0x00D0
+#define P30_CMD_BEFP_SETUP                        0x0080
+#define P30_CMD_BEFP_CONFIRM                      0x00D0
+
+// ERASE Commands
+#define P30_CMD_BLOCK_ERASE_SETUP                 0x0020
+#define P30_CMD_BLOCK_ERASE_CONFIRM               0x00D0
+
+// SUSPEND Commands
+#define P30_CMD_PROGRAM_OR_ERASE_SUSPEND          0x00B0
+#define P30_CMD_SUSPEND_RESUME                    0x00D0
+
+// BLOCK LOCKING / UNLOCKING Commands
+#define P30_CMD_LOCK_BLOCK_SETUP                  0x0060
+#define P30_CMD_LOCK_BLOCK                        0x0001
+#define P30_CMD_UNLOCK_BLOCK                      0x00D0
+#define P30_CMD_LOCK_DOWN_BLOCK                   0x002F
+
+// PROTECTION Commands
+#define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
+
+// CONFIGURATION Commands
+#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
+#define P30_CMD_READ_CONFIGURATION_REGISTER       0x0003
+
+#define NOR_FLASH_SIGNATURE                       SIGNATURE_32('n', 'o', 'r', '0')
+#define INSTANCE_FROM_FVB_THIS(a)                 CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
+#define INSTANCE_FROM_BLKIO_THIS(a)               CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
+
+typedef struct _NOR_FLASH_INSTANCE                NOR_FLASH_INSTANCE;
+
+typedef EFI_STATUS (*NOR_FLASH_INITIALIZE)        (NOR_FLASH_INSTANCE* Instance);
+
+typedef struct {
+  VENDOR_DEVICE_PATH                  Vendor;
+  EFI_DEVICE_PATH_PROTOCOL            End;
+} NOR_FLASH_DEVICE_PATH;
+
+struct _NOR_FLASH_INSTANCE {
+  UINT32                              Signature;
+  EFI_HANDLE                          Handle;
+
+  BOOLEAN                             Initialized;
+  NOR_FLASH_INITIALIZE                Initialize;
+
+  UINTN                               DeviceBaseAddress;
+  UINTN                               RegionBaseAddress;
+  UINTN                               Size;
+  EFI_LBA                             StartLba;
+
+  EFI_BLOCK_IO_PROTOCOL               BlockIoProtocol;
+  EFI_BLOCK_IO_MEDIA                  Media;
+
+  BOOLEAN                             SupportFvb;
+  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;
+
+  NOR_FLASH_DEVICE_PATH	              DevicePath;
+};
+
+EFI_STATUS
+NorFlashReadCfiData (
+  IN  UINTN                   DeviceBaseAddress,
+  IN  UINTN                   CFI_Offset,
+  IN  UINT32                  NumberOfBytes,
+  OUT UINT32                  *Data
+  );
+
+EFI_STATUS
+NorFlashWriteBuffer (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  TargetAddress,
+  IN UINTN                  BufferSizeInBytes,
+  IN UINT32                 *Buffer
+  );
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoReset (
+  IN EFI_BLOCK_IO_PROTOCOL    *This,
+  IN BOOLEAN                  ExtendedVerification
+  );
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoReadBlocks (
+  IN  EFI_BLOCK_IO_PROTOCOL   *This,
+  IN  UINT32                  MediaId,
+  IN  EFI_LBA                 Lba,
+  IN  UINTN                   BufferSizeInBytes,
+  OUT VOID                    *Buffer
+);
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoWriteBlocks (
+  IN  EFI_BLOCK_IO_PROTOCOL   *This,
+  IN  UINT32                  MediaId,
+  IN  EFI_LBA                 Lba,
+  IN  UINTN                   BufferSizeInBytes,
+  IN  VOID                    *Buffer
+);
+
+//
+// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
+//
+EFI_STATUS
+EFIAPI
+NorFlashBlockIoFlushBlocks (
+  IN EFI_BLOCK_IO_PROTOCOL    *This
+);
+
+
+//
+// NorFlashFvbDxe.c
+//
+
+EFI_STATUS
+EFIAPI
+NorFlashFvbInitialize (
+  IN NOR_FLASH_INSTANCE*                            Instance
+  );
+
+EFI_STATUS
+EFIAPI
+FvbGetAttributes(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
+  OUT       EFI_FVB_ATTRIBUTES_2                    *Attributes
+  );
+
+EFI_STATUS
+EFIAPI
+FvbSetAttributes(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
+  IN OUT    EFI_FVB_ATTRIBUTES_2                    *Attributes
+  );
+
+EFI_STATUS
+EFIAPI
+FvbGetPhysicalAddress(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
+  OUT       EFI_PHYSICAL_ADDRESS                    *Address
+  );
+
+EFI_STATUS
+EFIAPI
+FvbGetBlockSize(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
+  IN        EFI_LBA                                 Lba,
+  OUT       UINTN                                   *BlockSize,
+  OUT       UINTN                                   *NumberOfBlocks
+  );
+
+EFI_STATUS
+EFIAPI
+FvbRead(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
+  IN        EFI_LBA                                 Lba,
+  IN        UINTN                                   Offset,
+  IN OUT    UINTN                                   *NumBytes,
+  IN OUT    UINT8                                   *Buffer
+  );
+
+EFI_STATUS
+EFIAPI
+FvbWrite(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
+  IN        EFI_LBA                                 Lba,
+  IN        UINTN                                   Offset,
+  IN OUT    UINTN                                   *NumBytes,
+  IN        UINT8                                   *Buffer
+  );
+
+EFI_STATUS
+EFIAPI
+FvbEraseBlocks(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL     *This,
+  ...
+  );
+
+//
+// NorFlashDxe.c
+//
+
+EFI_STATUS
+NorFlashUnlockAndEraseSingleBlock (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN UINTN                  BlockAddress
+  );
+
+EFI_STATUS
+NorFlashWriteSingleBlock (
+  IN NOR_FLASH_INSTANCE     *Instance,
+  IN EFI_LBA                Lba,
+  IN UINT32                 *DataBuffer,
+  IN UINT32                 BlockSizeInWords
+  );
+
+EFI_STATUS
+NorFlashWriteBlocks (
+  IN  NOR_FLASH_INSTANCE *Instance,
+  IN  EFI_LBA           Lba,
+  IN  UINTN             BufferSizeInBytes,
+  IN  VOID              *Buffer
+  );
+
+EFI_STATUS
+NorFlashReadBlocks (
+  IN NOR_FLASH_INSTANCE   *Instance,
+  IN EFI_LBA              Lba,
+  IN UINTN                BufferSizeInBytes,
+  OUT VOID                *Buffer
+  );
+
+EFI_STATUS
+NorFlashReset (
+  IN  NOR_FLASH_INSTANCE *Instance
+  );
+
+#endif /* __NOR_FLASH_DXE_H__ */
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
index d32f0f79dd..97c66008f6 100644
--- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -1,68 +1,68 @@
-#/** @file
-#  
-#  Component description file for NorFlashDxe module
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#  
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmVeNorFlashDxe
-  FILE_GUID                      = 93E34C7E-B50E-11DF-9223-2443DFD72085
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-  ENTRY_POINT                    = NorFlashInitialise
-
-[Sources.common]
-  NorFlashDxe.c
-  NorFlashFvbDxe.c
-  NorFlashBlockIoDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  IoLib
-  BaseLib
-  DebugLib
-  HobLib
-  NorFlashPlatformLib
-  UefiLib
-  UefiDriverEntryPoint
-  UefiBootServicesTableLib
-
-[Guids]
-  gEfiSystemNvDataFvGuid
-  gEfiVariableGuid
-
-[Protocols]
-  gEfiBlockIoProtocolGuid
-  gEfiDevicePathProtocolGuid
-  gEfiFirmwareVolumeBlockProtocolGuid
-  
-[Pcd.common]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
-  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
-  
-  gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked
-
-[Depex]
-  #
-  # NorFlashDxe must be loaded before VariableRuntimeDxe in case empty flash needs populating with default values
-  # 
-  BEFORE gVariableRuntimeDxeFileGuid 
+#/** @file
+#  
+#  Component description file for NorFlashDxe module
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#  
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmVeNorFlashDxe
+  FILE_GUID                      = 93E34C7E-B50E-11DF-9223-2443DFD72085
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = NorFlashInitialise
+
+[Sources.common]
+  NorFlashDxe.c
+  NorFlashFvbDxe.c
+  NorFlashBlockIoDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  IoLib
+  BaseLib
+  DebugLib
+  HobLib
+  NorFlashPlatformLib
+  UefiLib
+  UefiDriverEntryPoint
+  UefiBootServicesTableLib
+
+[Guids]
+  gEfiSystemNvDataFvGuid
+  gEfiVariableGuid
+
+[Protocols]
+  gEfiBlockIoProtocolGuid
+  gEfiDevicePathProtocolGuid
+  gEfiFirmwareVolumeBlockProtocolGuid
+  
+[Pcd.common]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+  
+  gArmPlatformTokenSpaceGuid.PcdNorFlashCheckBlockLocked
+
+[Depex]
+  #
+  # NorFlashDxe must be loaded before VariableRuntimeDxe in case empty flash needs populating with default values
+  # 
+  BEFORE gVariableRuntimeDxeFileGuid 
diff --git a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c
index 29de964829..0c138a5ab2 100644
--- a/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c
+++ b/ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashFvbDxe.c
@@ -1,812 +1,812 @@
-/*++ @file  NorFlashFvbDxe.c
-
- Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution.  The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- --*/
-
-#include <PiDxe.h>
-
-#include <Library/PcdLib.h>
-#include <Library/BaseLib.h>
-#include <Library/HobLib.h>
-#include <Library/UefiLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#include <Guid/VariableFormat.h>
-#include <Guid/SystemNvDataGuid.h>
-
-#include "NorFlashDxe.h"
-
-
-///
-/// The Firmware Volume Block Protocol is the low-level interface
-/// to a firmware volume. File-level access to a firmware volume
-/// should not be done using the Firmware Volume Block Protocol.
-/// Normal access to a firmware volume must use the Firmware
-/// Volume Protocol. Typically, only the file system driver that
-/// produces the Firmware Volume Protocol will bind to the
-/// Firmware Volume Block Protocol.
-///
-
-/**
-  Initialises the FV Header and Variable Store Header
-  to support variable operations.
-
-  @param[in]  Ptr - Location to initialise the headers
-
-**/
-EFI_STATUS
-InitializeFvAndVariableStoreHeaders (
-  IN NOR_FLASH_INSTANCE *Instance
-  )
-{
-  EFI_STATUS                          Status;
-  VOID*                               Headers;
-  UINTN                               HeadersLength;
-  EFI_FIRMWARE_VOLUME_HEADER          *FirmwareVolumeHeader;
-  VARIABLE_STORE_HEADER               *VariableStoreHeader;
-
-  if (!Instance->Initialized && Instance->Initialize) {
-    Instance->Initialize (Instance);
-  }
-
-  HeadersLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY) + sizeof(VARIABLE_STORE_HEADER);
-  Headers = AllocateZeroPool(HeadersLength);
-
-  // FirmwareVolumeHeader->FvLength is declared to have the Variable area AND the FTW working area AND the FTW Spare contiguous.
-  ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) + PcdGet32(PcdFlashNvStorageVariableSize) == PcdGet32(PcdFlashNvStorageFtwWorkingBase));
-  ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) == PcdGet32(PcdFlashNvStorageFtwSpareBase));
-
-  // Check if the size of the area is at least one block size
-  ASSERT((PcdGet32(PcdFlashNvStorageVariableSize) > 0) && (PcdGet32(PcdFlashNvStorageVariableSize) / Instance->Media.BlockSize > 0));
-  ASSERT((PcdGet32(PcdFlashNvStorageFtwWorkingSize) > 0) && (PcdGet32(PcdFlashNvStorageFtwWorkingSize) / Instance->Media.BlockSize > 0));
-  ASSERT((PcdGet32(PcdFlashNvStorageFtwSpareSize) > 0) && (PcdGet32(PcdFlashNvStorageFtwSpareSize) / Instance->Media.BlockSize > 0));
-
-  // Ensure the Variable area Base Addresses are aligned on a block size boundaries
-  ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) % Instance->Media.BlockSize == 0);
-  ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) % Instance->Media.BlockSize == 0);
-  ASSERT(PcdGet32(PcdFlashNvStorageFtwSpareBase) % Instance->Media.BlockSize == 0);
-
-  //
-  // EFI_FIRMWARE_VOLUME_HEADER
-  //
-  FirmwareVolumeHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Headers;
-  CopyGuid (&FirmwareVolumeHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid);
-  FirmwareVolumeHeader->FvLength =
-      PcdGet32(PcdFlashNvStorageVariableSize) +
-      PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
-      PcdGet32(PcdFlashNvStorageFtwSpareSize);
-  FirmwareVolumeHeader->Signature = EFI_FVH_SIGNATURE;
-  FirmwareVolumeHeader->Attributes = (EFI_FVB_ATTRIBUTES_2) (
-                                          EFI_FVB2_READ_ENABLED_CAP   | // Reads may be enabled
-                                          EFI_FVB2_READ_STATUS        | // Reads are currently enabled
-                                          EFI_FVB2_STICKY_WRITE       | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY
-                                          EFI_FVB2_MEMORY_MAPPED      | // It is memory mapped
-                                          EFI_FVB2_ERASE_POLARITY     | // After erasure all bits take this value (i.e. '1')
-                                          EFI_FVB2_WRITE_STATUS       | // Writes are currently enabled
-                                          EFI_FVB2_WRITE_ENABLED_CAP    // Writes may be enabled
-                                      );
-  FirmwareVolumeHeader->HeaderLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY);
-  FirmwareVolumeHeader->Revision = EFI_FVH_REVISION;
-  FirmwareVolumeHeader->BlockMap[0].NumBlocks = Instance->Media.LastBlock + 1;
-  FirmwareVolumeHeader->BlockMap[0].Length      = Instance->Media.BlockSize;
-  FirmwareVolumeHeader->BlockMap[1].NumBlocks = 0;
-  FirmwareVolumeHeader->BlockMap[1].Length      = 0;
-  FirmwareVolumeHeader->Checksum = CalculateCheckSum16 ((UINT16*)FirmwareVolumeHeader,FirmwareVolumeHeader->HeaderLength);
-
-  //
-  // VARIABLE_STORE_HEADER
-  //
-  VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINT32)Headers + FirmwareVolumeHeader->HeaderLength);
-  CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid);
-  VariableStoreHeader->Size = PcdGet32(PcdFlashNvStorageVariableSize) - FirmwareVolumeHeader->HeaderLength;
-  VariableStoreHeader->Format            = VARIABLE_STORE_FORMATTED;
-  VariableStoreHeader->State             = VARIABLE_STORE_HEALTHY;
-
-  // Install the combined super-header in the NorFlash
-  Status = FvbWrite (&Instance->FvbProtocol, 0, 0, &HeadersLength, Headers);
-
-  FreePool (Headers);
-  return Status;
-}
-
-/**
-  Check the integrity of firmware volume header.
-
-  @param[in] FwVolHeader - A pointer to a firmware volume header
-
-  @retval  EFI_SUCCESS   - The firmware volume is consistent
-  @retval  EFI_NOT_FOUND - The firmware volume has been corrupted.
-
-**/
-EFI_STATUS
-ValidateFvHeader (
-  IN  NOR_FLASH_INSTANCE *Instance
-  )
-{
-  UINT16                      Checksum;
-  EFI_FIRMWARE_VOLUME_HEADER  *FwVolHeader;
-  VARIABLE_STORE_HEADER       *VariableStoreHeader;
-  UINTN                       VariableStoreLength;
-  UINTN						  FvLength;
-
-  FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress;
-
-  FvLength = PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
-      PcdGet32(PcdFlashNvStorageFtwSpareSize);
-
-  //
-  // Verify the header revision, header signature, length
-  // Length of FvBlock cannot be 2**64-1
-  // HeaderLength cannot be an odd number
-  //
-  if (   (FwVolHeader->Revision  != EFI_FVH_REVISION)
-      || (FwVolHeader->Signature != EFI_FVH_SIGNATURE)
-      || (FwVolHeader->FvLength  != FvLength)
-      )
-  {
-    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: No Firmware Volume header present\n"));
-    return EFI_NOT_FOUND;
-  }
-
-  // Check the Firmware Volume Guid
-  if( CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid) == FALSE ) {
-    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Firmware Volume Guid non-compatible\n"));
-    return EFI_NOT_FOUND;
-  }
-
-  // Verify the header checksum
-  Checksum = CalculateSum16((UINT16*)FwVolHeader, FwVolHeader->HeaderLength);
-  if (Checksum != 0) {
-    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: FV checksum is invalid (Checksum:0x%X)\n",Checksum));
-    return EFI_NOT_FOUND;
-  }
-
-  VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINT32)FwVolHeader + FwVolHeader->HeaderLength);
-
-  // Check the Variable Store Guid
-  if( CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) == FALSE ) {
-    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Variable Store Guid non-compatible\n"));
-    return EFI_NOT_FOUND;
-  }
-
-  VariableStoreLength = PcdGet32 (PcdFlashNvStorageVariableSize) - FwVolHeader->HeaderLength;
-  if (VariableStoreHeader->Size != VariableStoreLength) {
-    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Variable Store Length does not match\n"));
-    return EFI_NOT_FOUND;
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
- The GetAttributes() function retrieves the attributes and
- current settings of the block.
-
- @param This         Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
-
- @param Attributes   Pointer to EFI_FVB_ATTRIBUTES_2 in which the attributes and
-                     current settings are returned.
-                     Type EFI_FVB_ATTRIBUTES_2 is defined in EFI_FIRMWARE_VOLUME_HEADER.
-
- @retval EFI_SUCCESS The firmware volume attributes were returned.
-
- **/
-EFI_STATUS
-EFIAPI
-FvbGetAttributes(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL    *This,
-  OUT       EFI_FVB_ATTRIBUTES_2                   *Attributes
-  )
-{
-  EFI_FVB_ATTRIBUTES_2  FlashFvbAttributes;
-  NOR_FLASH_INSTANCE *Instance;
-
-  Instance = INSTANCE_FROM_FVB_THIS(This);
-
-  FlashFvbAttributes = (EFI_FVB_ATTRIBUTES_2) (
-
-      EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled
-      EFI_FVB2_READ_STATUS      | // Reads are currently enabled
-      EFI_FVB2_STICKY_WRITE     | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY
-      EFI_FVB2_MEMORY_MAPPED    | // It is memory mapped
-      EFI_FVB2_ERASE_POLARITY     // After erasure all bits take this value (i.e. '1')
-
-      );
-
-  // Check if it is write protected
-  if (Instance->Media.ReadOnly != TRUE) {
-
-    FlashFvbAttributes = FlashFvbAttributes         |
-                         EFI_FVB2_WRITE_STATUS      | // Writes are currently enabled
-                         EFI_FVB2_WRITE_ENABLED_CAP;  // Writes may be enabled
-  }
-
-  *Attributes = FlashFvbAttributes;
-
-  DEBUG ((DEBUG_BLKIO, "FvbGetAttributes(0x%X)\n", *Attributes));
-
-  return EFI_SUCCESS;
-}
-
-/**
- The SetAttributes() function sets configurable firmware volume attributes
- and returns the new settings of the firmware volume.
-
-
- @param This                     Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
-
- @param Attributes               On input, Attributes is a pointer to EFI_FVB_ATTRIBUTES_2
-                                 that contains the desired firmware volume settings.
-                                 On successful return, it contains the new settings of
-                                 the firmware volume.
-                                 Type EFI_FVB_ATTRIBUTES_2 is defined in EFI_FIRMWARE_VOLUME_HEADER.
-
- @retval EFI_SUCCESS             The firmware volume attributes were returned.
-
- @retval EFI_INVALID_PARAMETER   The attributes requested are in conflict with the capabilities
-                                 as declared in the firmware volume header.
-
- **/
-EFI_STATUS
-EFIAPI
-FvbSetAttributes(
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
-  IN OUT    EFI_FVB_ATTRIBUTES_2                 *Attributes
-  )
-{
-  DEBUG ((DEBUG_BLKIO, "FvbSetAttributes(0x%X) is not supported\n",*Attributes));
-  return EFI_UNSUPPORTED;
-}
-
-/**
- The GetPhysicalAddress() function retrieves the base address of
- a memory-mapped firmware volume. This function should be called
- only for memory-mapped firmware volumes.
-
- @param This               Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
-
- @param Address            Pointer to a caller-allocated
-                           EFI_PHYSICAL_ADDRESS that, on successful
-                           return from GetPhysicalAddress(), contains the
-                           base address of the firmware volume.
-
- @retval EFI_SUCCESS       The firmware volume base address was returned.
-
- @retval EFI_NOT_SUPPORTED The firmware volume is not memory mapped.
-
- **/
-EFI_STATUS
-EFIAPI
-FvbGetPhysicalAddress (
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
-  OUT       EFI_PHYSICAL_ADDRESS                 *Address
-  )
-{
-  NOR_FLASH_INSTANCE *Instance;
-
-  Instance = INSTANCE_FROM_FVB_THIS(This);
-
-  DEBUG ((DEBUG_BLKIO, "FvbGetPhysicalAddress(BaseAddress=0x%08x)\n", Instance->RegionBaseAddress));
-
-  ASSERT(Address != NULL);
-
-  *Address = PcdGet32 (PcdFlashNvStorageVariableBase);
-  return EFI_SUCCESS;
-}
-
-/**
- The GetBlockSize() function retrieves the size of the requested
- block. It also returns the number of additional blocks with
- the identical size. The GetBlockSize() function is used to
- retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER).
-
-
- @param This                     Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
-
- @param Lba                      Indicates the block for which to return the size.
-
- @param BlockSize                Pointer to a caller-allocated UINTN in which
-                                 the size of the block is returned.
-
- @param NumberOfBlocks           Pointer to a caller-allocated UINTN in
-                                 which the number of consecutive blocks,
-                                 starting with Lba, is returned. All
-                                 blocks in this range have a size of
-                                 BlockSize.
-
-
- @retval EFI_SUCCESS             The firmware volume base address was returned.
-
- @retval EFI_INVALID_PARAMETER   The requested LBA is out of range.
-
- **/
-EFI_STATUS
-EFIAPI
-FvbGetBlockSize (
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
-  IN        EFI_LBA                              Lba,
-  OUT       UINTN                                *BlockSize,
-  OUT       UINTN                                *NumberOfBlocks
-  )
-{
-  EFI_STATUS Status;
-  NOR_FLASH_INSTANCE *Instance;
-
-  Instance = INSTANCE_FROM_FVB_THIS(This);
-
-  DEBUG ((DEBUG_BLKIO, "FvbGetBlockSize(Lba=%ld, BlockSize=0x%x, LastBlock=%ld)\n", Lba, Instance->Media.BlockSize, Instance->Media.LastBlock));
-
-  if (Lba > Instance->Media.LastBlock) {
-    DEBUG ((EFI_D_ERROR, "FvbGetBlockSize: ERROR - Parameter LBA %ld is beyond the last Lba (%ld).\n", Lba, Instance->Media.LastBlock));
-    Status = EFI_INVALID_PARAMETER;
-  } else {
-    // This is easy because in this platform each NorFlash device has equal sized blocks.
-    *BlockSize = (UINTN) Instance->Media.BlockSize;
-    *NumberOfBlocks = (UINTN) (Instance->Media.LastBlock - Lba + 1);
-
-    DEBUG ((DEBUG_BLKIO, "FvbGetBlockSize: *BlockSize=0x%x, *NumberOfBlocks=0x%x.\n", *BlockSize, *NumberOfBlocks));
-
-    Status = EFI_SUCCESS;
-  }
-
-  return Status;
-}
-
-/**
- Reads the specified number of bytes into a buffer from the specified block.
-
- The Read() function reads the requested number of bytes from the
- requested block and stores them in the provided buffer.
- Implementations should be mindful that the firmware volume
- might be in the ReadDisabled state. If it is in this state,
- the Read() function must return the status code
- EFI_ACCESS_DENIED without modifying the contents of the
- buffer. The Read() function must also prevent spanning block
- boundaries. If a read is requested that would span a block
- boundary, the read must read up to the boundary but not
- beyond. The output parameter NumBytes must be set to correctly
- indicate the number of bytes actually read. The caller must be
- aware that a read may be partially completed.
-
- @param This                 Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
-
- @param Lba                  The starting logical block index from which to read.
-
- @param Offset               Offset into the block at which to begin reading.
-
- @param NumBytes             Pointer to a UINTN.
-                             At entry, *NumBytes contains the total size of the buffer.
-                             At exit, *NumBytes contains the total number of bytes read.
-
- @param Buffer               Pointer to a caller-allocated buffer that will be used
-                             to hold the data that is read.
-
- @retval EFI_SUCCESS         The firmware volume was read successfully,  and contents are
-                             in Buffer.
-
- @retval EFI_BAD_BUFFER_SIZE Read attempted across an LBA boundary.
-                             On output, NumBytes contains the total number of bytes
-                             returned in Buffer.
-
- @retval EFI_ACCESS_DENIED   The firmware volume is in the ReadDisabled state.
-
- @retval EFI_DEVICE_ERROR    The block device is not functioning correctly and could not be read.
-
- **/
-EFI_STATUS
-EFIAPI
-FvbRead (
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL   *This,
-  IN        EFI_LBA                               Lba,
-  IN        UINTN                                 Offset,
-  IN OUT    UINTN                                 *NumBytes,
-  IN OUT    UINT8                                 *Buffer
-  )
-{
-  EFI_STATUS    Status;
-  EFI_STATUS    TempStatus;
-  UINTN         BlockSize;
-  UINT8         *BlockBuffer;
-  NOR_FLASH_INSTANCE *Instance;
-
-  Instance = INSTANCE_FROM_FVB_THIS(This);
-
-  DEBUG ((DEBUG_BLKIO, "FvbRead(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer));
-
-  if (!Instance->Initialized && Instance->Initialize) {
-    Instance->Initialize(Instance);
-  }
-
-  Status = EFI_SUCCESS;
-  TempStatus = Status;
-
-  // Cache the block size to avoid de-referencing pointers all the time
-  BlockSize = Instance->Media.BlockSize;
-
-  DEBUG ((DEBUG_BLKIO, "FvbRead: Check if (Offset=0x%x + NumBytes=0x%x) <= BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
-
-  // The read must not span block boundaries.
-  // We need to check each variable individually because adding two large values together overflows.
-  if ((Offset               >= BlockSize) ||
-      (*NumBytes            >  BlockSize) ||
-      ((Offset + *NumBytes) >  BlockSize)) {
-    DEBUG ((EFI_D_ERROR, "FvbRead: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // We must have some bytes to read
-  if (*NumBytes == 0) {
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // FixMe: Allow an arbitrary number of bytes to be read out, not just a multiple of block size.
-
-  // Allocate runtime memory to read in the NOR Flash data. Variable Services are runtime.
-  BlockBuffer = AllocateRuntimePool (BlockSize);
-
-  // Check if the memory allocation was successful
-  if (BlockBuffer == NULL) {
-    DEBUG ((EFI_D_ERROR, "FvbRead: ERROR - Could not allocate BlockBuffer @ 0x%08x.\n", BlockBuffer));
-    return EFI_DEVICE_ERROR;
-  }
-
-  // Read NOR Flash data into shadow buffer
-  TempStatus = NorFlashReadBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
-  if (EFI_ERROR (TempStatus)) {
-    // Return one of the pre-approved error statuses
-    Status = EFI_DEVICE_ERROR;
-    goto FREE_MEMORY;
-  }
-
-  // Put the data at the appropriate location inside the buffer area
-  DEBUG ((DEBUG_BLKIO, "FvbRead: CopyMem( Dst=0x%08x, Src=0x%08x, Size=0x%x ).\n", Buffer, BlockBuffer + Offset, *NumBytes));
-
-  CopyMem(Buffer, BlockBuffer + Offset, *NumBytes);
-
-FREE_MEMORY:
-  FreePool(BlockBuffer);
-  return Status;
-}
-
-/**
- Writes the specified number of bytes from the input buffer to the block.
-
- The Write() function writes the specified number of bytes from
- the provided buffer to the specified block and offset. If the
- firmware volume is sticky write, the caller must ensure that
- all the bits of the specified range to write are in the
- EFI_FVB_ERASE_POLARITY state before calling the Write()
- function, or else the result will be unpredictable. This
- unpredictability arises because, for a sticky-write firmware
- volume, a write may negate a bit in the EFI_FVB_ERASE_POLARITY
- state but cannot flip it back again.  Before calling the
- Write() function,  it is recommended for the caller to first call
- the EraseBlocks() function to erase the specified block to
- write. A block erase cycle will transition bits from the
- (NOT)EFI_FVB_ERASE_POLARITY state back to the
- EFI_FVB_ERASE_POLARITY state. Implementations should be
- mindful that the firmware volume might be in the WriteDisabled
- state. If it is in this state, the Write() function must
- return the status code EFI_ACCESS_DENIED without modifying the
- contents of the firmware volume. The Write() function must
- also prevent spanning block boundaries. If a write is
- requested that spans a block boundary, the write must store up
- to the boundary but not beyond. The output parameter NumBytes
- must be set to correctly indicate the number of bytes actually
- written. The caller must be aware that a write may be
- partially completed. All writes, partial or otherwise, must be
- fully flushed to the hardware before the Write() service
- returns.
-
- @param This                 Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
-
- @param Lba                  The starting logical block index to write to.
-
- @param Offset               Offset into the block at which to begin writing.
-
- @param NumBytes             The pointer to a UINTN.
-                             At entry, *NumBytes contains the total size of the buffer.
-                             At exit, *NumBytes contains the total number of bytes actually written.
-
- @param Buffer               The pointer to a caller-allocated buffer that contains the source for the write.
-
- @retval EFI_SUCCESS         The firmware volume was written successfully.
-
- @retval EFI_BAD_BUFFER_SIZE The write was attempted across an LBA boundary.
-                             On output, NumBytes contains the total number of bytes
-                             actually written.
-
- @retval EFI_ACCESS_DENIED   The firmware volume is in the WriteDisabled state.
-
- @retval EFI_DEVICE_ERROR    The block device is malfunctioning and could not be written.
-
-
- **/
-EFI_STATUS
-EFIAPI
-FvbWrite (
-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL   *This,
-  IN        EFI_LBA                               Lba,
-  IN        UINTN                                 Offset,
-  IN OUT    UINTN                                 *NumBytes,
-  IN        UINT8                                 *Buffer
-  )
-{
-  EFI_STATUS  Status;
-  EFI_STATUS  TempStatus;
-  UINTN       BlockSize;
-  UINT8       *BlockBuffer;
-  NOR_FLASH_INSTANCE *Instance;
-
-  Instance = INSTANCE_FROM_FVB_THIS(This);
-
-  if (!Instance->Initialized && Instance->Initialize) {
-    Instance->Initialize(Instance);
-  }
-
-  DEBUG ((DEBUG_BLKIO, "FvbWrite(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer));
-
-  Status = EFI_SUCCESS;
-  TempStatus = Status;
-
-  // Detect WriteDisabled state
-  if (Instance->Media.ReadOnly == TRUE) {
-    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - Can not write: Device is in WriteDisabled state.\n"));
-    // It is in WriteDisabled state, return an error right away
-    return EFI_ACCESS_DENIED;
-  }
-
-  // Cache the block size to avoid de-referencing pointers all the time
-  BlockSize = Instance->Media.BlockSize;
-
-  // The write must not span block boundaries.
-  // We need to check each variable individually because adding two large values together overflows.
-  if ( ( Offset               >= BlockSize ) ||
-       ( *NumBytes            >  BlockSize ) ||
-       ( (Offset + *NumBytes) >  BlockSize )    ) {
-    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // We must have some bytes to write
-  if (*NumBytes == 0) {
-    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
-    return EFI_BAD_BUFFER_SIZE;
-  }
-
-  // Allocate runtime memory to read in the NOR Flash data.
-  // Since the intention is to use this with Variable Services and since these are runtime,
-  // allocate the memory from the runtime pool.
-  BlockBuffer = AllocateRuntimePool (BlockSize);
-
-  // Check we did get some memory
-  if( BlockBuffer == NULL ) {
-    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - Can not allocate BlockBuffer @ 0x%08x.\n", BlockBuffer));
-    return EFI_DEVICE_ERROR;
-  }
-
-  // Read NOR Flash data into shadow buffer
-  TempStatus = NorFlashReadBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
-  if (EFI_ERROR (TempStatus)) {
-    // Return one of the pre-approved error statuses
-    Status = EFI_DEVICE_ERROR;
-    goto FREE_MEMORY;
-  }
-
-  // Put the data at the appropriate location inside the buffer area
-  CopyMem((BlockBuffer + Offset), Buffer, *NumBytes);
-
-  // Write the modified buffer back to the NorFlash
-  Status = NorFlashWriteBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
-  if (EFI_ERROR (TempStatus)) {
-    // Return one of the pre-approved error statuses
-    Status = EFI_DEVICE_ERROR;
-    goto FREE_MEMORY;
-  }
-
-FREE_MEMORY:
-  FreePool(BlockBuffer);
-  return Status;
-}
-
-/**
- Erases and initialises a firmware volume block.
-
- The EraseBlocks() function erases one or more blocks as denoted
- by the variable argument list. The entire parameter list of
- blocks must be verified before erasing any blocks. If a block is
- requested that does not exist within the associated firmware
- volume (it has a larger index than the last block of the
- firmware volume), the EraseBlocks() function must return the
- status code EFI_INVALID_PARAMETER without modifying the contents
- of the firmware volume. Implementations should be mindful that
- the firmware volume might be in the WriteDisabled state. If it
- is in this state, the EraseBlocks() function must return the
- status code EFI_ACCESS_DENIED without modifying the contents of
- the firmware volume. All calls to EraseBlocks() must be fully
- flushed to the hardware before the EraseBlocks() service
- returns.
-
- @param This                     Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
- instance.
-
- @param ...                      The variable argument list is a list of tuples.
-                                 Each tuple describes a range of LBAs to erase
-                                 and consists of the following:
-                                 - An EFI_LBA that indicates the starting LBA
-                                 - A UINTN that indicates the number of blocks to erase.
-
-                                 The list is terminated with an EFI_LBA_LIST_TERMINATOR.
-                                 For example, the following indicates that two ranges of blocks
-                                 (5-7 and 10-11) are to be erased:
-                                 EraseBlocks (This, 5, 3, 10, 2, EFI_LBA_LIST_TERMINATOR);
-
- @retval EFI_SUCCESS             The erase request successfully completed.
-
- @retval EFI_ACCESS_DENIED       The firmware volume is in the WriteDisabled state.
-
- @retval EFI_DEVICE_ERROR        The block device is not functioning correctly and could not be written.
-                                 The firmware device may have been partially erased.
-
- @retval EFI_INVALID_PARAMETER   One or more of the LBAs listed in the variable argument list do
-                                 not exist in the firmware volume.
-
- **/
-EFI_STATUS
-EFIAPI
-FvbEraseBlocks (
-  IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
-  ...
-  )
-{
-  EFI_STATUS  Status;
-  VA_LIST     Args;
-  UINTN       BlockAddress; // Physical address of Lba to erase
-  EFI_LBA     StartingLba; // Lba from which we start erasing
-  UINTN       NumOfLba; // Number of Lba blocks to erase
-  NOR_FLASH_INSTANCE *Instance;
-
-  Instance = INSTANCE_FROM_FVB_THIS(This);
-
-  DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks()\n"));
-
-  Status = EFI_SUCCESS;
-
-  // Detect WriteDisabled state
-  if (Instance->Media.ReadOnly == TRUE) {
-    // Firmware volume is in WriteDisabled state
-    DEBUG ((EFI_D_ERROR, "FvbEraseBlocks: ERROR - Device is in WriteDisabled state.\n"));
-    return EFI_ACCESS_DENIED;
-  }
-
-  // Before erasing, check the entire list of parameters to ensure all specified blocks are valid
-
-  VA_START (Args, This);
-  do {
-    // Get the Lba from which we start erasing
-    StartingLba = VA_ARG (Args, EFI_LBA);
-
-    // Have we reached the end of the list?
-    if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
-      //Exit the while loop
-      break;
-    }
-
-    // How many Lba blocks are we requested to erase?
-    NumOfLba = VA_ARG (Args, UINT32);
-
-    // All blocks must be within range
-    DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Check if: ( StartingLba=%ld + NumOfLba=%d - 1 ) > LastBlock=%ld.\n", Instance->StartLba + StartingLba, NumOfLba, Instance->Media.LastBlock));
-    if ((NumOfLba == 0) || ((Instance->StartLba + StartingLba + NumOfLba - 1) > Instance->Media.LastBlock)) {
-      VA_END (Args);
-      DEBUG ((EFI_D_ERROR, "FvbEraseBlocks: ERROR - Lba range goes past the last Lba.\n"));
-      Status = EFI_INVALID_PARAMETER;
-      goto EXIT;
-    }
-  } while (TRUE);
-  VA_END (Args);
-
-  //
-  // To get here, all must be ok, so start erasing
-  //
-  VA_START (Args, This);
-  do {
-    // Get the Lba from which we start erasing
-    StartingLba = VA_ARG (Args, EFI_LBA);
-
-    // Have we reached the end of the list?
-    if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
-      // Exit the while loop
-      break;
-    }
-
-    // How many Lba blocks are we requested to erase?
-    NumOfLba = VA_ARG (Args, UINT32);
-
-    // Go through each one and erase it
-    while (NumOfLba > 0) {
-
-      // Get the physical address of Lba to erase
-      BlockAddress = GET_NOR_BLOCK_ADDRESS (
-          Instance->RegionBaseAddress,
-          Instance->StartLba + StartingLba,
-          Instance->Media.BlockSize
-      );
-
-      // Erase it
-      DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Erasing Lba=%ld @ 0x%08x.\n", Instance->StartLba + StartingLba, BlockAddress));
-      Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
-      if (EFI_ERROR(Status)) {
-        VA_END (Args);
-        Status = EFI_DEVICE_ERROR;
-        goto EXIT;
-      }
-
-      // Move to the next Lba
-      StartingLba++;
-      NumOfLba--;
-    }
-  } while (TRUE);
-  VA_END (Args);
-
-EXIT:
-  return Status;
-}
-
-EFI_STATUS
-EFIAPI
-NorFlashFvbInitialize (
-  IN NOR_FLASH_INSTANCE* Instance
-  )
-{
-  EFI_STATUS  Status;
-  UINT32      FvbNumLba;
-  EFI_BOOT_MODE BootMode;
-
-  DEBUG((DEBUG_BLKIO,"NorFlashFvbInitialize\n"));
-
-  Instance->Initialized = TRUE;
-
-  // Set the index of the first LBA for the FVB
-  Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
-
-  BootMode = GetBootModeHob ();
-  if (BootMode == BOOT_WITH_DEFAULT_SETTINGS) {
-    Status = EFI_INVALID_PARAMETER;
-  } else {
-    // Determine if there is a valid header at the beginning of the NorFlash
-    Status = ValidateFvHeader (Instance);
-  }
-
-  // Install the Default FVB header if required  
-  if (EFI_ERROR(Status)) {
-    // There is no valid header, so time to install one.
-    DEBUG((EFI_D_ERROR,"NorFlashFvbInitialize: ERROR - The FVB Header is not valid. Installing a correct one for this volume.\n"));
-
-    // Erase all the NorFlash that is reserved for variable storage
-    FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) + PcdGet32(PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;
-
-    Status = FvbEraseBlocks (&Instance->FvbProtocol, (EFI_LBA)0, FvbNumLba, EFI_LBA_LIST_TERMINATOR);
-    if (EFI_ERROR(Status)) {
-      return Status;
-    }
-
-    // Install all appropriate headers
-    Status = InitializeFvAndVariableStoreHeaders (Instance);
-    if (EFI_ERROR(Status)) {
-      return Status;
-    }
-  }
-  return Status;
-}
+/*++ @file  NorFlashFvbDxe.c
+
+ Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution.  The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ --*/
+
+#include <PiDxe.h>
+
+#include <Library/PcdLib.h>
+#include <Library/BaseLib.h>
+#include <Library/HobLib.h>
+#include <Library/UefiLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#include <Guid/VariableFormat.h>
+#include <Guid/SystemNvDataGuid.h>
+
+#include "NorFlashDxe.h"
+
+
+///
+/// The Firmware Volume Block Protocol is the low-level interface
+/// to a firmware volume. File-level access to a firmware volume
+/// should not be done using the Firmware Volume Block Protocol.
+/// Normal access to a firmware volume must use the Firmware
+/// Volume Protocol. Typically, only the file system driver that
+/// produces the Firmware Volume Protocol will bind to the
+/// Firmware Volume Block Protocol.
+///
+
+/**
+  Initialises the FV Header and Variable Store Header
+  to support variable operations.
+
+  @param[in]  Ptr - Location to initialise the headers
+
+**/
+EFI_STATUS
+InitializeFvAndVariableStoreHeaders (
+  IN NOR_FLASH_INSTANCE *Instance
+  )
+{
+  EFI_STATUS                          Status;
+  VOID*                               Headers;
+  UINTN                               HeadersLength;
+  EFI_FIRMWARE_VOLUME_HEADER          *FirmwareVolumeHeader;
+  VARIABLE_STORE_HEADER               *VariableStoreHeader;
+
+  if (!Instance->Initialized && Instance->Initialize) {
+    Instance->Initialize (Instance);
+  }
+
+  HeadersLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY) + sizeof(VARIABLE_STORE_HEADER);
+  Headers = AllocateZeroPool(HeadersLength);
+
+  // FirmwareVolumeHeader->FvLength is declared to have the Variable area AND the FTW working area AND the FTW Spare contiguous.
+  ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) + PcdGet32(PcdFlashNvStorageVariableSize) == PcdGet32(PcdFlashNvStorageFtwWorkingBase));
+  ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) == PcdGet32(PcdFlashNvStorageFtwSpareBase));
+
+  // Check if the size of the area is at least one block size
+  ASSERT((PcdGet32(PcdFlashNvStorageVariableSize) > 0) && (PcdGet32(PcdFlashNvStorageVariableSize) / Instance->Media.BlockSize > 0));
+  ASSERT((PcdGet32(PcdFlashNvStorageFtwWorkingSize) > 0) && (PcdGet32(PcdFlashNvStorageFtwWorkingSize) / Instance->Media.BlockSize > 0));
+  ASSERT((PcdGet32(PcdFlashNvStorageFtwSpareSize) > 0) && (PcdGet32(PcdFlashNvStorageFtwSpareSize) / Instance->Media.BlockSize > 0));
+
+  // Ensure the Variable area Base Addresses are aligned on a block size boundaries
+  ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) % Instance->Media.BlockSize == 0);
+  ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) % Instance->Media.BlockSize == 0);
+  ASSERT(PcdGet32(PcdFlashNvStorageFtwSpareBase) % Instance->Media.BlockSize == 0);
+
+  //
+  // EFI_FIRMWARE_VOLUME_HEADER
+  //
+  FirmwareVolumeHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Headers;
+  CopyGuid (&FirmwareVolumeHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid);
+  FirmwareVolumeHeader->FvLength =
+      PcdGet32(PcdFlashNvStorageVariableSize) +
+      PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
+      PcdGet32(PcdFlashNvStorageFtwSpareSize);
+  FirmwareVolumeHeader->Signature = EFI_FVH_SIGNATURE;
+  FirmwareVolumeHeader->Attributes = (EFI_FVB_ATTRIBUTES_2) (
+                                          EFI_FVB2_READ_ENABLED_CAP   | // Reads may be enabled
+                                          EFI_FVB2_READ_STATUS        | // Reads are currently enabled
+                                          EFI_FVB2_STICKY_WRITE       | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY
+                                          EFI_FVB2_MEMORY_MAPPED      | // It is memory mapped
+                                          EFI_FVB2_ERASE_POLARITY     | // After erasure all bits take this value (i.e. '1')
+                                          EFI_FVB2_WRITE_STATUS       | // Writes are currently enabled
+                                          EFI_FVB2_WRITE_ENABLED_CAP    // Writes may be enabled
+                                      );
+  FirmwareVolumeHeader->HeaderLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY);
+  FirmwareVolumeHeader->Revision = EFI_FVH_REVISION;
+  FirmwareVolumeHeader->BlockMap[0].NumBlocks = Instance->Media.LastBlock + 1;
+  FirmwareVolumeHeader->BlockMap[0].Length      = Instance->Media.BlockSize;
+  FirmwareVolumeHeader->BlockMap[1].NumBlocks = 0;
+  FirmwareVolumeHeader->BlockMap[1].Length      = 0;
+  FirmwareVolumeHeader->Checksum = CalculateCheckSum16 ((UINT16*)FirmwareVolumeHeader,FirmwareVolumeHeader->HeaderLength);
+
+  //
+  // VARIABLE_STORE_HEADER
+  //
+  VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINT32)Headers + FirmwareVolumeHeader->HeaderLength);
+  CopyGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid);
+  VariableStoreHeader->Size = PcdGet32(PcdFlashNvStorageVariableSize) - FirmwareVolumeHeader->HeaderLength;
+  VariableStoreHeader->Format            = VARIABLE_STORE_FORMATTED;
+  VariableStoreHeader->State             = VARIABLE_STORE_HEALTHY;
+
+  // Install the combined super-header in the NorFlash
+  Status = FvbWrite (&Instance->FvbProtocol, 0, 0, &HeadersLength, Headers);
+
+  FreePool (Headers);
+  return Status;
+}
+
+/**
+  Check the integrity of firmware volume header.
+
+  @param[in] FwVolHeader - A pointer to a firmware volume header
+
+  @retval  EFI_SUCCESS   - The firmware volume is consistent
+  @retval  EFI_NOT_FOUND - The firmware volume has been corrupted.
+
+**/
+EFI_STATUS
+ValidateFvHeader (
+  IN  NOR_FLASH_INSTANCE *Instance
+  )
+{
+  UINT16                      Checksum;
+  EFI_FIRMWARE_VOLUME_HEADER  *FwVolHeader;
+  VARIABLE_STORE_HEADER       *VariableStoreHeader;
+  UINTN                       VariableStoreLength;
+  UINTN						  FvLength;
+
+  FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER*)Instance->RegionBaseAddress;
+
+  FvLength = PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) +
+      PcdGet32(PcdFlashNvStorageFtwSpareSize);
+
+  //
+  // Verify the header revision, header signature, length
+  // Length of FvBlock cannot be 2**64-1
+  // HeaderLength cannot be an odd number
+  //
+  if (   (FwVolHeader->Revision  != EFI_FVH_REVISION)
+      || (FwVolHeader->Signature != EFI_FVH_SIGNATURE)
+      || (FwVolHeader->FvLength  != FvLength)
+      )
+  {
+    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: No Firmware Volume header present\n"));
+    return EFI_NOT_FOUND;
+  }
+
+  // Check the Firmware Volume Guid
+  if( CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid) == FALSE ) {
+    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Firmware Volume Guid non-compatible\n"));
+    return EFI_NOT_FOUND;
+  }
+
+  // Verify the header checksum
+  Checksum = CalculateSum16((UINT16*)FwVolHeader, FwVolHeader->HeaderLength);
+  if (Checksum != 0) {
+    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: FV checksum is invalid (Checksum:0x%X)\n",Checksum));
+    return EFI_NOT_FOUND;
+  }
+
+  VariableStoreHeader = (VARIABLE_STORE_HEADER*)((UINT32)FwVolHeader + FwVolHeader->HeaderLength);
+
+  // Check the Variable Store Guid
+  if( CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) == FALSE ) {
+    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Variable Store Guid non-compatible\n"));
+    return EFI_NOT_FOUND;
+  }
+
+  VariableStoreLength = PcdGet32 (PcdFlashNvStorageVariableSize) - FwVolHeader->HeaderLength;
+  if (VariableStoreHeader->Size != VariableStoreLength) {
+    DEBUG ((EFI_D_ERROR, "ValidateFvHeader: Variable Store Length does not match\n"));
+    return EFI_NOT_FOUND;
+  }
+
+  return EFI_SUCCESS;
+}
+
+/**
+ The GetAttributes() function retrieves the attributes and
+ current settings of the block.
+
+ @param This         Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
+
+ @param Attributes   Pointer to EFI_FVB_ATTRIBUTES_2 in which the attributes and
+                     current settings are returned.
+                     Type EFI_FVB_ATTRIBUTES_2 is defined in EFI_FIRMWARE_VOLUME_HEADER.
+
+ @retval EFI_SUCCESS The firmware volume attributes were returned.
+
+ **/
+EFI_STATUS
+EFIAPI
+FvbGetAttributes(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL    *This,
+  OUT       EFI_FVB_ATTRIBUTES_2                   *Attributes
+  )
+{
+  EFI_FVB_ATTRIBUTES_2  FlashFvbAttributes;
+  NOR_FLASH_INSTANCE *Instance;
+
+  Instance = INSTANCE_FROM_FVB_THIS(This);
+
+  FlashFvbAttributes = (EFI_FVB_ATTRIBUTES_2) (
+
+      EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled
+      EFI_FVB2_READ_STATUS      | // Reads are currently enabled
+      EFI_FVB2_STICKY_WRITE     | // A block erase is required to flip bits into EFI_FVB2_ERASE_POLARITY
+      EFI_FVB2_MEMORY_MAPPED    | // It is memory mapped
+      EFI_FVB2_ERASE_POLARITY     // After erasure all bits take this value (i.e. '1')
+
+      );
+
+  // Check if it is write protected
+  if (Instance->Media.ReadOnly != TRUE) {
+
+    FlashFvbAttributes = FlashFvbAttributes         |
+                         EFI_FVB2_WRITE_STATUS      | // Writes are currently enabled
+                         EFI_FVB2_WRITE_ENABLED_CAP;  // Writes may be enabled
+  }
+
+  *Attributes = FlashFvbAttributes;
+
+  DEBUG ((DEBUG_BLKIO, "FvbGetAttributes(0x%X)\n", *Attributes));
+
+  return EFI_SUCCESS;
+}
+
+/**
+ The SetAttributes() function sets configurable firmware volume attributes
+ and returns the new settings of the firmware volume.
+
+
+ @param This                     Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
+
+ @param Attributes               On input, Attributes is a pointer to EFI_FVB_ATTRIBUTES_2
+                                 that contains the desired firmware volume settings.
+                                 On successful return, it contains the new settings of
+                                 the firmware volume.
+                                 Type EFI_FVB_ATTRIBUTES_2 is defined in EFI_FIRMWARE_VOLUME_HEADER.
+
+ @retval EFI_SUCCESS             The firmware volume attributes were returned.
+
+ @retval EFI_INVALID_PARAMETER   The attributes requested are in conflict with the capabilities
+                                 as declared in the firmware volume header.
+
+ **/
+EFI_STATUS
+EFIAPI
+FvbSetAttributes(
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
+  IN OUT    EFI_FVB_ATTRIBUTES_2                 *Attributes
+  )
+{
+  DEBUG ((DEBUG_BLKIO, "FvbSetAttributes(0x%X) is not supported\n",*Attributes));
+  return EFI_UNSUPPORTED;
+}
+
+/**
+ The GetPhysicalAddress() function retrieves the base address of
+ a memory-mapped firmware volume. This function should be called
+ only for memory-mapped firmware volumes.
+
+ @param This               Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
+
+ @param Address            Pointer to a caller-allocated
+                           EFI_PHYSICAL_ADDRESS that, on successful
+                           return from GetPhysicalAddress(), contains the
+                           base address of the firmware volume.
+
+ @retval EFI_SUCCESS       The firmware volume base address was returned.
+
+ @retval EFI_NOT_SUPPORTED The firmware volume is not memory mapped.
+
+ **/
+EFI_STATUS
+EFIAPI
+FvbGetPhysicalAddress (
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
+  OUT       EFI_PHYSICAL_ADDRESS                 *Address
+  )
+{
+  NOR_FLASH_INSTANCE *Instance;
+
+  Instance = INSTANCE_FROM_FVB_THIS(This);
+
+  DEBUG ((DEBUG_BLKIO, "FvbGetPhysicalAddress(BaseAddress=0x%08x)\n", Instance->RegionBaseAddress));
+
+  ASSERT(Address != NULL);
+
+  *Address = PcdGet32 (PcdFlashNvStorageVariableBase);
+  return EFI_SUCCESS;
+}
+
+/**
+ The GetBlockSize() function retrieves the size of the requested
+ block. It also returns the number of additional blocks with
+ the identical size. The GetBlockSize() function is used to
+ retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER).
+
+
+ @param This                     Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
+
+ @param Lba                      Indicates the block for which to return the size.
+
+ @param BlockSize                Pointer to a caller-allocated UINTN in which
+                                 the size of the block is returned.
+
+ @param NumberOfBlocks           Pointer to a caller-allocated UINTN in
+                                 which the number of consecutive blocks,
+                                 starting with Lba, is returned. All
+                                 blocks in this range have a size of
+                                 BlockSize.
+
+
+ @retval EFI_SUCCESS             The firmware volume base address was returned.
+
+ @retval EFI_INVALID_PARAMETER   The requested LBA is out of range.
+
+ **/
+EFI_STATUS
+EFIAPI
+FvbGetBlockSize (
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,
+  IN        EFI_LBA                              Lba,
+  OUT       UINTN                                *BlockSize,
+  OUT       UINTN                                *NumberOfBlocks
+  )
+{
+  EFI_STATUS Status;
+  NOR_FLASH_INSTANCE *Instance;
+
+  Instance = INSTANCE_FROM_FVB_THIS(This);
+
+  DEBUG ((DEBUG_BLKIO, "FvbGetBlockSize(Lba=%ld, BlockSize=0x%x, LastBlock=%ld)\n", Lba, Instance->Media.BlockSize, Instance->Media.LastBlock));
+
+  if (Lba > Instance->Media.LastBlock) {
+    DEBUG ((EFI_D_ERROR, "FvbGetBlockSize: ERROR - Parameter LBA %ld is beyond the last Lba (%ld).\n", Lba, Instance->Media.LastBlock));
+    Status = EFI_INVALID_PARAMETER;
+  } else {
+    // This is easy because in this platform each NorFlash device has equal sized blocks.
+    *BlockSize = (UINTN) Instance->Media.BlockSize;
+    *NumberOfBlocks = (UINTN) (Instance->Media.LastBlock - Lba + 1);
+
+    DEBUG ((DEBUG_BLKIO, "FvbGetBlockSize: *BlockSize=0x%x, *NumberOfBlocks=0x%x.\n", *BlockSize, *NumberOfBlocks));
+
+    Status = EFI_SUCCESS;
+  }
+
+  return Status;
+}
+
+/**
+ Reads the specified number of bytes into a buffer from the specified block.
+
+ The Read() function reads the requested number of bytes from the
+ requested block and stores them in the provided buffer.
+ Implementations should be mindful that the firmware volume
+ might be in the ReadDisabled state. If it is in this state,
+ the Read() function must return the status code
+ EFI_ACCESS_DENIED without modifying the contents of the
+ buffer. The Read() function must also prevent spanning block
+ boundaries. If a read is requested that would span a block
+ boundary, the read must read up to the boundary but not
+ beyond. The output parameter NumBytes must be set to correctly
+ indicate the number of bytes actually read. The caller must be
+ aware that a read may be partially completed.
+
+ @param This                 Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
+
+ @param Lba                  The starting logical block index from which to read.
+
+ @param Offset               Offset into the block at which to begin reading.
+
+ @param NumBytes             Pointer to a UINTN.
+                             At entry, *NumBytes contains the total size of the buffer.
+                             At exit, *NumBytes contains the total number of bytes read.
+
+ @param Buffer               Pointer to a caller-allocated buffer that will be used
+                             to hold the data that is read.
+
+ @retval EFI_SUCCESS         The firmware volume was read successfully,  and contents are
+                             in Buffer.
+
+ @retval EFI_BAD_BUFFER_SIZE Read attempted across an LBA boundary.
+                             On output, NumBytes contains the total number of bytes
+                             returned in Buffer.
+
+ @retval EFI_ACCESS_DENIED   The firmware volume is in the ReadDisabled state.
+
+ @retval EFI_DEVICE_ERROR    The block device is not functioning correctly and could not be read.
+
+ **/
+EFI_STATUS
+EFIAPI
+FvbRead (
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL   *This,
+  IN        EFI_LBA                               Lba,
+  IN        UINTN                                 Offset,
+  IN OUT    UINTN                                 *NumBytes,
+  IN OUT    UINT8                                 *Buffer
+  )
+{
+  EFI_STATUS    Status;
+  EFI_STATUS    TempStatus;
+  UINTN         BlockSize;
+  UINT8         *BlockBuffer;
+  NOR_FLASH_INSTANCE *Instance;
+
+  Instance = INSTANCE_FROM_FVB_THIS(This);
+
+  DEBUG ((DEBUG_BLKIO, "FvbRead(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer));
+
+  if (!Instance->Initialized && Instance->Initialize) {
+    Instance->Initialize(Instance);
+  }
+
+  Status = EFI_SUCCESS;
+  TempStatus = Status;
+
+  // Cache the block size to avoid de-referencing pointers all the time
+  BlockSize = Instance->Media.BlockSize;
+
+  DEBUG ((DEBUG_BLKIO, "FvbRead: Check if (Offset=0x%x + NumBytes=0x%x) <= BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
+
+  // The read must not span block boundaries.
+  // We need to check each variable individually because adding two large values together overflows.
+  if ((Offset               >= BlockSize) ||
+      (*NumBytes            >  BlockSize) ||
+      ((Offset + *NumBytes) >  BlockSize)) {
+    DEBUG ((EFI_D_ERROR, "FvbRead: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // We must have some bytes to read
+  if (*NumBytes == 0) {
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // FixMe: Allow an arbitrary number of bytes to be read out, not just a multiple of block size.
+
+  // Allocate runtime memory to read in the NOR Flash data. Variable Services are runtime.
+  BlockBuffer = AllocateRuntimePool (BlockSize);
+
+  // Check if the memory allocation was successful
+  if (BlockBuffer == NULL) {
+    DEBUG ((EFI_D_ERROR, "FvbRead: ERROR - Could not allocate BlockBuffer @ 0x%08x.\n", BlockBuffer));
+    return EFI_DEVICE_ERROR;
+  }
+
+  // Read NOR Flash data into shadow buffer
+  TempStatus = NorFlashReadBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
+  if (EFI_ERROR (TempStatus)) {
+    // Return one of the pre-approved error statuses
+    Status = EFI_DEVICE_ERROR;
+    goto FREE_MEMORY;
+  }
+
+  // Put the data at the appropriate location inside the buffer area
+  DEBUG ((DEBUG_BLKIO, "FvbRead: CopyMem( Dst=0x%08x, Src=0x%08x, Size=0x%x ).\n", Buffer, BlockBuffer + Offset, *NumBytes));
+
+  CopyMem(Buffer, BlockBuffer + Offset, *NumBytes);
+
+FREE_MEMORY:
+  FreePool(BlockBuffer);
+  return Status;
+}
+
+/**
+ Writes the specified number of bytes from the input buffer to the block.
+
+ The Write() function writes the specified number of bytes from
+ the provided buffer to the specified block and offset. If the
+ firmware volume is sticky write, the caller must ensure that
+ all the bits of the specified range to write are in the
+ EFI_FVB_ERASE_POLARITY state before calling the Write()
+ function, or else the result will be unpredictable. This
+ unpredictability arises because, for a sticky-write firmware
+ volume, a write may negate a bit in the EFI_FVB_ERASE_POLARITY
+ state but cannot flip it back again.  Before calling the
+ Write() function,  it is recommended for the caller to first call
+ the EraseBlocks() function to erase the specified block to
+ write. A block erase cycle will transition bits from the
+ (NOT)EFI_FVB_ERASE_POLARITY state back to the
+ EFI_FVB_ERASE_POLARITY state. Implementations should be
+ mindful that the firmware volume might be in the WriteDisabled
+ state. If it is in this state, the Write() function must
+ return the status code EFI_ACCESS_DENIED without modifying the
+ contents of the firmware volume. The Write() function must
+ also prevent spanning block boundaries. If a write is
+ requested that spans a block boundary, the write must store up
+ to the boundary but not beyond. The output parameter NumBytes
+ must be set to correctly indicate the number of bytes actually
+ written. The caller must be aware that a write may be
+ partially completed. All writes, partial or otherwise, must be
+ fully flushed to the hardware before the Write() service
+ returns.
+
+ @param This                 Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance.
+
+ @param Lba                  The starting logical block index to write to.
+
+ @param Offset               Offset into the block at which to begin writing.
+
+ @param NumBytes             The pointer to a UINTN.
+                             At entry, *NumBytes contains the total size of the buffer.
+                             At exit, *NumBytes contains the total number of bytes actually written.
+
+ @param Buffer               The pointer to a caller-allocated buffer that contains the source for the write.
+
+ @retval EFI_SUCCESS         The firmware volume was written successfully.
+
+ @retval EFI_BAD_BUFFER_SIZE The write was attempted across an LBA boundary.
+                             On output, NumBytes contains the total number of bytes
+                             actually written.
+
+ @retval EFI_ACCESS_DENIED   The firmware volume is in the WriteDisabled state.
+
+ @retval EFI_DEVICE_ERROR    The block device is malfunctioning and could not be written.
+
+
+ **/
+EFI_STATUS
+EFIAPI
+FvbWrite (
+  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL   *This,
+  IN        EFI_LBA                               Lba,
+  IN        UINTN                                 Offset,
+  IN OUT    UINTN                                 *NumBytes,
+  IN        UINT8                                 *Buffer
+  )
+{
+  EFI_STATUS  Status;
+  EFI_STATUS  TempStatus;
+  UINTN       BlockSize;
+  UINT8       *BlockBuffer;
+  NOR_FLASH_INSTANCE *Instance;
+
+  Instance = INSTANCE_FROM_FVB_THIS(This);
+
+  if (!Instance->Initialized && Instance->Initialize) {
+    Instance->Initialize(Instance);
+  }
+
+  DEBUG ((DEBUG_BLKIO, "FvbWrite(Parameters: Lba=%ld, Offset=0x%x, *NumBytes=0x%x, Buffer @ 0x%08x)\n", Instance->StartLba + Lba, Offset, *NumBytes, Buffer));
+
+  Status = EFI_SUCCESS;
+  TempStatus = Status;
+
+  // Detect WriteDisabled state
+  if (Instance->Media.ReadOnly == TRUE) {
+    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - Can not write: Device is in WriteDisabled state.\n"));
+    // It is in WriteDisabled state, return an error right away
+    return EFI_ACCESS_DENIED;
+  }
+
+  // Cache the block size to avoid de-referencing pointers all the time
+  BlockSize = Instance->Media.BlockSize;
+
+  // The write must not span block boundaries.
+  // We need to check each variable individually because adding two large values together overflows.
+  if ( ( Offset               >= BlockSize ) ||
+       ( *NumBytes            >  BlockSize ) ||
+       ( (Offset + *NumBytes) >  BlockSize )    ) {
+    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // We must have some bytes to write
+  if (*NumBytes == 0) {
+    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - EFI_BAD_BUFFER_SIZE: (Offset=0x%x + NumBytes=0x%x) > BlockSize=0x%x\n", Offset, *NumBytes, BlockSize ));
+    return EFI_BAD_BUFFER_SIZE;
+  }
+
+  // Allocate runtime memory to read in the NOR Flash data.
+  // Since the intention is to use this with Variable Services and since these are runtime,
+  // allocate the memory from the runtime pool.
+  BlockBuffer = AllocateRuntimePool (BlockSize);
+
+  // Check we did get some memory
+  if( BlockBuffer == NULL ) {
+    DEBUG ((EFI_D_ERROR, "FvbWrite: ERROR - Can not allocate BlockBuffer @ 0x%08x.\n", BlockBuffer));
+    return EFI_DEVICE_ERROR;
+  }
+
+  // Read NOR Flash data into shadow buffer
+  TempStatus = NorFlashReadBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
+  if (EFI_ERROR (TempStatus)) {
+    // Return one of the pre-approved error statuses
+    Status = EFI_DEVICE_ERROR;
+    goto FREE_MEMORY;
+  }
+
+  // Put the data at the appropriate location inside the buffer area
+  CopyMem((BlockBuffer + Offset), Buffer, *NumBytes);
+
+  // Write the modified buffer back to the NorFlash
+  Status = NorFlashWriteBlocks (Instance, Instance->StartLba + Lba, BlockSize, BlockBuffer);
+  if (EFI_ERROR (TempStatus)) {
+    // Return one of the pre-approved error statuses
+    Status = EFI_DEVICE_ERROR;
+    goto FREE_MEMORY;
+  }
+
+FREE_MEMORY:
+  FreePool(BlockBuffer);
+  return Status;
+}
+
+/**
+ Erases and initialises a firmware volume block.
+
+ The EraseBlocks() function erases one or more blocks as denoted
+ by the variable argument list. The entire parameter list of
+ blocks must be verified before erasing any blocks. If a block is
+ requested that does not exist within the associated firmware
+ volume (it has a larger index than the last block of the
+ firmware volume), the EraseBlocks() function must return the
+ status code EFI_INVALID_PARAMETER without modifying the contents
+ of the firmware volume. Implementations should be mindful that
+ the firmware volume might be in the WriteDisabled state. If it
+ is in this state, the EraseBlocks() function must return the
+ status code EFI_ACCESS_DENIED without modifying the contents of
+ the firmware volume. All calls to EraseBlocks() must be fully
+ flushed to the hardware before the EraseBlocks() service
+ returns.
+
+ @param This                     Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
+ instance.
+
+ @param ...                      The variable argument list is a list of tuples.
+                                 Each tuple describes a range of LBAs to erase
+                                 and consists of the following:
+                                 - An EFI_LBA that indicates the starting LBA
+                                 - A UINTN that indicates the number of blocks to erase.
+
+                                 The list is terminated with an EFI_LBA_LIST_TERMINATOR.
+                                 For example, the following indicates that two ranges of blocks
+                                 (5-7 and 10-11) are to be erased:
+                                 EraseBlocks (This, 5, 3, 10, 2, EFI_LBA_LIST_TERMINATOR);
+
+ @retval EFI_SUCCESS             The erase request successfully completed.
+
+ @retval EFI_ACCESS_DENIED       The firmware volume is in the WriteDisabled state.
+
+ @retval EFI_DEVICE_ERROR        The block device is not functioning correctly and could not be written.
+                                 The firmware device may have been partially erased.
+
+ @retval EFI_INVALID_PARAMETER   One or more of the LBAs listed in the variable argument list do
+                                 not exist in the firmware volume.
+
+ **/
+EFI_STATUS
+EFIAPI
+FvbEraseBlocks (
+  IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,
+  ...
+  )
+{
+  EFI_STATUS  Status;
+  VA_LIST     Args;
+  UINTN       BlockAddress; // Physical address of Lba to erase
+  EFI_LBA     StartingLba; // Lba from which we start erasing
+  UINTN       NumOfLba; // Number of Lba blocks to erase
+  NOR_FLASH_INSTANCE *Instance;
+
+  Instance = INSTANCE_FROM_FVB_THIS(This);
+
+  DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks()\n"));
+
+  Status = EFI_SUCCESS;
+
+  // Detect WriteDisabled state
+  if (Instance->Media.ReadOnly == TRUE) {
+    // Firmware volume is in WriteDisabled state
+    DEBUG ((EFI_D_ERROR, "FvbEraseBlocks: ERROR - Device is in WriteDisabled state.\n"));
+    return EFI_ACCESS_DENIED;
+  }
+
+  // Before erasing, check the entire list of parameters to ensure all specified blocks are valid
+
+  VA_START (Args, This);
+  do {
+    // Get the Lba from which we start erasing
+    StartingLba = VA_ARG (Args, EFI_LBA);
+
+    // Have we reached the end of the list?
+    if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
+      //Exit the while loop
+      break;
+    }
+
+    // How many Lba blocks are we requested to erase?
+    NumOfLba = VA_ARG (Args, UINT32);
+
+    // All blocks must be within range
+    DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Check if: ( StartingLba=%ld + NumOfLba=%d - 1 ) > LastBlock=%ld.\n", Instance->StartLba + StartingLba, NumOfLba, Instance->Media.LastBlock));
+    if ((NumOfLba == 0) || ((Instance->StartLba + StartingLba + NumOfLba - 1) > Instance->Media.LastBlock)) {
+      VA_END (Args);
+      DEBUG ((EFI_D_ERROR, "FvbEraseBlocks: ERROR - Lba range goes past the last Lba.\n"));
+      Status = EFI_INVALID_PARAMETER;
+      goto EXIT;
+    }
+  } while (TRUE);
+  VA_END (Args);
+
+  //
+  // To get here, all must be ok, so start erasing
+  //
+  VA_START (Args, This);
+  do {
+    // Get the Lba from which we start erasing
+    StartingLba = VA_ARG (Args, EFI_LBA);
+
+    // Have we reached the end of the list?
+    if (StartingLba == EFI_LBA_LIST_TERMINATOR) {
+      // Exit the while loop
+      break;
+    }
+
+    // How many Lba blocks are we requested to erase?
+    NumOfLba = VA_ARG (Args, UINT32);
+
+    // Go through each one and erase it
+    while (NumOfLba > 0) {
+
+      // Get the physical address of Lba to erase
+      BlockAddress = GET_NOR_BLOCK_ADDRESS (
+          Instance->RegionBaseAddress,
+          Instance->StartLba + StartingLba,
+          Instance->Media.BlockSize
+      );
+
+      // Erase it
+      DEBUG ((DEBUG_BLKIO, "FvbEraseBlocks: Erasing Lba=%ld @ 0x%08x.\n", Instance->StartLba + StartingLba, BlockAddress));
+      Status = NorFlashUnlockAndEraseSingleBlock (Instance, BlockAddress);
+      if (EFI_ERROR(Status)) {
+        VA_END (Args);
+        Status = EFI_DEVICE_ERROR;
+        goto EXIT;
+      }
+
+      // Move to the next Lba
+      StartingLba++;
+      NumOfLba--;
+    }
+  } while (TRUE);
+  VA_END (Args);
+
+EXIT:
+  return Status;
+}
+
+EFI_STATUS
+EFIAPI
+NorFlashFvbInitialize (
+  IN NOR_FLASH_INSTANCE* Instance
+  )
+{
+  EFI_STATUS  Status;
+  UINT32      FvbNumLba;
+  EFI_BOOT_MODE BootMode;
+
+  DEBUG((DEBUG_BLKIO,"NorFlashFvbInitialize\n"));
+
+  Instance->Initialized = TRUE;
+
+  // Set the index of the first LBA for the FVB
+  Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
+
+  BootMode = GetBootModeHob ();
+  if (BootMode == BOOT_WITH_DEFAULT_SETTINGS) {
+    Status = EFI_INVALID_PARAMETER;
+  } else {
+    // Determine if there is a valid header at the beginning of the NorFlash
+    Status = ValidateFvHeader (Instance);
+  }
+
+  // Install the Default FVB header if required  
+  if (EFI_ERROR(Status)) {
+    // There is no valid header, so time to install one.
+    DEBUG((EFI_D_ERROR,"NorFlashFvbInitialize: ERROR - The FVB Header is not valid. Installing a correct one for this volume.\n"));
+
+    // Erase all the NorFlash that is reserved for variable storage
+    FvbNumLba = (PcdGet32(PcdFlashNvStorageVariableSize) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) + PcdGet32(PcdFlashNvStorageFtwSpareSize)) / Instance->Media.BlockSize;
+
+    Status = FvbEraseBlocks (&Instance->FvbProtocol, (EFI_LBA)0, FvbNumLba, EFI_LBA_LIST_TERMINATOR);
+    if (EFI_ERROR(Status)) {
+      return Status;
+    }
+
+    // Install all appropriate headers
+    Status = InitializeFvAndVariableStoreHeaders (Instance);
+    if (EFI_ERROR(Status)) {
+      return Status;
+    }
+  }
+  return Status;
+}
diff --git a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
index cb811d89d6..ff05662b88 100644
--- a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
+++ b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
@@ -1,344 +1,344 @@
-/** @file
-*
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-
-#include <Protocol/EmbeddedGpio.h>
-#include <Drivers/PL061Gpio.h>
-
-BOOLEAN     mPL061Initialized = FALSE;
-
-/**
-  Function implementations
-**/
-
-EFI_STATUS
-PL061Identify (
-  VOID
-  )
-{
-  // Check if this is a PrimeCell Peripheral
-  if (    (MmioRead8 (PL061_GPIO_PCELL_ID0) != 0x0D)
-      ||  (MmioRead8 (PL061_GPIO_PCELL_ID1) != 0xF0)
-      ||  (MmioRead8 (PL061_GPIO_PCELL_ID2) != 0x05)
-      ||  (MmioRead8 (PL061_GPIO_PCELL_ID3) != 0xB1)) {
-    return EFI_NOT_FOUND;
-  }
-
-  // Check if this PrimeCell Peripheral is the PL061 GPIO
-  if (    (MmioRead8 (PL061_GPIO_PERIPH_ID0) != 0x61)
-      ||  (MmioRead8 (PL061_GPIO_PERIPH_ID1) != 0x10)
-      ||  ((MmioRead8 (PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04)
-      ||  (MmioRead8 (PL061_GPIO_PERIPH_ID3) != 0x00)) {
-    return EFI_NOT_FOUND;
-  }
-
-  return EFI_SUCCESS;
-}
-
-EFI_STATUS
-PL061Initialize (
-  VOID
-  )
-{
-  EFI_STATUS  Status;
-
-  // Check if the PL061 GPIO module exists on board
-  Status = PL061Identify();
-  if (EFI_ERROR (Status)) {
-    Status = EFI_DEVICE_ERROR;
-    goto EXIT;
-  }
-
-  // Do other hardware initialisation things here as required
-
-  // Disable Interrupts
-  //if (MmioRead8 (PL061_GPIO_IE_REG) != 0) {
-  //   // Ensure interrupts are disabled
-  //}
-
-  mPL061Initialized = TRUE;
-
-  EXIT:
-  return Status;
-}
-
-/**
-
-Routine Description:
-
-  Gets the state of a GPIO pin
-
-Arguments:
-
-  This  - pointer to protocol
-  Gpio  - which pin to read
-  Value - state of the pin
-
-Returns:
-
-  EFI_SUCCESS           - GPIO state returned in Value
-  EFI_INVALID_PARAMETER - Value is NULL pointer or Gpio pin is out of range
-**/
-EFI_STATUS
-EFIAPI
-Get (
-  IN  EMBEDDED_GPIO     *This,
-  IN  EMBEDDED_GPIO_PIN Gpio,
-  OUT UINTN             *Value
-  )
-{
-  EFI_STATUS    Status = EFI_SUCCESS;
-
-  if (    (Value == NULL)
-      ||  (Gpio > LAST_GPIO_PIN))
-  {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  // Initialize the hardware if not already done
-  if (!mPL061Initialized) {
-    Status = PL061Initialize();
-    if (EFI_ERROR(Status)) {
-      goto EXIT;
-    }
-  }
-
-  if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
-    *Value = 1;
-  } else {
-    *Value = 0;
-  }
-
-  EXIT:
-  return Status;
-}
-
-/**
-
-Routine Description:
-
-  Sets the state of a GPIO pin
-
-Arguments:
-
-  This  - pointer to protocol
-  Gpio  - which pin to modify
-  Mode  - mode to set
-
-Returns:
-
-  EFI_SUCCESS           - GPIO set as requested
-  EFI_UNSUPPORTED       - Mode is not supported
-  EFI_INVALID_PARAMETER - Gpio pin is out of range
-**/
-EFI_STATUS
-EFIAPI
-Set (
-  IN  EMBEDDED_GPIO       *This,
-  IN  EMBEDDED_GPIO_PIN   Gpio,
-  IN  EMBEDDED_GPIO_MODE  Mode
-  )
-{
-  EFI_STATUS    Status = EFI_SUCCESS;
-
-  // Check for errors
-  if (Gpio > LAST_GPIO_PIN) {
-    Status = EFI_INVALID_PARAMETER;
-    goto EXIT;
-  }
-
-  // Initialize the hardware if not already done
-  if (!mPL061Initialized) {
-    Status = PL061Initialize();
-    if (EFI_ERROR(Status)) {
-      goto EXIT;
-    }
-  }
-
-  switch (Mode)
-  {
-    case GPIO_MODE_INPUT:
-      // Set the corresponding direction bit to LOW for input
-      MmioAnd8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio));
-      break;
-
-    case GPIO_MODE_OUTPUT_0:
-      // Set the corresponding data bit to LOW for 0
-      MmioAnd8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio));
-      // Set the corresponding direction bit to HIGH for output
-      MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
-      break;
-
-    case GPIO_MODE_OUTPUT_1:
-      // Set the corresponding data bit to HIGH for 1
-      MmioOr8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
-      // Set the corresponding direction bit to HIGH for output
-      MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
-      break;
-
-    default:
-      // Other modes are not supported
-      return EFI_UNSUPPORTED;
-  }
-
-EXIT:
-  return Status;
-}
-
-/**
-
-Routine Description:
-
-  Gets the mode (function) of a GPIO pin
-
-Arguments:
-
-  This  - pointer to protocol
-  Gpio  - which pin
-  Mode  - pointer to output mode value
-
-Returns:
-
-  EFI_SUCCESS           - mode value retrieved
-  EFI_INVALID_PARAMETER - Mode is a null pointer or Gpio pin is out of range
-
-**/
-EFI_STATUS
-EFIAPI
-GetMode (
-  IN  EMBEDDED_GPIO       *This,
-  IN  EMBEDDED_GPIO_PIN   Gpio,
-  OUT EMBEDDED_GPIO_MODE  *Mode
-  )
-{
-  EFI_STATUS Status;
-
-  // Check for errors
-  if (    (Mode == NULL)
-      ||  (Gpio > LAST_GPIO_PIN)) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  // Initialize the hardware if not already done
-  if (!mPL061Initialized) {
-    Status = PL061Initialize();
-    if (EFI_ERROR(Status)) {
-      return Status;
-    }
-  }
-
-  // Check if it is input or output
-  if (MmioRead8 (PL061_GPIO_DIR_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
-    // Pin set to output
-    if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
-      *Mode = GPIO_MODE_OUTPUT_1;
-    } else {
-      *Mode = GPIO_MODE_OUTPUT_0;
-    }
-  } else {
-    // Pin set to input
-    *Mode = GPIO_MODE_INPUT;
-  }
-
-  return EFI_SUCCESS;
-}
-
-/**
-
-Routine Description:
-
-  Sets the pull-up / pull-down resistor of a GPIO pin
-
-Arguments:
-
-  This  - pointer to protocol
-  Gpio  - which pin
-  Direction - pull-up, pull-down, or none
-
-Returns:
-
-  EFI_UNSUPPORTED - Can not perform the requested operation
-
-**/
-EFI_STATUS
-EFIAPI
-SetPull (
-  IN  EMBEDDED_GPIO       *This,
-  IN  EMBEDDED_GPIO_PIN   Gpio,
-  IN  EMBEDDED_GPIO_PULL  Direction
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
- Protocol variable definition
- **/
-EMBEDDED_GPIO gGpio = {
-  Get,
-  Set,
-  GetMode,
-  SetPull
-};
-
-/**
-  Initialize the state information for the Embedded Gpio protocol.
-
-  @param  ImageHandle   of the loaded driver
-  @param  SystemTable   Pointer to the System Table
-
-  @retval EFI_SUCCESS           Protocol registered
-  @retval EFI_OUT_OF_RESOURCES  Cannot allocate protocol data structure
-  @retval EFI_DEVICE_ERROR      Hardware problems
-
-**/
-EFI_STATUS
-EFIAPI
-PL061InstallProtocol (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
-  )
-{
-  EFI_STATUS  Status;
-  EFI_HANDLE  Handle;
-
-  //
-  // Make sure the Gpio protocol has not been installed in the system yet.
-  //
-  ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEmbeddedGpioProtocolGuid);
-
-  // Install the Embedded GPIO Protocol onto a new handle
-  Handle = NULL;
-  Status = gBS->InstallMultipleProtocolInterfaces(
-                  &Handle,
-                  &gEmbeddedGpioProtocolGuid, &gGpio,
-                  NULL
-                 );
-  if (EFI_ERROR(Status)) {
-    Status = EFI_OUT_OF_RESOURCES;
-  }
-
-  return Status;
-}
+/** @file
+*
+*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+
+#include <Protocol/EmbeddedGpio.h>
+#include <Drivers/PL061Gpio.h>
+
+BOOLEAN     mPL061Initialized = FALSE;
+
+/**
+  Function implementations
+**/
+
+EFI_STATUS
+PL061Identify (
+  VOID
+  )
+{
+  // Check if this is a PrimeCell Peripheral
+  if (    (MmioRead8 (PL061_GPIO_PCELL_ID0) != 0x0D)
+      ||  (MmioRead8 (PL061_GPIO_PCELL_ID1) != 0xF0)
+      ||  (MmioRead8 (PL061_GPIO_PCELL_ID2) != 0x05)
+      ||  (MmioRead8 (PL061_GPIO_PCELL_ID3) != 0xB1)) {
+    return EFI_NOT_FOUND;
+  }
+
+  // Check if this PrimeCell Peripheral is the PL061 GPIO
+  if (    (MmioRead8 (PL061_GPIO_PERIPH_ID0) != 0x61)
+      ||  (MmioRead8 (PL061_GPIO_PERIPH_ID1) != 0x10)
+      ||  ((MmioRead8 (PL061_GPIO_PERIPH_ID2) & 0xF) != 0x04)
+      ||  (MmioRead8 (PL061_GPIO_PERIPH_ID3) != 0x00)) {
+    return EFI_NOT_FOUND;
+  }
+
+  return EFI_SUCCESS;
+}
+
+EFI_STATUS
+PL061Initialize (
+  VOID
+  )
+{
+  EFI_STATUS  Status;
+
+  // Check if the PL061 GPIO module exists on board
+  Status = PL061Identify();
+  if (EFI_ERROR (Status)) {
+    Status = EFI_DEVICE_ERROR;
+    goto EXIT;
+  }
+
+  // Do other hardware initialisation things here as required
+
+  // Disable Interrupts
+  //if (MmioRead8 (PL061_GPIO_IE_REG) != 0) {
+  //   // Ensure interrupts are disabled
+  //}
+
+  mPL061Initialized = TRUE;
+
+  EXIT:
+  return Status;
+}
+
+/**
+
+Routine Description:
+
+  Gets the state of a GPIO pin
+
+Arguments:
+
+  This  - pointer to protocol
+  Gpio  - which pin to read
+  Value - state of the pin
+
+Returns:
+
+  EFI_SUCCESS           - GPIO state returned in Value
+  EFI_INVALID_PARAMETER - Value is NULL pointer or Gpio pin is out of range
+**/
+EFI_STATUS
+EFIAPI
+Get (
+  IN  EMBEDDED_GPIO     *This,
+  IN  EMBEDDED_GPIO_PIN Gpio,
+  OUT UINTN             *Value
+  )
+{
+  EFI_STATUS    Status = EFI_SUCCESS;
+
+  if (    (Value == NULL)
+      ||  (Gpio > LAST_GPIO_PIN))
+  {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // Initialize the hardware if not already done
+  if (!mPL061Initialized) {
+    Status = PL061Initialize();
+    if (EFI_ERROR(Status)) {
+      goto EXIT;
+    }
+  }
+
+  if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
+    *Value = 1;
+  } else {
+    *Value = 0;
+  }
+
+  EXIT:
+  return Status;
+}
+
+/**
+
+Routine Description:
+
+  Sets the state of a GPIO pin
+
+Arguments:
+
+  This  - pointer to protocol
+  Gpio  - which pin to modify
+  Mode  - mode to set
+
+Returns:
+
+  EFI_SUCCESS           - GPIO set as requested
+  EFI_UNSUPPORTED       - Mode is not supported
+  EFI_INVALID_PARAMETER - Gpio pin is out of range
+**/
+EFI_STATUS
+EFIAPI
+Set (
+  IN  EMBEDDED_GPIO       *This,
+  IN  EMBEDDED_GPIO_PIN   Gpio,
+  IN  EMBEDDED_GPIO_MODE  Mode
+  )
+{
+  EFI_STATUS    Status = EFI_SUCCESS;
+
+  // Check for errors
+  if (Gpio > LAST_GPIO_PIN) {
+    Status = EFI_INVALID_PARAMETER;
+    goto EXIT;
+  }
+
+  // Initialize the hardware if not already done
+  if (!mPL061Initialized) {
+    Status = PL061Initialize();
+    if (EFI_ERROR(Status)) {
+      goto EXIT;
+    }
+  }
+
+  switch (Mode)
+  {
+    case GPIO_MODE_INPUT:
+      // Set the corresponding direction bit to LOW for input
+      MmioAnd8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio));
+      break;
+
+    case GPIO_MODE_OUTPUT_0:
+      // Set the corresponding data bit to LOW for 0
+      MmioAnd8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_LOW_8BIT(Gpio));
+      // Set the corresponding direction bit to HIGH for output
+      MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
+      break;
+
+    case GPIO_MODE_OUTPUT_1:
+      // Set the corresponding data bit to HIGH for 1
+      MmioOr8 (PL061_GPIO_DATA_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
+      // Set the corresponding direction bit to HIGH for output
+      MmioOr8 (PL061_GPIO_DIR_REG, GPIO_PIN_MASK_HIGH_8BIT(Gpio));
+      break;
+
+    default:
+      // Other modes are not supported
+      return EFI_UNSUPPORTED;
+  }
+
+EXIT:
+  return Status;
+}
+
+/**
+
+Routine Description:
+
+  Gets the mode (function) of a GPIO pin
+
+Arguments:
+
+  This  - pointer to protocol
+  Gpio  - which pin
+  Mode  - pointer to output mode value
+
+Returns:
+
+  EFI_SUCCESS           - mode value retrieved
+  EFI_INVALID_PARAMETER - Mode is a null pointer or Gpio pin is out of range
+
+**/
+EFI_STATUS
+EFIAPI
+GetMode (
+  IN  EMBEDDED_GPIO       *This,
+  IN  EMBEDDED_GPIO_PIN   Gpio,
+  OUT EMBEDDED_GPIO_MODE  *Mode
+  )
+{
+  EFI_STATUS Status;
+
+  // Check for errors
+  if (    (Mode == NULL)
+      ||  (Gpio > LAST_GPIO_PIN)) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // Initialize the hardware if not already done
+  if (!mPL061Initialized) {
+    Status = PL061Initialize();
+    if (EFI_ERROR(Status)) {
+      return Status;
+    }
+  }
+
+  // Check if it is input or output
+  if (MmioRead8 (PL061_GPIO_DIR_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
+    // Pin set to output
+    if (MmioRead8 (PL061_GPIO_DATA_REG) & GPIO_PIN_MASK_HIGH_8BIT(Gpio)) {
+      *Mode = GPIO_MODE_OUTPUT_1;
+    } else {
+      *Mode = GPIO_MODE_OUTPUT_0;
+    }
+  } else {
+    // Pin set to input
+    *Mode = GPIO_MODE_INPUT;
+  }
+
+  return EFI_SUCCESS;
+}
+
+/**
+
+Routine Description:
+
+  Sets the pull-up / pull-down resistor of a GPIO pin
+
+Arguments:
+
+  This  - pointer to protocol
+  Gpio  - which pin
+  Direction - pull-up, pull-down, or none
+
+Returns:
+
+  EFI_UNSUPPORTED - Can not perform the requested operation
+
+**/
+EFI_STATUS
+EFIAPI
+SetPull (
+  IN  EMBEDDED_GPIO       *This,
+  IN  EMBEDDED_GPIO_PIN   Gpio,
+  IN  EMBEDDED_GPIO_PULL  Direction
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+/**
+ Protocol variable definition
+ **/
+EMBEDDED_GPIO gGpio = {
+  Get,
+  Set,
+  GetMode,
+  SetPull
+};
+
+/**
+  Initialize the state information for the Embedded Gpio protocol.
+
+  @param  ImageHandle   of the loaded driver
+  @param  SystemTable   Pointer to the System Table
+
+  @retval EFI_SUCCESS           Protocol registered
+  @retval EFI_OUT_OF_RESOURCES  Cannot allocate protocol data structure
+  @retval EFI_DEVICE_ERROR      Hardware problems
+
+**/
+EFI_STATUS
+EFIAPI
+PL061InstallProtocol (
+  IN EFI_HANDLE         ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  EFI_STATUS  Status;
+  EFI_HANDLE  Handle;
+
+  //
+  // Make sure the Gpio protocol has not been installed in the system yet.
+  //
+  ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEmbeddedGpioProtocolGuid);
+
+  // Install the Embedded GPIO Protocol onto a new handle
+  Handle = NULL;
+  Status = gBS->InstallMultipleProtocolInterfaces(
+                  &Handle,
+                  &gEmbeddedGpioProtocolGuid, &gGpio,
+                  NULL
+                 );
+  if (EFI_ERROR(Status)) {
+    Status = EFI_OUT_OF_RESOURCES;
+  }
+
+  return Status;
+}
diff --git a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
index b5adda3a89..49284d0a07 100644
--- a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
+++ b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
@@ -1,50 +1,50 @@
-/** @file
-*
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PL061GpioDxe
-  FILE_GUID                      = 5c1997d7-8d45-4f21-af3c-2206b8ed8bec
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-
-  ENTRY_POINT                    = PL061InstallProtocol
-[Sources.common]
-  PL061Gpio.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  IoLib
-  PcdLib
-  UefiBootServicesTableLib
-  UefiDriverEntryPoint
-  UefiLib
-  UefiRuntimeServicesTableLib
-
-[Pcd]
-  gArmPlatformTokenSpaceGuid.PcdPL061GpioBase
-
-[Protocols]
-  gEmbeddedGpioProtocolGuid  
-
-[Depex]
-  TRUE
+/** @file
+*
+*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PL061GpioDxe
+  FILE_GUID                      = 5c1997d7-8d45-4f21-af3c-2206b8ed8bec
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+
+  ENTRY_POINT                    = PL061InstallProtocol
+[Sources.common]
+  PL061Gpio.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  IoLib
+  PcdLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  UefiLib
+  UefiRuntimeServicesTableLib
+
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PcdPL061GpioBase
+
+[Protocols]
+  gEmbeddedGpioProtocolGuid  
+
+[Depex]
+  TRUE
diff --git a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c
index 71b7a32d6d..839d34d414 100644
--- a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c
+++ b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c
@@ -1,395 +1,395 @@
-/** @file
-  Template for Timer Architecture Protocol driver of the ARM flavor
-
-  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
-  
-  This program and the accompanying materials                          
-  are licensed and made available under the terms and conditions of the BSD License         
-  which accompanies this distribution.  The full text of the license may be found at        
-  http://opensource.org/licenses/bsd-license.php                                            
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-
-**/
-
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-
-#include <Protocol/Timer.h>
-#include <Protocol/HardwareInterrupt.h>
-
-#include <Drivers/SP804Timer.h>
-
-#define SP804_TIMER_PERIODIC_BASE     ((UINTN)PcdGet32 (PcdSP804TimerPeriodicBase))
-#define SP804_TIMER_METRONOME_BASE    ((UINTN)PcdGet32 (PcdSP804TimerMetronomeBase))
-#define SP804_TIMER_PERFORMANCE_BASE  ((UINTN)PcdGet32 (PcdSP804TimerPerformanceBase))
-
-// The notification function to call on every timer interrupt.
-EFI_TIMER_NOTIFY      mTimerNotifyFunction     = (EFI_TIMER_NOTIFY)NULL;
-EFI_EVENT             EfiExitBootServicesEvent = (EFI_EVENT)NULL;
-
-// The current period of the timer interrupt
-UINT64 mTimerPeriod = 0;
-
-// Cached copy of the Hardware Interrupt protocol instance
-EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
-
-// Cached interrupt vector
-UINTN  gVector;
-
-
-/**
-
-  C Interrupt Handler called in the interrupt context when Source interrupt is active.
-
-
-  @param Source         Source of the interrupt. Hardware routing off a specific platform defines
-                        what source means.
-
-  @param SystemContext  Pointer to system register context. Mostly used by debuggers and will
-                        update the system context after the return from the interrupt if 
-                        modified. Don't change these values unless you know what you are doing
-
-**/
-VOID
-EFIAPI
-TimerInterruptHandler (
-  IN  HARDWARE_INTERRUPT_SOURCE   Source,
-  IN  EFI_SYSTEM_CONTEXT          SystemContext       
-  )
-{
-  EFI_TPL OriginalTPL;
-
-  //
-  // DXE core uses this callback for the EFI timer tick. The DXE core uses locks 
-  // that raise to TPL_HIGH and then restore back to current level. Thus we need
-  // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. 
-  //
-  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
-
-  // If the interrupt is shared then we must check if this interrupt source is the one associated to this Timer
-  if (MmioRead32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_MSK_INT_STS_REG) != 0) {
-    // Clear the periodic interrupt
-    MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_INT_CLR_REG, 0);
-
-    // Signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers
-    gInterrupt->EndOfInterrupt (gInterrupt, Source);
-
-    if (mTimerNotifyFunction) {
-      mTimerNotifyFunction (mTimerPeriod);
-    }
-  }
-
-  gBS->RestoreTPL (OriginalTPL);
-}
-
-/**
-  This function registers the handler NotifyFunction so it is called every time 
-  the timer interrupt fires.  It also passes the amount of time since the last 
-  handler call to the NotifyFunction.  If NotifyFunction is NULL, then the 
-  handler is unregistered.  If the handler is registered, then EFI_SUCCESS is 
-  returned.  If the CPU does not support registering a timer interrupt handler, 
-  then EFI_UNSUPPORTED is returned.  If an attempt is made to register a handler 
-  when a handler is already registered, then EFI_ALREADY_STARTED is returned.  
-  If an attempt is made to unregister a handler when a handler is not registered, 
-  then EFI_INVALID_PARAMETER is returned.  If an error occurs attempting to 
-  register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR 
-  is returned.
-
-  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
-  @param  NotifyFunction   The function to call when a timer interrupt fires. This
-                           function executes at TPL_HIGH_LEVEL. The DXE Core will
-                           register a handler for the timer interrupt, so it can know
-                           how much time has passed. This information is used to
-                           signal timer based events. NULL will unregister the handler.
-  @retval EFI_SUCCESS           The timer handler was registered.
-  @retval EFI_UNSUPPORTED       The platform does not support timer interrupts.
-  @retval EFI_ALREADY_STARTED   NotifyFunction is not NULL, and a handler is already
-                                registered.
-  @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
-                                previously registered.
-  @retval EFI_DEVICE_ERROR      The timer handler could not be registered.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverRegisterHandler (
-  IN EFI_TIMER_ARCH_PROTOCOL  *This,
-  IN EFI_TIMER_NOTIFY         NotifyFunction
-  )
-{
-  if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {
-    return EFI_ALREADY_STARTED;
-  }
-
-  mTimerNotifyFunction = NotifyFunction;
-
-  return EFI_SUCCESS;
-}
-
-/**
-    Make sure all Dual Timers are disabled
-**/
-VOID
-EFIAPI
-ExitBootServicesEvent (
-  IN EFI_EVENT  Event,
-  IN VOID       *Context
-  )
-{
-  // Disable 'Periodic Operation' timer if enabled
-  if (MmioRead32(SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-    MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, 0);
-  }
-
-  // Disable 'Metronome/Delay' timer if enabled
-  if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-    MmioAnd32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, 0);
-  }
-
-  // Disable 'Performance' timer if enabled
-  if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-    MmioAnd32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, 0);
-  }
-}
-
-/**
-
-  This function adjusts the period of timer interrupts to the value specified 
-  by TimerPeriod.  If the timer period is updated, then the selected timer 
-  period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned.  If 
-  the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.  
-  If an error occurs while attempting to update the timer period, then the 
-  timer hardware will be put back in its state prior to this call, and 
-  EFI_DEVICE_ERROR is returned.  If TimerPeriod is 0, then the timer interrupt 
-  is disabled.  This is not the same as disabling the CPU's interrupts.  
-  Instead, it must either turn off the timer hardware, or it must adjust the 
-  interrupt controller so that a CPU interrupt is not generated when the timer 
-  interrupt fires. 
-
-  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
-  @param  TimerPeriod      The rate to program the timer interrupt in 100 nS units. If
-                           the timer hardware is not programmable, then EFI_UNSUPPORTED is
-                           returned. If the timer is programmable, then the timer period
-                           will be rounded up to the nearest timer period that is supported
-                           by the timer hardware. If TimerPeriod is set to 0, then the
-                           timer interrupts will be disabled.
-
-
-  @retval EFI_SUCCESS           The timer period was changed.
-  @retval EFI_UNSUPPORTED       The platform cannot change the period of the timer interrupt.
-  @retval EFI_DEVICE_ERROR      The timer period could not be changed due to a device error.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverSetTimerPeriod (
-  IN EFI_TIMER_ARCH_PROTOCOL  *This,
-  IN UINT64                   TimerPeriod
-  )
-{
-  EFI_STATUS  Status;
-  UINT64      TimerTicks;
-  
-  // always disable the timer
-  MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE);
-
-  if (TimerPeriod == 0) {
-    // Leave timer disabled from above, and...
-
-    // Disable timer 0/1 interrupt for a TimerPeriod of 0
-    Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector);    
-  } else {  
-    // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units * 10)
-    TimerTicks = DivU64x32 (TimerPeriod, 10);
-    TimerTicks = MultU64x32 (TimerTicks, PcdGet32(PcdSP804TimerFrequencyInMHz));
-
-    // if it's larger than 32-bits, pin to highest value
-    if (TimerTicks > 0xffffffff) {
-      TimerTicks = 0xffffffff;
-    }
-
-    // Program the SP804 timer with the new count value
-    MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_LOAD_REG, TimerTicks);
-
-    // enable the timer
-    MmioOr32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-
-    // enable timer 0/1 interrupts
-    Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector);    
-  }
-
-  // Save the new timer period
-  mTimerPeriod = TimerPeriod;
-  return Status;
-}
-
-/**
-  This function retrieves the period of timer interrupts in 100 ns units, 
-  returns that value in TimerPeriod, and returns EFI_SUCCESS.  If TimerPeriod 
-  is NULL, then EFI_INVALID_PARAMETER is returned.  If a TimerPeriod of 0 is 
-  returned, then the timer is currently disabled.
-
-  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
-  @param  TimerPeriod      A pointer to the timer period to retrieve in 100 ns units. If
-                           0 is returned, then the timer is currently disabled.
-
-
-  @retval EFI_SUCCESS           The timer period was returned in TimerPeriod.
-  @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverGetTimerPeriod (
-  IN EFI_TIMER_ARCH_PROTOCOL   *This,
-  OUT UINT64                   *TimerPeriod
-  )
-{
-  if (TimerPeriod == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  *TimerPeriod = mTimerPeriod;
-  return EFI_SUCCESS;
-}
-
-/**
-  This function generates a soft timer interrupt. If the platform does not support soft 
-  timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. 
-  If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() 
-  service, then a soft timer interrupt will be generated. If the timer interrupt is 
-  enabled when this service is called, then the registered handler will be invoked. The 
-  registered handler should not be able to distinguish a hardware-generated timer 
-  interrupt from a software-generated timer interrupt.
-
-  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
-
-  @retval EFI_SUCCESS           The soft timer interrupt was generated.
-  @retval EFI_UNSUPPORTED       The platform does not support the generation of soft timer interrupts.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverGenerateSoftInterrupt (
-  IN EFI_TIMER_ARCH_PROTOCOL  *This
-  )
-{
-  return EFI_UNSUPPORTED;
-}
-
-/**
-  Interface structure for the Timer Architectural Protocol.
-
-  @par Protocol Description:
-  This protocol provides the services to initialize a periodic timer 
-  interrupt, and to register a handler that is called each time the timer
-  interrupt fires.  It may also provide a service to adjust the rate of the
-  periodic timer interrupt.  When a timer interrupt occurs, the handler is 
-  passed the amount of time that has passed since the previous timer 
-  interrupt.
-
-  @param RegisterHandler
-  Registers a handler that will be called each time the 
-  timer interrupt fires.  TimerPeriod defines the minimum 
-  time between timer interrupts, so TimerPeriod will also 
-  be the minimum time between calls to the registered 
-  handler.
-
-  @param SetTimerPeriod
-  Sets the period of the timer interrupt in 100 nS units.  
-  This function is optional, and may return EFI_UNSUPPORTED.  
-  If this function is supported, then the timer period will 
-  be rounded up to the nearest supported timer period.
-
-
-  @param GetTimerPeriod
-  Retrieves the period of the timer interrupt in 100 nS units.
-
-  @param GenerateSoftInterrupt
-  Generates a soft timer interrupt that simulates the firing of 
-  the timer interrupt. This service can be used to invoke the   registered handler if the timer interrupt has been masked for 
-  a period of time.
-
-**/
-EFI_TIMER_ARCH_PROTOCOL   gTimer = {
-  TimerDriverRegisterHandler,
-  TimerDriverSetTimerPeriod,
-  TimerDriverGetTimerPeriod,
-  TimerDriverGenerateSoftInterrupt
-};
-
-
-/**
-  Initialize the state information for the Timer Architectural Protocol and
-  the Timer Debug support protocol that allows the debugger to break into a
-  running program.
-
-  @param  ImageHandle   of the loaded driver
-  @param  SystemTable   Pointer to the System Table
-
-  @retval EFI_SUCCESS           Protocol registered
-  @retval EFI_OUT_OF_RESOURCES  Cannot allocate protocol data structure
-  @retval EFI_DEVICE_ERROR      Hardware problems
-
-**/
-EFI_STATUS
-EFIAPI
-TimerInitialize (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
-  )
-{
-  EFI_HANDLE  Handle = NULL;
-  EFI_STATUS  Status;
-
-  // Set the interrupt timer number
-  gVector = PcdGet32(PcdSP804TimerPeriodicInterruptNum);
-
-  // Find the interrupt controller protocol.  ASSERT if not found.
-  Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);
-  ASSERT_EFI_ERROR (Status);
-
-  // Disable the timer
-  Status = TimerDriverSetTimerPeriod (&gTimer, 0);
-  ASSERT_EFI_ERROR (Status);
-
-  // Install interrupt handler
-  Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler);
-  ASSERT_EFI_ERROR (Status);
-
-  // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled
-  MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE);
-
-  // Set up default timer
-  Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
-  ASSERT_EFI_ERROR (Status);
-
-  // Install the Timer Architectural Protocol onto a new handle
-  Status = gBS->InstallMultipleProtocolInterfaces(
-                  &Handle,
-                  &gEfiTimerArchProtocolGuid,      &gTimer,
-                  NULL
-                  );
-  ASSERT_EFI_ERROR(Status);
-
-  // Register for an ExitBootServicesEvent
-  Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
-  ASSERT_EFI_ERROR (Status);
-
-  return Status;
-}
+/** @file
+  Template for Timer Architecture Protocol driver of the ARM flavor
+
+  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+  Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
+  
+  This program and the accompanying materials                          
+  are licensed and made available under the terms and conditions of the BSD License         
+  which accompanies this distribution.  The full text of the license may be found at        
+  http://opensource.org/licenses/bsd-license.php                                            
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+
+**/
+
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#include <Protocol/Timer.h>
+#include <Protocol/HardwareInterrupt.h>
+
+#include <Drivers/SP804Timer.h>
+
+#define SP804_TIMER_PERIODIC_BASE     ((UINTN)PcdGet32 (PcdSP804TimerPeriodicBase))
+#define SP804_TIMER_METRONOME_BASE    ((UINTN)PcdGet32 (PcdSP804TimerMetronomeBase))
+#define SP804_TIMER_PERFORMANCE_BASE  ((UINTN)PcdGet32 (PcdSP804TimerPerformanceBase))
+
+// The notification function to call on every timer interrupt.
+EFI_TIMER_NOTIFY      mTimerNotifyFunction     = (EFI_TIMER_NOTIFY)NULL;
+EFI_EVENT             EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+// The current period of the timer interrupt
+UINT64 mTimerPeriod = 0;
+
+// Cached copy of the Hardware Interrupt protocol instance
+EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
+
+// Cached interrupt vector
+UINTN  gVector;
+
+
+/**
+
+  C Interrupt Handler called in the interrupt context when Source interrupt is active.
+
+
+  @param Source         Source of the interrupt. Hardware routing off a specific platform defines
+                        what source means.
+
+  @param SystemContext  Pointer to system register context. Mostly used by debuggers and will
+                        update the system context after the return from the interrupt if 
+                        modified. Don't change these values unless you know what you are doing
+
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+  IN  HARDWARE_INTERRUPT_SOURCE   Source,
+  IN  EFI_SYSTEM_CONTEXT          SystemContext       
+  )
+{
+  EFI_TPL OriginalTPL;
+
+  //
+  // DXE core uses this callback for the EFI timer tick. The DXE core uses locks 
+  // that raise to TPL_HIGH and then restore back to current level. Thus we need
+  // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. 
+  //
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+  // If the interrupt is shared then we must check if this interrupt source is the one associated to this Timer
+  if (MmioRead32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_MSK_INT_STS_REG) != 0) {
+    // Clear the periodic interrupt
+    MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_INT_CLR_REG, 0);
+
+    // Signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers
+    gInterrupt->EndOfInterrupt (gInterrupt, Source);
+
+    if (mTimerNotifyFunction) {
+      mTimerNotifyFunction (mTimerPeriod);
+    }
+  }
+
+  gBS->RestoreTPL (OriginalTPL);
+}
+
+/**
+  This function registers the handler NotifyFunction so it is called every time 
+  the timer interrupt fires.  It also passes the amount of time since the last 
+  handler call to the NotifyFunction.  If NotifyFunction is NULL, then the 
+  handler is unregistered.  If the handler is registered, then EFI_SUCCESS is 
+  returned.  If the CPU does not support registering a timer interrupt handler, 
+  then EFI_UNSUPPORTED is returned.  If an attempt is made to register a handler 
+  when a handler is already registered, then EFI_ALREADY_STARTED is returned.  
+  If an attempt is made to unregister a handler when a handler is not registered, 
+  then EFI_INVALID_PARAMETER is returned.  If an error occurs attempting to 
+  register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR 
+  is returned.
+
+  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param  NotifyFunction   The function to call when a timer interrupt fires. This
+                           function executes at TPL_HIGH_LEVEL. The DXE Core will
+                           register a handler for the timer interrupt, so it can know
+                           how much time has passed. This information is used to
+                           signal timer based events. NULL will unregister the handler.
+  @retval EFI_SUCCESS           The timer handler was registered.
+  @retval EFI_UNSUPPORTED       The platform does not support timer interrupts.
+  @retval EFI_ALREADY_STARTED   NotifyFunction is not NULL, and a handler is already
+                                registered.
+  @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+                                previously registered.
+  @retval EFI_DEVICE_ERROR      The timer handler could not be registered.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+  IN EFI_TIMER_ARCH_PROTOCOL  *This,
+  IN EFI_TIMER_NOTIFY         NotifyFunction
+  )
+{
+  if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {
+    return EFI_ALREADY_STARTED;
+  }
+
+  mTimerNotifyFunction = NotifyFunction;
+
+  return EFI_SUCCESS;
+}
+
+/**
+    Make sure all Dual Timers are disabled
+**/
+VOID
+EFIAPI
+ExitBootServicesEvent (
+  IN EFI_EVENT  Event,
+  IN VOID       *Context
+  )
+{
+  // Disable 'Periodic Operation' timer if enabled
+  if (MmioRead32(SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, 0);
+  }
+
+  // Disable 'Metronome/Delay' timer if enabled
+  if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    MmioAnd32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, 0);
+  }
+
+  // Disable 'Performance' timer if enabled
+  if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    MmioAnd32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, 0);
+  }
+}
+
+/**
+
+  This function adjusts the period of timer interrupts to the value specified 
+  by TimerPeriod.  If the timer period is updated, then the selected timer 
+  period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned.  If 
+  the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.  
+  If an error occurs while attempting to update the timer period, then the 
+  timer hardware will be put back in its state prior to this call, and 
+  EFI_DEVICE_ERROR is returned.  If TimerPeriod is 0, then the timer interrupt 
+  is disabled.  This is not the same as disabling the CPU's interrupts.  
+  Instead, it must either turn off the timer hardware, or it must adjust the 
+  interrupt controller so that a CPU interrupt is not generated when the timer 
+  interrupt fires. 
+
+  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param  TimerPeriod      The rate to program the timer interrupt in 100 nS units. If
+                           the timer hardware is not programmable, then EFI_UNSUPPORTED is
+                           returned. If the timer is programmable, then the timer period
+                           will be rounded up to the nearest timer period that is supported
+                           by the timer hardware. If TimerPeriod is set to 0, then the
+                           timer interrupts will be disabled.
+
+
+  @retval EFI_SUCCESS           The timer period was changed.
+  @retval EFI_UNSUPPORTED       The platform cannot change the period of the timer interrupt.
+  @retval EFI_DEVICE_ERROR      The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverSetTimerPeriod (
+  IN EFI_TIMER_ARCH_PROTOCOL  *This,
+  IN UINT64                   TimerPeriod
+  )
+{
+  EFI_STATUS  Status;
+  UINT64      TimerTicks;
+  
+  // always disable the timer
+  MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE);
+
+  if (TimerPeriod == 0) {
+    // Leave timer disabled from above, and...
+
+    // Disable timer 0/1 interrupt for a TimerPeriod of 0
+    Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector);    
+  } else {  
+    // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units * 10)
+    TimerTicks = DivU64x32 (TimerPeriod, 10);
+    TimerTicks = MultU64x32 (TimerTicks, PcdGet32(PcdSP804TimerFrequencyInMHz));
+
+    // if it's larger than 32-bits, pin to highest value
+    if (TimerTicks > 0xffffffff) {
+      TimerTicks = 0xffffffff;
+    }
+
+    // Program the SP804 timer with the new count value
+    MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_LOAD_REG, TimerTicks);
+
+    // enable the timer
+    MmioOr32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+
+    // enable timer 0/1 interrupts
+    Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector);    
+  }
+
+  // Save the new timer period
+  mTimerPeriod = TimerPeriod;
+  return Status;
+}
+
+/**
+  This function retrieves the period of timer interrupts in 100 ns units, 
+  returns that value in TimerPeriod, and returns EFI_SUCCESS.  If TimerPeriod 
+  is NULL, then EFI_INVALID_PARAMETER is returned.  If a TimerPeriod of 0 is 
+  returned, then the timer is currently disabled.
+
+  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param  TimerPeriod      A pointer to the timer period to retrieve in 100 ns units. If
+                           0 is returned, then the timer is currently disabled.
+
+
+  @retval EFI_SUCCESS           The timer period was returned in TimerPeriod.
+  @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGetTimerPeriod (
+  IN EFI_TIMER_ARCH_PROTOCOL   *This,
+  OUT UINT64                   *TimerPeriod
+  )
+{
+  if (TimerPeriod == NULL) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  *TimerPeriod = mTimerPeriod;
+  return EFI_SUCCESS;
+}
+
+/**
+  This function generates a soft timer interrupt. If the platform does not support soft 
+  timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. 
+  If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() 
+  service, then a soft timer interrupt will be generated. If the timer interrupt is 
+  enabled when this service is called, then the registered handler will be invoked. The 
+  registered handler should not be able to distinguish a hardware-generated timer 
+  interrupt from a software-generated timer interrupt.
+
+  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS           The soft timer interrupt was generated.
+  @retval EFI_UNSUPPORTED       The platform does not support the generation of soft timer interrupts.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGenerateSoftInterrupt (
+  IN EFI_TIMER_ARCH_PROTOCOL  *This
+  )
+{
+  return EFI_UNSUPPORTED;
+}
+
+/**
+  Interface structure for the Timer Architectural Protocol.
+
+  @par Protocol Description:
+  This protocol provides the services to initialize a periodic timer 
+  interrupt, and to register a handler that is called each time the timer
+  interrupt fires.  It may also provide a service to adjust the rate of the
+  periodic timer interrupt.  When a timer interrupt occurs, the handler is 
+  passed the amount of time that has passed since the previous timer 
+  interrupt.
+
+  @param RegisterHandler
+  Registers a handler that will be called each time the 
+  timer interrupt fires.  TimerPeriod defines the minimum 
+  time between timer interrupts, so TimerPeriod will also 
+  be the minimum time between calls to the registered 
+  handler.
+
+  @param SetTimerPeriod
+  Sets the period of the timer interrupt in 100 nS units.  
+  This function is optional, and may return EFI_UNSUPPORTED.  
+  If this function is supported, then the timer period will 
+  be rounded up to the nearest supported timer period.
+
+
+  @param GetTimerPeriod
+  Retrieves the period of the timer interrupt in 100 nS units.
+
+  @param GenerateSoftInterrupt
+  Generates a soft timer interrupt that simulates the firing of 
+  the timer interrupt. This service can be used to invoke the   registered handler if the timer interrupt has been masked for 
+  a period of time.
+
+**/
+EFI_TIMER_ARCH_PROTOCOL   gTimer = {
+  TimerDriverRegisterHandler,
+  TimerDriverSetTimerPeriod,
+  TimerDriverGetTimerPeriod,
+  TimerDriverGenerateSoftInterrupt
+};
+
+
+/**
+  Initialize the state information for the Timer Architectural Protocol and
+  the Timer Debug support protocol that allows the debugger to break into a
+  running program.
+
+  @param  ImageHandle   of the loaded driver
+  @param  SystemTable   Pointer to the System Table
+
+  @retval EFI_SUCCESS           Protocol registered
+  @retval EFI_OUT_OF_RESOURCES  Cannot allocate protocol data structure
+  @retval EFI_DEVICE_ERROR      Hardware problems
+
+**/
+EFI_STATUS
+EFIAPI
+TimerInitialize (
+  IN EFI_HANDLE         ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  EFI_HANDLE  Handle = NULL;
+  EFI_STATUS  Status;
+
+  // Set the interrupt timer number
+  gVector = PcdGet32(PcdSP804TimerPeriodicInterruptNum);
+
+  // Find the interrupt controller protocol.  ASSERT if not found.
+  Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);
+  ASSERT_EFI_ERROR (Status);
+
+  // Disable the timer
+  Status = TimerDriverSetTimerPeriod (&gTimer, 0);
+  ASSERT_EFI_ERROR (Status);
+
+  // Install interrupt handler
+  Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler);
+  ASSERT_EFI_ERROR (Status);
+
+  // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled
+  MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE);
+
+  // Set up default timer
+  Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
+  ASSERT_EFI_ERROR (Status);
+
+  // Install the Timer Architectural Protocol onto a new handle
+  Status = gBS->InstallMultipleProtocolInterfaces(
+                  &Handle,
+                  &gEfiTimerArchProtocolGuid,      &gTimer,
+                  NULL
+                  );
+  ASSERT_EFI_ERROR(Status);
+
+  // Register for an ExitBootServicesEvent
+  Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
+  ASSERT_EFI_ERROR (Status);
+
+  return Status;
+}
diff --git a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
index 405563b86f..8e87adcf07 100644
--- a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
+++ b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
@@ -1,59 +1,59 @@
-#/** @file
-#  
-#    Component description file for Timer module
-#  
-#  Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmVeTimerDxe
-  FILE_GUID                      = a73d663d-a491-4278-9a69-9521be3379f2 
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-
-  ENTRY_POINT                    = TimerInitialize
-
-[Sources.common]
-  SP804Timer.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  UefiRuntimeServicesTableLib
-  UefiLib
-  UefiBootServicesTableLib
-  BaseMemoryLib
-  DebugLib
-  UefiDriverEntryPoint
-  IoLib
-
-[Guids]
-
-[Protocols]
-  gEfiTimerArchProtocolGuid  
-  gHardwareInterruptProtocolGuid
-
-[Pcd.common]
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase
-  gEmbeddedTokenSpaceGuid.PcdTimerPeriod
-
-[Depex]
-  gHardwareInterruptProtocolGuid
+#/** @file
+#  
+#    Component description file for Timer module
+#  
+#  Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmVeTimerDxe
+  FILE_GUID                      = a73d663d-a491-4278-9a69-9521be3379f2 
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+
+  ENTRY_POINT                    = TimerInitialize
+
+[Sources.common]
+  SP804Timer.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  UefiRuntimeServicesTableLib
+  UefiLib
+  UefiBootServicesTableLib
+  BaseMemoryLib
+  DebugLib
+  UefiDriverEntryPoint
+  IoLib
+
+[Guids]
+
+[Protocols]
+  gEfiTimerArchProtocolGuid  
+  gHardwareInterruptProtocolGuid
+
+[Pcd.common]
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase
+  gEmbeddedTokenSpaceGuid.PcdTimerPeriod
+
+[Depex]
+  gHardwareInterruptProtocolGuid
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
index 5b78b2b3f4..d1da60b5ac 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805Watchdog.c
@@ -1,387 +1,387 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiRuntimeServicesTableLib.h>
-#include <Library/UefiLib.h>
-
-#include <Protocol/WatchdogTimer.h>
-#include <Drivers/SP805Watchdog.h>
-
-EFI_EVENT                           EfiExitBootServicesEvent = (EFI_EVENT)NULL;
-
-/**
-  Make sure the SP805 registers are unlocked for writing.
-
-  Note: The SP805 Watchdog Timer supports locking of its registers,
-  i.e. it inhibits all writes to avoid rogue software accidentally
-  corrupting their contents.
-**/
-inline
-VOID
-SP805Unlock (
-  VOID
-  )
-{
-  if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) {
-    MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);
-  }
-}
-
-/**
-  Make sure the SP805 registers are locked and can not be overwritten.
-
-  Note: The SP805 Watchdog Timer supports locking of its registers,
-  i.e. it inhibits all writes to avoid rogue software accidentally
-  corrupting their contents.
-**/
-inline
-VOID
-SP805Lock (
-  VOID
-  )
-{
-  if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) {
-    // To lock it, just write in any number (except the special unlock code).
-    MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);
-  }
-}
-
-/**
-  Stop the SP805 watchdog timer from counting down by disabling interrupts.
-**/
-inline
-VOID
-SP805Stop (
-  VOID
-  )
-{
-  // Disable interrupts
-  if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) {
-    MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);
-  }
-}
-
-/**
-  Starts the SP805 counting down by enabling interrupts.
-  The count down will start from the value stored in the Load register,
-  not from the value where it was previously stopped.
-**/
-inline
-VOID
-SP805Start (
-  VOID
-  )
-{
-  // Enable interrupts
-  if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
-    MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
-  }
-}
-
-/**
-    On exiting boot services we must make sure the SP805 Watchdog Timer
-    is stopped.
-**/
-VOID
-EFIAPI
-ExitBootServicesEvent (
-  IN EFI_EVENT  Event,
-  IN VOID       *Context
-  )
-{
-  SP805Unlock();
-  SP805Stop();
-  SP805Lock();
-}
-
-/**
-  This function registers the handler NotifyFunction so it is called every time
-  the watchdog timer expires.  It also passes the amount of time since the last
-  handler call to the NotifyFunction.
-  If NotifyFunction is not NULL and a handler is not already registered,
-  then the new handler is registered and EFI_SUCCESS is returned.
-  If NotifyFunction is NULL, and a handler is already registered,
-  then that handler is unregistered.
-  If an attempt is made to register a handler when a handler is already registered,
-  then EFI_ALREADY_STARTED is returned.
-  If an attempt is made to unregister a handler when a handler is not registered,
-  then EFI_INVALID_PARAMETER is returned.
-
-  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
-  @param  NotifyFunction   The function to call when a timer interrupt fires. This
-                           function executes at TPL_HIGH_LEVEL. The DXE Core will
-                           register a handler for the timer interrupt, so it can know
-                           how much time has passed. This information is used to
-                           signal timer based events. NULL will unregister the handler.
-
-  @retval EFI_SUCCESS           The watchdog timer handler was registered.
-  @retval EFI_ALREADY_STARTED   NotifyFunction is not NULL, and a handler is already
-                                registered.
-  @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
-                                previously registered.
-
-**/
-EFI_STATUS
-EFIAPI
-SP805RegisterHandler (
-  IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL   *This,
-  IN EFI_WATCHDOG_TIMER_NOTIFY                NotifyFunction
-  )
-{
-  // ERROR: This function is not supported.
-  // The hardware watchdog will reset the board
-  return EFI_INVALID_PARAMETER;
-}
-
-/**
-
-  This function adjusts the period of timer interrupts to the value specified
-  by TimerPeriod.  If the timer period is updated, then the selected timer
-  period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned.  If
-  the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
-  If an error occurs while attempting to update the timer period, then the
-  timer hardware will be put back in its state prior to this call, and
-  EFI_DEVICE_ERROR is returned.  If TimerPeriod is 0, then the timer interrupt
-  is disabled.  This is not the same as disabling the CPU's interrupts.
-  Instead, it must either turn off the timer hardware, or it must adjust the
-  interrupt controller so that a CPU interrupt is not generated when the timer
-  interrupt fires.
-
-  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
-  @param  TimerPeriod      The rate to program the timer interrupt in 100 nS units. If
-                           the timer hardware is not programmable, then EFI_UNSUPPORTED is
-                           returned. If the timer is programmable, then the timer period
-                           will be rounded up to the nearest timer period that is supported
-                           by the timer hardware. If TimerPeriod is set to 0, then the
-                           timer interrupts will be disabled.
-
-
-  @retval EFI_SUCCESS           The timer period was changed.
-  @retval EFI_UNSUPPORTED       The platform cannot change the period of the timer interrupt.
-  @retval EFI_DEVICE_ERROR      The timer period could not be changed due to a device error.
-
-**/
-EFI_STATUS
-EFIAPI
-SP805SetTimerPeriod (
-  IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL   *This,
-  IN UINT64                                   TimerPeriod   // In 100ns units
-  )
-{
-  EFI_STATUS  Status = EFI_SUCCESS;
-  UINT64      Ticks64bit;
-
-  SP805Unlock();
-
-  if( TimerPeriod == 0 ) {
-    // This is a watchdog stop request
-    SP805Stop();
-    goto EXIT;
-  } else {
-    // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
-    // The SP805 will count down to ZERO once, generate an interrupt and
-    // then it will again reload the initial value and start again.
-    // On the second time when it reaches ZERO, it will actually reset the board.
-    // Therefore, we need to load half the required delay.
-    //
-    // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;
-    //
-    // i.e.:
-    //
-    // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;
-
-    Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000);
-
-    // The registers in the SP805 are only 32 bits
-    if(Ticks64bit > (UINT64)0xFFFFFFFF) {
-      // We could load the watchdog with the maximum supported value but
-      // if a smaller value was requested, this could have the watchdog
-      // triggering before it was intended.
-      // Better generate an error to let the caller know.
-      Status = EFI_DEVICE_ERROR;
-      goto EXIT;
-    }
-
-    // Update the watchdog with a 32-bit value.
-    MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);
-
-    // Start the watchdog
-    SP805Start();
-  }
-
-  EXIT:
-  // Ensure the watchdog is locked before exiting.
-  SP805Lock();
-  return Status;
-}
-
-/**
-  This function retrieves the period of timer interrupts in 100 ns units,
-  returns that value in TimerPeriod, and returns EFI_SUCCESS.  If TimerPeriod
-  is NULL, then EFI_INVALID_PARAMETER is returned.  If a TimerPeriod of 0 is
-  returned, then the timer is currently disabled.
-
-  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
-  @param  TimerPeriod      A pointer to the timer period to retrieve in 100 ns units. If
-                           0 is returned, then the timer is currently disabled.
-
-
-  @retval EFI_SUCCESS           The timer period was returned in TimerPeriod.
-  @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-SP805GetTimerPeriod (
-  IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL   *This,
-  OUT UINT64                                  *TimerPeriod
-  )
-{
-  EFI_STATUS  Status = EFI_SUCCESS;
-  UINT64      ReturnValue;
-
-  if (TimerPeriod == NULL) {
-    return EFI_INVALID_PARAMETER;
-  }
-
-  // Check if the watchdog is stopped
-  if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
-    // It is stopped, so return zero.
-    ReturnValue = 0;
-  } else {
-    // Convert the Watchdog ticks into TimerPeriod
-    // Ensure 64bit arithmetic throughout because the Watchdog ticks may already
-    // be at the maximum 32 bit value and we still need to multiply that by 600.
-    ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 );
-  }
-
-  *TimerPeriod = ReturnValue;
-
-  return Status;
-}
-
-/**
-  Interface structure for the Watchdog Architectural Protocol.
-
-  @par Protocol Description:
-  This protocol provides a service to set the amount of time to wait
-  before firing the watchdog timer, and it also provides a service to
-  register a handler that is invoked when the watchdog timer fires.
-
-  @par When the watchdog timer fires, control will be passed to a handler
-  if one has been registered.  If no handler has been registered,
-  or the registered handler returns, then the system will be
-  reset by calling the Runtime Service ResetSystem().
-
-  @param RegisterHandler
-  Registers a handler that will be called each time the
-  watchdogtimer interrupt fires.  TimerPeriod defines the minimum
-  time between timer interrupts, so TimerPeriod will also
-  be the minimum time between calls to the registered
-  handler.
-  NOTE: If the watchdog resets the system in hardware, then
-        this function will not have any chance of executing.
-
-  @param SetTimerPeriod
-  Sets the period of the timer interrupt in 100 nS units.
-  This function is optional, and may return EFI_UNSUPPORTED.
-  If this function is supported, then the timer period will
-  be rounded up to the nearest supported timer period.
-
-  @param GetTimerPeriod
-  Retrieves the period of the timer interrupt in 100 nS units.
-
-**/
-EFI_WATCHDOG_TIMER_ARCH_PROTOCOL    gWatchdogTimer = {
-  (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler,
-  (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod,
-  (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod
-};
-
-/**
-  Initialize the state information for the Watchdog Timer Architectural Protocol.
-
-  @param  ImageHandle   of the loaded driver
-  @param  SystemTable   Pointer to the System Table
-
-  @retval EFI_SUCCESS           Protocol registered
-  @retval EFI_OUT_OF_RESOURCES  Cannot allocate protocol data structure
-  @retval EFI_DEVICE_ERROR      Hardware problems
-
-**/
-EFI_STATUS
-EFIAPI
-SP805Initialize (
-  IN EFI_HANDLE         ImageHandle,
-  IN EFI_SYSTEM_TABLE   *SystemTable
-  )
-{
-  EFI_STATUS  Status;
-  EFI_HANDLE  Handle;
-
-  // Unlock access to the SP805 registers
-  SP805Unlock ();
-
-  // Stop the watchdog from triggering unexpectedly
-  SP805Stop ();
-
-  // Set the watchdog to reset the board when triggered
-  if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) {
-    MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN);
-  }
-
-  // Prohibit any rogue access to SP805 registers
-  SP805Lock();
-  
-  //
-  // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.
-  // This will avoid conflicts with the universal watchdog
-  //
-  ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
-
-  // Register for an ExitBootServicesEvent
-  Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
-  if (EFI_ERROR(Status)) {
-    Status = EFI_OUT_OF_RESOURCES;
-    goto EXIT;
-  }
-
-  // Install the Timer Architectural Protocol onto a new handle
-  Handle = NULL;
-  Status = gBS->InstallMultipleProtocolInterfaces(
-                  &Handle,
-                  &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer,
-                  NULL
-                  );
-  if (EFI_ERROR(Status)) {
-    Status = EFI_OUT_OF_RESOURCES;
-    goto EXIT;
-  }
-
-EXIT:
-  if(EFI_ERROR(Status)) {
-    // The watchdog failed to initialize
-    ASSERT(FALSE);
-  }
-  return Status;
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/UefiLib.h>
+
+#include <Protocol/WatchdogTimer.h>
+#include <Drivers/SP805Watchdog.h>
+
+EFI_EVENT                           EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+/**
+  Make sure the SP805 registers are unlocked for writing.
+
+  Note: The SP805 Watchdog Timer supports locking of its registers,
+  i.e. it inhibits all writes to avoid rogue software accidentally
+  corrupting their contents.
+**/
+inline
+VOID
+SP805Unlock (
+  VOID
+  )
+{
+  if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) {
+    MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_SPECIAL_UNLOCK_CODE);
+  }
+}
+
+/**
+  Make sure the SP805 registers are locked and can not be overwritten.
+
+  Note: The SP805 Watchdog Timer supports locking of its registers,
+  i.e. it inhibits all writes to avoid rogue software accidentally
+  corrupting their contents.
+**/
+inline
+VOID
+SP805Lock (
+  VOID
+  )
+{
+  if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) {
+    // To lock it, just write in any number (except the special unlock code).
+    MmioWrite32(SP805_WDOG_LOCK_REG, SP805_WDOG_LOCK_IS_LOCKED);
+  }
+}
+
+/**
+  Stop the SP805 watchdog timer from counting down by disabling interrupts.
+**/
+inline
+VOID
+SP805Stop (
+  VOID
+  )
+{
+  // Disable interrupts
+  if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) {
+    MmioAnd32(SP805_WDOG_CONTROL_REG, ~SP805_WDOG_CTRL_INTEN);
+  }
+}
+
+/**
+  Starts the SP805 counting down by enabling interrupts.
+  The count down will start from the value stored in the Load register,
+  not from the value where it was previously stopped.
+**/
+inline
+VOID
+SP805Start (
+  VOID
+  )
+{
+  // Enable interrupts
+  if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
+    MmioOr32(SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_INTEN);
+  }
+}
+
+/**
+    On exiting boot services we must make sure the SP805 Watchdog Timer
+    is stopped.
+**/
+VOID
+EFIAPI
+ExitBootServicesEvent (
+  IN EFI_EVENT  Event,
+  IN VOID       *Context
+  )
+{
+  SP805Unlock();
+  SP805Stop();
+  SP805Lock();
+}
+
+/**
+  This function registers the handler NotifyFunction so it is called every time
+  the watchdog timer expires.  It also passes the amount of time since the last
+  handler call to the NotifyFunction.
+  If NotifyFunction is not NULL and a handler is not already registered,
+  then the new handler is registered and EFI_SUCCESS is returned.
+  If NotifyFunction is NULL, and a handler is already registered,
+  then that handler is unregistered.
+  If an attempt is made to register a handler when a handler is already registered,
+  then EFI_ALREADY_STARTED is returned.
+  If an attempt is made to unregister a handler when a handler is not registered,
+  then EFI_INVALID_PARAMETER is returned.
+
+  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param  NotifyFunction   The function to call when a timer interrupt fires. This
+                           function executes at TPL_HIGH_LEVEL. The DXE Core will
+                           register a handler for the timer interrupt, so it can know
+                           how much time has passed. This information is used to
+                           signal timer based events. NULL will unregister the handler.
+
+  @retval EFI_SUCCESS           The watchdog timer handler was registered.
+  @retval EFI_ALREADY_STARTED   NotifyFunction is not NULL, and a handler is already
+                                registered.
+  @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+                                previously registered.
+
+**/
+EFI_STATUS
+EFIAPI
+SP805RegisterHandler (
+  IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL   *This,
+  IN EFI_WATCHDOG_TIMER_NOTIFY                NotifyFunction
+  )
+{
+  // ERROR: This function is not supported.
+  // The hardware watchdog will reset the board
+  return EFI_INVALID_PARAMETER;
+}
+
+/**
+
+  This function adjusts the period of timer interrupts to the value specified
+  by TimerPeriod.  If the timer period is updated, then the selected timer
+  period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned.  If
+  the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+  If an error occurs while attempting to update the timer period, then the
+  timer hardware will be put back in its state prior to this call, and
+  EFI_DEVICE_ERROR is returned.  If TimerPeriod is 0, then the timer interrupt
+  is disabled.  This is not the same as disabling the CPU's interrupts.
+  Instead, it must either turn off the timer hardware, or it must adjust the
+  interrupt controller so that a CPU interrupt is not generated when the timer
+  interrupt fires.
+
+  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param  TimerPeriod      The rate to program the timer interrupt in 100 nS units. If
+                           the timer hardware is not programmable, then EFI_UNSUPPORTED is
+                           returned. If the timer is programmable, then the timer period
+                           will be rounded up to the nearest timer period that is supported
+                           by the timer hardware. If TimerPeriod is set to 0, then the
+                           timer interrupts will be disabled.
+
+
+  @retval EFI_SUCCESS           The timer period was changed.
+  @retval EFI_UNSUPPORTED       The platform cannot change the period of the timer interrupt.
+  @retval EFI_DEVICE_ERROR      The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+SP805SetTimerPeriod (
+  IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL   *This,
+  IN UINT64                                   TimerPeriod   // In 100ns units
+  )
+{
+  EFI_STATUS  Status = EFI_SUCCESS;
+  UINT64      Ticks64bit;
+
+  SP805Unlock();
+
+  if( TimerPeriod == 0 ) {
+    // This is a watchdog stop request
+    SP805Stop();
+    goto EXIT;
+  } else {
+    // Calculate the Watchdog ticks required for a delay of (TimerTicks * 100) nanoseconds
+    // The SP805 will count down to ZERO once, generate an interrupt and
+    // then it will again reload the initial value and start again.
+    // On the second time when it reaches ZERO, it will actually reset the board.
+    // Therefore, we need to load half the required delay.
+    //
+    // WatchdogTicks = ((TimerPeriod * 100 * SP805_CLOCK_FREQUENCY) / 1GHz) / 2 ;
+    //
+    // i.e.:
+    //
+    // WatchdogTicks = (TimerPeriod * SP805_CLOCK_FREQUENCY) / 20 MHz ;
+
+    Ticks64bit = DivU64x32(MultU64x32(TimerPeriod, (UINTN)PcdGet32(PcdSP805WatchdogClockFrequencyInHz)), 20000000);
+
+    // The registers in the SP805 are only 32 bits
+    if(Ticks64bit > (UINT64)0xFFFFFFFF) {
+      // We could load the watchdog with the maximum supported value but
+      // if a smaller value was requested, this could have the watchdog
+      // triggering before it was intended.
+      // Better generate an error to let the caller know.
+      Status = EFI_DEVICE_ERROR;
+      goto EXIT;
+    }
+
+    // Update the watchdog with a 32-bit value.
+    MmioWrite32(SP805_WDOG_LOAD_REG, (UINT32)Ticks64bit);
+
+    // Start the watchdog
+    SP805Start();
+  }
+
+  EXIT:
+  // Ensure the watchdog is locked before exiting.
+  SP805Lock();
+  return Status;
+}
+
+/**
+  This function retrieves the period of timer interrupts in 100 ns units,
+  returns that value in TimerPeriod, and returns EFI_SUCCESS.  If TimerPeriod
+  is NULL, then EFI_INVALID_PARAMETER is returned.  If a TimerPeriod of 0 is
+  returned, then the timer is currently disabled.
+
+  @param  This             The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param  TimerPeriod      A pointer to the timer period to retrieve in 100 ns units. If
+                           0 is returned, then the timer is currently disabled.
+
+
+  @retval EFI_SUCCESS           The timer period was returned in TimerPeriod.
+  @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+SP805GetTimerPeriod (
+  IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL   *This,
+  OUT UINT64                                  *TimerPeriod
+  )
+{
+  EFI_STATUS  Status = EFI_SUCCESS;
+  UINT64      ReturnValue;
+
+  if (TimerPeriod == NULL) {
+    return EFI_INVALID_PARAMETER;
+  }
+
+  // Check if the watchdog is stopped
+  if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
+    // It is stopped, so return zero.
+    ReturnValue = 0;
+  } else {
+    // Convert the Watchdog ticks into TimerPeriod
+    // Ensure 64bit arithmetic throughout because the Watchdog ticks may already
+    // be at the maximum 32 bit value and we still need to multiply that by 600.
+    ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 );
+  }
+
+  *TimerPeriod = ReturnValue;
+
+  return Status;
+}
+
+/**
+  Interface structure for the Watchdog Architectural Protocol.
+
+  @par Protocol Description:
+  This protocol provides a service to set the amount of time to wait
+  before firing the watchdog timer, and it also provides a service to
+  register a handler that is invoked when the watchdog timer fires.
+
+  @par When the watchdog timer fires, control will be passed to a handler
+  if one has been registered.  If no handler has been registered,
+  or the registered handler returns, then the system will be
+  reset by calling the Runtime Service ResetSystem().
+
+  @param RegisterHandler
+  Registers a handler that will be called each time the
+  watchdogtimer interrupt fires.  TimerPeriod defines the minimum
+  time between timer interrupts, so TimerPeriod will also
+  be the minimum time between calls to the registered
+  handler.
+  NOTE: If the watchdog resets the system in hardware, then
+        this function will not have any chance of executing.
+
+  @param SetTimerPeriod
+  Sets the period of the timer interrupt in 100 nS units.
+  This function is optional, and may return EFI_UNSUPPORTED.
+  If this function is supported, then the timer period will
+  be rounded up to the nearest supported timer period.
+
+  @param GetTimerPeriod
+  Retrieves the period of the timer interrupt in 100 nS units.
+
+**/
+EFI_WATCHDOG_TIMER_ARCH_PROTOCOL    gWatchdogTimer = {
+  (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) SP805RegisterHandler,
+  (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) SP805SetTimerPeriod,
+  (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) SP805GetTimerPeriod
+};
+
+/**
+  Initialize the state information for the Watchdog Timer Architectural Protocol.
+
+  @param  ImageHandle   of the loaded driver
+  @param  SystemTable   Pointer to the System Table
+
+  @retval EFI_SUCCESS           Protocol registered
+  @retval EFI_OUT_OF_RESOURCES  Cannot allocate protocol data structure
+  @retval EFI_DEVICE_ERROR      Hardware problems
+
+**/
+EFI_STATUS
+EFIAPI
+SP805Initialize (
+  IN EFI_HANDLE         ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  EFI_STATUS  Status;
+  EFI_HANDLE  Handle;
+
+  // Unlock access to the SP805 registers
+  SP805Unlock ();
+
+  // Stop the watchdog from triggering unexpectedly
+  SP805Stop ();
+
+  // Set the watchdog to reset the board when triggered
+  if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) {
+    MmioOr32 (SP805_WDOG_CONTROL_REG, SP805_WDOG_CTRL_RESEN);
+  }
+
+  // Prohibit any rogue access to SP805 registers
+  SP805Lock();
+  
+  //
+  // Make sure the Watchdog Timer Architectural Protocol has not been installed in the system yet.
+  // This will avoid conflicts with the universal watchdog
+  //
+  ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid);
+
+  // Register for an ExitBootServicesEvent
+  Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
+  if (EFI_ERROR(Status)) {
+    Status = EFI_OUT_OF_RESOURCES;
+    goto EXIT;
+  }
+
+  // Install the Timer Architectural Protocol onto a new handle
+  Handle = NULL;
+  Status = gBS->InstallMultipleProtocolInterfaces(
+                  &Handle,
+                  &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer,
+                  NULL
+                  );
+  if (EFI_ERROR(Status)) {
+    Status = EFI_OUT_OF_RESOURCES;
+    goto EXIT;
+  }
+
+EXIT:
+  if(EFI_ERROR(Status)) {
+    // The watchdog failed to initialize
+    ASSERT(FALSE);
+  }
+  return Status;
+}
diff --git a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
index ffcd501aae..5ec35188c9 100644
--- a/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+++ b/ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
@@ -1,52 +1,52 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SP805WatchdogDxe
-  FILE_GUID                      = ebd705fb-fa92-46a7-b32b-7f566d944614 
-  MODULE_TYPE                    = DXE_DRIVER
-  VERSION_STRING                 = 1.0
-
-  ENTRY_POINT                    = SP805Initialize
-
-[Sources.common]
-  SP805Watchdog.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  IoLib
-  PcdLib
-  UefiLib
-  UefiBootServicesTableLib
-  UefiDriverEntryPoint
-  UefiRuntimeServicesTableLib
-
-[Pcd]
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz
-
-[Protocols]
-  gEfiWatchdogTimerArchProtocolGuid  
-
-[Depex]
-  TRUE
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = SP805WatchdogDxe
+  FILE_GUID                      = ebd705fb-fa92-46a7-b32b-7f566d944614 
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+
+  ENTRY_POINT                    = SP805Initialize
+
+[Sources.common]
+  SP805Watchdog.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  IoLib
+  PcdLib
+  UefiLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  UefiRuntimeServicesTableLib
+
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
+  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz
+
+[Protocols]
+  gEfiWatchdogTimerArchProtocolGuid  
+
+[Depex]
+  TRUE
diff --git a/ArmPlatformPkg/Include/Drivers/PL111Lcd.h b/ArmPlatformPkg/Include/Drivers/PL111Lcd.h
index d68acd83b3..8c1c29de6c 100644
--- a/ArmPlatformPkg/Include/Drivers/PL111Lcd.h
+++ b/ArmPlatformPkg/Include/Drivers/PL111Lcd.h
@@ -1,140 +1,140 @@
-/** @file  PL111Lcd.h
-
- Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution.  The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- **/
-
-#ifndef _PL111LCD_H__
-#define _PL111LCD_H__
-
-/**********************************************************************
- *
- *  This header file contains all the bits of the PL111 that are
- *  platform independent.
- *
- **********************************************************************/
-
-// Controller Register Offsets
-#define PL111_REG_LCD_TIMING_0            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x000)
-#define PL111_REG_LCD_TIMING_1            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x004)
-#define PL111_REG_LCD_TIMING_2            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x008)
-#define PL111_REG_LCD_TIMING_3            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x00C)
-#define PL111_REG_LCD_UP_BASE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x010)
-#define PL111_REG_LCD_LP_BASE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x014)
-#define PL111_REG_LCD_CONTROL             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x018)
-#define PL111_REG_LCD_IMSC                ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x01C)
-#define PL111_REG_LCD_RIS                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x020)
-#define PL111_REG_LCD_MIS                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x024)
-#define PL111_REG_LCD_ICR                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x028)
-#define PL111_REG_LCD_UP_CURR             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x02C)
-#define PL111_REG_LCD_LP_CURR             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x030)
-#define PL111_REG_LCD_PALETTE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x200)
-
-// Identification Register Offsets
-#define PL111_REG_CLCD_PERIPH_ID_0        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE0)
-#define PL111_REG_CLCD_PERIPH_ID_1        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE4)
-#define PL111_REG_CLCD_PERIPH_ID_2        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE8)
-#define PL111_REG_CLCD_PERIPH_ID_3        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFEC)
-#define PL111_REG_CLCD_P_CELL_ID_0        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF0)
-#define PL111_REG_CLCD_P_CELL_ID_1        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF4)
-#define PL111_REG_CLCD_P_CELL_ID_2        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF8)
-#define PL111_REG_CLCD_P_CELL_ID_3        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFFC)
-
-/**********************************************************************/
-
-// Register components (register bits)
-
-// This should make life easier to program specific settings in the different registers
-// by simplifying the setting up of the individual bits of each register
-// and then assembling the final register value.
-
-/**********************************************************************/
-
-// Register: PL111_REG_LCD_TIMING_0
-#define HOR_AXIS_PANEL(hbp,hfp,hsw,hor_res) (UINT32)(((UINT32)(hbp) << 24) | ((UINT32)(hfp) << 16) | ((UINT32)(hsw) << 8) | (((UINT32)((hor_res)/16)-1) << 2))
-
-// Register: PL111_REG_LCD_TIMING_1
-#define VER_AXIS_PANEL(vbp,vfp,vsw,ver_res) (UINT32)(((UINT32)(vbp) << 24) | ((UINT32)(vfp) << 16) | ((UINT32)(vsw) << 10) | ((ver_res)-1))
-
-// Register: PL111_REG_LCD_TIMING_2
-#define PL111_BIT_SHIFT_PCD_HI            27
-#define PL111_BIT_SHIFT_BCD               26
-#define PL111_BIT_SHIFT_CPL               16
-#define PL111_BIT_SHIFT_IOE               14
-#define PL111_BIT_SHIFT_IPC               13
-#define PL111_BIT_SHIFT_IHS               12
-#define PL111_BIT_SHIFT_IVS               11
-#define PL111_BIT_SHIFT_ACB               6
-#define PL111_BIT_SHIFT_CLKSEL            5
-#define PL111_BIT_SHIFT_PCD_LO            0
-
-#define PL111_BCD                         (1 << 26)
-#define PL111_IPC                         (1 << 13)
-#define PL111_IHS                         (1 << 12)
-#define PL111_IVS                         (1 << 11)
-
-#define CLK_SIG_POLARITY(hor_res)         (UINT32)(PL111_BCD | PL111_IPC | PL111_IHS | PL111_IVS | (((hor_res)-1) << 16))
-
-// Register: PL111_REG_LCD_TIMING_3
-#define PL111_BIT_SHIFT_LEE               16
-#define PL111_BIT_SHIFT_LED               0
-
-#define PL111_CTRL_WATERMARK              (1 << 16)
-#define PL111_CTRL_LCD_V_COMP             (1 << 12)
-#define PL111_CTRL_LCD_PWR                (1 << 11)
-#define PL111_CTRL_BEPO                   (1 << 10)
-#define PL111_CTRL_BEBO                   (1 << 9)
-#define PL111_CTRL_BGR                    (1 << 8)
-#define PL111_CTRL_LCD_DUAL               (1 << 7)
-#define PL111_CTRL_LCD_MONO_8             (1 << 6)
-#define PL111_CTRL_LCD_TFT                (1 << 5)
-#define PL111_CTRL_LCD_BW                 (1 << 4)
-#define PL111_CTRL_LCD_1BPP               (0 << 1)
-#define PL111_CTRL_LCD_2BPP               (1 << 1)
-#define PL111_CTRL_LCD_4BPP               (2 << 1)
-#define PL111_CTRL_LCD_8BPP               (3 << 1)
-#define PL111_CTRL_LCD_16BPP              (4 << 1)
-#define PL111_CTRL_LCD_24BPP              (5 << 1)
-#define PL111_CTRL_LCD_16BPP_565          (6 << 1)
-#define PL111_CTRL_LCD_12BPP_444          (7 << 1)
-#define PL111_CTRL_LCD_BPP(Bpp)           ((Bpp) << 1)
-#define PL111_CTRL_LCD_EN                 1
-
-/**********************************************************************/
-
-// Register: PL111_REG_LCD_TIMING_0
-#define PL111_LCD_TIMING_0_HBP(hbp)       (((hbp) & 0xFF) << 24)
-#define PL111_LCD_TIMING_0_HFP(hfp)       (((hfp) & 0xFF) << 16)
-#define PL111_LCD_TIMING_0_HSW(hsw)       (((hsw) & 0xFF) << 8)
-#define PL111_LCD_TIMING_0_PPL(ppl)       (((hsw) & 0x3F) << 2)
-
-// Register: PL111_REG_LCD_TIMING_1
-#define PL111_LCD_TIMING_1_VBP(vbp)       (((vbp) & 0xFF) << 24)
-#define PL111_LCD_TIMING_1_VFP(vfp)       (((vfp) & 0xFF) << 16)
-#define PL111_LCD_TIMING_1_VSW(vsw)       (((vsw) & 0x3F) << 10)
-#define PL111_LCD_TIMING_1_LPP(lpp)        ((lpp) & 0xFC)
-
-// Register: PL111_REG_LCD_TIMING_2
-#define PL111_BIT_MASK_PCD_HI             0xF8000000
-#define PL111_BIT_MASK_BCD                0x04000000
-#define PL111_BIT_MASK_CPL                0x03FF0000
-#define PL111_BIT_MASK_IOE                0x00004000
-#define PL111_BIT_MASK_IPC                0x00002000
-#define PL111_BIT_MASK_IHS                0x00001000
-#define PL111_BIT_MASK_IVS                0x00000800
-#define PL111_BIT_MASK_ACB                0x000007C0
-#define PL111_BIT_MASK_CLKSEL             0x00000020
-#define PL111_BIT_MASK_PCD_LO             0x0000001F
-
-// Register: PL111_REG_LCD_TIMING_3
-#define PL111_BIT_MASK_LEE                0x00010000
-#define PL111_BIT_MASK_LED                0x0000007F
-
-#endif /* _PL111LCD_H__ */
+/** @file  PL111Lcd.h
+
+ Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution.  The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ **/
+
+#ifndef _PL111LCD_H__
+#define _PL111LCD_H__
+
+/**********************************************************************
+ *
+ *  This header file contains all the bits of the PL111 that are
+ *  platform independent.
+ *
+ **********************************************************************/
+
+// Controller Register Offsets
+#define PL111_REG_LCD_TIMING_0            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x000)
+#define PL111_REG_LCD_TIMING_1            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x004)
+#define PL111_REG_LCD_TIMING_2            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x008)
+#define PL111_REG_LCD_TIMING_3            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x00C)
+#define PL111_REG_LCD_UP_BASE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x010)
+#define PL111_REG_LCD_LP_BASE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x014)
+#define PL111_REG_LCD_CONTROL             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x018)
+#define PL111_REG_LCD_IMSC                ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x01C)
+#define PL111_REG_LCD_RIS                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x020)
+#define PL111_REG_LCD_MIS                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x024)
+#define PL111_REG_LCD_ICR                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x028)
+#define PL111_REG_LCD_UP_CURR             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x02C)
+#define PL111_REG_LCD_LP_CURR             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x030)
+#define PL111_REG_LCD_PALETTE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x200)
+
+// Identification Register Offsets
+#define PL111_REG_CLCD_PERIPH_ID_0        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE0)
+#define PL111_REG_CLCD_PERIPH_ID_1        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE4)
+#define PL111_REG_CLCD_PERIPH_ID_2        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE8)
+#define PL111_REG_CLCD_PERIPH_ID_3        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFEC)
+#define PL111_REG_CLCD_P_CELL_ID_0        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF0)
+#define PL111_REG_CLCD_P_CELL_ID_1        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF4)
+#define PL111_REG_CLCD_P_CELL_ID_2        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF8)
+#define PL111_REG_CLCD_P_CELL_ID_3        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFFC)
+
+/**********************************************************************/
+
+// Register components (register bits)
+
+// This should make life easier to program specific settings in the different registers
+// by simplifying the setting up of the individual bits of each register
+// and then assembling the final register value.
+
+/**********************************************************************/
+
+// Register: PL111_REG_LCD_TIMING_0
+#define HOR_AXIS_PANEL(hbp,hfp,hsw,hor_res) (UINT32)(((UINT32)(hbp) << 24) | ((UINT32)(hfp) << 16) | ((UINT32)(hsw) << 8) | (((UINT32)((hor_res)/16)-1) << 2))
+
+// Register: PL111_REG_LCD_TIMING_1
+#define VER_AXIS_PANEL(vbp,vfp,vsw,ver_res) (UINT32)(((UINT32)(vbp) << 24) | ((UINT32)(vfp) << 16) | ((UINT32)(vsw) << 10) | ((ver_res)-1))
+
+// Register: PL111_REG_LCD_TIMING_2
+#define PL111_BIT_SHIFT_PCD_HI            27
+#define PL111_BIT_SHIFT_BCD               26
+#define PL111_BIT_SHIFT_CPL               16
+#define PL111_BIT_SHIFT_IOE               14
+#define PL111_BIT_SHIFT_IPC               13
+#define PL111_BIT_SHIFT_IHS               12
+#define PL111_BIT_SHIFT_IVS               11
+#define PL111_BIT_SHIFT_ACB               6
+#define PL111_BIT_SHIFT_CLKSEL            5
+#define PL111_BIT_SHIFT_PCD_LO            0
+
+#define PL111_BCD                         (1 << 26)
+#define PL111_IPC                         (1 << 13)
+#define PL111_IHS                         (1 << 12)
+#define PL111_IVS                         (1 << 11)
+
+#define CLK_SIG_POLARITY(hor_res)         (UINT32)(PL111_BCD | PL111_IPC | PL111_IHS | PL111_IVS | (((hor_res)-1) << 16))
+
+// Register: PL111_REG_LCD_TIMING_3
+#define PL111_BIT_SHIFT_LEE               16
+#define PL111_BIT_SHIFT_LED               0
+
+#define PL111_CTRL_WATERMARK              (1 << 16)
+#define PL111_CTRL_LCD_V_COMP             (1 << 12)
+#define PL111_CTRL_LCD_PWR                (1 << 11)
+#define PL111_CTRL_BEPO                   (1 << 10)
+#define PL111_CTRL_BEBO                   (1 << 9)
+#define PL111_CTRL_BGR                    (1 << 8)
+#define PL111_CTRL_LCD_DUAL               (1 << 7)
+#define PL111_CTRL_LCD_MONO_8             (1 << 6)
+#define PL111_CTRL_LCD_TFT                (1 << 5)
+#define PL111_CTRL_LCD_BW                 (1 << 4)
+#define PL111_CTRL_LCD_1BPP               (0 << 1)
+#define PL111_CTRL_LCD_2BPP               (1 << 1)
+#define PL111_CTRL_LCD_4BPP               (2 << 1)
+#define PL111_CTRL_LCD_8BPP               (3 << 1)
+#define PL111_CTRL_LCD_16BPP              (4 << 1)
+#define PL111_CTRL_LCD_24BPP              (5 << 1)
+#define PL111_CTRL_LCD_16BPP_565          (6 << 1)
+#define PL111_CTRL_LCD_12BPP_444          (7 << 1)
+#define PL111_CTRL_LCD_BPP(Bpp)           ((Bpp) << 1)
+#define PL111_CTRL_LCD_EN                 1
+
+/**********************************************************************/
+
+// Register: PL111_REG_LCD_TIMING_0
+#define PL111_LCD_TIMING_0_HBP(hbp)       (((hbp) & 0xFF) << 24)
+#define PL111_LCD_TIMING_0_HFP(hfp)       (((hfp) & 0xFF) << 16)
+#define PL111_LCD_TIMING_0_HSW(hsw)       (((hsw) & 0xFF) << 8)
+#define PL111_LCD_TIMING_0_PPL(ppl)       (((hsw) & 0x3F) << 2)
+
+// Register: PL111_REG_LCD_TIMING_1
+#define PL111_LCD_TIMING_1_VBP(vbp)       (((vbp) & 0xFF) << 24)
+#define PL111_LCD_TIMING_1_VFP(vfp)       (((vfp) & 0xFF) << 16)
+#define PL111_LCD_TIMING_1_VSW(vsw)       (((vsw) & 0x3F) << 10)
+#define PL111_LCD_TIMING_1_LPP(lpp)        ((lpp) & 0xFC)
+
+// Register: PL111_REG_LCD_TIMING_2
+#define PL111_BIT_MASK_PCD_HI             0xF8000000
+#define PL111_BIT_MASK_BCD                0x04000000
+#define PL111_BIT_MASK_CPL                0x03FF0000
+#define PL111_BIT_MASK_IOE                0x00004000
+#define PL111_BIT_MASK_IPC                0x00002000
+#define PL111_BIT_MASK_IHS                0x00001000
+#define PL111_BIT_MASK_IVS                0x00000800
+#define PL111_BIT_MASK_ACB                0x000007C0
+#define PL111_BIT_MASK_CLKSEL             0x00000020
+#define PL111_BIT_MASK_PCD_LO             0x0000001F
+
+// Register: PL111_REG_LCD_TIMING_3
+#define PL111_BIT_MASK_LEE                0x00010000
+#define PL111_BIT_MASK_LED                0x0000007F
+
+#endif /* _PL111LCD_H__ */
diff --git a/ArmPlatformPkg/Include/Drivers/PL301Axi.h b/ArmPlatformPkg/Include/Drivers/PL301Axi.h
index 1bf936ff78..ae941839f0 100644
--- a/ArmPlatformPkg/Include/Drivers/PL301Axi.h
+++ b/ArmPlatformPkg/Include/Drivers/PL301Axi.h
@@ -1,21 +1,21 @@
-/** @file
-*
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef PL301AXI_H_
-#define PL301AXI_H_
-
-VOID PL301AxiInit(UINTN FAxiBase);
-
-
-#endif /* PL301AXI_H_ */
+/** @file
+*
+*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef PL301AXI_H_
+#define PL301AXI_H_
+
+VOID PL301AxiInit(UINTN FAxiBase);
+
+
+#endif /* PL301AXI_H_ */
diff --git a/ArmPlatformPkg/Include/Drivers/PL341Dmc.h b/ArmPlatformPkg/Include/Drivers/PL341Dmc.h
index 0227ced454..268b6da5c0 100644
--- a/ArmPlatformPkg/Include/Drivers/PL341Dmc.h
+++ b/ArmPlatformPkg/Include/Drivers/PL341Dmc.h
@@ -1,336 +1,336 @@
-/** @file
-*
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef _PL341DMC_H_
-#define _PL341DMC_H_
-
-
-typedef struct  {
-    UINTN	HasQos;        // has QoS registers
-    UINTN	MaxChip;       // number of memory chips accessible
-    BOOLEAN  IsUserCfg;
-    UINT32  User0Cfg;
-    UINT32  User2Cfg;
-    UINT32	RefreshPeriod;
-    UINT32	CasLatency;
-    UINT32	WriteLatency;
-    UINT32	t_mrd;
-    UINT32	t_ras;
-    UINT32	t_rc;
-    UINT32	t_rcd;
-    UINT32	t_rfc;
-    UINT32	t_rp;
-    UINT32	t_rrd;
-    UINT32	t_wr;
-    UINT32	t_wtr;
-    UINT32	t_xp;
-    UINT32	t_xsr;
-    UINT32	t_esr;
-    UINT32	MemoryCfg;
-    UINT32	MemoryCfg2;
-    UINT32	MemoryCfg3;
-    UINT32	ChipCfg0;
-    UINT32	ChipCfg1;
-    UINT32	ChipCfg2;
-    UINT32	ChipCfg3;
-    UINT32	t_faw;
-    UINT32	t_data_en;
-    UINT32	t_wdata_en;
-    UINT32  ModeReg;
-    UINT32  ExtModeReg;
-} PL341_DMC_CONFIG;
-
-/* Memory config bit fields */
-#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_9      0x1
-#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10     0x2
-#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_11     0x3
-#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_12     0x4
-#define DMC_MEMORY_CONFIG_ROW_ADDRESS_11        (0x0 << 3)
-#define DMC_MEMORY_CONFIG_ROW_ADDRESS_12        (0x1 << 3)
-#define DMC_MEMORY_CONFIG_ROW_ADDRESS_13        (0x2 << 3)
-#define DMC_MEMORY_CONFIG_ROW_ADDRESS_14        (0x3 << 3)
-#define DMC_MEMORY_CONFIG_ROW_ADDRESS_15        (0x4 << 3)
-#define DMC_MEMORY_CONFIG_ROW_ADDRESS_16        (0x5 << 3)
-#define DMC_MEMORY_CONFIG_BURST_2               (0x1 << 15)
-#define DMC_MEMORY_CONFIG_BURST_4               (0x2 << 15)
-#define DMC_MEMORY_CONFIG_BURST_8               (0x3 << 15)
-#define DMC_MEMORY_CONFIG_BURST_16              (0x4 << 15)
-#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_1    (0x0 << 21)
-#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_2    (0x1 << 21)
-#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_3    (0x2 << 21)
-#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_4    (0x3 << 21)
-
-#define DMC_MEMORY_CFG2_CLK_ASYNC    (0x0 << 0)
-#define DMC_MEMORY_CFG2_CLK_SYNC    (0x1 << 0)
-#define DMC_MEMORY_CFG2_DQM_INIT    (0x1 << 2)
-#define DMC_MEMORY_CFG2_CKE_INIT    (0x1 << 3)
-#define DMC_MEMORY_CFG2_BANK_BITS_2    (0x0 << 4)
-#define DMC_MEMORY_CFG2_BANK_BITS_3    (0x3 << 4)
-#define DMC_MEMORY_CFG2_MEM_WIDTH_16    (0x0 << 6)
-#define DMC_MEMORY_CFG2_MEM_WIDTH_32    (0x1 << 6)
-#define DMC_MEMORY_CFG2_MEM_WIDTH_64    (0x2 << 6)
-#define DMC_MEMORY_CFG2_MEM_WIDTH_RESERVED  (0x3 << 6)
-
-//
-// DMC Configuration Register Map
-//
-#define DMC_STATUS_REG              0x00
-#define DMC_COMMAND_REG             0x04
-#define DMC_DIRECT_CMD_REG          0x08
-#define DMC_MEMORY_CONFIG_REG       0x0C
-#define DMC_REFRESH_PRD_REG         0x10
-#define DMC_CAS_LATENCY_REG         0x14
-#define DMC_WRITE_LATENCY_REG       0x18
-#define DMC_T_MRD_REG               0x1C
-#define DMC_T_RAS_REG               0x20
-#define DMC_T_RC_REG                0x24
-#define DMC_T_RCD_REG               0x28
-#define DMC_T_RFC_REG               0x2C
-#define DMC_T_RP_REG                0x30
-#define DMC_T_RRD_REG               0x34
-#define DMC_T_WR_REG                0x38
-#define DMC_T_WTR_REG               0x3C
-#define DMC_T_XP_REG                0x40
-#define DMC_T_XSR_REG               0x44
-#define DMC_T_ESR_REG               0x48
-#define DMC_MEMORY_CFG2_REG         0x4C
-#define DMC_MEMORY_CFG3_REG         0x50
-#define DMC_T_FAW_REG               0x54
-#define DMC_T_RDATA_EN              0x5C	/* DFI read data enable register */
-#define DMC_T_WRLAT_DIFF            0x60        /* DFI write data enable register */
-
-// Returns the state of the memory controller:
-#define DMC_STATUS_CONFIG       0x0
-#define DMC_STATUS_READY        0x1
-#define DMC_STATUS_PAUSED       0x2
-#define DMC_STATUS_LOWPOWER     0x3
-
-// Changes the state of the memory controller:
-#define DMC_COMMAND_GO              0x0
-#define DMC_COMMAND_SLEEP           0x1
-#define DMC_COMMAND_WAKEUP          0x2
-#define DMC_COMMAND_PAUSE           0x3
-#define DMC_COMMAND_CONFIGURE       0x4
-#define DMC_COMMAND_ACTIVEPAUSE     0x7
-
-// Determines the command required
-#define DMC_DIRECT_CMD_MEMCMD_PRECHARGEALL      0x0
-#define DMC_DIRECT_CMD_MEMCMD_AUTOREFRESH       (0x1 << 18)
-#define DMC_DIRECT_CMD_MEMCMD_MODEREG           (0x2 << 18)
-#define DMC_DIRECT_CMD_MEMCMD_EXTMODEREG        (0x2 << 18)
-#define DMC_DIRECT_CMD_MEMCMD_NOP               (0x3 << 18)
-#define DMC_DIRECT_CMD_MEMCMD_DPD               (0x1 << 22)
-#define DMC_DIRECT_CMD_BANKADDR(n)              ((n & 0x3) << 16)
-#define DMC_DIRECT_CMD_CHIP_ADDR(n)             ((n & 0x3) << 20)
-
-
-//
-// AXI ID configuration register map
-//
-#define DMC_ID_0_CFG_REG            0x100
-#define DMC_ID_1_CFG_REG            0x104
-#define DMC_ID_2_CFG_REG            0x108
-#define DMC_ID_3_CFG_REG            0x10C
-#define DMC_ID_4_CFG_REG            0x110
-#define DMC_ID_5_CFG_REG            0x114
-#define DMC_ID_6_CFG_REG            0x118
-#define DMC_ID_7_CFG_REG            0x11C
-#define DMC_ID_8_CFG_REG            0x120
-#define DMC_ID_9_CFG_REG            0x124
-#define DMC_ID_10_CFG_REG           0x128
-#define DMC_ID_11_CFG_REG           0x12C
-#define DMC_ID_12_CFG_REG           0x130
-#define DMC_ID_13_CFG_REG           0x134
-#define DMC_ID_14_CFG_REG           0x138
-#define DMC_ID_15_CFG_REG           0x13C
-
-// Set the QoS
-#define DMC_ID_CFG_QOS_DISABLE      0
-#define DMC_ID_CFG_QOS_ENABLE       1
-#define DMC_ID_CFG_QOS_MIN          2
-
-
-//
-// Chip configuration register map
-//
-#define DMC_CHIP_0_CFG_REG          0x200
-#define DMC_CHIP_1_CFG_REG          0x204
-#define DMC_CHIP_2_CFG_REG          0x208
-#define DMC_CHIP_3_CFG_REG          0x20C
-
-//
-// User Defined Pins
-//
-#define DMC_USER_STATUS_REG         0x300
-#define DMC_USER_0_CFG_REG          0x304
-#define DMC_USER_1_CFG_REG          0x308
-#define DMC_FEATURE_CRTL_REG        0x30C
-#define DMC_USER_2_CFG_REG          0x310
-
-
-//
-// PHY Register Settings
-//
-#define PHY_PTM_DFI_CLK_RANGE					0xE00		// DDR2 PHY PTM register offset
-#define PHY_PTM_IOTERM							0xE04
-#define PHY_PTM_PLL_EN          				0xe0c
-#define PHY_PTM_PLL_RANGE       				0xe18
-#define PHY_PTM_FEEBACK_DIV     				0xe1c
-#define PHY_PTM_RCLK_DIV        				0xe20
-#define PHY_PTM_LOCK_STATUS     				0xe28
-#define PHY_PTM_INIT_DONE	     				0xe34
-#define PHY_PTM_ADDCOM_IOSTR_OFF				0xec8
-#define PHY_PTM_SQU_TRAINING    				0xee8
-#define PHY_PTM_SQU_STAT        				0xeec
-
-// ==============================================================================
-// PIPD 40G DDR2/DDR3 PHY Register definitions
-//
-// Offsets from APB Base Address
-// ==============================================================================
-#define PHY_BYTE0_OFFSET					0x000
-#define PHY_BYTE1_OFFSET					0x200
-#define PHY_BYTE2_OFFSET					0x400
-#define PHY_BYTE3_OFFSET					0x600
-
-#define PHY_BYTE0_COARSE_SQADJ_INIT			0x064	;// Coarse squelch adjust
-#define PHY_BYTE1_COARSE_SQADJ_INIT			0x264	;// Coarse squelch adjust
-#define PHY_BYTE2_COARSE_SQADJ_INIT			0x464	;// Coarse squelch adjust
-#define PHY_BYTE3_COARSE_SQADJ_INIT			0x664	;// Coarse squelch adjust
-
-#define PHY_BYTE0_IOSTR_OFFSET				0x004
-#define PHY_BYTE1_IOSTR_OFFSET				0x204
-#define PHY_BYTE2_IOSTR_OFFSET				0x404
-#define PHY_BYTE3_IOSTR_OFFSET				0x604
-
-
-;//--------------------------------------------------------------------------
-
-// DFI Clock ranges:
-
-#define PHY_PTM_DFI_CLK_RANGE_200MHz   		0x0
-#define PHY_PTM_DFI_CLK_RANGE_201_267MHz	0x1
-#define PHY_PTM_DFI_CLK_RANGE_268_333MHz	0x2
-#define PHY_PTM_DFI_CLK_RANGE_334_400MHz	0x3
-#define PHY_PTM_DFI_CLK_RANGE_401_533MHz	0x4
-#define PHY_PTM_DFI_CLK_RANGE_534_667MHz	0x5
-#define PHY_PTM_DFI_CLK_RANGE_668_800MHz	0x6
-
-
-
-#define  PHY_PTM_DFI_CLK_RANGE_VAL			PHY_PTM_DFI_CLK_RANGE_334_400MHz
-
-//--------------------------------------------------------------------------
-
-
-// PLL Range
-
-#define PHY_PTM_PLL_RANGE_200_400MHz		0x0	// b0 = frequency >= 200 MHz and < 400 MHz
-#define PHY_PTM_PLL_RANGE_400_800MHz		0x1	// b1 = frequency >= 400 MHz.
-#define PHY_PTM_FEEBACK_DIV_200_400MHz		0x0	// b0 = frequency >= 200 MHz and < 400 MHz
-#define PHY_PTM_FEEBACK_DIV_400_800MHz		0x1	// b1 = frequency >= 400 MHz.
-#define PHY_PTM_REFCLK_DIV_200_400MHz		0x0
-#define PHY_PTM_REFCLK_DIV_400_800MHz		0x1
-
-#define TC_UIOLHNC_MASK                         0x000003C0
-#define TC_UIOLHNC_SHIFT                        0x6
-#define TC_UIOLHPC_MASK                         0x0000003F
-#define TC_UIOLHPC_SHIFT                        0x2
-#define TC_UIOHOCT_MASK                         0x2
-#define TC_UIOHOCT_SHIFT                        0x1
-#define TC_UIOHSTOP_SHIFT                       0x0
-#define TC_UIOLHXC_VALUE                        0x4
-
-#define PHY_PTM_SQU_TRAINING_ENABLE				0x1
-#define PHY_PTM_SQU_TRAINING_DISABLE				0x0
-
-
-//--------------------------------------
-// JEDEC DDR2 Device Register definitions and settings
-//--------------------------------------
-#define DDR_MODESET_SHFT						14
-#define DDR_MODESET_MR							0x0		;// Mode register
-#define DDR_MODESET_EMR							0x1		;// Extended Mode register
-#define DDR_MODESET_EMR2						0x2
-#define DDR_MODESET_EMR3						0x3
-
-//
-// Extended Mode Register settings
-//
-#define DDR_EMR_OCD_MASK                        0x0000380
-#define DDR_EMR_OCD_SHIFT                       0x7
-#define DDR_EMR_RTT_MASK                        0x00000044                  // DDR2 Device RTT (ODT) settings
-#define DDR_EMR_RTT_SHIFT                       0x2
-#define DDR_EMR_ODS_MASK                        0x00000002                  // DDR2 Output Drive Strength
-#define DDR_EMR_ODS_SHIFT                       0x0001
-
-// Termination Values:
-#define DDR_EMR_RTT_50R                         0x00000044                  // DDR2 50 Ohm termination
-#define DDR_EMR_RTT_75R                         0x00000004                  // DDR2 75 Ohm termination
-#define DDR_EMR_RTT_150                         0x00000040                  // DDR2 150 Ohm termination
-
-// Output Drive Strength Values:
-#define DDR_EMR_ODS_FULL                        0x0                         // DDR2 Full Drive Strength
-#define DDR_EMR_ODS_HALF                        0x1                         // DDR2 Half Drive Strength
-
-// OCD values
-#define DDR_EMR_OCD_DEFAULT                     0x7
-#define DDR_EMR_OCD_NS                          0x0
-
-#define DDR_EMR_ODS_VAL                         DDR_EMR_ODS_FULL
-
-#define DDR_SDRAM_START_ADDR					0x10000000
-
-
-// ----------------------------------------
-// PHY IOTERM values
-// ----------------------------------------
-#define PHY_PTM_IOTERM_OFF					0x0
-#define PHY_PTM_IOTERM_150R					0x1
-#define PHY_PTM_IOTERM_75R					0x2
-#define PHY_PTM_IOTERM_50R					0x3
-
-#define PHY_BYTE_IOSTR_60OHM				0x0
-#define PHY_BYTE_IOSTR_40OHM				0x1
-#define PHY_BYTE_IOSTR_30OHM				0x2
-#define PHY_BYTE_IOSTR_30AOHM				0x3
-
-#define DDR2_MR_BURST_LENGTH_4     (2)
-#define DDR2_MR_BURST_LENGTH_8     (3)
-#define DDR2_MR_DLL_RESET          (1 << 8)
-#define DDR2_MR_CAS_LATENCY_4      (4 << 4)
-#define DDR2_MR_CAS_LATENCY_5      (5 << 4)
-#define DDR2_MR_CAS_LATENCY_6      (6 << 4)
-#define DDR2_MR_WR_CYCLES_2        (1 << 9)
-#define DDR2_MR_WR_CYCLES_3        (2 << 9)
-#define DDR2_MR_WR_CYCLES_4        (3 << 9)
-#define DDR2_MR_WR_CYCLES_5        (4 << 9)
-#define DDR2_MR_WR_CYCLES_6        (5 << 9)
-
-
-VOID
-PL341DmcInit (
-  IN  UINTN             DmcBase,
-  IN  PL341_DMC_CONFIG* DmcConfig
-  );
-
-VOID PL341DmcPhyInit (
-  IN UINTN   DmcPhyBase
-  );
-
-VOID PL341DmcTrainPHY (
-  IN UINTN   DmcPhyBase
-  );
-
-#endif /* _PL341DMC_H_ */
+/** @file
+*
+*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef _PL341DMC_H_
+#define _PL341DMC_H_
+
+
+typedef struct  {
+    UINTN	HasQos;        // has QoS registers
+    UINTN	MaxChip;       // number of memory chips accessible
+    BOOLEAN  IsUserCfg;
+    UINT32  User0Cfg;
+    UINT32  User2Cfg;
+    UINT32	RefreshPeriod;
+    UINT32	CasLatency;
+    UINT32	WriteLatency;
+    UINT32	t_mrd;
+    UINT32	t_ras;
+    UINT32	t_rc;
+    UINT32	t_rcd;
+    UINT32	t_rfc;
+    UINT32	t_rp;
+    UINT32	t_rrd;
+    UINT32	t_wr;
+    UINT32	t_wtr;
+    UINT32	t_xp;
+    UINT32	t_xsr;
+    UINT32	t_esr;
+    UINT32	MemoryCfg;
+    UINT32	MemoryCfg2;
+    UINT32	MemoryCfg3;
+    UINT32	ChipCfg0;
+    UINT32	ChipCfg1;
+    UINT32	ChipCfg2;
+    UINT32	ChipCfg3;
+    UINT32	t_faw;
+    UINT32	t_data_en;
+    UINT32	t_wdata_en;
+    UINT32  ModeReg;
+    UINT32  ExtModeReg;
+} PL341_DMC_CONFIG;
+
+/* Memory config bit fields */
+#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_9      0x1
+#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_10     0x2
+#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_11     0x3
+#define DMC_MEMORY_CONFIG_COLUMN_ADDRESS_12     0x4
+#define DMC_MEMORY_CONFIG_ROW_ADDRESS_11        (0x0 << 3)
+#define DMC_MEMORY_CONFIG_ROW_ADDRESS_12        (0x1 << 3)
+#define DMC_MEMORY_CONFIG_ROW_ADDRESS_13        (0x2 << 3)
+#define DMC_MEMORY_CONFIG_ROW_ADDRESS_14        (0x3 << 3)
+#define DMC_MEMORY_CONFIG_ROW_ADDRESS_15        (0x4 << 3)
+#define DMC_MEMORY_CONFIG_ROW_ADDRESS_16        (0x5 << 3)
+#define DMC_MEMORY_CONFIG_BURST_2               (0x1 << 15)
+#define DMC_MEMORY_CONFIG_BURST_4               (0x2 << 15)
+#define DMC_MEMORY_CONFIG_BURST_8               (0x3 << 15)
+#define DMC_MEMORY_CONFIG_BURST_16              (0x4 << 15)
+#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_1    (0x0 << 21)
+#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_2    (0x1 << 21)
+#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_3    (0x2 << 21)
+#define DMC_MEMORY_CONFIG_ACTIVE_CHIP_4    (0x3 << 21)
+
+#define DMC_MEMORY_CFG2_CLK_ASYNC    (0x0 << 0)
+#define DMC_MEMORY_CFG2_CLK_SYNC    (0x1 << 0)
+#define DMC_MEMORY_CFG2_DQM_INIT    (0x1 << 2)
+#define DMC_MEMORY_CFG2_CKE_INIT    (0x1 << 3)
+#define DMC_MEMORY_CFG2_BANK_BITS_2    (0x0 << 4)
+#define DMC_MEMORY_CFG2_BANK_BITS_3    (0x3 << 4)
+#define DMC_MEMORY_CFG2_MEM_WIDTH_16    (0x0 << 6)
+#define DMC_MEMORY_CFG2_MEM_WIDTH_32    (0x1 << 6)
+#define DMC_MEMORY_CFG2_MEM_WIDTH_64    (0x2 << 6)
+#define DMC_MEMORY_CFG2_MEM_WIDTH_RESERVED  (0x3 << 6)
+
+//
+// DMC Configuration Register Map
+//
+#define DMC_STATUS_REG              0x00
+#define DMC_COMMAND_REG             0x04
+#define DMC_DIRECT_CMD_REG          0x08
+#define DMC_MEMORY_CONFIG_REG       0x0C
+#define DMC_REFRESH_PRD_REG         0x10
+#define DMC_CAS_LATENCY_REG         0x14
+#define DMC_WRITE_LATENCY_REG       0x18
+#define DMC_T_MRD_REG               0x1C
+#define DMC_T_RAS_REG               0x20
+#define DMC_T_RC_REG                0x24
+#define DMC_T_RCD_REG               0x28
+#define DMC_T_RFC_REG               0x2C
+#define DMC_T_RP_REG                0x30
+#define DMC_T_RRD_REG               0x34
+#define DMC_T_WR_REG                0x38
+#define DMC_T_WTR_REG               0x3C
+#define DMC_T_XP_REG                0x40
+#define DMC_T_XSR_REG               0x44
+#define DMC_T_ESR_REG               0x48
+#define DMC_MEMORY_CFG2_REG         0x4C
+#define DMC_MEMORY_CFG3_REG         0x50
+#define DMC_T_FAW_REG               0x54
+#define DMC_T_RDATA_EN              0x5C	/* DFI read data enable register */
+#define DMC_T_WRLAT_DIFF            0x60        /* DFI write data enable register */
+
+// Returns the state of the memory controller:
+#define DMC_STATUS_CONFIG       0x0
+#define DMC_STATUS_READY        0x1
+#define DMC_STATUS_PAUSED       0x2
+#define DMC_STATUS_LOWPOWER     0x3
+
+// Changes the state of the memory controller:
+#define DMC_COMMAND_GO              0x0
+#define DMC_COMMAND_SLEEP           0x1
+#define DMC_COMMAND_WAKEUP          0x2
+#define DMC_COMMAND_PAUSE           0x3
+#define DMC_COMMAND_CONFIGURE       0x4
+#define DMC_COMMAND_ACTIVEPAUSE     0x7
+
+// Determines the command required
+#define DMC_DIRECT_CMD_MEMCMD_PRECHARGEALL      0x0
+#define DMC_DIRECT_CMD_MEMCMD_AUTOREFRESH       (0x1 << 18)
+#define DMC_DIRECT_CMD_MEMCMD_MODEREG           (0x2 << 18)
+#define DMC_DIRECT_CMD_MEMCMD_EXTMODEREG        (0x2 << 18)
+#define DMC_DIRECT_CMD_MEMCMD_NOP               (0x3 << 18)
+#define DMC_DIRECT_CMD_MEMCMD_DPD               (0x1 << 22)
+#define DMC_DIRECT_CMD_BANKADDR(n)              ((n & 0x3) << 16)
+#define DMC_DIRECT_CMD_CHIP_ADDR(n)             ((n & 0x3) << 20)
+
+
+//
+// AXI ID configuration register map
+//
+#define DMC_ID_0_CFG_REG            0x100
+#define DMC_ID_1_CFG_REG            0x104
+#define DMC_ID_2_CFG_REG            0x108
+#define DMC_ID_3_CFG_REG            0x10C
+#define DMC_ID_4_CFG_REG            0x110
+#define DMC_ID_5_CFG_REG            0x114
+#define DMC_ID_6_CFG_REG            0x118
+#define DMC_ID_7_CFG_REG            0x11C
+#define DMC_ID_8_CFG_REG            0x120
+#define DMC_ID_9_CFG_REG            0x124
+#define DMC_ID_10_CFG_REG           0x128
+#define DMC_ID_11_CFG_REG           0x12C
+#define DMC_ID_12_CFG_REG           0x130
+#define DMC_ID_13_CFG_REG           0x134
+#define DMC_ID_14_CFG_REG           0x138
+#define DMC_ID_15_CFG_REG           0x13C
+
+// Set the QoS
+#define DMC_ID_CFG_QOS_DISABLE      0
+#define DMC_ID_CFG_QOS_ENABLE       1
+#define DMC_ID_CFG_QOS_MIN          2
+
+
+//
+// Chip configuration register map
+//
+#define DMC_CHIP_0_CFG_REG          0x200
+#define DMC_CHIP_1_CFG_REG          0x204
+#define DMC_CHIP_2_CFG_REG          0x208
+#define DMC_CHIP_3_CFG_REG          0x20C
+
+//
+// User Defined Pins
+//
+#define DMC_USER_STATUS_REG         0x300
+#define DMC_USER_0_CFG_REG          0x304
+#define DMC_USER_1_CFG_REG          0x308
+#define DMC_FEATURE_CRTL_REG        0x30C
+#define DMC_USER_2_CFG_REG          0x310
+
+
+//
+// PHY Register Settings
+//
+#define PHY_PTM_DFI_CLK_RANGE					0xE00		// DDR2 PHY PTM register offset
+#define PHY_PTM_IOTERM							0xE04
+#define PHY_PTM_PLL_EN          				0xe0c
+#define PHY_PTM_PLL_RANGE       				0xe18
+#define PHY_PTM_FEEBACK_DIV     				0xe1c
+#define PHY_PTM_RCLK_DIV        				0xe20
+#define PHY_PTM_LOCK_STATUS     				0xe28
+#define PHY_PTM_INIT_DONE	     				0xe34
+#define PHY_PTM_ADDCOM_IOSTR_OFF				0xec8
+#define PHY_PTM_SQU_TRAINING    				0xee8
+#define PHY_PTM_SQU_STAT        				0xeec
+
+// ==============================================================================
+// PIPD 40G DDR2/DDR3 PHY Register definitions
+//
+// Offsets from APB Base Address
+// ==============================================================================
+#define PHY_BYTE0_OFFSET					0x000
+#define PHY_BYTE1_OFFSET					0x200
+#define PHY_BYTE2_OFFSET					0x400
+#define PHY_BYTE3_OFFSET					0x600
+
+#define PHY_BYTE0_COARSE_SQADJ_INIT			0x064	;// Coarse squelch adjust
+#define PHY_BYTE1_COARSE_SQADJ_INIT			0x264	;// Coarse squelch adjust
+#define PHY_BYTE2_COARSE_SQADJ_INIT			0x464	;// Coarse squelch adjust
+#define PHY_BYTE3_COARSE_SQADJ_INIT			0x664	;// Coarse squelch adjust
+
+#define PHY_BYTE0_IOSTR_OFFSET				0x004
+#define PHY_BYTE1_IOSTR_OFFSET				0x204
+#define PHY_BYTE2_IOSTR_OFFSET				0x404
+#define PHY_BYTE3_IOSTR_OFFSET				0x604
+
+
+;//--------------------------------------------------------------------------
+
+// DFI Clock ranges:
+
+#define PHY_PTM_DFI_CLK_RANGE_200MHz   		0x0
+#define PHY_PTM_DFI_CLK_RANGE_201_267MHz	0x1
+#define PHY_PTM_DFI_CLK_RANGE_268_333MHz	0x2
+#define PHY_PTM_DFI_CLK_RANGE_334_400MHz	0x3
+#define PHY_PTM_DFI_CLK_RANGE_401_533MHz	0x4
+#define PHY_PTM_DFI_CLK_RANGE_534_667MHz	0x5
+#define PHY_PTM_DFI_CLK_RANGE_668_800MHz	0x6
+
+
+
+#define  PHY_PTM_DFI_CLK_RANGE_VAL			PHY_PTM_DFI_CLK_RANGE_334_400MHz
+
+//--------------------------------------------------------------------------
+
+
+// PLL Range
+
+#define PHY_PTM_PLL_RANGE_200_400MHz		0x0	// b0 = frequency >= 200 MHz and < 400 MHz
+#define PHY_PTM_PLL_RANGE_400_800MHz		0x1	// b1 = frequency >= 400 MHz.
+#define PHY_PTM_FEEBACK_DIV_200_400MHz		0x0	// b0 = frequency >= 200 MHz and < 400 MHz
+#define PHY_PTM_FEEBACK_DIV_400_800MHz		0x1	// b1 = frequency >= 400 MHz.
+#define PHY_PTM_REFCLK_DIV_200_400MHz		0x0
+#define PHY_PTM_REFCLK_DIV_400_800MHz		0x1
+
+#define TC_UIOLHNC_MASK                         0x000003C0
+#define TC_UIOLHNC_SHIFT                        0x6
+#define TC_UIOLHPC_MASK                         0x0000003F
+#define TC_UIOLHPC_SHIFT                        0x2
+#define TC_UIOHOCT_MASK                         0x2
+#define TC_UIOHOCT_SHIFT                        0x1
+#define TC_UIOHSTOP_SHIFT                       0x0
+#define TC_UIOLHXC_VALUE                        0x4
+
+#define PHY_PTM_SQU_TRAINING_ENABLE				0x1
+#define PHY_PTM_SQU_TRAINING_DISABLE				0x0
+
+
+//--------------------------------------
+// JEDEC DDR2 Device Register definitions and settings
+//--------------------------------------
+#define DDR_MODESET_SHFT						14
+#define DDR_MODESET_MR							0x0		;// Mode register
+#define DDR_MODESET_EMR							0x1		;// Extended Mode register
+#define DDR_MODESET_EMR2						0x2
+#define DDR_MODESET_EMR3						0x3
+
+//
+// Extended Mode Register settings
+//
+#define DDR_EMR_OCD_MASK                        0x0000380
+#define DDR_EMR_OCD_SHIFT                       0x7
+#define DDR_EMR_RTT_MASK                        0x00000044                  // DDR2 Device RTT (ODT) settings
+#define DDR_EMR_RTT_SHIFT                       0x2
+#define DDR_EMR_ODS_MASK                        0x00000002                  // DDR2 Output Drive Strength
+#define DDR_EMR_ODS_SHIFT                       0x0001
+
+// Termination Values:
+#define DDR_EMR_RTT_50R                         0x00000044                  // DDR2 50 Ohm termination
+#define DDR_EMR_RTT_75R                         0x00000004                  // DDR2 75 Ohm termination
+#define DDR_EMR_RTT_150                         0x00000040                  // DDR2 150 Ohm termination
+
+// Output Drive Strength Values:
+#define DDR_EMR_ODS_FULL                        0x0                         // DDR2 Full Drive Strength
+#define DDR_EMR_ODS_HALF                        0x1                         // DDR2 Half Drive Strength
+
+// OCD values
+#define DDR_EMR_OCD_DEFAULT                     0x7
+#define DDR_EMR_OCD_NS                          0x0
+
+#define DDR_EMR_ODS_VAL                         DDR_EMR_ODS_FULL
+
+#define DDR_SDRAM_START_ADDR					0x10000000
+
+
+// ----------------------------------------
+// PHY IOTERM values
+// ----------------------------------------
+#define PHY_PTM_IOTERM_OFF					0x0
+#define PHY_PTM_IOTERM_150R					0x1
+#define PHY_PTM_IOTERM_75R					0x2
+#define PHY_PTM_IOTERM_50R					0x3
+
+#define PHY_BYTE_IOSTR_60OHM				0x0
+#define PHY_BYTE_IOSTR_40OHM				0x1
+#define PHY_BYTE_IOSTR_30OHM				0x2
+#define PHY_BYTE_IOSTR_30AOHM				0x3
+
+#define DDR2_MR_BURST_LENGTH_4     (2)
+#define DDR2_MR_BURST_LENGTH_8     (3)
+#define DDR2_MR_DLL_RESET          (1 << 8)
+#define DDR2_MR_CAS_LATENCY_4      (4 << 4)
+#define DDR2_MR_CAS_LATENCY_5      (5 << 4)
+#define DDR2_MR_CAS_LATENCY_6      (6 << 4)
+#define DDR2_MR_WR_CYCLES_2        (1 << 9)
+#define DDR2_MR_WR_CYCLES_3        (2 << 9)
+#define DDR2_MR_WR_CYCLES_4        (3 << 9)
+#define DDR2_MR_WR_CYCLES_5        (4 << 9)
+#define DDR2_MR_WR_CYCLES_6        (5 << 9)
+
+
+VOID
+PL341DmcInit (
+  IN  UINTN             DmcBase,
+  IN  PL341_DMC_CONFIG* DmcConfig
+  );
+
+VOID PL341DmcPhyInit (
+  IN UINTN   DmcPhyBase
+  );
+
+VOID PL341DmcTrainPHY (
+  IN UINTN   DmcPhyBase
+  );
+
+#endif /* _PL341DMC_H_ */
diff --git a/ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h b/ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h
index 7414b10050..f61036840d 100644
--- a/ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h
+++ b/ArmPlatformPkg/Include/Guid/ArmGlobalVariableHob.h
@@ -1,48 +1,48 @@
-/** @file
-*
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_GLOBAL_VARIABLE_GUID_H__
-#define __ARM_GLOBAL_VARIABLE_GUID_H__
-
-#define ARM_HOB_GLOBAL_VARIABLE_GUID  \
-  { 0xc3253c90, 0xa24f, 0x4599, { 0xa6, 0x64, 0x1f, 0x88, 0x13, 0x77, 0x8f, 0xc9} };
-
-extern EFI_GUID gArmGlobalVariableGuid;
-
-///
-/// Describes all memory ranges used during the HOB producer 
-/// phase that exist outside the HOB list. This HOB type 
-/// describes how memory is used, not the physical attributes of memory.
-///
-typedef struct {
-  ///
-  /// The Guid HOB header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION
-  ///                 and  Header.Name    = gArmGlobalVariableGuid
-  ///
-  EFI_HOB_GUID_TYPE            Header;
-
-  ///
-  /// The base address of memory allocated by this HOB. Type
-  /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
-  /// specification.
-  ///
-  EFI_PHYSICAL_ADDRESS        GlobalVariableBase;
-
-  /// 
-  /// The length in bytes of memory allocated by this HOB.
-  /// 
-  UINT32                      GlobalVariableSize;
-} ARM_HOB_GLOBAL_VARIABLE;
-
-#endif
+/** @file
+*
+*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __ARM_GLOBAL_VARIABLE_GUID_H__
+#define __ARM_GLOBAL_VARIABLE_GUID_H__
+
+#define ARM_HOB_GLOBAL_VARIABLE_GUID  \
+  { 0xc3253c90, 0xa24f, 0x4599, { 0xa6, 0x64, 0x1f, 0x88, 0x13, 0x77, 0x8f, 0xc9} };
+
+extern EFI_GUID gArmGlobalVariableGuid;
+
+///
+/// Describes all memory ranges used during the HOB producer 
+/// phase that exist outside the HOB list. This HOB type 
+/// describes how memory is used, not the physical attributes of memory.
+///
+typedef struct {
+  ///
+  /// The Guid HOB header. Header.HobType = EFI_HOB_TYPE_GUID_EXTENSION
+  ///                 and  Header.Name    = gArmGlobalVariableGuid
+  ///
+  EFI_HOB_GUID_TYPE            Header;
+
+  ///
+  /// The base address of memory allocated by this HOB. Type
+  /// EFI_PHYSICAL_ADDRESS is defined in AllocatePages() in the UEFI 2.0
+  /// specification.
+  ///
+  EFI_PHYSICAL_ADDRESS        GlobalVariableBase;
+
+  /// 
+  /// The length in bytes of memory allocated by this HOB.
+  /// 
+  UINT32                      GlobalVariableSize;
+} ARM_HOB_GLOBAL_VARIABLE;
+
+#endif
diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h b/ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h
index 02ef1ea832..b1a080c00a 100644
--- a/ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h
+++ b/ArmPlatformPkg/Include/Library/ArmPlatformGlobalVariableLib.h
@@ -1,38 +1,38 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef __ARM_PLATFORM_GLOBAL_VARIABLE_LIB_H_
-#define __ARM_PLATFORM_GLOBAL_VARIABLE_LIB_H_
-
-VOID
-ArmPlatformGetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  );
-
-VOID
-ArmPlatformSetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  );
-
-VOID*
-ArmPlatformGetGlobalVariableAddress (
-  IN  UINTN     VariableOffset
-  );
-
-#endif
-
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef __ARM_PLATFORM_GLOBAL_VARIABLE_LIB_H_
+#define __ARM_PLATFORM_GLOBAL_VARIABLE_LIB_H_
+
+VOID
+ArmPlatformGetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  );
+
+VOID
+ArmPlatformSetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  );
+
+VOID*
+ArmPlatformGetGlobalVariableAddress (
+  IN  UINTN     VariableOffset
+  );
+
+#endif
+
diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformLib.h b/ArmPlatformPkg/Include/Library/ArmPlatformLib.h
index 9f2de60a4a..7bbd966470 100644
--- a/ArmPlatformPkg/Include/Library/ArmPlatformLib.h
+++ b/ArmPlatformPkg/Include/Library/ArmPlatformLib.h
@@ -1,131 +1,131 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#ifndef _ARMPLATFORMLIB_H_
-#define _ARMPLATFORMLIB_H_
-
-//
-// The package level header files this module uses
-//
-#include <PiPei.h>
-//
-// The protocols, PPI and GUID defintions for this module
-//
-#include <Ppi/MasterBootMode.h>
-#include <Ppi/BootInRecoveryMode.h>
-#include <Guid/MemoryTypeInformation.h>
-
-#include <Library/ArmLib.h>
-
-/**
-  This structure is used to describe a region of the EFI memory map
-
-  Every EFI regions of the system memory described by their physical start address and their size
-  can have different attributes. Some regions can be tested and other untested.
-
-**/
-typedef struct {
-  EFI_RESOURCE_ATTRIBUTE_TYPE  ResourceAttribute;
-  EFI_PHYSICAL_ADDRESS         PhysicalStart;
-  UINT64                       NumberOfBytes;
-} ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR;
-
-UINTN
-ArmPlatformGetCorePosition (
-  IN UINTN MpId
-  );
-
-/**
-  Return the current Boot Mode
-
-  This function returns the boot reason on the platform
-
-  @return   Return the current Boot Mode of the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
-  VOID
-  );
-
-/**
-  Initialize controllers that must setup in the normal world
-
-  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
-  in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
-  IN  UINTN                     MpId
-  );
-
-/**
-  Initialize the system (or sometimes called permanent) memory
-
-  This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
-  VOID
-  );
-
-/**
-  Return the Virtual Memory Map of your platform
-
-  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
-
-  @param[out]   VirtualMemoryMap    Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
-                                    Virtual Memory mapping. This array must be ended by a zero-filled
-                                    entry
-
-**/
-VOID
-ArmPlatformGetVirtualMemoryMap (
-  OUT ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
-  );
-
-/**
-  Return the EFI Memory Map of your platform
-
-  This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource
-  Descriptor HOBs used by DXE core.
-
-  @param[out]   EfiMemoryMap        Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an
-                                    EFI Memory region. This array must be ended by a zero-filled entry
-
-**/
-EFI_STATUS
-ArmPlatformGetAdditionalSystemMemory (
-  OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
-  );
-
-/**
-  Return the Platform specific PPIs
-
-  This function exposes the Platform Specific PPIs. They can be used by any PrePi modules or passed
-  to the PeiCore by PrePeiCore.
-
-  @param[out]   PpiListSize         Size in Bytes of the Platform PPI List
-  @param[out]   PpiList             Platform PPI List
-
-**/
-VOID
-ArmPlatformGetPlatformPpiList (
-  OUT UINTN                   *PpiListSize,
-  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
-  );
-
-#endif
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#ifndef _ARMPLATFORMLIB_H_
+#define _ARMPLATFORMLIB_H_
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+//
+// The protocols, PPI and GUID defintions for this module
+//
+#include <Ppi/MasterBootMode.h>
+#include <Ppi/BootInRecoveryMode.h>
+#include <Guid/MemoryTypeInformation.h>
+
+#include <Library/ArmLib.h>
+
+/**
+  This structure is used to describe a region of the EFI memory map
+
+  Every EFI regions of the system memory described by their physical start address and their size
+  can have different attributes. Some regions can be tested and other untested.
+
+**/
+typedef struct {
+  EFI_RESOURCE_ATTRIBUTE_TYPE  ResourceAttribute;
+  EFI_PHYSICAL_ADDRESS         PhysicalStart;
+  UINT64                       NumberOfBytes;
+} ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR;
+
+UINTN
+ArmPlatformGetCorePosition (
+  IN UINTN MpId
+  );
+
+/**
+  Return the current Boot Mode
+
+  This function returns the boot reason on the platform
+
+  @return   Return the current Boot Mode of the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+  VOID
+  );
+
+/**
+  Initialize controllers that must setup in the normal world
+
+  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+  in the PEI phase.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+  IN  UINTN                     MpId
+  );
+
+/**
+  Initialize the system (or sometimes called permanent) memory
+
+  This memory is generally represented by the DRAM.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+  VOID
+  );
+
+/**
+  Return the Virtual Memory Map of your platform
+
+  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
+
+  @param[out]   VirtualMemoryMap    Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
+                                    Virtual Memory mapping. This array must be ended by a zero-filled
+                                    entry
+
+**/
+VOID
+ArmPlatformGetVirtualMemoryMap (
+  OUT ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
+  );
+
+/**
+  Return the EFI Memory Map of your platform
+
+  This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource
+  Descriptor HOBs used by DXE core.
+
+  @param[out]   EfiMemoryMap        Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an
+                                    EFI Memory region. This array must be ended by a zero-filled entry
+
+**/
+EFI_STATUS
+ArmPlatformGetAdditionalSystemMemory (
+  OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
+  );
+
+/**
+  Return the Platform specific PPIs
+
+  This function exposes the Platform Specific PPIs. They can be used by any PrePi modules or passed
+  to the PeiCore by PrePeiCore.
+
+  @param[out]   PpiListSize         Size in Bytes of the Platform PPI List
+  @param[out]   PpiList             Platform PPI List
+
+**/
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  );
+
+#endif
diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h b/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h
index 32f1eb5088..ece8064903 100644
--- a/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h
+++ b/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h
@@ -1,88 +1,88 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#ifndef _ARMPLATFORMSECLIB_H_
-#define _ARMPLATFORMSECLIB_H_
-
-#define ARM_SEC_BOOT_MASK                 ~0
-#define ARM_SEC_COLD_BOOT                 (1 << 0)
-#define ARM_SEC_SECONDARY_COLD_BOOT       (1 << 1)
-
-/**
-  Initialize the memory where the initial stacks will reside
-
-  This memory can contain the initial stacks (Secure and Secure Monitor stacks).
-  In some platform, this region is already initialized and the implementation of this function can
-  do nothing. This memory can also represent the Secure RAM.
-  This function is called before the satck has been set up. Its implementation must ensure the stack
-  pointer is not used (probably required to use assembly language)
-
-**/
-VOID
-ArmPlatformSecBootMemoryInit (
-  VOID
-  );
-
-/**
-  Call at the beginning of the platform boot up
-
-  This function allows the firmware platform to do extra actions at the early
-  stage of the platform power up.
-
-  Note: This function must be implemented in assembler as there is no stack set up yet
-
-**/
-VOID
-ArmPlatformSecBootAction (
-  VOID
-  );
-
-/**
-  Initialize controllers that must setup at the early stage
-
-  Some peripherals must be initialized in Secure World.
-  For example: Some L2 controller, interconnect, clock, DMC, etc
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
-  IN  UINTN                     MpId
-  );
-
-/**
-  Call before jumping to Normal World
-
-  This function allows the firmware platform to do extra actions before
-  jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
-  IN  UINTN         MpId,
-  OUT UINTN*        JumpAddress
-  );
-
-/**
-  Initialize the Secure peripherals and memory regions
-
-  If Trustzone is supported by your platform then this function makes the required initialization
-  of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
-  IN  UINTN                     MpId
-  );
-
-#endif
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#ifndef _ARMPLATFORMSECLIB_H_
+#define _ARMPLATFORMSECLIB_H_
+
+#define ARM_SEC_BOOT_MASK                 ~0
+#define ARM_SEC_COLD_BOOT                 (1 << 0)
+#define ARM_SEC_SECONDARY_COLD_BOOT       (1 << 1)
+
+/**
+  Initialize the memory where the initial stacks will reside
+
+  This memory can contain the initial stacks (Secure and Secure Monitor stacks).
+  In some platform, this region is already initialized and the implementation of this function can
+  do nothing. This memory can also represent the Secure RAM.
+  This function is called before the satck has been set up. Its implementation must ensure the stack
+  pointer is not used (probably required to use assembly language)
+
+**/
+VOID
+ArmPlatformSecBootMemoryInit (
+  VOID
+  );
+
+/**
+  Call at the beginning of the platform boot up
+
+  This function allows the firmware platform to do extra actions at the early
+  stage of the platform power up.
+
+  Note: This function must be implemented in assembler as there is no stack set up yet
+
+**/
+VOID
+ArmPlatformSecBootAction (
+  VOID
+  );
+
+/**
+  Initialize controllers that must setup at the early stage
+
+  Some peripherals must be initialized in Secure World.
+  For example: Some L2 controller, interconnect, clock, DMC, etc
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+  IN  UINTN                     MpId
+  );
+
+/**
+  Call before jumping to Normal World
+
+  This function allows the firmware platform to do extra actions before
+  jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+  IN  UINTN         MpId,
+  OUT UINTN*        JumpAddress
+  );
+
+/**
+  Initialize the Secure peripherals and memory regions
+
+  If Trustzone is supported by your platform then this function makes the required initialization
+  of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+  IN  UINTN                     MpId
+  );
+
+#endif
diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformSysConfigLib.h b/ArmPlatformPkg/Include/Library/ArmPlatformSysConfigLib.h
index 3c59bcc390..39a0cc7f73 100644
--- a/ArmPlatformPkg/Include/Library/ArmPlatformSysConfigLib.h
+++ b/ArmPlatformPkg/Include/Library/ArmPlatformSysConfigLib.h
@@ -1,63 +1,63 @@
-/** @file  ArmPlatformSysConfigLib.h
-
-  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __ARM_PLATFORM_SYS_CONFIG_H__
-#define __ARM_PLATFORM_SYS_CONFIG_H__
-
-#include <Base.h>
-
-/* This header file makes it easier to access the System Configuration Registers
- * in the ARM Versatile Express motherboard.
- */
-
-//
-// Typedef
-//
-typedef UINT32  SYS_CONFIG_FUNCTION;
-
-//
-// Functions
-//
-RETURN_STATUS
-ArmPlatformSysConfigInitialize (
-  VOID
-  );
-
-RETURN_STATUS
-ArmPlatformSysConfigGet (
-  IN  SYS_CONFIG_FUNCTION   Function,
-  OUT UINT32*               Value
-  );
-
-RETURN_STATUS
-ArmPlatformSysConfigGetValues (
-  IN  SYS_CONFIG_FUNCTION   Function,
-  IN  UINTN                 Size,
-  OUT UINT32*               Values
-  );
-
-RETURN_STATUS
-ArmPlatformSysConfigSet (
-  IN  SYS_CONFIG_FUNCTION   Function,
-  IN  UINT32                Value
-  );
-
-RETURN_STATUS
-ArmPlatformSysConfigSetDevice (
-  IN  SYS_CONFIG_FUNCTION   Function,
-  IN  UINT32                Device,
-  IN  UINT32                Value
-  );
-
-#endif /* __SYS_CFG_REGISTERS_H__ */
+/** @file  ArmPlatformSysConfigLib.h
+
+  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __ARM_PLATFORM_SYS_CONFIG_H__
+#define __ARM_PLATFORM_SYS_CONFIG_H__
+
+#include <Base.h>
+
+/* This header file makes it easier to access the System Configuration Registers
+ * in the ARM Versatile Express motherboard.
+ */
+
+//
+// Typedef
+//
+typedef UINT32  SYS_CONFIG_FUNCTION;
+
+//
+// Functions
+//
+RETURN_STATUS
+ArmPlatformSysConfigInitialize (
+  VOID
+  );
+
+RETURN_STATUS
+ArmPlatformSysConfigGet (
+  IN  SYS_CONFIG_FUNCTION   Function,
+  OUT UINT32*               Value
+  );
+
+RETURN_STATUS
+ArmPlatformSysConfigGetValues (
+  IN  SYS_CONFIG_FUNCTION   Function,
+  IN  UINTN                 Size,
+  OUT UINT32*               Values
+  );
+
+RETURN_STATUS
+ArmPlatformSysConfigSet (
+  IN  SYS_CONFIG_FUNCTION   Function,
+  IN  UINT32                Value
+  );
+
+RETURN_STATUS
+ArmPlatformSysConfigSetDevice (
+  IN  SYS_CONFIG_FUNCTION   Function,
+  IN  UINT32                Device,
+  IN  UINT32                Value
+  );
+
+#endif /* __SYS_CFG_REGISTERS_H__ */
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c
index 278138759f..511d0f69de 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.c
@@ -1,76 +1,76 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <PiDxe.h>
-#include <Library/ArmPlatformGlobalVariableLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/PcdLib.h>
-
-#include <Guid/ArmGlobalVariableHob.h>
-
-UINTN  mGlobalVariableBase = 0;
-
-RETURN_STATUS
-EFIAPI
-ArmPlatformGlobalVariableConstructor (
-  VOID
-  )
-{
-  ARM_HOB_GLOBAL_VARIABLE  *Hob;
-
-  Hob = GetFirstGuidHob (&gArmGlobalVariableGuid);
-  ASSERT (Hob != NULL);
-
-  mGlobalVariableBase = Hob->GlobalVariableBase;
-
-  return EFI_SUCCESS;
-}
-
-VOID
-ArmPlatformGetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  if (mGlobalVariableBase == 0) {
-    ArmPlatformGlobalVariableConstructor ();
-  }
-
-  CopyMem (Variable, (VOID*)(mGlobalVariableBase + VariableOffset), VariableSize);
-}
-
-VOID
-ArmPlatformSetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  if (mGlobalVariableBase == 0) {
-    ArmPlatformGlobalVariableConstructor ();
-  }
-
-  CopyMem ((VOID*)(mGlobalVariableBase + VariableOffset), Variable, VariableSize);
-}
-
-VOID*
-ArmPlatformGetGlobalVariableAddress (
-  IN  UINTN     VariableOffset
-  )
-{
-  return (VOID*)(mGlobalVariableBase + VariableOffset);
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <PiDxe.h>
+#include <Library/ArmPlatformGlobalVariableLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+
+#include <Guid/ArmGlobalVariableHob.h>
+
+UINTN  mGlobalVariableBase = 0;
+
+RETURN_STATUS
+EFIAPI
+ArmPlatformGlobalVariableConstructor (
+  VOID
+  )
+{
+  ARM_HOB_GLOBAL_VARIABLE  *Hob;
+
+  Hob = GetFirstGuidHob (&gArmGlobalVariableGuid);
+  ASSERT (Hob != NULL);
+
+  mGlobalVariableBase = Hob->GlobalVariableBase;
+
+  return EFI_SUCCESS;
+}
+
+VOID
+ArmPlatformGetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  if (mGlobalVariableBase == 0) {
+    ArmPlatformGlobalVariableConstructor ();
+  }
+
+  CopyMem (Variable, (VOID*)(mGlobalVariableBase + VariableOffset), VariableSize);
+}
+
+VOID
+ArmPlatformSetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  if (mGlobalVariableBase == 0) {
+    ArmPlatformGlobalVariableConstructor ();
+  }
+
+  CopyMem ((VOID*)(mGlobalVariableBase + VariableOffset), Variable, VariableSize);
+}
+
+VOID*
+ArmPlatformGetGlobalVariableAddress (
+  IN  UINTN     VariableOffset
+  )
+{
+  return (VOID*)(mGlobalVariableBase + VariableOffset);
+}
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
index f2284ce4ca..a0835d25f9 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Dxe/DxeArmPlatformGlobalVariableLib.inf
@@ -1,44 +1,44 @@
-#/** @file
-# Timer library implementation
-#  
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = DxeArmPlatformGlobalVariableLib
-  FILE_GUID                      = 53fa3cc3-23b7-4ec2-9bfa-30257d7e1135 
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = ArmPlatformGlobalVariableLib
-  
-  CONSTRUCTOR                    = ArmPlatformGlobalVariableConstructor
-
-[Sources.common]
-  DxeArmPlatformGlobalVariableLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  HobLib
-
-[Guids]
-  gArmGlobalVariableGuid
-
-[FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
-
+#/** @file
+# Timer library implementation
+#  
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = DxeArmPlatformGlobalVariableLib
+  FILE_GUID                      = 53fa3cc3-23b7-4ec2-9bfa-30257d7e1135 
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformGlobalVariableLib
+  
+  CONSTRUCTOR                    = ArmPlatformGlobalVariableConstructor
+
+[Sources.common]
+  DxeArmPlatformGlobalVariableLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  HobLib
+
+[Guids]
+  gArmGlobalVariableGuid
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
+
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
index 63aa3199fe..df3e12944d 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
@@ -1,84 +1,84 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Library/ArmPlatformGlobalVariableLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-
-// Declared by ArmPlatformPkg/PrePi Module
-extern UINTN mGlobalVariableBase;
-
-VOID
-ArmPlatformGetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
-
-  GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
-
-  if (VariableSize == 4) {
-    *(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
-  } else if (VariableSize == 8) {
-    *(UINT64*)Variable = ReadUnaligned64 ((CONST UINT64*)(GlobalVariableBase + VariableOffset));
-  } else {
-    CopyMem (Variable, (VOID*)(GlobalVariableBase + VariableOffset), VariableSize);
-  }
-}
-
-VOID
-ArmPlatformSetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
-
-  GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
-
-  if (VariableSize == 4) {
-    WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
-  } else if (VariableSize == 8) {
-    WriteUnaligned64 ((UINT64*)(GlobalVariableBase + VariableOffset), *(UINT64*)Variable);
-  } else {
-    CopyMem ((VOID*)(GlobalVariableBase + VariableOffset), Variable, VariableSize);
-  }
-}
-
-VOID*
-ArmPlatformGetGlobalVariableAddress (
-  IN  UINTN     VariableOffset
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
-
-  GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
-
-  return (VOID*)(GlobalVariableBase + VariableOffset);
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+#include <Library/ArmPlatformGlobalVariableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+// Declared by ArmPlatformPkg/PrePi Module
+extern UINTN mGlobalVariableBase;
+
+VOID
+ArmPlatformGetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
+
+  GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+
+  if (VariableSize == 4) {
+    *(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
+  } else if (VariableSize == 8) {
+    *(UINT64*)Variable = ReadUnaligned64 ((CONST UINT64*)(GlobalVariableBase + VariableOffset));
+  } else {
+    CopyMem (Variable, (VOID*)(GlobalVariableBase + VariableOffset), VariableSize);
+  }
+}
+
+VOID
+ArmPlatformSetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
+
+  GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+
+  if (VariableSize == 4) {
+    WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
+  } else if (VariableSize == 8) {
+    WriteUnaligned64 ((UINT64*)(GlobalVariableBase + VariableOffset), *(UINT64*)Variable);
+  } else {
+    CopyMem ((VOID*)(GlobalVariableBase + VariableOffset), Variable, VariableSize);
+  }
+}
+
+VOID*
+ArmPlatformGetGlobalVariableAddress (
+  IN  UINTN     VariableOffset
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
+
+  GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+
+  return (VOID*)(GlobalVariableBase + VariableOffset);
+}
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
index a14f933221..8eea9d3821 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
@@ -1,40 +1,40 @@
-#/** @file
-# ArmPlatformGlobalVariableLib library implementation
-#  
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
-#  
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = PeiArmPlatformGlobalVariableLib
-  FILE_GUID                      = 3e03daf2-b7b4-45f7-80b2-12aba043391f
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = ArmPlatformGlobalVariableLib
-
-[Sources.common]
-  PeiArmPlatformGlobalVariableLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  DebugLib
-  PcdLib
-
-[FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
-  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
-  gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
-
+#/** @file
+# ArmPlatformGlobalVariableLib library implementation
+#  
+#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+#  
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = PeiArmPlatformGlobalVariableLib
+  FILE_GUID                      = 3e03daf2-b7b4-45f7-80b2-12aba043391f
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformGlobalVariableLib
+
+[Sources.common]
+  PeiArmPlatformGlobalVariableLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  PcdLib
+
+[FixedPcd]
+  gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
+  gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
+  gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
+
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
index 563e405f66..47430e302b 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
@@ -1,105 +1,105 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Library/ArmPlatformGlobalVariableLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-
-#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize))) || \
-                  ((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet32 (PcdSystemMemoryBase)))
-
-// Declared by ArmPlatformPkg/PrePi Module
-extern UINTN mGlobalVariableBase;
-
-VOID
-ArmPlatformGetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
-
-  if (IS_XIP()) {
-    // In Case of XIP, we expect the Primary Stack at the top of the System Memory
-    // The size must be 64bit aligned to allow 64bit variable to be aligned
-    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
-  } else {
-    GlobalVariableBase = mGlobalVariableBase;
-  }
-
-  if (VariableSize == 4) {
-    *(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
-  } else if (VariableSize == 8) {
-    *(UINT64*)Variable = ReadUnaligned64 ((CONST UINT64*)(GlobalVariableBase + VariableOffset));
-  } else {
-    CopyMem (Variable, (VOID*)(GlobalVariableBase + VariableOffset), VariableSize);
-  }
-}
-
-VOID
-ArmPlatformSetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
-
-  if (IS_XIP()) {
-    // In Case of XIP, we expect the Primary Stack at the top of the System Memory
-    // The size must be 64bit aligned to allow 64bit variable to be aligned
-    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
-  } else {
-    GlobalVariableBase = mGlobalVariableBase;
-  }
-
-  if (VariableSize == 4) {
-    WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
-  } else if (VariableSize == 8) {
-    WriteUnaligned64 ((UINT64*)(GlobalVariableBase + VariableOffset), *(UINT64*)Variable);
-  } else {
-    CopyMem ((VOID*)(GlobalVariableBase + VariableOffset), Variable, VariableSize);
-  }
-}
-
-VOID*
-ArmPlatformGetGlobalVariableAddress (
-  IN  UINTN     VariableOffset
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
-
-  if (IS_XIP()) {
-    // In Case of XIP, we expect the Primary Stack at the top of the System Memory
-    // The size must be 64bit aligned to allow 64bit variable to be aligned
-    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
-  } else {
-    GlobalVariableBase = mGlobalVariableBase;
-  }
-
-  return (VOID*)(GlobalVariableBase + VariableOffset);
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+#include <Library/ArmPlatformGlobalVariableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize))) || \
+                  ((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet32 (PcdSystemMemoryBase)))
+
+// Declared by ArmPlatformPkg/PrePi Module
+extern UINTN mGlobalVariableBase;
+
+VOID
+ArmPlatformGetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
+
+  if (IS_XIP()) {
+    // In Case of XIP, we expect the Primary Stack at the top of the System Memory
+    // The size must be 64bit aligned to allow 64bit variable to be aligned
+    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
+  } else {
+    GlobalVariableBase = mGlobalVariableBase;
+  }
+
+  if (VariableSize == 4) {
+    *(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
+  } else if (VariableSize == 8) {
+    *(UINT64*)Variable = ReadUnaligned64 ((CONST UINT64*)(GlobalVariableBase + VariableOffset));
+  } else {
+    CopyMem (Variable, (VOID*)(GlobalVariableBase + VariableOffset), VariableSize);
+  }
+}
+
+VOID
+ArmPlatformSetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
+
+  if (IS_XIP()) {
+    // In Case of XIP, we expect the Primary Stack at the top of the System Memory
+    // The size must be 64bit aligned to allow 64bit variable to be aligned
+    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
+  } else {
+    GlobalVariableBase = mGlobalVariableBase;
+  }
+
+  if (VariableSize == 4) {
+    WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
+  } else if (VariableSize == 8) {
+    WriteUnaligned64 ((UINT64*)(GlobalVariableBase + VariableOffset), *(UINT64*)Variable);
+  } else {
+    CopyMem ((VOID*)(GlobalVariableBase + VariableOffset), Variable, VariableSize);
+  }
+}
+
+VOID*
+ArmPlatformGetGlobalVariableAddress (
+  IN  UINTN     VariableOffset
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
+
+  if (IS_XIP()) {
+    // In Case of XIP, we expect the Primary Stack at the top of the System Memory
+    // The size must be 64bit aligned to allow 64bit variable to be aligned
+    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
+  } else {
+    GlobalVariableBase = mGlobalVariableBase;
+  }
+
+  return (VOID*)(GlobalVariableBase + VariableOffset);
+}
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.c b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.c
index 42d903f3d6..978ba33369 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.c
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.c
@@ -1,81 +1,81 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Uefi.h>
-#include <Library/ArmPlatformGlobalVariableLib.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/PcdLib.h>
-#include <Library/DebugLib.h>
-
-VOID
-ArmPlatformGetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdSecGlobalVariableSize));
-
-  GlobalVariableBase = PcdGet32 (PcdCPUCoresSecStackBase) + PcdGet32 (PcdCPUCoreSecPrimaryStackSize) - PcdGet32 (PcdSecGlobalVariableSize);
-  
-  if (VariableSize == 4) {
-    *(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
-  } else if (VariableSize == 8) {
-    *(UINT64*)Variable = ReadUnaligned64 ((CONST UINT64*)(GlobalVariableBase + VariableOffset));
-  } else {
-    CopyMem (Variable, (VOID*)(GlobalVariableBase + VariableOffset), VariableSize);
-  }
-}
-
-VOID
-ArmPlatformSetGlobalVariable (
-  IN  UINTN     VariableOffset,
-  IN  UINTN     VariableSize,
-  OUT VOID*     Variable
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdSecGlobalVariableSize));
-
-  GlobalVariableBase = PcdGet32 (PcdCPUCoresSecStackBase) + PcdGet32 (PcdCPUCoreSecPrimaryStackSize) - PcdGet32 (PcdSecGlobalVariableSize);
-
-  if (VariableSize == 4) {
-    WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
-  } else if (VariableSize == 8) {
-    WriteUnaligned64 ((UINT64*)(GlobalVariableBase + VariableOffset), *(UINT64*)Variable);
-  } else {
-    CopyMem ((VOID*)(GlobalVariableBase + VariableOffset), Variable, VariableSize);
-  }
-}
-
-VOID*
-ArmPlatformGetGlobalVariableAddress (
-  IN  UINTN     VariableOffset
-  )
-{
-  UINTN  GlobalVariableBase;
-
-  // Ensure the Global Variable Size have been initialized
-  ASSERT (VariableOffset < PcdGet32 (PcdSecGlobalVariableSize));
-
-  GlobalVariableBase = PcdGet32 (PcdCPUCoresSecStackBase) + PcdGet32 (PcdCPUCoreSecPrimaryStackSize) - PcdGet32 (PcdSecGlobalVariableSize);
-
-  return (VOID*)(GlobalVariableBase + VariableOffset);
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+#include <Library/ArmPlatformGlobalVariableLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugLib.h>
+
+VOID
+ArmPlatformGetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdSecGlobalVariableSize));
+
+  GlobalVariableBase = PcdGet32 (PcdCPUCoresSecStackBase) + PcdGet32 (PcdCPUCoreSecPrimaryStackSize) - PcdGet32 (PcdSecGlobalVariableSize);
+  
+  if (VariableSize == 4) {
+    *(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
+  } else if (VariableSize == 8) {
+    *(UINT64*)Variable = ReadUnaligned64 ((CONST UINT64*)(GlobalVariableBase + VariableOffset));
+  } else {
+    CopyMem (Variable, (VOID*)(GlobalVariableBase + VariableOffset), VariableSize);
+  }
+}
+
+VOID
+ArmPlatformSetGlobalVariable (
+  IN  UINTN     VariableOffset,
+  IN  UINTN     VariableSize,
+  OUT VOID*     Variable
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdSecGlobalVariableSize));
+
+  GlobalVariableBase = PcdGet32 (PcdCPUCoresSecStackBase) + PcdGet32 (PcdCPUCoreSecPrimaryStackSize) - PcdGet32 (PcdSecGlobalVariableSize);
+
+  if (VariableSize == 4) {
+    WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
+  } else if (VariableSize == 8) {
+    WriteUnaligned64 ((UINT64*)(GlobalVariableBase + VariableOffset), *(UINT64*)Variable);
+  } else {
+    CopyMem ((VOID*)(GlobalVariableBase + VariableOffset), Variable, VariableSize);
+  }
+}
+
+VOID*
+ArmPlatformGetGlobalVariableAddress (
+  IN  UINTN     VariableOffset
+  )
+{
+  UINTN  GlobalVariableBase;
+
+  // Ensure the Global Variable Size have been initialized
+  ASSERT (VariableOffset < PcdGet32 (PcdSecGlobalVariableSize));
+
+  GlobalVariableBase = PcdGet32 (PcdCPUCoresSecStackBase) + PcdGet32 (PcdCPUCoreSecPrimaryStackSize) - PcdGet32 (PcdSecGlobalVariableSize);
+
+  return (VOID*)(GlobalVariableBase + VariableOffset);
+}
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c
index 235eb673f7..f3a7efcae0 100644
--- a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c
+++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c
@@ -1,164 +1,164 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmPlatformLib.h>
-
-#include <Ppi/ArmMpCoreInfo.h>
-
-
-ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
-  {
-    // Cluster 0, Core 0
-    0x0, 0x0,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 1
-    0x0, 0x1,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 2
-    0x0, 0x2,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (UINT64)0xFFFFFFFF
-  },
-  {
-    // Cluster 0, Core 3
-    0x0, 0x3,
-
-    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (EFI_PHYSICAL_ADDRESS)0,
-    (UINT64)0xFFFFFFFF
-  }
-};
-
-// This function should be better located into TimerLib implementation
-RETURN_STATUS
-EFIAPI
-TimerConstructor (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Return the current Boot Mode
-
-  This function returns the boot reason on the platform
-
-**/
-EFI_BOOT_MODE
-ArmPlatformGetBootMode (
-  VOID
-  )
-{
-  return BOOT_WITH_FULL_CONFIGURATION;
-}
-
-/**
-  Initialize controllers that must setup in the normal world
-
-  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
-  in the PEI phase.
-
-**/
-RETURN_STATUS
-ArmPlatformInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  //TODO: Implement me
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Initialize the system (or sometimes called permanent) memory
-
-  This memory is generally represented by the DRAM.
-
-**/
-VOID
-ArmPlatformInitializeSystemMemory (
-  VOID
-  )
-{
-  //TODO: Implement me
-}
-
-EFI_STATUS
-PrePeiCoreGetMpCoreInfo (
-  OUT UINTN                   *CoreCount,
-  OUT ARM_CORE_INFO           **ArmCoreTable
-  )
-{
-  if (ArmIsMpCore()) {
-    *CoreCount    = sizeof(mArmPlatformNullMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
-    *ArmCoreTable = mArmPlatformNullMpCoreInfoTable;
-    return EFI_SUCCESS;
-  } else {
-    return EFI_UNSUPPORTED;
-  }
-}
-
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
-
-EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
-  {
-    EFI_PEI_PPI_DESCRIPTOR_PPI,
-    &mArmMpCoreInfoPpiGuid,
-    &mMpCoreInfoPpi
-  }
-};
-
-VOID
-ArmPlatformGetPlatformPpiList (
-  OUT UINTN                   *PpiListSize,
-  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
-  )
-{
-  if (ArmIsMpCore()) {
-    *PpiListSize = sizeof(gPlatformPpiTable);
-    *PpiList = gPlatformPpiTable;
-  } else {
-    *PpiListSize = 0;
-    *PpiList = NULL;
-  }
-}
-
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+
+
+ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
+  {
+    // Cluster 0, Core 0
+    0x0, 0x0,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 1
+    0x0, 0x1,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 2
+    0x0, 0x2,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (UINT64)0xFFFFFFFF
+  },
+  {
+    // Cluster 0, Core 3
+    0x0, 0x3,
+
+    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (EFI_PHYSICAL_ADDRESS)0,
+    (UINT64)0xFFFFFFFF
+  }
+};
+
+// This function should be better located into TimerLib implementation
+RETURN_STATUS
+EFIAPI
+TimerConstructor (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Return the current Boot Mode
+
+  This function returns the boot reason on the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+  VOID
+  )
+{
+  return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+/**
+  Initialize controllers that must setup in the normal world
+
+  This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+  in the PEI phase.
+
+**/
+RETURN_STATUS
+ArmPlatformInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  //TODO: Implement me
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Initialize the system (or sometimes called permanent) memory
+
+  This memory is generally represented by the DRAM.
+
+**/
+VOID
+ArmPlatformInitializeSystemMemory (
+  VOID
+  )
+{
+  //TODO: Implement me
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+  OUT UINTN                   *CoreCount,
+  OUT ARM_CORE_INFO           **ArmCoreTable
+  )
+{
+  if (ArmIsMpCore()) {
+    *CoreCount    = sizeof(mArmPlatformNullMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
+    *ArmCoreTable = mArmPlatformNullMpCoreInfoTable;
+    return EFI_SUCCESS;
+  } else {
+    return EFI_UNSUPPORTED;
+  }
+}
+
+// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
+EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+
+EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
+  {
+    EFI_PEI_PPI_DESCRIPTOR_PPI,
+    &mArmMpCoreInfoPpiGuid,
+    &mMpCoreInfoPpi
+  }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+  OUT UINTN                   *PpiListSize,
+  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
+  )
+{
+  if (ArmIsMpCore()) {
+    *PpiListSize = sizeof(gPlatformPpiTable);
+    *PpiList = gPlatformPpiTable;
+  } else {
+    *PpiListSize = 0;
+    *PpiList = NULL;
+  }
+}
+
diff --git a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c
index c548d8b3f9..1a83882030 100644
--- a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c
+++ b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c
@@ -1,74 +1,74 @@
-/** @file
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/ArmPlatformLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-
-/**
-  Initialize the Secure peripherals and memory regions
-
-  If Trustzone is supported by your platform then this function makes the required initialization
-  of the secure peripherals and memory regions.
-
-**/
-VOID
-ArmPlatformSecTrustzoneInit (
-  IN  UINTN                     MpId
-  )
-{
-  // Secondary cores might have to set the Secure SGIs into the GICD_IGROUPR0
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return;
-  }
-
-  ASSERT(FALSE);
-}
-
-/**
-  Initialize controllers that must setup at the early stage
-
-  Some peripherals must be initialized in Secure World.
-  For example, some L2x0 requires to be initialized in Secure World
-
-**/
-RETURN_STATUS
-ArmPlatformSecInitialize (
-  IN  UINTN                     MpId
-  )
-{
-  // If it is not the primary core then there is nothing to do
-  if (!IS_PRIMARY_CORE(MpId)) {
-    return RETURN_SUCCESS;
-  }
-
-  // Do nothing yet
-  return RETURN_SUCCESS;
-}
-
-/**
-  Call before jumping to Normal World
-
-  This function allows the firmware platform to do extra actions before
-  jumping to the Normal World
-
-**/
-VOID
-ArmPlatformSecExtraAction (
-  IN  UINTN         MpId,
-  OUT UINTN*        JumpAddress
-  )
-{
-  *JumpAddress = PcdGet32(PcdFvBaseAddress);
-}
+/** @file
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+
+/**
+  Initialize the Secure peripherals and memory regions
+
+  If Trustzone is supported by your platform then this function makes the required initialization
+  of the secure peripherals and memory regions.
+
+**/
+VOID
+ArmPlatformSecTrustzoneInit (
+  IN  UINTN                     MpId
+  )
+{
+  // Secondary cores might have to set the Secure SGIs into the GICD_IGROUPR0
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return;
+  }
+
+  ASSERT(FALSE);
+}
+
+/**
+  Initialize controllers that must setup at the early stage
+
+  Some peripherals must be initialized in Secure World.
+  For example, some L2x0 requires to be initialized in Secure World
+
+**/
+RETURN_STATUS
+ArmPlatformSecInitialize (
+  IN  UINTN                     MpId
+  )
+{
+  // If it is not the primary core then there is nothing to do
+  if (!IS_PRIMARY_CORE(MpId)) {
+    return RETURN_SUCCESS;
+  }
+
+  // Do nothing yet
+  return RETURN_SUCCESS;
+}
+
+/**
+  Call before jumping to Normal World
+
+  This function allows the firmware platform to do extra actions before
+  jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+  IN  UINTN         MpId,
+  OUT UINTN*        JumpAddress
+  )
+{
+  *JumpAddress = PcdGet32(PcdFvBaseAddress);
+}
diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
index 2962ffe5d8..26afb34b23 100755
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
@@ -1,55 +1,55 @@
-#/* @file
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-#*/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = DebugSecExtraActionLib
-  FILE_GUID                      = 8fff7a60-a6f8-11e0-990a-0002a5d5c51b
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = ArmPlatformSecExtraActionLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-#  VALID_ARCHITECTURES           = ARM
-#
-
-[Sources.common]
-  DebugSecExtraActionLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  DebugLib
-  PcdLib
-  ArmGicLib
-  PrintLib
-  SerialPortLib
-
-[FeaturePcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
-  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdFvBaseAddress
-  
-  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
-  gArmTokenSpaceGuid.PcdArmPrimaryCore
-
-  gArmTokenSpaceGuid.PcdGicDistributorBase
-  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
-  gArmTokenSpaceGuid.PcdGicSgiIntId
+#/* @file
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#*/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = DebugSecExtraActionLib
+  FILE_GUID                      = 8fff7a60-a6f8-11e0-990a-0002a5d5c51b
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = ArmPlatformSecExtraActionLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+#  VALID_ARCHITECTURES           = ARM
+#
+
+[Sources.common]
+  DebugSecExtraActionLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  PcdLib
+  ArmGicLib
+  PrintLib
+  SerialPortLib
+
+[FeaturePcd]
+  gArmPlatformTokenSpaceGuid.PcdStandalone
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdFvBaseAddress
+  
+  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+  gArmTokenSpaceGuid.PcdArmPrimaryCore
+
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+  gArmTokenSpaceGuid.PcdGicSgiIntId
diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
index 7ccd09bd48..20e8882713 100644
--- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
+++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
@@ -1,184 +1,184 @@
-/** @file
-  Serial I/O Port library functions with no library constructor/destructor
-
-  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
-  
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/SerialPortLib.h>
-#include <Library/SerialPortExtLib.h>
-
-#include <Drivers/PL011Uart.h>
-
-
-/**
-
-  Programmed hardware of Serial port.
-
-  @return    Always return RETURN_UNSUPPORTED.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortInitialize (
-  VOID
-  )
-{
-  return PL011UartInitializePort (
-      (UINTN)PcdGet64 (PcdSerialRegisterBase),
-      (UINTN)PcdGet64 (PcdUartDefaultBaudRate),
-      0, // Use the default value for Fifo depth
-      (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity),
-      PcdGet8 (PcdUartDefaultDataBits),
-      (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits));
-}
-
-/**
-  Write data to serial device.
-
-  @param  Buffer           Point of data buffer which need to be written.
-  @param  NumberOfBytes    Number of output bytes which are cached in Buffer.
-
-  @retval 0                Write data failed.
-  @retval !0               Actual number of bytes written to serial device.
-
-**/
-UINTN
-EFIAPI
-SerialPortWrite (
-  IN UINT8     *Buffer,
-  IN UINTN     NumberOfBytes
-  )
-{
-  return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
-}
-
-/**
-  Read data from serial device and save the data in buffer.
-
-  @param  Buffer           Point of data buffer which need to be written.
-  @param  NumberOfBytes    Number of output bytes which are cached in Buffer.
-
-  @retval 0                Read data failed.
-  @retval !0               Actual number of bytes read from serial device.
-
-**/
-UINTN
-EFIAPI
-SerialPortRead (
-  OUT UINT8     *Buffer,
-  IN  UINTN     NumberOfBytes
-)
-{
-  return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
-}
-
-/**
-  Check to see if any data is available to be read from the debug device.
-
-  @retval EFI_SUCCESS       At least one byte of data is available to be read
-  @retval EFI_NOT_READY     No data is available to be read
-  @retval EFI_DEVICE_ERROR  The serial device is not functioning properly
-
-**/
-BOOLEAN
-EFIAPI
-SerialPortPoll (
-  VOID
-  )
-{
-  return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));
-}
-
-/**
-  Set new attributes to PL011.
-
-  @param  BaudRate                The baud rate of the serial device. If the baud rate is not supported,
-                                  the speed will be reduced down to the nearest supported one and the
-                                  variable's value will be updated accordingly.
-  @param  ReceiveFifoDepth        The number of characters the device will buffer on input. If the specified
-                                  value is not supported, the variable's value will be reduced down to the
-                                  nearest supported one.
-  @param  Timeout                 If applicable, the number of microseconds the device will wait
-                                  before timing out a Read or a Write operation.
-  @param  Parity                  If applicable, this is the EFI_PARITY_TYPE that is computer or checked
-                                  as each character is transmitted or received. If the device does not
-                                  support parity, the value is the default parity value.
-  @param  DataBits                The number of data bits in each character
-  @param  StopBits                If applicable, the EFI_STOP_BITS_TYPE number of stop bits per character.
-                                  If the device does not support stop bits, the value is the default stop
-                                  bit value.
-
-  @retval EFI_SUCCESS             All attributes were set correctly on the serial device.
-  @retval EFI_INVALID_PARAMETERS  One or more of the attributes has an unsupported value.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetAttributes (
-  IN UINT64              BaudRate,
-  IN UINT32              ReceiveFifoDepth,
-  IN UINT32              Timeout,
-  IN EFI_PARITY_TYPE     Parity,
-  IN UINT8               DataBits,
-  IN EFI_STOP_BITS_TYPE  StopBits
-  )
-{
-  return PL011UartInitializePort (
-        (UINTN)PcdGet64 (PcdSerialRegisterBase),
-        BaudRate,
-        ReceiveFifoDepth,
-        Parity,
-        DataBits,
-        StopBits);
-}
-
-/**
-  Set the serial device control bits.
-
-  @param  Control                 Control bits which are to be set on the serial device.
-
-  @retval EFI_SUCCESS             The new control bits were set on the serial device.
-  @retval EFI_UNSUPPORTED         The serial device does not support this operation.
-  @retval EFI_DEVICE_ERROR        The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortSetControl (
-  IN UINT32                  Control
-  )
-{
-  return PL011UartSetControl((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
-}
-
-/**
-  Get the serial device control bits.
-
-  @param  Control                 Control signals read from the serial device.
-
-  @retval EFI_SUCCESS             The control bits were read from the serial device.
-  @retval EFI_DEVICE_ERROR        The serial device is not functioning correctly.
-
-**/
-RETURN_STATUS
-EFIAPI
-SerialPortGetControl (
-  OUT UINT32                  *Control
-  )
-{
-  return PL011UartGetControl((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
-}
+/** @file
+  Serial I/O Port library functions with no library constructor/destructor
+
+  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+  Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
+  
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+#include <Library/SerialPortExtLib.h>
+
+#include <Drivers/PL011Uart.h>
+
+
+/**
+
+  Programmed hardware of Serial port.
+
+  @return    Always return RETURN_UNSUPPORTED.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+  VOID
+  )
+{
+  return PL011UartInitializePort (
+      (UINTN)PcdGet64 (PcdSerialRegisterBase),
+      (UINTN)PcdGet64 (PcdUartDefaultBaudRate),
+      0, // Use the default value for Fifo depth
+      (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity),
+      PcdGet8 (PcdUartDefaultDataBits),
+      (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits));
+}
+
+/**
+  Write data to serial device.
+
+  @param  Buffer           Point of data buffer which need to be written.
+  @param  NumberOfBytes    Number of output bytes which are cached in Buffer.
+
+  @retval 0                Write data failed.
+  @retval !0               Actual number of bytes written to serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortWrite (
+  IN UINT8     *Buffer,
+  IN UINTN     NumberOfBytes
+  )
+{
+  return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
+}
+
+/**
+  Read data from serial device and save the data in buffer.
+
+  @param  Buffer           Point of data buffer which need to be written.
+  @param  NumberOfBytes    Number of output bytes which are cached in Buffer.
+
+  @retval 0                Read data failed.
+  @retval !0               Actual number of bytes read from serial device.
+
+**/
+UINTN
+EFIAPI
+SerialPortRead (
+  OUT UINT8     *Buffer,
+  IN  UINTN     NumberOfBytes
+)
+{
+  return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);
+}
+
+/**
+  Check to see if any data is available to be read from the debug device.
+
+  @retval EFI_SUCCESS       At least one byte of data is available to be read
+  @retval EFI_NOT_READY     No data is available to be read
+  @retval EFI_DEVICE_ERROR  The serial device is not functioning properly
+
+**/
+BOOLEAN
+EFIAPI
+SerialPortPoll (
+  VOID
+  )
+{
+  return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));
+}
+
+/**
+  Set new attributes to PL011.
+
+  @param  BaudRate                The baud rate of the serial device. If the baud rate is not supported,
+                                  the speed will be reduced down to the nearest supported one and the
+                                  variable's value will be updated accordingly.
+  @param  ReceiveFifoDepth        The number of characters the device will buffer on input. If the specified
+                                  value is not supported, the variable's value will be reduced down to the
+                                  nearest supported one.
+  @param  Timeout                 If applicable, the number of microseconds the device will wait
+                                  before timing out a Read or a Write operation.
+  @param  Parity                  If applicable, this is the EFI_PARITY_TYPE that is computer or checked
+                                  as each character is transmitted or received. If the device does not
+                                  support parity, the value is the default parity value.
+  @param  DataBits                The number of data bits in each character
+  @param  StopBits                If applicable, the EFI_STOP_BITS_TYPE number of stop bits per character.
+                                  If the device does not support stop bits, the value is the default stop
+                                  bit value.
+
+  @retval EFI_SUCCESS             All attributes were set correctly on the serial device.
+  @retval EFI_INVALID_PARAMETERS  One or more of the attributes has an unsupported value.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortSetAttributes (
+  IN UINT64              BaudRate,
+  IN UINT32              ReceiveFifoDepth,
+  IN UINT32              Timeout,
+  IN EFI_PARITY_TYPE     Parity,
+  IN UINT8               DataBits,
+  IN EFI_STOP_BITS_TYPE  StopBits
+  )
+{
+  return PL011UartInitializePort (
+        (UINTN)PcdGet64 (PcdSerialRegisterBase),
+        BaudRate,
+        ReceiveFifoDepth,
+        Parity,
+        DataBits,
+        StopBits);
+}
+
+/**
+  Set the serial device control bits.
+
+  @param  Control                 Control bits which are to be set on the serial device.
+
+  @retval EFI_SUCCESS             The new control bits were set on the serial device.
+  @retval EFI_UNSUPPORTED         The serial device does not support this operation.
+  @retval EFI_DEVICE_ERROR        The serial device is not functioning correctly.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortSetControl (
+  IN UINT32                  Control
+  )
+{
+  return PL011UartSetControl((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
+}
+
+/**
+  Get the serial device control bits.
+
+  @param  Control                 Control signals read from the serial device.
+
+  @retval EFI_SUCCESS             The control bits were read from the serial device.
+  @retval EFI_DEVICE_ERROR        The serial device is not functioning correctly.
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortGetControl (
+  OUT UINT32                  *Control
+  )
+{
+  return PL011UartGetControl((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);
+}
diff --git a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c b/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c
index fcaa23edde..a042dac9a3 100644
--- a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c
+++ b/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c
@@ -1,260 +1,260 @@
-/** @file
-
-  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-  Copyright (c) 2011, ARM Limited. All rights reserved.
-  
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Base.h>
-
-#include <Library/BaseLib.h>
-#include <Library/TimerLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Drivers/SP804Timer.h>
-
-#define SP804_TIMER_METRONOME_BASE    ((UINTN)PcdGet32 (PcdSP804TimerMetronomeBase))
-#define SP804_TIMER_PERFORMANCE_BASE  ((UINTN)PcdGet32 (PcdSP804TimerPerformanceBase))
-
-// Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter
-// Note: ArmVE's Timer0 and Timer1 are used by TimerDxe.
-RETURN_STATUS
-EFIAPI
-TimerConstructor (
-  VOID
-  )
-{
-  // Check if the Metronome Timer is already initialized
-  if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-    return RETURN_SUCCESS;
-  } else {
-    // Configure the Metronome Timer for free running operation, 32 bits, no prescaler, and interrupt disabled
-    MmioWrite32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
-
-    // Start the Metronome Timer ticking
-    MmioOr32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-  }
-
-  // Check if the Performance Timer is already initialized
-  if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
-    return RETURN_SUCCESS;
-  } else {
-    // Configure the Performance timer for free running operation, 32 bits, no prescaler, interrupt disabled
-    MmioWrite32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
-
-    // Start the Performance Timer ticking
-    MmioOr32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-  }
-
-  return RETURN_SUCCESS;
-}
-
-/**
-  Stalls the CPU for at least the given number of microseconds.
-
-  Stalls the CPU for the number of microseconds specified by MicroSeconds.
-  The hardware timer is 32 bits.
-  The maximum possible delay is (0xFFFFFFFF / TimerFrequencyMHz), i.e. ([32bits] / FreqInMHz)
-  For example:
-  +----------------+------------+----------+----------+
-  | TimerFrequency |  MaxDelay  | MaxDelay | MaxDelay |
-  |     (MHz)      |    (us)    |   (s)    |  (min)   |
-  +----------------+------------+----------+----------+
-  |        1       | 0xFFFFFFFF |   4294   |   71.5   |
-  |        5       | 0x33333333 |    859   |   14.3   |
-  |       10       | 0x19999999 |    429   |    7.2   |
-  |       50       | 0x051EB851 |     86   |    1.4   |
-  +----------------+------------+----------+----------+
-  If it becomes necessary to support higher delays, then consider using the
-  real time clock.
-
-  During this delay, the cpu is not yielded to any other process, with one exception:
-  events that are triggered off a timer and which execute at a higher TPL than
-  this function. These events may call MicroSecondDelay (or NanoSecondDelay) to
-  fulfil their own needs.
-  Therefore, this function must be re-entrant, as it may be interrupted and re-started.
-
-  @param  MicroSeconds  The minimum number of microseconds to delay.
-
-  @return The value of MicroSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-MicroSecondDelay (
-  IN  UINTN MicroSeconds
-  )
-{
-  UINT64    DelayTicks64;         // Convert from microseconds to timer ticks, more bits to detect over-range conditions.
-  UINTN     DelayTicks;           // Convert from microseconds to timer ticks, native size for general calculations.
-  UINTN     StartTicks;           // Timer value snapshot at the start of the delay
-  UINTN     TargetTicks;          // Timer value to signal the end of the delay
-  UINTN     CurrentTicks;         // Current value of the 64-bit timer value at any given moment
-
-  // If we snapshot the timer at the start of the delay function then we minimise unaccounted overheads.
-  StartTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
-
-  // We are operating at the limit of 32bits. For the range checking work in 64 bits to avoid overflows.
-  DelayTicks64 = MultU64x32((UINT64)MicroSeconds, PcdGet32(PcdSP804TimerFrequencyInMHz));
-
-  // We are limited to 32 bits.
-  // If the specified delay is exactly equal to the max range of the timer,
-  // then the start will be equal to the stop plus one timer overflow (wrap-around).
-  // To avoid having to check for that, reduce the maximum acceptable range by 1 tick,
-  // i.e. reject delays equal or greater than the max range of the timer.
-  if (DelayTicks64 >= (UINT64)SP804_MAX_TICKS) {
-    DEBUG((EFI_D_ERROR,"MicroSecondDelay: ERROR: MicroSeconds=%d exceed SP804 count range. Max MicroSeconds=%d\n",
-      MicroSeconds,
-      ((UINTN)SP804_MAX_TICKS/PcdGet32(PcdSP804TimerFrequencyInMHz))));
-  }
-  ASSERT(DelayTicks64 < (UINT64)SP804_MAX_TICKS);
-
-  // From now on do calculations only in native bit size.
-  DelayTicks = (UINTN)DelayTicks64;
-
-  // Calculate the target value of the timer.
-
-  //Note: SP804 timer is counting down
-  if (StartTicks >= DelayTicks) {
-    // In this case we do not expect a wrap-around of the timer to occur.
-    // CurrentTicks must be less than StartTicks and higher than TargetTicks.
-    // If this is not the case, then the delay has been reached and may even have been exceeded if this
-    // function was suspended by a higher priority interrupt.
-
-    TargetTicks = StartTicks - DelayTicks;
-
-    do {
-      CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
-    } while ((CurrentTicks > TargetTicks) && (CurrentTicks <= StartTicks));
-
-  } else {
-    // In this case TargetTicks is larger than StartTicks.
-    // This means we expect a wrap-around of the timer to occur and we must wait for it.
-    // Before the wrap-around, CurrentTicks must be less than StartTicks and less than TargetTicks.
-    // After the wrap-around, CurrentTicks must be larger than StartTicks and larger than TargetTicks.
-    // If this is not the case, then the delay has been reached and may even have been exceeded if this
-    // function was suspended by a higher priority interrupt.
-
-    // The order of operations is essential to avoid arithmetic overflow problems
-    TargetTicks = ((UINTN)SP804_MAX_TICKS - DelayTicks) + StartTicks;
-
-    // First wait for the wrap-around to occur
-    do {
-      CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
-    } while (CurrentTicks <= StartTicks);
-
-    // Then wait for the target
-    do {
-      CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
-    } while (CurrentTicks > TargetTicks);
-  }
-
-  return MicroSeconds;
-}
-
-/**
-  Stalls the CPU for at least the given number of nanoseconds.
-
-  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
-
-  When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.
-  Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.
-
-  @param  NanoSeconds The minimum number of nanoseconds to delay.
-
-  @return The value of NanoSeconds inputted.
-
-**/
-UINTN
-EFIAPI
-NanoSecondDelay (
-  IN  UINTN NanoSeconds
-  )
-{
-  UINTN  MicroSeconds;
-
-  // Round up to 1us Tick Number
-  MicroSeconds = NanoSeconds / 1000;
-  MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;
-
-  MicroSecondDelay (MicroSeconds);
-
-  return NanoSeconds;
-}
-
-/**
-  Retrieves the current value of a 64-bit free running performance counter.
-
-  The counter can either count up by 1 or count down by 1. If the physical
-  performance counter counts by a larger increment, then the counter values
-  must be translated. The properties of the counter can be retrieved from
-  GetPerformanceCounterProperties().
-
-  @return The current value of the free running performance counter.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounter (
-  VOID
-  )
-{ 
-  // Free running 64-bit/32-bit counter is needed here.
-  // Don't think we need this to boot, just to do performance profile
-  UINT64 Value;
-  Value = MmioRead32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CURRENT_REG);
-  return Value;
-}
-
-
-/**
-  Retrieves the 64-bit frequency in Hz and the range of performance counter
-  values.
-
-  If StartValue is not NULL, then the value that the performance counter starts
-  with immediately after is it rolls over is returned in StartValue. If
-  EndValue is not NULL, then the value that the performance counter end with
-  immediately before it rolls over is returned in EndValue. The 64-bit
-  frequency of the performance counter in Hz is always returned. If StartValue
-  is less than EndValue, then the performance counter counts up. If StartValue
-  is greater than EndValue, then the performance counter counts down. For
-  example, a 64-bit free running counter that counts up would have a StartValue
-  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
-  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
-
-  @param  StartValue  The value the performance counter starts with when it
-                      rolls over.
-  @param  EndValue    The value that the performance counter ends with before
-                      it rolls over.
-
-  @return The frequency in Hz.
-
-**/
-UINT64
-EFIAPI
-GetPerformanceCounterProperties (
-  OUT UINT64  *StartValue,  OPTIONAL
-  OUT UINT64  *EndValue     OPTIONAL
-  )
-{
-  if (StartValue != NULL) {
-    // Timer starts with the reload value
-    *StartValue = 0xFFFFFFFF;
-  }
-  
-  if (EndValue != NULL) {
-    // Timer counts down to 0x0
-    *EndValue = (UINT64)0ULL;
-  }
-  
-  return PcdGet64 (PcdEmbeddedPerformanceCounterFrequencyInHz);
-}
+/** @file
+
+  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+  Copyright (c) 2011, ARM Limited. All rights reserved.
+  
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Base.h>
+
+#include <Library/BaseLib.h>
+#include <Library/TimerLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Drivers/SP804Timer.h>
+
+#define SP804_TIMER_METRONOME_BASE    ((UINTN)PcdGet32 (PcdSP804TimerMetronomeBase))
+#define SP804_TIMER_PERFORMANCE_BASE  ((UINTN)PcdGet32 (PcdSP804TimerPerformanceBase))
+
+// Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter
+// Note: ArmVE's Timer0 and Timer1 are used by TimerDxe.
+RETURN_STATUS
+EFIAPI
+TimerConstructor (
+  VOID
+  )
+{
+  // Check if the Metronome Timer is already initialized
+  if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    return RETURN_SUCCESS;
+  } else {
+    // Configure the Metronome Timer for free running operation, 32 bits, no prescaler, and interrupt disabled
+    MmioWrite32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
+
+    // Start the Metronome Timer ticking
+    MmioOr32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+  }
+
+  // Check if the Performance Timer is already initialized
+  if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
+    return RETURN_SUCCESS;
+  } else {
+    // Configure the Performance timer for free running operation, 32 bits, no prescaler, interrupt disabled
+    MmioWrite32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
+
+    // Start the Performance Timer ticking
+    MmioOr32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+  }
+
+  return RETURN_SUCCESS;
+}
+
+/**
+  Stalls the CPU for at least the given number of microseconds.
+
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.
+  The hardware timer is 32 bits.
+  The maximum possible delay is (0xFFFFFFFF / TimerFrequencyMHz), i.e. ([32bits] / FreqInMHz)
+  For example:
+  +----------------+------------+----------+----------+
+  | TimerFrequency |  MaxDelay  | MaxDelay | MaxDelay |
+  |     (MHz)      |    (us)    |   (s)    |  (min)   |
+  +----------------+------------+----------+----------+
+  |        1       | 0xFFFFFFFF |   4294   |   71.5   |
+  |        5       | 0x33333333 |    859   |   14.3   |
+  |       10       | 0x19999999 |    429   |    7.2   |
+  |       50       | 0x051EB851 |     86   |    1.4   |
+  +----------------+------------+----------+----------+
+  If it becomes necessary to support higher delays, then consider using the
+  real time clock.
+
+  During this delay, the cpu is not yielded to any other process, with one exception:
+  events that are triggered off a timer and which execute at a higher TPL than
+  this function. These events may call MicroSecondDelay (or NanoSecondDelay) to
+  fulfil their own needs.
+  Therefore, this function must be re-entrant, as it may be interrupted and re-started.
+
+  @param  MicroSeconds  The minimum number of microseconds to delay.
+
+  @return The value of MicroSeconds inputted.
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+  IN  UINTN MicroSeconds
+  )
+{
+  UINT64    DelayTicks64;         // Convert from microseconds to timer ticks, more bits to detect over-range conditions.
+  UINTN     DelayTicks;           // Convert from microseconds to timer ticks, native size for general calculations.
+  UINTN     StartTicks;           // Timer value snapshot at the start of the delay
+  UINTN     TargetTicks;          // Timer value to signal the end of the delay
+  UINTN     CurrentTicks;         // Current value of the 64-bit timer value at any given moment
+
+  // If we snapshot the timer at the start of the delay function then we minimise unaccounted overheads.
+  StartTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
+
+  // We are operating at the limit of 32bits. For the range checking work in 64 bits to avoid overflows.
+  DelayTicks64 = MultU64x32((UINT64)MicroSeconds, PcdGet32(PcdSP804TimerFrequencyInMHz));
+
+  // We are limited to 32 bits.
+  // If the specified delay is exactly equal to the max range of the timer,
+  // then the start will be equal to the stop plus one timer overflow (wrap-around).
+  // To avoid having to check for that, reduce the maximum acceptable range by 1 tick,
+  // i.e. reject delays equal or greater than the max range of the timer.
+  if (DelayTicks64 >= (UINT64)SP804_MAX_TICKS) {
+    DEBUG((EFI_D_ERROR,"MicroSecondDelay: ERROR: MicroSeconds=%d exceed SP804 count range. Max MicroSeconds=%d\n",
+      MicroSeconds,
+      ((UINTN)SP804_MAX_TICKS/PcdGet32(PcdSP804TimerFrequencyInMHz))));
+  }
+  ASSERT(DelayTicks64 < (UINT64)SP804_MAX_TICKS);
+
+  // From now on do calculations only in native bit size.
+  DelayTicks = (UINTN)DelayTicks64;
+
+  // Calculate the target value of the timer.
+
+  //Note: SP804 timer is counting down
+  if (StartTicks >= DelayTicks) {
+    // In this case we do not expect a wrap-around of the timer to occur.
+    // CurrentTicks must be less than StartTicks and higher than TargetTicks.
+    // If this is not the case, then the delay has been reached and may even have been exceeded if this
+    // function was suspended by a higher priority interrupt.
+
+    TargetTicks = StartTicks - DelayTicks;
+
+    do {
+      CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
+    } while ((CurrentTicks > TargetTicks) && (CurrentTicks <= StartTicks));
+
+  } else {
+    // In this case TargetTicks is larger than StartTicks.
+    // This means we expect a wrap-around of the timer to occur and we must wait for it.
+    // Before the wrap-around, CurrentTicks must be less than StartTicks and less than TargetTicks.
+    // After the wrap-around, CurrentTicks must be larger than StartTicks and larger than TargetTicks.
+    // If this is not the case, then the delay has been reached and may even have been exceeded if this
+    // function was suspended by a higher priority interrupt.
+
+    // The order of operations is essential to avoid arithmetic overflow problems
+    TargetTicks = ((UINTN)SP804_MAX_TICKS - DelayTicks) + StartTicks;
+
+    // First wait for the wrap-around to occur
+    do {
+      CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
+    } while (CurrentTicks <= StartTicks);
+
+    // Then wait for the target
+    do {
+      CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
+    } while (CurrentTicks > TargetTicks);
+  }
+
+  return MicroSeconds;
+}
+
+/**
+  Stalls the CPU for at least the given number of nanoseconds.
+
+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+  When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.
+  Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.
+
+  @param  NanoSeconds The minimum number of nanoseconds to delay.
+
+  @return The value of NanoSeconds inputted.
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+  IN  UINTN NanoSeconds
+  )
+{
+  UINTN  MicroSeconds;
+
+  // Round up to 1us Tick Number
+  MicroSeconds = NanoSeconds / 1000;
+  MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;
+
+  MicroSecondDelay (MicroSeconds);
+
+  return NanoSeconds;
+}
+
+/**
+  Retrieves the current value of a 64-bit free running performance counter.
+
+  The counter can either count up by 1 or count down by 1. If the physical
+  performance counter counts by a larger increment, then the counter values
+  must be translated. The properties of the counter can be retrieved from
+  GetPerformanceCounterProperties().
+
+  @return The current value of the free running performance counter.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounter (
+  VOID
+  )
+{ 
+  // Free running 64-bit/32-bit counter is needed here.
+  // Don't think we need this to boot, just to do performance profile
+  UINT64 Value;
+  Value = MmioRead32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CURRENT_REG);
+  return Value;
+}
+
+
+/**
+  Retrieves the 64-bit frequency in Hz and the range of performance counter
+  values.
+
+  If StartValue is not NULL, then the value that the performance counter starts
+  with immediately after is it rolls over is returned in StartValue. If
+  EndValue is not NULL, then the value that the performance counter end with
+  immediately before it rolls over is returned in EndValue. The 64-bit
+  frequency of the performance counter in Hz is always returned. If StartValue
+  is less than EndValue, then the performance counter counts up. If StartValue
+  is greater than EndValue, then the performance counter counts down. For
+  example, a 64-bit free running counter that counts up would have a StartValue
+  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
+  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
+
+  @param  StartValue  The value the performance counter starts with when it
+                      rolls over.
+  @param  EndValue    The value that the performance counter ends with before
+                      it rolls over.
+
+  @return The frequency in Hz.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounterProperties (
+  OUT UINT64  *StartValue,  OPTIONAL
+  OUT UINT64  *EndValue     OPTIONAL
+  )
+{
+  if (StartValue != NULL) {
+    // Timer starts with the reload value
+    *StartValue = 0xFFFFFFFF;
+  }
+  
+  if (EndValue != NULL) {
+    // Timer counts down to 0x0
+    *EndValue = (UINT64)0ULL;
+  }
+  
+  return PcdGet64 (PcdEmbeddedPerformanceCounterFrequencyInHz);
+}
diff --git a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf b/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf
index 0928cae53b..d9bce48b93 100644
--- a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf
+++ b/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf
@@ -1,44 +1,44 @@
-#/** @file
-# Timer library implementation
-#  
-#  
-#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = SP804TimerLib
-  FILE_GUID                      = 09cefa99-0d07-487f-a651-fb44f094b1c7 
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = TimerLib
-  
-  CONSTRUCTOR                    = TimerConstructor
-
-[Sources.common]
-  SP804TimerLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  DebugLib
-  IoLib
-  BaseLib
-
-[Pcd]
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase
-  gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz
+#/** @file
+# Timer library implementation
+#  
+#  
+#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = SP804TimerLib
+  FILE_GUID                      = 09cefa99-0d07-487f-a651-fb44f094b1c7 
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = TimerLib
+  
+  CONSTRUCTOR                    = TimerConstructor
+
+[Sources.common]
+  SP804TimerLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  IoLib
+  BaseLib
+
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase
+  gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase
+  gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz
diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
index 8c8d610883..fb77e4db5d 100755
--- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
+++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
@@ -1,66 +1,66 @@
-#/** @file
-#  
-#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#  
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#  
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmMemoryInitPeiLib
-  FILE_GUID                      = 55ddb6e0-70b5-11e0-b33e-0002a5d5c51b
-  MODULE_TYPE                    = SEC
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = PlatformPeiLib
-
-[Sources]
-  MemoryInitPeiLib.c
-
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-  
-[LibraryClasses]
-  DebugLib
-  HobLib
-  ArmLib
-  ArmPlatformLib
-
-[Guids]
-  gEfiMemoryTypeInformationGuid
-
-[Ppis]
-
-[FeaturePcd]
-  gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdFdBaseAddress
-  gArmTokenSpaceGuid.PcdFdSize
-
-  gArmTokenSpaceGuid.PcdSystemMemoryBase
-  gArmTokenSpaceGuid.PcdSystemMemorySize
-  gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
-  
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
-  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
-   
-[depex]
-  TRUE
+#/** @file
+#  
+#  Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmMemoryInitPeiLib
+  FILE_GUID                      = 55ddb6e0-70b5-11e0-b33e-0002a5d5c51b
+  MODULE_TYPE                    = SEC
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PlatformPeiLib
+
+[Sources]
+  MemoryInitPeiLib.c
+
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+  
+[LibraryClasses]
+  DebugLib
+  HobLib
+  ArmLib
+  ArmPlatformLib
+
+[Guids]
+  gEfiMemoryTypeInformationGuid
+
+[Ppis]
+
+[FeaturePcd]
+  gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdFdBaseAddress
+  gArmTokenSpaceGuid.PcdFdSize
+
+  gArmTokenSpaceGuid.PcdSystemMemoryBase
+  gArmTokenSpaceGuid.PcdSystemMemorySize
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize
+  
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode
+  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData
+   
+[depex]
+  TRUE
diff --git a/ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf b/ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
index 01f9359522..5cddeccb68 100755
--- a/ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
+++ b/ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
@@ -1,53 +1,53 @@
-#/** @file
-#
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-#**/
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmPlatformPeiLib
-  FILE_GUID                      = 49d37060-70b5-11e0-aa2d-0002a5d5c51b
-  MODULE_TYPE                    = SEC
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = PlatformPeiLib
-
-[Sources]
-  PlatformPeiLib.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-
-[LibraryClasses]
-  DebugLib
-  HobLib
-  ArmPlatformLib
-
-[Ppis]
-  gEfiPeiMasterBootModePpiGuid                  # PPI ALWAYS_PRODUCED
-  gEfiPeiBootInRecoveryModePpiGuid              # PPI SOMETIMES_PRODUCED
-
-[FixedPcd]
-  gArmTokenSpaceGuid.PcdFdBaseAddress
-  gArmTokenSpaceGuid.PcdFdSize
-  
-  gArmTokenSpaceGuid.PcdFvBaseAddress
-  gArmTokenSpaceGuid.PcdFvSize
-  
-  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
-  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
-  
-[depex]
-  TRUE
+#/** @file
+#
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = ArmPlatformPeiLib
+  FILE_GUID                      = 49d37060-70b5-11e0-aa2d-0002a5d5c51b
+  MODULE_TYPE                    = SEC
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PlatformPeiLib
+
+[Sources]
+  PlatformPeiLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  HobLib
+  ArmPlatformLib
+
+[Ppis]
+  gEfiPeiMasterBootModePpiGuid                  # PPI ALWAYS_PRODUCED
+  gEfiPeiBootInRecoveryModePpiGuid              # PPI SOMETIMES_PRODUCED
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdFdBaseAddress
+  gArmTokenSpaceGuid.PcdFdSize
+  
+  gArmTokenSpaceGuid.PcdFvBaseAddress
+  gArmTokenSpaceGuid.PcdFvSize
+  
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
+  
+[depex]
+  TRUE
diff --git a/ArmPlatformPkg/Scripts/Ds5/build_report.py b/ArmPlatformPkg/Scripts/Ds5/build_report.py
index 3805c0b43b..e59230090f 100644
--- a/ArmPlatformPkg/Scripts/Ds5/build_report.py
+++ b/ArmPlatformPkg/Scripts/Ds5/build_report.py
@@ -1,54 +1,54 @@
-#
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-import re
-
-class BuildReport:
-    PCDs = {}
-    
-    def parse_platform_summary(self, file):
-        pass
-    
-    def parse_pcd_report(self, report_file):
-        pcd_reg = re.compile(" (\*P|\*F|\*M|  ) (\w+)(\ +)\: (.*) \((\w+)\) = (.*)\n")
-        
-        for line in report_file.xreadlines():
-            stripped_line = line.strip()
-            if re.match("\<=+\>", stripped_line):
-                return
-            elif re.match("g.*Guid", stripped_line):
-                guid = stripped_line
-                self.PCDs[guid] = {}
-            else:
-                m = pcd_reg.match(line)
-                if m:
-                    self.PCDs[guid][m.group(2)] = (m.group(6).strip(),m.group(5))
-                
-    def parse_firmware_device(self, file):
-        pass
-        
-    def parse_module_summary(self, file):
-        #print "Module Summary"
-        pass
-    
-    CONST_SECTION_HEADERS = [('Platform Summary', parse_platform_summary),
-                             ('Platform Configuration Database Report',parse_pcd_report),
-                             ('Firmware Device (FD)',parse_firmware_device),
-                             ('Module Summary',parse_module_summary)]
-    
-    def __init__(self, filename = 'report.log'):
-        report_file = open(filename, 'r')
-        for line in report_file.xreadlines():
-            for section_header in BuildReport.CONST_SECTION_HEADERS:
-                if line.strip() == section_header[0]:
-                    section_header[1](self, report_file)
-        #print self.PCDs
+#
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+import re
+
+class BuildReport:
+    PCDs = {}
+    
+    def parse_platform_summary(self, file):
+        pass
+    
+    def parse_pcd_report(self, report_file):
+        pcd_reg = re.compile(" (\*P|\*F|\*M|  ) (\w+)(\ +)\: (.*) \((\w+)\) = (.*)\n")
+        
+        for line in report_file.xreadlines():
+            stripped_line = line.strip()
+            if re.match("\<=+\>", stripped_line):
+                return
+            elif re.match("g.*Guid", stripped_line):
+                guid = stripped_line
+                self.PCDs[guid] = {}
+            else:
+                m = pcd_reg.match(line)
+                if m:
+                    self.PCDs[guid][m.group(2)] = (m.group(6).strip(),m.group(5))
+                
+    def parse_firmware_device(self, file):
+        pass
+        
+    def parse_module_summary(self, file):
+        #print "Module Summary"
+        pass
+    
+    CONST_SECTION_HEADERS = [('Platform Summary', parse_platform_summary),
+                             ('Platform Configuration Database Report',parse_pcd_report),
+                             ('Firmware Device (FD)',parse_firmware_device),
+                             ('Module Summary',parse_module_summary)]
+    
+    def __init__(self, filename = 'report.log'):
+        report_file = open(filename, 'r')
+        for line in report_file.xreadlines():
+            for section_header in BuildReport.CONST_SECTION_HEADERS:
+                if line.strip() == section_header[0]:
+                    section_header[1](self, report_file)
+        #print self.PCDs
diff --git a/ArmPlatformPkg/Scripts/Ds5/edk2_debugger.py b/ArmPlatformPkg/Scripts/Ds5/edk2_debugger.py
index 71e5a3ccd5..87e82b68d6 100644
--- a/ArmPlatformPkg/Scripts/Ds5/edk2_debugger.py
+++ b/ArmPlatformPkg/Scripts/Ds5/edk2_debugger.py
@@ -1,217 +1,217 @@
-#
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-import os
-
-import firmware_volume
-import build_report
-import system_table
-
-# Reload external classes
-reload(firmware_volume)
-reload(build_report)
-reload(system_table)
-
-def readMem32(executionContext, address):
-    bytes = executionContext.getMemoryService().read(address, 4, 32)
-    return struct.unpack('<I',bytes)[0]
-
-def dump_fv(ec, fv_base, fv_size):
-    fv = firmware_volume.FirmwareVolume(ec,
-                                        int(build.PCDs['gArmTokenSpaceGuid']['PcdFvBaseAddress'][0],16),
-                                        int(build.PCDs['gArmTokenSpaceGuid']['PcdFvSize'][0],16))
-    
-    ffs = fv.get_next_ffs()
-    while ffs != None:    
-        print "# %s" % ffs
-    
-        section = ffs.get_next_section()
-        while section != None:
-            print "\t%s" % section
-            try:
-                print "\t\t- %s" % section.get_debug_filepath()
-            except Exception:
-                pass
-            section = ffs.get_next_section(section)
-            
-        ffs = fv.get_next_ffs(ffs)
-
-def dump_system_table(ec, mem_base, mem_size):
-    st = system_table.SystemTable(ec, mem_base, mem_size)
-    
-    debug_info_table_base = st.get_configuration_table(system_table.DebugInfoTable.CONST_DEBUG_INFO_TABLE_GUID)
-    
-    debug_info_table = system_table.DebugInfoTable(ec, debug_info_table_base)
-    debug_info_table.dump()
-
-def load_symbol_from_file(ec, filename, address):
-    try:
-        ec.getImageService().addSymbols(filename, address)
-    except:
-        try:
-            # We could get an exception if the symbols are already loaded
-            ec.getImageService().unloadSymbols(filename)
-            ec.getImageService().addSymbols(filename, address)
-        except:
-            print "Warning: not possible to load symbols from %s" % filename
-            pass
-
-class ArmPlatform:
-    def __init__(self, sysmembase=None, sysmemsize=None, fvs={}):
-        self.sysmembase = sysmembase
-        self.sysmemsize = sysmemsize
-        self.fvs = fvs
-        
-class ArmPlatformDebugger:
-    system_table = None
-    firmware_volumes = {}
-    
-    REGION_TYPE_SYSMEM = 1
-    REGION_TYPE_ROM    = 2
-    REGION_TYPE_FV     = 3
-    
-    def __init__(self, ec, report_log, regions):
-        self.ec = ec
-        fvs = []
-        sysmem_base = None
-        sysmem_size = None
-        
-        if report_log and os.path.isfile(report_log):
-            try:
-                self.build = build_report.BuildReport(report_log)
-            except IOError:
-                raise IOError(2, 'Report \'%s\' isnot valid' % report_log)
-            
-            # Generate list of supported Firmware Volumes
-            if self.build.PCDs['gArmTokenSpaceGuid'].has_key('PcdFvSize') and int(self.build.PCDs['gArmTokenSpaceGuid']['PcdFvSize'][0],16) != 0:
-                fvs.append((int(self.build.PCDs['gArmTokenSpaceGuid']['PcdFvBaseAddress'][0],16),int(self.build.PCDs['gArmTokenSpaceGuid']['PcdFvSize'][0],16)))
-            if self.build.PCDs['gArmTokenSpaceGuid'].has_key('PcdSecureFvSize') and int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSecureFvSize'][0],16) != 0:
-                fvs.append((int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSecureFvBaseAddress'][0],16),int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSecureFvSize'][0],16)))
-            if self.build.PCDs['gArmTokenSpaceGuid'].has_key('PcdHypFvSize') and int(self.build.PCDs['gArmTokenSpaceGuid']['PcdHypFvSize'][0],16) != 0:
-                fvs.append((int(self.build.PCDs['gArmTokenSpaceGuid']['PcdHypFvBaseAddress'][0],16),int(self.build.PCDs['gArmTokenSpaceGuid']['PcdHypFvSize'][0],16)))
-            
-            sysmem_base = int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSystemMemoryBase'][0],16)
-            sysmem_size = int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSystemMemorySize'][0],16)
-        else:
-            for region in regions:
-                if region[0] == ArmPlatformDebugger.REGION_TYPE_SYSMEM:
-                    sysmem_base = region[1]
-                    sysmem_size = region[2]
-                elif region[0] == ArmPlatformDebugger.REGION_TYPE_FV:
-                    fvs.append((region[1],region[2]))
-                elif region[0] == ArmPlatformDebugger.REGION_TYPE_ROM:
-                    for base in xrange(region[1], region[1] + region[2], 0x400000):
-                        signature = struct.unpack("cccc", self.ec.getMemoryService().read(base, 4, 32))
-                        if signature == FirmwareVolume.CONST_FV_SIGNATURE:
-                            fvs.append((base,0))
-                else:
-                    print "Region type '%d' Not Supported" % region[0]
-                    
-        self.platform = ArmPlatform(sysmem_base, sysmem_size, fvs)
-        
-    def in_sysmem(self, addr):
-        return (self.platform.sysmembase is not None) and (self.platform.sysmembase <= addr) and (addr < self.platform.sysmembase + self.platform.sysmemsize)
-
-    def in_fv(self, addr):
-        return (self.get_fv_at(addr) != None)
-
-    def get_fv_at(self, addr):
-        for fv in self.platform.fvs:
-            if (fv[0] <= addr) and (addr < fv[0] + fv[1]):
-                return fv
-        return None
-
-    def load_current_symbols(self):
-        pc = int(self.ec.getRegisterService().getValue('PC')) & 0xFFFFFFFF
-        if self.in_fv(pc):
-            debug_infos = []
-            
-            (fv_base, fv_size) = self.get_fv_at(pc)
-            
-            if self.firmware_volumes.has_key(fv_base) == False:
-                self.firmware_volumes[fv_base] = firmware_volume.FirmwareVolume(self.ec, fv_base, fv_size)
-                
-            stack_frame = self.ec.getTopLevelStackFrame()
-            info = self.firmware_volumes[fv_base].load_symbols_at(int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF)
-            debug_infos.append(info)
-            while stack_frame.next() is not None:
-                stack_frame = stack_frame.next()
-                
-                # Stack frame attached to 'PC'
-                pc = int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF
-                
-                # Check if the symbols for this stack frame have already been loaded
-                found = False
-                for debug_info in debug_infos:
-                    if (pc >= debug_info[0]) and (pc < debug_info[0] + debug_info[1]):
-                        found = True
-                if found == False:
-                    info = self.firmware_volumes[fv_base].load_symbols_at(pc)
-                    debug_infos.append(info)
-                    
-            #self.firmware_volumes[fv_base].load_symbols_at(pc)
-        elif self.in_sysmem(pc):
-            debug_infos = []
-            
-            if self.system_table is None:
-                # Find the System Table
-                self.system_table = system_table.SystemTable(self.ec, self.platform.sysmembase, self.platform.sysmemsize)
-                
-                # Find the Debug Info Table
-                debug_info_table_base = self.system_table.get_configuration_table(system_table.DebugInfoTable.CONST_DEBUG_INFO_TABLE_GUID)
-                self.debug_info_table = system_table.DebugInfoTable(self.ec, debug_info_table_base)
-                
-            stack_frame = self.ec.getTopLevelStackFrame()
-            info = self.debug_info_table.load_symbols_at(int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF)
-            debug_infos.append(info)
-            while stack_frame.next() is not None:
-                stack_frame = stack_frame.next()
-                
-                # Stack frame attached to 'PC'
-                pc = int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF
-                
-                # Check if the symbols for this stack frame have already been loaded
-                found = False
-                for debug_info in debug_infos:
-                    if (pc >= debug_info[0]) and (pc < debug_info[0] + debug_info[1]):
-                        found = True
-                if found == False:
-                    info = self.debug_info_table.load_symbols_at(pc)
-                    debug_infos.append(info)
-                
-            #self.debug_info_table.load_symbols_at(pc)
-        else:
-            raise Exception('ArmPlatformDebugger', "Not supported region")
-        
-    def load_all_symbols(self):
-        # Load all the XIP symbols attached to the Firmware Volume
-        for (fv_base, fv_size) in self.platform.fvs:
-            if self.firmware_volumes.has_key(fv_base) == False:
-                self.firmware_volumes[fv_base] = firmware_volume.FirmwareVolume(self.ec, fv_base, fv_size)    
-            self.firmware_volumes[fv_base].load_all_symbols()
-
-        try:
-            # Load all symbols of module loaded into System Memory
-            if self.system_table is None:
-                # Find the System Table
-                self.system_table = system_table.SystemTable(self.ec, self.platform.sysmembase, self.platform.sysmemsize)
-        
-                
-                # Find the Debug Info Table
-                debug_info_table_base = self.system_table.get_configuration_table(system_table.DebugInfoTable.CONST_DEBUG_INFO_TABLE_GUID)
-                self.debug_info_table = system_table.DebugInfoTable(self.ec, debug_info_table_base)
-            
-            self.debug_info_table.load_all_symbols()
-        except:
-            # Debugger exception could be excepted if DRAM has not been initialized or if we have not started to run from DRAM yet
-            print "Note: no symbols have been found in System Memory (possible cause: the UEFI permanent memory has been installed yet)"
-            pass
+#
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+import os
+
+import firmware_volume
+import build_report
+import system_table
+
+# Reload external classes
+reload(firmware_volume)
+reload(build_report)
+reload(system_table)
+
+def readMem32(executionContext, address):
+    bytes = executionContext.getMemoryService().read(address, 4, 32)
+    return struct.unpack('<I',bytes)[0]
+
+def dump_fv(ec, fv_base, fv_size):
+    fv = firmware_volume.FirmwareVolume(ec,
+                                        int(build.PCDs['gArmTokenSpaceGuid']['PcdFvBaseAddress'][0],16),
+                                        int(build.PCDs['gArmTokenSpaceGuid']['PcdFvSize'][0],16))
+    
+    ffs = fv.get_next_ffs()
+    while ffs != None:    
+        print "# %s" % ffs
+    
+        section = ffs.get_next_section()
+        while section != None:
+            print "\t%s" % section
+            try:
+                print "\t\t- %s" % section.get_debug_filepath()
+            except Exception:
+                pass
+            section = ffs.get_next_section(section)
+            
+        ffs = fv.get_next_ffs(ffs)
+
+def dump_system_table(ec, mem_base, mem_size):
+    st = system_table.SystemTable(ec, mem_base, mem_size)
+    
+    debug_info_table_base = st.get_configuration_table(system_table.DebugInfoTable.CONST_DEBUG_INFO_TABLE_GUID)
+    
+    debug_info_table = system_table.DebugInfoTable(ec, debug_info_table_base)
+    debug_info_table.dump()
+
+def load_symbol_from_file(ec, filename, address):
+    try:
+        ec.getImageService().addSymbols(filename, address)
+    except:
+        try:
+            # We could get an exception if the symbols are already loaded
+            ec.getImageService().unloadSymbols(filename)
+            ec.getImageService().addSymbols(filename, address)
+        except:
+            print "Warning: not possible to load symbols from %s" % filename
+            pass
+
+class ArmPlatform:
+    def __init__(self, sysmembase=None, sysmemsize=None, fvs={}):
+        self.sysmembase = sysmembase
+        self.sysmemsize = sysmemsize
+        self.fvs = fvs
+        
+class ArmPlatformDebugger:
+    system_table = None
+    firmware_volumes = {}
+    
+    REGION_TYPE_SYSMEM = 1
+    REGION_TYPE_ROM    = 2
+    REGION_TYPE_FV     = 3
+    
+    def __init__(self, ec, report_log, regions):
+        self.ec = ec
+        fvs = []
+        sysmem_base = None
+        sysmem_size = None
+        
+        if report_log and os.path.isfile(report_log):
+            try:
+                self.build = build_report.BuildReport(report_log)
+            except IOError:
+                raise IOError(2, 'Report \'%s\' isnot valid' % report_log)
+            
+            # Generate list of supported Firmware Volumes
+            if self.build.PCDs['gArmTokenSpaceGuid'].has_key('PcdFvSize') and int(self.build.PCDs['gArmTokenSpaceGuid']['PcdFvSize'][0],16) != 0:
+                fvs.append((int(self.build.PCDs['gArmTokenSpaceGuid']['PcdFvBaseAddress'][0],16),int(self.build.PCDs['gArmTokenSpaceGuid']['PcdFvSize'][0],16)))
+            if self.build.PCDs['gArmTokenSpaceGuid'].has_key('PcdSecureFvSize') and int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSecureFvSize'][0],16) != 0:
+                fvs.append((int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSecureFvBaseAddress'][0],16),int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSecureFvSize'][0],16)))
+            if self.build.PCDs['gArmTokenSpaceGuid'].has_key('PcdHypFvSize') and int(self.build.PCDs['gArmTokenSpaceGuid']['PcdHypFvSize'][0],16) != 0:
+                fvs.append((int(self.build.PCDs['gArmTokenSpaceGuid']['PcdHypFvBaseAddress'][0],16),int(self.build.PCDs['gArmTokenSpaceGuid']['PcdHypFvSize'][0],16)))
+            
+            sysmem_base = int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSystemMemoryBase'][0],16)
+            sysmem_size = int(self.build.PCDs['gArmTokenSpaceGuid']['PcdSystemMemorySize'][0],16)
+        else:
+            for region in regions:
+                if region[0] == ArmPlatformDebugger.REGION_TYPE_SYSMEM:
+                    sysmem_base = region[1]
+                    sysmem_size = region[2]
+                elif region[0] == ArmPlatformDebugger.REGION_TYPE_FV:
+                    fvs.append((region[1],region[2]))
+                elif region[0] == ArmPlatformDebugger.REGION_TYPE_ROM:
+                    for base in xrange(region[1], region[1] + region[2], 0x400000):
+                        signature = struct.unpack("cccc", self.ec.getMemoryService().read(base, 4, 32))
+                        if signature == FirmwareVolume.CONST_FV_SIGNATURE:
+                            fvs.append((base,0))
+                else:
+                    print "Region type '%d' Not Supported" % region[0]
+                    
+        self.platform = ArmPlatform(sysmem_base, sysmem_size, fvs)
+        
+    def in_sysmem(self, addr):
+        return (self.platform.sysmembase is not None) and (self.platform.sysmembase <= addr) and (addr < self.platform.sysmembase + self.platform.sysmemsize)
+
+    def in_fv(self, addr):
+        return (self.get_fv_at(addr) != None)
+
+    def get_fv_at(self, addr):
+        for fv in self.platform.fvs:
+            if (fv[0] <= addr) and (addr < fv[0] + fv[1]):
+                return fv
+        return None
+
+    def load_current_symbols(self):
+        pc = int(self.ec.getRegisterService().getValue('PC')) & 0xFFFFFFFF
+        if self.in_fv(pc):
+            debug_infos = []
+            
+            (fv_base, fv_size) = self.get_fv_at(pc)
+            
+            if self.firmware_volumes.has_key(fv_base) == False:
+                self.firmware_volumes[fv_base] = firmware_volume.FirmwareVolume(self.ec, fv_base, fv_size)
+                
+            stack_frame = self.ec.getTopLevelStackFrame()
+            info = self.firmware_volumes[fv_base].load_symbols_at(int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF)
+            debug_infos.append(info)
+            while stack_frame.next() is not None:
+                stack_frame = stack_frame.next()
+                
+                # Stack frame attached to 'PC'
+                pc = int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF
+                
+                # Check if the symbols for this stack frame have already been loaded
+                found = False
+                for debug_info in debug_infos:
+                    if (pc >= debug_info[0]) and (pc < debug_info[0] + debug_info[1]):
+                        found = True
+                if found == False:
+                    info = self.firmware_volumes[fv_base].load_symbols_at(pc)
+                    debug_infos.append(info)
+                    
+            #self.firmware_volumes[fv_base].load_symbols_at(pc)
+        elif self.in_sysmem(pc):
+            debug_infos = []
+            
+            if self.system_table is None:
+                # Find the System Table
+                self.system_table = system_table.SystemTable(self.ec, self.platform.sysmembase, self.platform.sysmemsize)
+                
+                # Find the Debug Info Table
+                debug_info_table_base = self.system_table.get_configuration_table(system_table.DebugInfoTable.CONST_DEBUG_INFO_TABLE_GUID)
+                self.debug_info_table = system_table.DebugInfoTable(self.ec, debug_info_table_base)
+                
+            stack_frame = self.ec.getTopLevelStackFrame()
+            info = self.debug_info_table.load_symbols_at(int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF)
+            debug_infos.append(info)
+            while stack_frame.next() is not None:
+                stack_frame = stack_frame.next()
+                
+                # Stack frame attached to 'PC'
+                pc = int(stack_frame.getRegisterService().getValue('PC')) & 0xFFFFFFFF
+                
+                # Check if the symbols for this stack frame have already been loaded
+                found = False
+                for debug_info in debug_infos:
+                    if (pc >= debug_info[0]) and (pc < debug_info[0] + debug_info[1]):
+                        found = True
+                if found == False:
+                    info = self.debug_info_table.load_symbols_at(pc)
+                    debug_infos.append(info)
+                
+            #self.debug_info_table.load_symbols_at(pc)
+        else:
+            raise Exception('ArmPlatformDebugger', "Not supported region")
+        
+    def load_all_symbols(self):
+        # Load all the XIP symbols attached to the Firmware Volume
+        for (fv_base, fv_size) in self.platform.fvs:
+            if self.firmware_volumes.has_key(fv_base) == False:
+                self.firmware_volumes[fv_base] = firmware_volume.FirmwareVolume(self.ec, fv_base, fv_size)    
+            self.firmware_volumes[fv_base].load_all_symbols()
+
+        try:
+            # Load all symbols of module loaded into System Memory
+            if self.system_table is None:
+                # Find the System Table
+                self.system_table = system_table.SystemTable(self.ec, self.platform.sysmembase, self.platform.sysmemsize)
+        
+                
+                # Find the Debug Info Table
+                debug_info_table_base = self.system_table.get_configuration_table(system_table.DebugInfoTable.CONST_DEBUG_INFO_TABLE_GUID)
+                self.debug_info_table = system_table.DebugInfoTable(self.ec, debug_info_table_base)
+            
+            self.debug_info_table.load_all_symbols()
+        except:
+            # Debugger exception could be excepted if DRAM has not been initialized or if we have not started to run from DRAM yet
+            print "Note: no symbols have been found in System Memory (possible cause: the UEFI permanent memory has been installed yet)"
+            pass
diff --git a/ArmPlatformPkg/Scripts/Ds5/firmware_volume.py b/ArmPlatformPkg/Scripts/Ds5/firmware_volume.py
index c4e02ece24..a13d1433eb 100644
--- a/ArmPlatformPkg/Scripts/Ds5/firmware_volume.py
+++ b/ArmPlatformPkg/Scripts/Ds5/firmware_volume.py
@@ -1,301 +1,301 @@
-#
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-from arm_ds.debugger_v1 import DebugException
-
-import struct
-import string
-
-import edk2_debugger
-    
-class EfiFileSection(object):
-    EFI_SECTION_PE32                  = 0x10
-    EFI_SECTION_PIC                   = 0x11
-    EFI_SECTION_TE                    = 0x12
-    
-    EFI_IMAGE_DEBUG_TYPE_CODEVIEW     = 0x2
-    
-    SIZEOF_EFI_FFS_FILE_HEADER        = 0x28
-
-    def __init__(self, ec, base):
-        self.base = base
-        self.ec = ec
-        
-    def __str__(self):
-        return "FileSection(type:0x%X, size:0x%x)" % (self.get_type(), self.get_size())
-        
-    def get_base(self):
-        return self.base
- 
-    def get_type(self):
-        return struct.unpack("B", self.ec.getMemoryService().read(self.base + 0x3, 1, 8))[0]
-       
-    def get_size(self):
-        return (struct.unpack("<I", self.ec.getMemoryService().read(self.base, 4, 32))[0] & 0x00ffffff)
-
-    def get_debug_filepath(self):
-        type = self.get_type()
-        if type == EfiFileSection.EFI_SECTION_TE:
-            section = EfiSectionTE(self, ec, self.base + 0x4)
-        elif type == EfiFileSection.EFI_SECTION_PE32:
-            section = EfiSectionPE32(self, ec, self.base + 0x4)
-        else:
-            raise Exception("EfiFileSection", "No debug section")
-        return section.get_debug_filepath()
-
-class EfiSectionTE:
-    SIZEOF_EFI_TE_IMAGE_HEADER        = 0x28
-    EFI_TE_IMAGE_SIGNATURE            = ('V','Z')
-    
-    def __init__(self, ec, base_te):
-        self.ec = ec
-        self.base_te = int(base_te)
-        te_sig = struct.unpack("cc", self.ec.getMemoryService().read(self.base_te, 2, 32))
-        if te_sig != EfiSectionTE.EFI_TE_IMAGE_SIGNATURE:
-            raise Exception("EfiFileSectionTE","TE Signature incorrect")
-        
-    def get_debug_filepath(self):
-        stripped_size = struct.unpack("<H", self.ec.getMemoryService().read(self.base_te + 0x6, 2, 32))[0]
-        stripped_size -= EfiSectionTE.SIZEOF_EFI_TE_IMAGE_HEADER
-        
-        debug_dir_entry_rva = self.ec.getMemoryService().readMemory32(self.base_te + 0x20)
-        if debug_dir_entry_rva == 0:
-            raise Exception("EfiFileSectionTE","No debug directory for image")
-        debug_dir_entry_rva -= stripped_size
-        
-        debug_type = self.ec.getMemoryService().readMemory32(self.base_te + debug_dir_entry_rva + 0xC)
-        if (debug_type != 0xdf) and (debug_type != EfiFileSection.EFI_IMAGE_DEBUG_TYPE_CODEVIEW):
-            raise Exception("EfiFileSectionTE","Debug type is not dwarf")
-
-        debug_rva = self.ec.getMemoryService().readMemory32(self.base_te + debug_dir_entry_rva + 0x14)
-        debug_rva -= stripped_size
-
-        dwarf_sig = struct.unpack("cccc", self.ec.getMemoryService().read(self.base_te + debug_rva, 4, 32))
-        if (dwarf_sig != 0x66727764) and (dwarf_sig != FirmwareFile.CONST_NB10_SIGNATURE):
-            raise Exception("EfiFileSectionTE","Dwarf debug signature not found")
-        
-        if dwarf_sig == 0x66727764:
-            filename = self.base_te + debug_rva + 0xc
-        else:
-            filename = self.base_te + debug_rva + 0x10
-        filename = struct.unpack("200s", self.ec.getMemoryService().read(filename, 200, 32))[0]
-        return filename[0:string.find(filename,'\0')]
-        
-    def get_debug_elfbase(self):
-        stripped_size = struct.unpack("<H", self.ec.getMemoryService().read(self.base_te + 0x6, 2, 32))[0]
-        stripped_size -= EfiSectionTE.SIZEOF_EFI_TE_IMAGE_HEADER
-        
-        base_of_code = self.ec.getMemoryService().readMemory32(self.base_te + 0xC)
-        
-        return self.base_te + base_of_code - stripped_size
-
-class EfiSectionPE32:
-    def __init__(self, ec, base_pe32):
-        self.ec = ec
-        self.base_pe32 = base_pe32
-
-    def get_debug_filepath(self):
-        # Offset from dos hdr to PE file hdr
-        file_header_offset = self.ec.getMemoryService().readMemory32(self.base_pe32 + 0x3C)
-
-        # Offset to debug dir in PE hdrs
-        debug_dir_entry_rva = self.ec.getMemoryService().readMemory32(self.base_pe32 + file_header_offset + 0xA8)
-        if debug_dir_entry_rva == 0:
-            raise Exception("EfiFileSectionPE32","No Debug Directory")
-
-        debug_type = self.ec.getMemoryService().readMemory32(self.base_pe32 + debug_dir_entry_rva + 0xC)
-        if (debug_type != 0xdf) and (debug_type != EfiFileSection.EFI_IMAGE_DEBUG_TYPE_CODEVIEW):
-            raise Exception("EfiFileSectionPE32","Debug type is not dwarf")
-        
-        
-        debug_rva = self.ec.getMemoryService().readMemory32(self.base_pe32 + debug_dir_entry_rva + 0x14)
-        
-        dwarf_sig = struct.unpack("cccc", self.ec.getMemoryService().read(str(self.base_pe32 + debug_rva), 4, 32))
-        if (dwarf_sig != 0x66727764) and (dwarf_sig != FirmwareFile.CONST_NB10_SIGNATURE):
-            raise Exception("EfiFileSectionPE32","Dwarf debug signature not found")
-    
-        if dwarf_sig == 0x66727764:
-            filename = self.base_pe32 + debug_rva + 0xc
-        else:
-            filename = self.base_pe32 + debug_rva + 0x10
-        filename = struct.unpack("200s", self.ec.getMemoryService().read(str(filename), 200, 32))[0]
-        return filename[0:string.find(filename,'\0')]
-    
-    def get_debug_elfbase(self):
-        # Offset from dos hdr to PE file hdr
-        pe_file_header = self.base_pe32 + self.ec.getMemoryService().readMemory32(self.base_pe32 + 0x3C)
-        
-        base_of_code = self.base_pe32 + self.ec.getMemoryService().readMemory32(pe_file_header + 0x28)
-        base_of_data = self.base_pe32 + self.ec.getMemoryService().readMemory32(pe_file_header + 0x2C)
-        
-        if (base_of_code < base_of_data) and (base_of_code != 0):
-            return base_of_code
-        else:
-            return base_of_data       
-    
-class FirmwareFile:
-    EFI_FV_FILETYPE_RAW                   = 0x01
-    EFI_FV_FILETYPE_FREEFORM              = 0x02
-    EFI_FV_FILETYPE_SECURITY_CORE         = 0x03
-    EFI_FV_FILETYPE_PEI_CORE              = 0x04
-    EFI_FV_FILETYPE_DXE_CORE              = 0x05
-    EFI_FV_FILETYPE_PEIM                  = 0x06
-    EFI_FV_FILETYPE_DRIVER                = 0x07
-    EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER  = 0x08
-    EFI_FV_FILETYPE_APPLICATION           = 0x09
-    EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE = 0x0B
-    EFI_FV_FILETYPE_FFS_MIN               = 0xF0
-    
-    CONST_NB10_SIGNATURE = ('N','B','1','0')
-    
-    def __init__(self, fv, base, ec):
-        self.fv = fv
-        self.base = base
-        self.ec = ec
-        
-    def __str__(self):
-        return "FFS(state:0x%x, type:0x%X, size:0x%x)" % (self.get_state(), self.get_type(), self.get_size())
-    
-    def get_base(self):
-        return self.base
-    
-    def get_size(self):
-        size = (self.ec.getMemoryService().readMemory32(self.base + 0x14) & 0x00ffffff)
-
-        # Occupied size is the size considering the alignment
-        return size + ((0x8 - (size & 0x7)) & 0x7)
-    
-    def get_type(self):
-        return self.ec.getMemoryService().readMemory8(self.base + 0x12)
-     
-    def get_state(self):
-        state = self.ec.getMemoryService().readMemory8(self.base + 0x17)
-        
-        polarity = self.fv.get_polarity()
-        if polarity:
-            state = ~state
-            
-        highest_bit = 0x80;
-        while (highest_bit != 0) and ((highest_bit & state) == 0):
-            highest_bit >>= 1
-            
-        return highest_bit
-    
-    def get_next_section(self, section=None):
-        if section == None:
-            if self.get_type() != FirmwareFile.EFI_FV_FILETYPE_FFS_MIN:
-                section_base = self.get_base() + 0x18;
-            else:
-                return None
-        else:
-            section_base = int(section.get_base() + section.get_size())
-            
-            # Align to next 4 byte boundary
-            if (section_base & 0x3) != 0:
-                section_base = section_base + 0x4 - (section_base & 0x3)
-
-        if section_base < self.get_base() + self.get_size():
-            return EfiFileSection(self.ec, section_base)
-        else:
-            return None
-    
-class FirmwareVolume:
-    CONST_FV_SIGNATURE = ('_','F','V','H')
-    EFI_FVB2_ERASE_POLARITY = 0x800
-    
-    DebugInfos = []
-    
-    def __init__(self, ec, fv_base, fv_size):
-        self.ec = ec
-        self.fv_base = fv_base
-        self.fv_size = fv_size
-        
-        try:
-            signature = struct.unpack("cccc", self.ec.getMemoryService().read(fv_base + 0x28, 4, 32))
-        except DebugException:
-            raise Exception("FirmwareVolume", "Not possible to access the defined firmware volume at [0x%X,0x%X]. Could be the used build report does not correspond to your current debugging context." % (int(fv_base),int(fv_base+fv_size)))
-        if signature != FirmwareVolume.CONST_FV_SIGNATURE:
-            raise Exception("FirmwareVolume", "This is not a valid firmware volume")
-      
-    def get_size(self):
-        return self.ec.getMemoryService().readMemory32(self.fv_base + 0x20)
-    
-    def get_attributes(self):
-        return self.ec.getMemoryService().readMemory32(self.fv_base + 0x2C)
-    
-    def get_polarity(self):
-        attributes = self.get_attributes()
-        if attributes & FirmwareVolume.EFI_FVB2_ERASE_POLARITY:
-            return 1
-        else:
-            return 0
-    
-    def get_next_ffs(self, ffs=None):
-        if ffs == None:
-            # Get the offset of the first FFS file from the FV header
-            ffs_base = self.fv_base +  self.ec.getMemoryService().readMemory16(self.fv_base + 0x30)
-        else:
-            # Goto the next FFS file
-            ffs_base = int(ffs.get_base() + ffs.get_size())
-            
-            # Align to next 8 byte boundary
-            if (ffs_base & 0x7) != 0:
-                ffs_base = ffs_base + 0x8 - (ffs_base & 0x7)
-                
-        if ffs_base < self.fv_base + self.get_size():
-            return FirmwareFile(self, ffs_base, self.ec)
-        else:
-            return None
-        
-    def get_debug_info(self):        
-        self.DebugInfos = []
-        
-        ffs = self.get_next_ffs()
-        while ffs != None:            
-            section = ffs.get_next_section()
-            while section != None:
-                type = section.get_type()
-                if (type == EfiFileSection.EFI_SECTION_TE) or (type == EfiFileSection.EFI_SECTION_PE32):
-                    self.DebugInfos.append((section.get_base(), section.get_size(), section.get_type()))
-                section = ffs.get_next_section(section)
-            ffs = self.get_next_ffs(ffs)
-
-    def load_symbols_at(self, addr):
-        if self.DebugInfos == []:
-            self.get_debug_info()
-        
-        for debug_info in self.DebugInfos:
-            if (addr >= debug_info[0]) and (addr < debug_info[0] + debug_info[1]):
-                if debug_info[2] == EfiFileSection.EFI_SECTION_TE:
-                    section = EfiSectionTE(self.ec, debug_info[0] + 0x4)
-                elif debug_info[2] == EfiFileSection.EFI_SECTION_PE32:
-                    section = EfiSectionPE32(self.ec, debug_info[0] + 0x4)
-                else:
-                    raise Exception('FirmwareVolume','Section Type not supported')
-                
-                edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
-
-                return debug_info
-
-    def load_all_symbols(self):
-        if self.DebugInfos == []:
-            self.get_debug_info()
-        
-        for debug_info in self.DebugInfos:
-            if debug_info[2] == EfiFileSection.EFI_SECTION_TE:
-                section = EfiSectionTE(self.ec, debug_info[0] + 0x4)
-            elif debug_info[2] == EfiFileSection.EFI_SECTION_PE32:
-                section = EfiSectionPE32(self.ec, debug_info[0] + 0x4)
-            else:
-                continue
-            
-            edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
+#
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+from arm_ds.debugger_v1 import DebugException
+
+import struct
+import string
+
+import edk2_debugger
+    
+class EfiFileSection(object):
+    EFI_SECTION_PE32                  = 0x10
+    EFI_SECTION_PIC                   = 0x11
+    EFI_SECTION_TE                    = 0x12
+    
+    EFI_IMAGE_DEBUG_TYPE_CODEVIEW     = 0x2
+    
+    SIZEOF_EFI_FFS_FILE_HEADER        = 0x28
+
+    def __init__(self, ec, base):
+        self.base = base
+        self.ec = ec
+        
+    def __str__(self):
+        return "FileSection(type:0x%X, size:0x%x)" % (self.get_type(), self.get_size())
+        
+    def get_base(self):
+        return self.base
+ 
+    def get_type(self):
+        return struct.unpack("B", self.ec.getMemoryService().read(self.base + 0x3, 1, 8))[0]
+       
+    def get_size(self):
+        return (struct.unpack("<I", self.ec.getMemoryService().read(self.base, 4, 32))[0] & 0x00ffffff)
+
+    def get_debug_filepath(self):
+        type = self.get_type()
+        if type == EfiFileSection.EFI_SECTION_TE:
+            section = EfiSectionTE(self, ec, self.base + 0x4)
+        elif type == EfiFileSection.EFI_SECTION_PE32:
+            section = EfiSectionPE32(self, ec, self.base + 0x4)
+        else:
+            raise Exception("EfiFileSection", "No debug section")
+        return section.get_debug_filepath()
+
+class EfiSectionTE:
+    SIZEOF_EFI_TE_IMAGE_HEADER        = 0x28
+    EFI_TE_IMAGE_SIGNATURE            = ('V','Z')
+    
+    def __init__(self, ec, base_te):
+        self.ec = ec
+        self.base_te = int(base_te)
+        te_sig = struct.unpack("cc", self.ec.getMemoryService().read(self.base_te, 2, 32))
+        if te_sig != EfiSectionTE.EFI_TE_IMAGE_SIGNATURE:
+            raise Exception("EfiFileSectionTE","TE Signature incorrect")
+        
+    def get_debug_filepath(self):
+        stripped_size = struct.unpack("<H", self.ec.getMemoryService().read(self.base_te + 0x6, 2, 32))[0]
+        stripped_size -= EfiSectionTE.SIZEOF_EFI_TE_IMAGE_HEADER
+        
+        debug_dir_entry_rva = self.ec.getMemoryService().readMemory32(self.base_te + 0x20)
+        if debug_dir_entry_rva == 0:
+            raise Exception("EfiFileSectionTE","No debug directory for image")
+        debug_dir_entry_rva -= stripped_size
+        
+        debug_type = self.ec.getMemoryService().readMemory32(self.base_te + debug_dir_entry_rva + 0xC)
+        if (debug_type != 0xdf) and (debug_type != EfiFileSection.EFI_IMAGE_DEBUG_TYPE_CODEVIEW):
+            raise Exception("EfiFileSectionTE","Debug type is not dwarf")
+
+        debug_rva = self.ec.getMemoryService().readMemory32(self.base_te + debug_dir_entry_rva + 0x14)
+        debug_rva -= stripped_size
+
+        dwarf_sig = struct.unpack("cccc", self.ec.getMemoryService().read(self.base_te + debug_rva, 4, 32))
+        if (dwarf_sig != 0x66727764) and (dwarf_sig != FirmwareFile.CONST_NB10_SIGNATURE):
+            raise Exception("EfiFileSectionTE","Dwarf debug signature not found")
+        
+        if dwarf_sig == 0x66727764:
+            filename = self.base_te + debug_rva + 0xc
+        else:
+            filename = self.base_te + debug_rva + 0x10
+        filename = struct.unpack("200s", self.ec.getMemoryService().read(filename, 200, 32))[0]
+        return filename[0:string.find(filename,'\0')]
+        
+    def get_debug_elfbase(self):
+        stripped_size = struct.unpack("<H", self.ec.getMemoryService().read(self.base_te + 0x6, 2, 32))[0]
+        stripped_size -= EfiSectionTE.SIZEOF_EFI_TE_IMAGE_HEADER
+        
+        base_of_code = self.ec.getMemoryService().readMemory32(self.base_te + 0xC)
+        
+        return self.base_te + base_of_code - stripped_size
+
+class EfiSectionPE32:
+    def __init__(self, ec, base_pe32):
+        self.ec = ec
+        self.base_pe32 = base_pe32
+
+    def get_debug_filepath(self):
+        # Offset from dos hdr to PE file hdr
+        file_header_offset = self.ec.getMemoryService().readMemory32(self.base_pe32 + 0x3C)
+
+        # Offset to debug dir in PE hdrs
+        debug_dir_entry_rva = self.ec.getMemoryService().readMemory32(self.base_pe32 + file_header_offset + 0xA8)
+        if debug_dir_entry_rva == 0:
+            raise Exception("EfiFileSectionPE32","No Debug Directory")
+
+        debug_type = self.ec.getMemoryService().readMemory32(self.base_pe32 + debug_dir_entry_rva + 0xC)
+        if (debug_type != 0xdf) and (debug_type != EfiFileSection.EFI_IMAGE_DEBUG_TYPE_CODEVIEW):
+            raise Exception("EfiFileSectionPE32","Debug type is not dwarf")
+        
+        
+        debug_rva = self.ec.getMemoryService().readMemory32(self.base_pe32 + debug_dir_entry_rva + 0x14)
+        
+        dwarf_sig = struct.unpack("cccc", self.ec.getMemoryService().read(str(self.base_pe32 + debug_rva), 4, 32))
+        if (dwarf_sig != 0x66727764) and (dwarf_sig != FirmwareFile.CONST_NB10_SIGNATURE):
+            raise Exception("EfiFileSectionPE32","Dwarf debug signature not found")
+    
+        if dwarf_sig == 0x66727764:
+            filename = self.base_pe32 + debug_rva + 0xc
+        else:
+            filename = self.base_pe32 + debug_rva + 0x10
+        filename = struct.unpack("200s", self.ec.getMemoryService().read(str(filename), 200, 32))[0]
+        return filename[0:string.find(filename,'\0')]
+    
+    def get_debug_elfbase(self):
+        # Offset from dos hdr to PE file hdr
+        pe_file_header = self.base_pe32 + self.ec.getMemoryService().readMemory32(self.base_pe32 + 0x3C)
+        
+        base_of_code = self.base_pe32 + self.ec.getMemoryService().readMemory32(pe_file_header + 0x28)
+        base_of_data = self.base_pe32 + self.ec.getMemoryService().readMemory32(pe_file_header + 0x2C)
+        
+        if (base_of_code < base_of_data) and (base_of_code != 0):
+            return base_of_code
+        else:
+            return base_of_data       
+    
+class FirmwareFile:
+    EFI_FV_FILETYPE_RAW                   = 0x01
+    EFI_FV_FILETYPE_FREEFORM              = 0x02
+    EFI_FV_FILETYPE_SECURITY_CORE         = 0x03
+    EFI_FV_FILETYPE_PEI_CORE              = 0x04
+    EFI_FV_FILETYPE_DXE_CORE              = 0x05
+    EFI_FV_FILETYPE_PEIM                  = 0x06
+    EFI_FV_FILETYPE_DRIVER                = 0x07
+    EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER  = 0x08
+    EFI_FV_FILETYPE_APPLICATION           = 0x09
+    EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE = 0x0B
+    EFI_FV_FILETYPE_FFS_MIN               = 0xF0
+    
+    CONST_NB10_SIGNATURE = ('N','B','1','0')
+    
+    def __init__(self, fv, base, ec):
+        self.fv = fv
+        self.base = base
+        self.ec = ec
+        
+    def __str__(self):
+        return "FFS(state:0x%x, type:0x%X, size:0x%x)" % (self.get_state(), self.get_type(), self.get_size())
+    
+    def get_base(self):
+        return self.base
+    
+    def get_size(self):
+        size = (self.ec.getMemoryService().readMemory32(self.base + 0x14) & 0x00ffffff)
+
+        # Occupied size is the size considering the alignment
+        return size + ((0x8 - (size & 0x7)) & 0x7)
+    
+    def get_type(self):
+        return self.ec.getMemoryService().readMemory8(self.base + 0x12)
+     
+    def get_state(self):
+        state = self.ec.getMemoryService().readMemory8(self.base + 0x17)
+        
+        polarity = self.fv.get_polarity()
+        if polarity:
+            state = ~state
+            
+        highest_bit = 0x80;
+        while (highest_bit != 0) and ((highest_bit & state) == 0):
+            highest_bit >>= 1
+            
+        return highest_bit
+    
+    def get_next_section(self, section=None):
+        if section == None:
+            if self.get_type() != FirmwareFile.EFI_FV_FILETYPE_FFS_MIN:
+                section_base = self.get_base() + 0x18;
+            else:
+                return None
+        else:
+            section_base = int(section.get_base() + section.get_size())
+            
+            # Align to next 4 byte boundary
+            if (section_base & 0x3) != 0:
+                section_base = section_base + 0x4 - (section_base & 0x3)
+
+        if section_base < self.get_base() + self.get_size():
+            return EfiFileSection(self.ec, section_base)
+        else:
+            return None
+    
+class FirmwareVolume:
+    CONST_FV_SIGNATURE = ('_','F','V','H')
+    EFI_FVB2_ERASE_POLARITY = 0x800
+    
+    DebugInfos = []
+    
+    def __init__(self, ec, fv_base, fv_size):
+        self.ec = ec
+        self.fv_base = fv_base
+        self.fv_size = fv_size
+        
+        try:
+            signature = struct.unpack("cccc", self.ec.getMemoryService().read(fv_base + 0x28, 4, 32))
+        except DebugException:
+            raise Exception("FirmwareVolume", "Not possible to access the defined firmware volume at [0x%X,0x%X]. Could be the used build report does not correspond to your current debugging context." % (int(fv_base),int(fv_base+fv_size)))
+        if signature != FirmwareVolume.CONST_FV_SIGNATURE:
+            raise Exception("FirmwareVolume", "This is not a valid firmware volume")
+      
+    def get_size(self):
+        return self.ec.getMemoryService().readMemory32(self.fv_base + 0x20)
+    
+    def get_attributes(self):
+        return self.ec.getMemoryService().readMemory32(self.fv_base + 0x2C)
+    
+    def get_polarity(self):
+        attributes = self.get_attributes()
+        if attributes & FirmwareVolume.EFI_FVB2_ERASE_POLARITY:
+            return 1
+        else:
+            return 0
+    
+    def get_next_ffs(self, ffs=None):
+        if ffs == None:
+            # Get the offset of the first FFS file from the FV header
+            ffs_base = self.fv_base +  self.ec.getMemoryService().readMemory16(self.fv_base + 0x30)
+        else:
+            # Goto the next FFS file
+            ffs_base = int(ffs.get_base() + ffs.get_size())
+            
+            # Align to next 8 byte boundary
+            if (ffs_base & 0x7) != 0:
+                ffs_base = ffs_base + 0x8 - (ffs_base & 0x7)
+                
+        if ffs_base < self.fv_base + self.get_size():
+            return FirmwareFile(self, ffs_base, self.ec)
+        else:
+            return None
+        
+    def get_debug_info(self):        
+        self.DebugInfos = []
+        
+        ffs = self.get_next_ffs()
+        while ffs != None:            
+            section = ffs.get_next_section()
+            while section != None:
+                type = section.get_type()
+                if (type == EfiFileSection.EFI_SECTION_TE) or (type == EfiFileSection.EFI_SECTION_PE32):
+                    self.DebugInfos.append((section.get_base(), section.get_size(), section.get_type()))
+                section = ffs.get_next_section(section)
+            ffs = self.get_next_ffs(ffs)
+
+    def load_symbols_at(self, addr):
+        if self.DebugInfos == []:
+            self.get_debug_info()
+        
+        for debug_info in self.DebugInfos:
+            if (addr >= debug_info[0]) and (addr < debug_info[0] + debug_info[1]):
+                if debug_info[2] == EfiFileSection.EFI_SECTION_TE:
+                    section = EfiSectionTE(self.ec, debug_info[0] + 0x4)
+                elif debug_info[2] == EfiFileSection.EFI_SECTION_PE32:
+                    section = EfiSectionPE32(self.ec, debug_info[0] + 0x4)
+                else:
+                    raise Exception('FirmwareVolume','Section Type not supported')
+                
+                edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
+
+                return debug_info
+
+    def load_all_symbols(self):
+        if self.DebugInfos == []:
+            self.get_debug_info()
+        
+        for debug_info in self.DebugInfos:
+            if debug_info[2] == EfiFileSection.EFI_SECTION_TE:
+                section = EfiSectionTE(self.ec, debug_info[0] + 0x4)
+            elif debug_info[2] == EfiFileSection.EFI_SECTION_PE32:
+                section = EfiSectionPE32(self.ec, debug_info[0] + 0x4)
+            else:
+                continue
+            
+            edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
diff --git a/ArmPlatformPkg/Scripts/Ds5/system_table.py b/ArmPlatformPkg/Scripts/Ds5/system_table.py
index f489e466ad..8dec591e63 100644
--- a/ArmPlatformPkg/Scripts/Ds5/system_table.py
+++ b/ArmPlatformPkg/Scripts/Ds5/system_table.py
@@ -1,129 +1,129 @@
-#
-#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#  
-#  This program and the accompanying materials                          
-#  are licensed and made available under the terms and conditions of the BSD License         
-#  which accompanies this distribution.  The full text of the license may be found at        
-#  http://opensource.org/licenses/bsd-license.php                                            
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-#
-
-from arm_ds.debugger_v1 import DebugException
-
-import struct
-
-import edk2_debugger
-import firmware_volume
-
-class DebugInfoTable:
-    CONST_DEBUG_INFO_TABLE_GUID = ( 0x49152E77L, 0x47641ADAL, 0xFE7AA2B7L, 0x8B5ED9FEL)
-    
-    DebugInfos = []
-    
-    def __init__(self, ec, debug_info_table_header_offset):
-        self.ec = ec
-        self.base = debug_info_table_header_offset
-        
-    def get_debug_info(self):
-        count = self.ec.getMemoryService().readMemory32(self.base + 0x4)
-        debug_info_table_base = self.ec.getMemoryService().readMemory32(self.base + 0x8)
-        
-        self.DebugInfos = []
-        
-        for i in range(0, count):
-            # Get the address of the structure EFI_DEBUG_IMAGE_INFO
-            debug_info = self.ec.getMemoryService().readMemory32(debug_info_table_base + (i * 4))
-            if debug_info:
-                debug_info_type = self.ec.getMemoryService().readMemory32(debug_info)
-                # Normal Debug Info Type
-                if debug_info_type == 1:
-                    # Get the base address of the structure EFI_LOADED_IMAGE_PROTOCOL
-                    loaded_image_protocol = self.ec.getMemoryService().readMemory32(debug_info + 0x4)
-                    
-                    image_base = self.ec.getMemoryService().readMemory32(loaded_image_protocol + 0x20)
-                    image_size = self.ec.getMemoryService().readMemory32(loaded_image_protocol + 0x28)
-                    
-                    self.DebugInfos.append((image_base,image_size))
-    
-    # Return (base, size)
-    def load_symbols_at(self, addr):
-        if self.DebugInfos == []:
-            self.get_debug_info()
-        
-        found = False
-        for debug_info in self.DebugInfos:
-            if (addr >= debug_info[0]) and (addr < debug_info[0] + debug_info[1]):
-                section = firmware_volume.EfiSectionPE32(self.ec, debug_info[0])
-                
-                edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
-
-                found = True
-                return debug_info
-
-        if found == False:
-            raise Exception('DebugInfoTable','No symbol found at 0x%x' % addr)
-
-    def load_all_symbols(self):
-        if self.DebugInfos == []:
-            self.get_debug_info()
-        
-        for debug_info in self.DebugInfos:
-            section = firmware_volume.EfiSectionPE32(self.ec, debug_info[0])
-           
-            edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
-
-    def dump(self):
-        self.get_debug_info()
-        for debug_info in self.DebugInfos:
-            base_pe32 = debug_info[0]
-            section = firmware_volume.EfiSectionPE32(self.ec, base_pe32)
-            print section.get_debug_filepath()
-        
-class SystemTable:
-    CONST_ST_SIGNATURE = ('I','B','I',' ','S','Y','S','T')
-    
-    def __init__(self, ec, membase, memsize):
-        self.membase = membase
-        self.memsize = memsize
-        self.ec = ec
-        
-        found = False
-        
-        # Start from the top of the memory
-        offset = self.membase + self.memsize
-        # Align to highest 4MB boundary
-        offset = offset & ~0x3FFFFF
-        # We should not have a System Table at the top of the System Memory
-        offset = offset - 0x400000
-        
-        # Start at top and look on 4MB boundaries for system table ptr structure
-        while offset > self.membase:
-            try:
-                signature = struct.unpack("cccccccc", self.ec.getMemoryService().read(str(offset), 8, 32))
-            except DebugException:
-                raise Exception('SystemTable','Fail to access System Memory. Ensure all the memory in the region [0x%x;0x%X] is accessible.' % (membase,membase+memsize))
-            if signature == SystemTable.CONST_ST_SIGNATURE:
-                found = True
-                self.system_table_base = self.ec.getMemoryService().readMemory32(offset + 0x8)
-                break
-            offset = offset - 0x400000
-            
-        if not found:
-            raise Exception('SystemTable','System Table not found in System Memory [0x%x;0x%X]' % (membase,membase+memsize))
-        
-    def get_configuration_table(self, conf_table_guid):
-        # Number of configuration Table entry
-        conf_table_entry_count = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x40)
-        
-        # Get location of the Configuration Table entries
-        conf_table_offset = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x44)
-        
-        for i in range(0, conf_table_entry_count):
-            offset = conf_table_offset + (i * 0x14)
-            guid = struct.unpack("<IIII", self.ec.getMemoryService().read(str(offset), 16, 32))
-            if guid == conf_table_guid:
-                return self.ec.getMemoryService().readMemory32(offset + 0x10)
-            
-        raise Exception('SystemTable','Configuration Table not found')
+#
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+
+from arm_ds.debugger_v1 import DebugException
+
+import struct
+
+import edk2_debugger
+import firmware_volume
+
+class DebugInfoTable:
+    CONST_DEBUG_INFO_TABLE_GUID = ( 0x49152E77L, 0x47641ADAL, 0xFE7AA2B7L, 0x8B5ED9FEL)
+    
+    DebugInfos = []
+    
+    def __init__(self, ec, debug_info_table_header_offset):
+        self.ec = ec
+        self.base = debug_info_table_header_offset
+        
+    def get_debug_info(self):
+        count = self.ec.getMemoryService().readMemory32(self.base + 0x4)
+        debug_info_table_base = self.ec.getMemoryService().readMemory32(self.base + 0x8)
+        
+        self.DebugInfos = []
+        
+        for i in range(0, count):
+            # Get the address of the structure EFI_DEBUG_IMAGE_INFO
+            debug_info = self.ec.getMemoryService().readMemory32(debug_info_table_base + (i * 4))
+            if debug_info:
+                debug_info_type = self.ec.getMemoryService().readMemory32(debug_info)
+                # Normal Debug Info Type
+                if debug_info_type == 1:
+                    # Get the base address of the structure EFI_LOADED_IMAGE_PROTOCOL
+                    loaded_image_protocol = self.ec.getMemoryService().readMemory32(debug_info + 0x4)
+                    
+                    image_base = self.ec.getMemoryService().readMemory32(loaded_image_protocol + 0x20)
+                    image_size = self.ec.getMemoryService().readMemory32(loaded_image_protocol + 0x28)
+                    
+                    self.DebugInfos.append((image_base,image_size))
+    
+    # Return (base, size)
+    def load_symbols_at(self, addr):
+        if self.DebugInfos == []:
+            self.get_debug_info()
+        
+        found = False
+        for debug_info in self.DebugInfos:
+            if (addr >= debug_info[0]) and (addr < debug_info[0] + debug_info[1]):
+                section = firmware_volume.EfiSectionPE32(self.ec, debug_info[0])
+                
+                edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
+
+                found = True
+                return debug_info
+
+        if found == False:
+            raise Exception('DebugInfoTable','No symbol found at 0x%x' % addr)
+
+    def load_all_symbols(self):
+        if self.DebugInfos == []:
+            self.get_debug_info()
+        
+        for debug_info in self.DebugInfos:
+            section = firmware_volume.EfiSectionPE32(self.ec, debug_info[0])
+           
+            edk2_debugger.load_symbol_from_file(self.ec, section.get_debug_filepath(), section.get_debug_elfbase())
+
+    def dump(self):
+        self.get_debug_info()
+        for debug_info in self.DebugInfos:
+            base_pe32 = debug_info[0]
+            section = firmware_volume.EfiSectionPE32(self.ec, base_pe32)
+            print section.get_debug_filepath()
+        
+class SystemTable:
+    CONST_ST_SIGNATURE = ('I','B','I',' ','S','Y','S','T')
+    
+    def __init__(self, ec, membase, memsize):
+        self.membase = membase
+        self.memsize = memsize
+        self.ec = ec
+        
+        found = False
+        
+        # Start from the top of the memory
+        offset = self.membase + self.memsize
+        # Align to highest 4MB boundary
+        offset = offset & ~0x3FFFFF
+        # We should not have a System Table at the top of the System Memory
+        offset = offset - 0x400000
+        
+        # Start at top and look on 4MB boundaries for system table ptr structure
+        while offset > self.membase:
+            try:
+                signature = struct.unpack("cccccccc", self.ec.getMemoryService().read(str(offset), 8, 32))
+            except DebugException:
+                raise Exception('SystemTable','Fail to access System Memory. Ensure all the memory in the region [0x%x;0x%X] is accessible.' % (membase,membase+memsize))
+            if signature == SystemTable.CONST_ST_SIGNATURE:
+                found = True
+                self.system_table_base = self.ec.getMemoryService().readMemory32(offset + 0x8)
+                break
+            offset = offset - 0x400000
+            
+        if not found:
+            raise Exception('SystemTable','System Table not found in System Memory [0x%x;0x%X]' % (membase,membase+memsize))
+        
+    def get_configuration_table(self, conf_table_guid):
+        # Number of configuration Table entry
+        conf_table_entry_count = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x40)
+        
+        # Get location of the Configuration Table entries
+        conf_table_offset = self.ec.getMemoryService().readMemory32(self.system_table_base + 0x44)
+        
+        for i in range(0, conf_table_entry_count):
+            offset = conf_table_offset + (i * 0x14)
+            guid = struct.unpack("<IIII", self.ec.getMemoryService().read(str(offset), 16, 32))
+            if guid == conf_table_guid:
+                return self.ec.getMemoryService().readMemory32(offset + 0x10)
+            
+        raise Exception('SystemTable','Configuration Table not found')
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 55807ec9d9..be165442bf 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -1,195 +1,195 @@
-/** @file
-*  Main file supporting the SEC Phase on ARM Platforms
-*
-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-*  
-*  This program and the accompanying materials                          
-*  are licensed and made available under the terms and conditions of the BSD License         
-*  which accompanies this distribution.  The full text of the license may be found at        
-*  http://opensource.org/licenses/bsd-license.php                                            
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
-*
-**/
-
-#include <Library/ArmTrustedMonitorLib.h>
-#include <Library/DebugAgentLib.h>
-#include <Library/PrintLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/SerialPortLib.h>
-#include <Library/ArmGicLib.h>
-
-#include "SecInternal.h"
-
-#define SerialPrint(txt)  SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
-
-VOID
-CEntryPoint (
-  IN  UINTN                     MpId,
-  IN  UINTN                     SecBootMode
-  )
-{
-  CHAR8           Buffer[100];
-  UINTN           CharCount;
-  UINTN           JumpAddress;
-
-  // Invalidate the data cache. Doesn't have to do the Data cache clean.
-  ArmInvalidateDataCache();
-
-  // Invalidate Instruction Cache
-  ArmInvalidateInstructionCache();
-
-  // Invalidate I & D TLBs
-  ArmInvalidateInstructionAndDataTlb();
-
-  // CPU specific settings
-  ArmCpuSetup (MpId);
-
-  // Enable Floating Point Coprocessor if supported by the platform
-  if (FixedPcdGet32 (PcdVFPEnabled)) {
-    ArmEnableVFP();
-  }
-
-  // Initialize peripherals that must be done at the early stage
-  // Example: Some L2 controller, interconnect, clock, DMC, etc
-  ArmPlatformSecInitialize (MpId);
-
-  // Primary CPU clears out the SCU tag RAMs, secondaries wait
-  if (IS_PRIMARY_CORE(MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) {
-    if (ArmIsMpCore()) {
-      // Signal for the initial memory is configured (event: BOOT_MEM_INIT)
-      ArmCallSEV ();
-    }
-
-    // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
-    // In non SEC modules the init call is in autogenerated code.
-    SerialPortInitialize ();
-
-    // Start talking
-    if (FixedPcdGetBool (PcdTrustzoneSupport)) {
-      CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Secure firmware (version %s built at %a on %a)\n\r",
-          (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
-    } else {
-      CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Boot firmware (version %s built at %a on %a)\n\r",
-          (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
-    }
-    SerialPortWrite ((UINT8 *) Buffer, CharCount);
-
-    // Initialize the Debug Agent for Source Level Debugging
-    InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
-    SaveAndSetDebugTimerInterrupt (TRUE);
-
-    // Enable the GIC distributor and CPU Interface
-    // - no other Interrupts are enabled,  doesn't have to worry about the priority.
-    // - all the cores are in secure state, use secure SGI's
-    ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
-    ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
-  } else {
-    // Enable the GIC CPU Interface
-    ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
-  }
-
-  // Enable Full Access to CoProcessors
-  ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
-
-  // Test if Trustzone is supported on this platform
-  if (FixedPcdGetBool (PcdTrustzoneSupport)) {
-    if (ArmIsMpCore()) {
-      // Setup SMP in Non Secure world
-      ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
-    }
-
-    // Either we use the Secure Stacks for Secure Monitor (in this case (Base == 0) && (Size == 0))
-    // Or we use separate Secure Monitor stacks (but (Base != 0) && (Size != 0))
-    ASSERT (((PcdGet32(PcdCPUCoresSecMonStackBase) == 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) == 0)) ||
-            ((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0)));
-
-    // Enter Monitor Mode
-    enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
-  } else {
-    if (IS_PRIMARY_CORE(MpId)) {
-      SerialPrint ("Trust Zone Configuration is disabled\n\r");
-    }
-
-    // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
-    // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
-    // Status Register as the the current one (CPSR).
-    copy_cpsr_into_spsr ();
-
-    // Call the Platform specific function to execute additional actions if required
-    JumpAddress = PcdGet32 (PcdFvBaseAddress);
-    ArmPlatformSecExtraAction (MpId, &JumpAddress);
-
-    NonTrustedWorldTransition (MpId, JumpAddress);
-  }
-  ASSERT (0); // We must never return from the above function
-}
-
-VOID
-TrustedWorldInitialization (
-  IN  UINTN                     MpId,
-  IN  UINTN                     SecBootMode
-  )
-{
-  UINTN   JumpAddress;
-
-  //-------------------- Monitor Mode ---------------------
-
-  // Set up Monitor World (Vector Table, etc)
-  ArmSecureMonitorWorldInitialize ();
-
-  // Transfer the interrupt to Non-secure World
-  ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
-
-  // Initialize platform specific security policy
-  ArmPlatformSecTrustzoneInit (MpId);
-
-  // Setup the Trustzone Chipsets
-  if (SecBootMode == ARM_SEC_COLD_BOOT) {
-    if (IS_PRIMARY_CORE(MpId)) {
-      if (ArmIsMpCore()) {
-        // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
-        ArmCallSEV ();
-      }
-    } else {
-      // The secondary cores need to wait until the Trustzone chipsets configuration is done
-      // before switching to Non Secure World
-
-      // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
-      ArmCallWFE ();
-    }
-  }
-
-  // Call the Platform specific function to execute additional actions if required
-  JumpAddress = PcdGet32 (PcdFvBaseAddress);
-  ArmPlatformSecExtraAction (MpId, &JumpAddress);
-
-  // Write to CP15 Non-secure Access Control Register
-  ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
-
-  // CP15 Secure Configuration Register
-  ArmWriteScr (PcdGet32 (PcdArmScr));
-
-  NonTrustedWorldTransition (MpId, JumpAddress);
-}
-
-VOID
-NonTrustedWorldTransition (
-  IN  UINTN                     MpId,
-  IN  UINTN                     JumpAddress
-  )
-{
-  // If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
-  // By not set, the mode for Non Secure World is SVC
-  if (PcdGet32 (PcdArmNonSecModeTransition) != 0) {
-    set_non_secure_mode ((ARM_PROCESSOR_MODE)PcdGet32 (PcdArmNonSecModeTransition));
-  }
-
-  return_from_exception (JumpAddress);
-  //-------------------- Non Secure Mode ---------------------
-
-  // PEI Core should always load and never return
-  ASSERT (FALSE);
-}
-
+/** @file
+*  Main file supporting the SEC Phase on ARM Platforms
+*
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+*  
+*  This program and the accompanying materials                          
+*  are licensed and made available under the terms and conditions of the BSD License         
+*  which accompanies this distribution.  The full text of the license may be found at        
+*  http://opensource.org/licenses/bsd-license.php                                            
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+*
+**/
+
+#include <Library/ArmTrustedMonitorLib.h>
+#include <Library/DebugAgentLib.h>
+#include <Library/PrintLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/SerialPortLib.h>
+#include <Library/ArmGicLib.h>
+
+#include "SecInternal.h"
+
+#define SerialPrint(txt)  SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
+
+VOID
+CEntryPoint (
+  IN  UINTN                     MpId,
+  IN  UINTN                     SecBootMode
+  )
+{
+  CHAR8           Buffer[100];
+  UINTN           CharCount;
+  UINTN           JumpAddress;
+
+  // Invalidate the data cache. Doesn't have to do the Data cache clean.
+  ArmInvalidateDataCache();
+
+  // Invalidate Instruction Cache
+  ArmInvalidateInstructionCache();
+
+  // Invalidate I & D TLBs
+  ArmInvalidateInstructionAndDataTlb();
+
+  // CPU specific settings
+  ArmCpuSetup (MpId);
+
+  // Enable Floating Point Coprocessor if supported by the platform
+  if (FixedPcdGet32 (PcdVFPEnabled)) {
+    ArmEnableVFP();
+  }
+
+  // Initialize peripherals that must be done at the early stage
+  // Example: Some L2 controller, interconnect, clock, DMC, etc
+  ArmPlatformSecInitialize (MpId);
+
+  // Primary CPU clears out the SCU tag RAMs, secondaries wait
+  if (IS_PRIMARY_CORE(MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) {
+    if (ArmIsMpCore()) {
+      // Signal for the initial memory is configured (event: BOOT_MEM_INIT)
+      ArmCallSEV ();
+    }
+
+    // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
+    // In non SEC modules the init call is in autogenerated code.
+    SerialPortInitialize ();
+
+    // Start talking
+    if (FixedPcdGetBool (PcdTrustzoneSupport)) {
+      CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Secure firmware (version %s built at %a on %a)\n\r",
+          (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
+    } else {
+      CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Boot firmware (version %s built at %a on %a)\n\r",
+          (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
+    }
+    SerialPortWrite ((UINT8 *) Buffer, CharCount);
+
+    // Initialize the Debug Agent for Source Level Debugging
+    InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
+    SaveAndSetDebugTimerInterrupt (TRUE);
+
+    // Enable the GIC distributor and CPU Interface
+    // - no other Interrupts are enabled,  doesn't have to worry about the priority.
+    // - all the cores are in secure state, use secure SGI's
+    ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
+    ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
+  } else {
+    // Enable the GIC CPU Interface
+    ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
+  }
+
+  // Enable Full Access to CoProcessors
+  ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
+
+  // Test if Trustzone is supported on this platform
+  if (FixedPcdGetBool (PcdTrustzoneSupport)) {
+    if (ArmIsMpCore()) {
+      // Setup SMP in Non Secure world
+      ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
+    }
+
+    // Either we use the Secure Stacks for Secure Monitor (in this case (Base == 0) && (Size == 0))
+    // Or we use separate Secure Monitor stacks (but (Base != 0) && (Size != 0))
+    ASSERT (((PcdGet32(PcdCPUCoresSecMonStackBase) == 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) == 0)) ||
+            ((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0)));
+
+    // Enter Monitor Mode
+    enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
+  } else {
+    if (IS_PRIMARY_CORE(MpId)) {
+      SerialPrint ("Trust Zone Configuration is disabled\n\r");
+    }
+
+    // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
+    // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
+    // Status Register as the the current one (CPSR).
+    copy_cpsr_into_spsr ();
+
+    // Call the Platform specific function to execute additional actions if required
+    JumpAddress = PcdGet32 (PcdFvBaseAddress);
+    ArmPlatformSecExtraAction (MpId, &JumpAddress);
+
+    NonTrustedWorldTransition (MpId, JumpAddress);
+  }
+  ASSERT (0); // We must never return from the above function
+}
+
+VOID
+TrustedWorldInitialization (
+  IN  UINTN                     MpId,
+  IN  UINTN                     SecBootMode
+  )
+{
+  UINTN   JumpAddress;
+
+  //-------------------- Monitor Mode ---------------------
+
+  // Set up Monitor World (Vector Table, etc)
+  ArmSecureMonitorWorldInitialize ();
+
+  // Transfer the interrupt to Non-secure World
+  ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
+
+  // Initialize platform specific security policy
+  ArmPlatformSecTrustzoneInit (MpId);
+
+  // Setup the Trustzone Chipsets
+  if (SecBootMode == ARM_SEC_COLD_BOOT) {
+    if (IS_PRIMARY_CORE(MpId)) {
+      if (ArmIsMpCore()) {
+        // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
+        ArmCallSEV ();
+      }
+    } else {
+      // The secondary cores need to wait until the Trustzone chipsets configuration is done
+      // before switching to Non Secure World
+
+      // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
+      ArmCallWFE ();
+    }
+  }
+
+  // Call the Platform specific function to execute additional actions if required
+  JumpAddress = PcdGet32 (PcdFvBaseAddress);
+  ArmPlatformSecExtraAction (MpId, &JumpAddress);
+
+  // Write to CP15 Non-secure Access Control Register
+  ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
+
+  // CP15 Secure Configuration Register
+  ArmWriteScr (PcdGet32 (PcdArmScr));
+
+  NonTrustedWorldTransition (MpId, JumpAddress);
+}
+
+VOID
+NonTrustedWorldTransition (
+  IN  UINTN                     MpId,
+  IN  UINTN                     JumpAddress
+  )
+{
+  // If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
+  // By not set, the mode for Non Secure World is SVC
+  if (PcdGet32 (PcdArmNonSecModeTransition) != 0) {
+    set_non_secure_mode ((ARM_PROCESSOR_MODE)PcdGet32 (PcdArmNonSecModeTransition));
+  }
+
+  return_from_exception (JumpAddress);
+  //-------------------- Non Secure Mode ---------------------
+
+  // PEI Core should always load and never return
+  ASSERT (FALSE);
+}
+