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-rw-r--r--BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c23
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diff --git a/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c
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index 0000000000..26fed03611
--- /dev/null
+++ b/BraswellPlatformPkg/Common/Override/IntelFspWrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecRamInitData.c
@@ -0,0 +1,23 @@
+/** @file
+ Sample to provide TempRamInitParams data.
+
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/PcdLib.h>
+
+GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT32 TempRamInitParams[4] = {
+ ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicroCodeOffset)),
+ ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicroCodeOffset)),
+ FixedPcdGet32 (PcdFlashCodeCacheAddress),
+ FixedPcdGet32 (PcdFlashCodeCacheSize)
+};