diff options
Diffstat (limited to 'Core/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm')
-rw-r--r-- | Core/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/Core/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm b/Core/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm new file mode 100644 index 0000000000..de61a05e19 --- /dev/null +++ b/Core/MdePkg/Library/BaseLib/Ia32/EnableCache.nasm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmEnableCache)
+ASM_PFX(AsmEnableCache):
+ wbinvd
+ mov eax, cr0
+ btr eax, 29
+ btr eax, 30
+ mov cr0, eax
+ ret
+
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