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diff --git a/CorebootPayloadPkg/BuildAndIntegrationInstructions.txt b/CorebootPayloadPkg/BuildAndIntegrationInstructions.txt new file mode 100644 index 0000000000..057ea5d50d --- /dev/null +++ b/CorebootPayloadPkg/BuildAndIntegrationInstructions.txt @@ -0,0 +1,91 @@ +================================================================================
+Build And Integration Instructions
+2014 June 24th
+================================================================================
+
+================================================================================
+DISCLAIMER
+================================================================================
+This release note as well as the software described in it is furnished under license
+and may only be used or copied in accordance with the terms of the license. The
+information in this manual is furnished for informational use only, is subject to
+change without notice, and should not be construed as a commitment by Intel Corporation.
+Intel Corporation assumes no responsibility or liability for any errors or inaccuracies
+that may appear in this document or any software that may be provided in association
+with this document.
+Except as permitted by such license, no part of this document may be reproduced,
+stored in a retrieval system, or transmitted in any form or by any means without
+the express written consent of Intel Corporation.
+
+================================================================================
+ INDEX
+================================================================================
+A. INTRODUCTION
+B. HOW TO BUILD
+C. HOW TO INTEGRATE
+
+================================================================================
+A. INTRODUCTION
+================================================================================
+This document provides instructions on how to build Coreboot Uefi Payload and
+how to integrate it into coreboot firmware.
+
+================================================================================
+B. HOW TO BUILD
+================================================================================
+1. Run the below two commands in windows command prompt window:
+ edksetup.bat
+
+ For debug ia32 build:
+ build -a IA32 -p CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b DEBUG -t <ToolChain>
+
+ For release ia32 build:
+ build -a IA32 -p CorebootPayloadPkg\CorebootPayloadPkgIA32.dsc -b RELEASE -t <ToolChain>
+
+ For debug X64 build:
+ build -a IA32 -a X64 -p CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b DEBUG -t <ToolChain>
+
+ For release X64 build:
+ build -a IA32 -a X64 -p CorebootPayloadPkg\CorebootPayloadPkgX64.dsc -b RELEASE -t <ToolChain>
+
+ <ToolChain> is the EDK II build environment on your host. Currently it was tested with VS2008x64 toolchain.
+
+ For details about EDK II build steps, refer to http://svn.code.sf.net/p/edk2/code/branches/UDK2014/BuildNotes2.txt
+
+2. If build is successfully, the payload image (UEFIPAYLOAD.fd) will be generated inside the folder of Build\CorebootPayloadPkg.
+
+================================================================================
+C. HOW TO INTEGRATE
+================================================================================
+1. Copy the payload image (UEFIPAYLOAD.fd) into the top-level directory of Coreboot source tree.
+2. Run "make menuconfig" in linux console to start Coreboot configuration surface.
+3. In the Payload section,
+ 1) Choose "An ELF executable payload" for the option of "Add a payload".
+ 2) Type the path of payload image for the option of "Payload path and filename".
+ 3) Select the option of "Use LZMA compression for payloads".
+
+4. If the graphics console is required in Coreboot UEFI payload, running VGA option rom should be enabled.
+ For details:
+ 1) In the Device section, select the option of "Run VGA Option ROMs".
+ 2) In the VGA BIOS section, select the option of "Add a VGA BIOS Image", Input the path of vga bios image
+ for the option of VGA BIOS path and filename, give the values of vendor id and device id for the option
+ of "VGA device PCI IDs".
+ 3) In the Display section,
+ Select the option of "Set framebuffer graphics resolution"
+ Choose a right display mode for the option of "framebuffer graphics resolution".
+ Note: If the boot OS is windows, please choose the display mode supporting 32 bit color.
+ Select the option of "Keep VESA framebuffer"
+
+5. Press ESC key to exit the Coreboot configuration surface. If there is a question prompted like "Do you wish to save your new configuration?",
+ choose Yes.
+
+6. Run "make" to build the coreboot firmware image.
+
+
+
+
+
+
+
+
+
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