diff options
Diffstat (limited to 'IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c')
-rw-r--r-- | IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c | 106 |
1 files changed, 53 insertions, 53 deletions
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c index 31bdd8d234..ab9d3a0025 100644 --- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c +++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c @@ -1,31 +1,30 @@ /** @file
- This module implement Pci register operation interface for
- Pci device.
-
-Copyright (c) 2006, Intel Corporation
-All rights reserved. This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ PCI command register operations supporting functions implementation for PCI Bus module.
-**/
+Copyright (c) 2006 - 2009, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+**/
#include "PciBus.h"
/**
Operate the PCI register via PciIo function interface.
-
- @param PciIoDevice Pointer to instance of PCI_IO_DEVICE
- @param Command Operator command
+
+ @param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
+ @param Command Operator command.
@param Offset The address within the PCI configuration space for the PCI controller.
- @param Operation Type of Operation
- @param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER
-
- @return status of PciIo operation
+ @param Operation Type of Operation.
+ @param PtrCommand Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.
+
+ @return Status of PciIo operation.
+
**/
EFI_STATUS
PciOperateRegister (
@@ -76,19 +75,19 @@ PciOperateRegister ( }
/**
- check the cpability of this device supports
-
- @param PciIoDevice Pointer to instance of PCI_IO_DEVICE
-
- @retval TRUE Support
- @retval FALSE Not support.
+ Check the cpability supporting by given device.
+
+ @param PciIoDevice Pointer to instance of PCI_IO_DEVICE.
+
+ @retval TRUE Cpability supportted.
+ @retval FALSE Cpability not supportted.
+
**/
BOOLEAN
PciCapabilitySupport (
IN PCI_IO_DEVICE *PciIoDevice
)
{
-
if ((PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) != 0) {
return TRUE;
}
@@ -97,16 +96,17 @@ PciCapabilitySupport ( }
/**
- Locate cap reg.
-
- @param PciIoDevice - A pointer to the PCI_IO_DEVICE.
- @param CapId - The cap ID.
- @param Offset - A pointer to the offset.
- @param NextRegBlock - A pointer to the next block.
-
- @retval EFI_UNSUPPORTED Pci device does not support
+ Locate capability register block per capability ID.
+
+ @param PciIoDevice A pointer to the PCI_IO_DEVICE.
+ @param CapId The capability ID.
+ @param Offset A pointer to the offset returned.
+ @param NextRegBlock A pointer to the next block returned.
+
+ @retval EFI_SUCCESS Successfuly located capability register block.
+ @retval EFI_UNSUPPORTED Pci device does not support capability.
@retval EFI_NOT_FOUND Pci device support but can not find register block.
- @retval EFI_SUCCESS Success to locate capability register block
+
**/
EFI_STATUS
LocateCapabilityRegBlock (
@@ -135,32 +135,32 @@ LocateCapabilityRegBlock ( if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
PciIoRead (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint8,
- EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
- 1,
- &CapabilityPtr
- );
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint8,
+ EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
+ 1,
+ &CapabilityPtr
+ );
} else {
PciIoRead (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint8,
- PCI_CAPBILITY_POINTER_OFFSET,
- 1,
- &CapabilityPtr
- );
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint8,
+ PCI_CAPBILITY_POINTER_OFFSET,
+ 1,
+ &CapabilityPtr
+ );
}
}
while ((CapabilityPtr >= 0x40) && ((CapabilityPtr & 0x03) == 0x00)) {
PciIoRead (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint16,
- CapabilityPtr,
- 1,
- &CapabilityEntry
- );
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint16,
+ CapabilityPtr,
+ 1,
+ &CapabilityEntry
+ );
CapabilityID = (UINT8) CapabilityEntry;
|