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path: root/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
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Diffstat (limited to 'MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c')
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c26
1 files changed, 15 insertions, 11 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
index 9f3fcce6f7..8a8b4b8fac 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
@@ -1,7 +1,7 @@
/** @file
PCI command register operations supporting functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -200,9 +200,10 @@ LocatePciExpressCapabilityRegBlock (
OUT UINT32 *NextRegBlock OPTIONAL
)
{
- UINT32 CapabilityPtr;
- UINT32 CapabilityEntry;
- UINT16 CapabilityID;
+ EFI_STATUS Status;
+ UINT32 CapabilityPtr;
+ UINT32 CapabilityEntry;
+ UINT16 CapabilityID;
//
// To check the capability of this device supports
@@ -222,13 +223,16 @@ LocatePciExpressCapabilityRegBlock (
// Mask it to DWORD alignment per PCI spec
//
CapabilityPtr &= 0xFFC;
- PciIoDevice->PciIo.Pci.Read (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint32,
- CapabilityPtr,
- 1,
- &CapabilityEntry
- );
+ Status = PciIoDevice->PciIo.Pci.Read (
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint32,
+ CapabilityPtr,
+ 1,
+ &CapabilityEntry
+ );
+ if (EFI_ERROR (Status)) {
+ break;
+ }
CapabilityID = (UINT16) CapabilityEntry;