1 files changed, 64 insertions, 32 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
index dbb415ac2d..78811419bf 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -59,20 +59,19 @@ UINT8 mOutStride[] = {
   Construct the Pci Root Bridge instance.
 
   @param Bridge            The root bridge instance.
-  @param HostBridgeHandle  Handle to the HostBridge.
 
   @return The pointer to PCI_ROOT_BRIDGE_INSTANCE just created
           or NULL if creation fails.
 **/
 PCI_ROOT_BRIDGE_INSTANCE *
 CreateRootBridge (
-  IN PCI_ROOT_BRIDGE       *Bridge,
-  IN EFI_HANDLE            HostBridgeHandle
+  IN PCI_ROOT_BRIDGE       *Bridge
   )
 {
   PCI_ROOT_BRIDGE_INSTANCE *RootBridge;
   PCI_RESOURCE_TYPE        Index;
   CHAR16                   *DevicePathStr;
+  PCI_ROOT_BRIDGE_APERTURE *Aperture;
 
   DevicePathStr = NULL;
 
@@ -120,32 +119,37 @@ CreateRootBridge (
     }
   }
 
-  if ((Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0) {
-    //
-    // If this bit is set, then the PCI Root Bridge does not
-    // support separate windows for Non-prefetchable and Prefetchable
-    // memory.
-    //
-    ASSERT (Bridge->PMem.Base > Bridge->PMem.Limit);
-    ASSERT (Bridge->PMemAbove4G.Base > Bridge->PMemAbove4G.Limit);
-    if ((Bridge->PMem.Base <= Bridge->PMem.Limit) ||
-        (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit)
-        ) {
-      return NULL;
+  //
+  // Ignore AllocationAttributes when resources were already assigned.
+  //
+  if (!Bridge->ResourceAssigned) {
+    if ((Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM) != 0) {
+      //
+      // If this bit is set, then the PCI Root Bridge does not
+      // support separate windows for Non-prefetchable and Prefetchable
+      // memory.
+      //
+      ASSERT (Bridge->PMem.Base > Bridge->PMem.Limit);
+      ASSERT (Bridge->PMemAbove4G.Base > Bridge->PMemAbove4G.Limit);
+      if ((Bridge->PMem.Base <= Bridge->PMem.Limit) ||
+          (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit)
+          ) {
+        return NULL;
+      }
     }
-  }
 
-  if ((Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) == 0) {
-    //
-    // If this bit is not set, then the PCI Root Bridge does not support
-    // 64 bit memory windows.
-    //
-    ASSERT (Bridge->MemAbove4G.Base > Bridge->MemAbove4G.Limit);
-    ASSERT (Bridge->PMemAbove4G.Base > Bridge->PMemAbove4G.Limit);
-    if ((Bridge->MemAbove4G.Base <= Bridge->MemAbove4G.Limit) ||
-        (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit)
-        ) {
-      return NULL;
+    if ((Bridge->AllocationAttributes & EFI_PCI_HOST_BRIDGE_MEM64_DECODE) == 0) {
+      //
+      // If this bit is not set, then the PCI Root Bridge does not support
+      // 64 bit memory windows.
+      //
+      ASSERT (Bridge->MemAbove4G.Base > Bridge->MemAbove4G.Limit);
+      ASSERT (Bridge->PMemAbove4G.Base > Bridge->PMemAbove4G.Limit);
+      if ((Bridge->MemAbove4G.Base <= Bridge->MemAbove4G.Limit) ||
+          (Bridge->PMemAbove4G.Base <= Bridge->PMemAbove4G.Limit)
+          ) {
+        return NULL;
+      }
     }
   }
 
@@ -174,14 +178,42 @@ CreateRootBridge (
   CopyMem (&RootBridge->PMemAbove4G, &Bridge->PMemAbove4G, sizeof (PCI_ROOT_BRIDGE_APERTURE));
 
   for (Index = TypeIo; Index < TypeMax; Index++) {
-    RootBridge->ResAllocNode[Index].Type   = Index;
-    RootBridge->ResAllocNode[Index].Base   = 0;
-    RootBridge->ResAllocNode[Index].Length = 0;
-    RootBridge->ResAllocNode[Index].Status = ResNone;
+    switch (Index) {
+    case TypeBus:
+      Aperture = &RootBridge->Bus;
+      break;
+    case TypeIo:
+      Aperture = &RootBridge->Io;
+      break;
+    case TypeMem32:
+      Aperture = &RootBridge->Mem;
+      break;
+    case TypeMem64:
+      Aperture = &RootBridge->MemAbove4G;
+      break;
+    case TypePMem32:
+      Aperture = &RootBridge->PMem;
+      break;
+    case TypePMem64:
+      Aperture = &RootBridge->PMemAbove4G;
+      break;
+    default:
+      ASSERT (FALSE);
+      break;
+    }
+    RootBridge->ResAllocNode[Index].Type     = Index;
+    if (Bridge->ResourceAssigned && (Aperture->Limit >= Aperture->Base)) {
+      RootBridge->ResAllocNode[Index].Base   = Aperture->Base;
+      RootBridge->ResAllocNode[Index].Length = Aperture->Limit - Aperture->Base + 1;
+      RootBridge->ResAllocNode[Index].Status = ResAllocated;
+    } else {
+      RootBridge->ResAllocNode[Index].Base   = 0;
+      RootBridge->ResAllocNode[Index].Length = 0;
+      RootBridge->ResAllocNode[Index].Status = ResNone;
+    }
   }
 
   RootBridge->RootBridgeIo.SegmentNumber  = Bridge->Segment;
-  RootBridge->RootBridgeIo.ParentHandle   = HostBridgeHandle;
   RootBridge->RootBridgeIo.PollMem        = RootBridgeIoPollMem;
   RootBridge->RootBridgeIo.PollIo         = RootBridgeIoPollIo;
   RootBridge->RootBridgeIo.Mem.Read       = RootBridgeIoMemRead;