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path: root/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
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Diffstat (limited to 'MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c')
-rw-r--r--MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
index aedc2e8dc0..dde31e0f1a 100644
--- a/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciPei/XhciSched.c
@@ -1754,8 +1754,8 @@ XhcPeiSetConfigCmd (
((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingSeg0,
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
- PhyAddr &= ~(0x0F);
- PhyAddr |= ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
+ PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
+ PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
InputContext->EP[Dci-1].PtrLo = XHC_LOW_32BIT (PhyAddr);
InputContext->EP[Dci-1].PtrHi = XHC_HIGH_32BIT (PhyAddr);
@@ -1948,8 +1948,8 @@ XhcPeiSetConfigCmd64 (
sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER
);
- PhyAddr &= ~(0x0F);
- PhyAddr |= ((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
+ PhyAddr &= ~((EFI_PHYSICAL_ADDRESS)0x0F);
+ PhyAddr |= (EFI_PHYSICAL_ADDRESS)((TRANSFER_RING *) (UINTN) Xhc->UsbDevContext[SlotId].EndpointTransferRing[Dci-1])->RingPCS;
InputContext->EP[Dci-1].PtrLo = XHC_LOW_32BIT (PhyAddr);
InputContext->EP[Dci-1].PtrHi = XHC_HIGH_32BIT (PhyAddr);