diff options
Diffstat (limited to 'MdePkg/Library/BaseLib/Arm/EnableInterrupts.asm')
-rw-r--r-- | MdePkg/Library/BaseLib/Arm/EnableInterrupts.asm | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/MdePkg/Library/BaseLib/Arm/EnableInterrupts.asm b/MdePkg/Library/BaseLib/Arm/EnableInterrupts.asm index 1a98fb57b4..5c44432818 100644 --- a/MdePkg/Library/BaseLib/Arm/EnableInterrupts.asm +++ b/MdePkg/Library/BaseLib/Arm/EnableInterrupts.asm @@ -1,37 +1,37 @@ -;------------------------------------------------------------------------------ -; -; EnableInterrupts() for ARM -; -; Copyright (c) 2006 - 2009, Intel Corporation<BR> -; Portions copyright (c) 2008-2009 Apple Inc.<BR> -; All rights reserved. This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -;------------------------------------------------------------------------------ - - EXPORT EnableInterrupts - - AREA Interrupt_enable, CODE, READONLY - -;/** -; Enables CPU interrupts. -; -;**/ -;VOID -;EFIAPI -;EnableInterrupts ( -; VOID -; ); -; -EnableInterrupts - MRS R0,CPSR - BIC R0,R0,#0x80 ;Enable IRQ interrupts - MSR CPSR_c,R0 - BX LR - - END +;------------------------------------------------------------------------------
+;
+; EnableInterrupts() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation<BR>
+; Portions copyright (c) 2008-2009 Apple Inc.<BR>
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ EXPORT EnableInterrupts
+
+ AREA Interrupt_enable, CODE, READONLY
+
+;/**
+; Enables CPU interrupts.
+;
+;**/
+;VOID
+;EFIAPI
+;EnableInterrupts (
+; VOID
+; );
+;
+EnableInterrupts
+ MRS R0,CPSR
+ BIC R0,R0,#0x80 ;Enable IRQ interrupts
+ MSR CPSR_c,R0
+ BX LR
+
+ END
|