summaryrefslogtreecommitdiff
path: root/OvmfPkg/PlatformPei
diff options
context:
space:
mode:
Diffstat (limited to 'OvmfPkg/PlatformPei')
-rw-r--r--OvmfPkg/PlatformPei/Platform.c23
-rw-r--r--OvmfPkg/PlatformPei/PlatformPei.inf1
2 files changed, 22 insertions, 2 deletions
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 589c5c3804..ce149e4f97 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -33,6 +33,7 @@
#include <Library/ResourcePublicationLib.h>
#include <Guid/MemoryTypeInformation.h>
#include <Ppi/MasterBootMode.h>
+#include <IndustryStandard/Pci22.h>
#include "Platform.h"
#include "Cmos.h"
@@ -228,9 +229,27 @@ MiscInitialization (
if (!Xen) {
//
- // Set the PM I/O base address to 0x400
+ // The PEI phase should be exited with fully accessibe PIIX4 IO space:
+ // 1. set PMBA
//
- PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32) ~0xFFC0, 0x400);
+ PciAndThenOr32 (
+ PCI_LIB_ADDRESS (0, 1, 3, 0x40),
+ (UINT32) ~0xFFC0,
+ PcdGet16 (PcdAcpiPmBaseAddress)
+ );
+
+ //
+ // 2. set PCICMD/IOSE
+ //
+ PciOr8 (
+ PCI_LIB_ADDRESS (0, 1, 3, PCI_COMMAND_OFFSET),
+ EFI_PCI_COMMAND_IO_SPACE
+ );
+
+ //
+ // 3. set PMREGMISC/PMIOSE
+ //
+ PciOr8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80), 0x01);
}
}
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 8742008c0d..3d5cbbbc2b 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -60,6 +60,7 @@
[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize
+ gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress
gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize