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path: root/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
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Diffstat (limited to 'Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c')
-rw-r--r--Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c24
1 files changed, 17 insertions, 7 deletions
diff --git a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index 50a53d3fff..bcf4f6593c 100644
--- a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -17,10 +17,10 @@
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
#include <Library/DebugLib.h>
-#include <Library/DxeServicesTableLib.h>
#include <Library/LcdPlatformLib.h>
#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/Cpu.h>
#include <Protocol/EdidDiscovered.h>
#include <Protocol/EdidActive.h>
@@ -212,6 +212,7 @@ LcdPlatformGetVram (
)
{
EFI_STATUS Status;
+ EFI_CPU_ARCH_PROTOCOL *Cpu;
ASSERT (VramBaseAddress != NULL);
ASSERT (VramSize != NULL);
@@ -241,13 +242,22 @@ LcdPlatformGetVram (
return Status;
}
- // Mark the VRAM as write-combining.
- // The VRAM is inside the DRAM, which is cacheable.
- Status = gDS->SetMemorySpaceAttributes (
- *VramBaseAddress,
- *VramSize,
- EFI_MEMORY_WC
+ // Ensure the Cpu architectural protocol is already installed
+ Status = gBS->LocateProtocol (
+ &gEfiCpuArchProtocolGuid,
+ NULL,
+ (VOID **)&Cpu
);
+ if (!EFI_ERROR (Status)) {
+ // The VRAM is inside the DRAM, which is cacheable.
+ // Mark the VRAM as write-combining (uncached) and non-executable.
+ Status = Cpu->SetMemoryAttributes (
+ Cpu,
+ *VramBaseAddress,
+ *VramSize,
+ EFI_MEMORY_WC | EFI_MEMORY_XP
+ );
+ }
if (EFI_ERROR (Status)) {
ASSERT_EFI_ERROR (Status);
gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));